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| author | Aapo Vienamo <avienamo@nvidia.com> | 2018-08-10 21:08:41 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-08-27 12:27:33 +0200 |
| commit | 98a2494f847c2d219db3b6460a3446199f0bd300 (patch) | |
| tree | 15ad841b2d137c7d97ea337938429f9dda4a5764 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 918f9671c86b1d4771e9738f9c42abce90194369 (diff) | |
arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4
Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by
setting the assigned-clocks device tree properties. pllc4 offer
better jitter performance and should be used with higher speed
modes like HS200 and HS400.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions