diff options
| -rw-r--r-- | drivers/iommu/intel/iommu.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 2d2f64ce2bc6..7b3016491ca5 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2817,6 +2817,16 @@ intel_iommu_domain_alloc_first_stage(struct device *dev, cfg.common.hw_max_vasz_lg2 = 57; else cfg.common.hw_max_vasz_lg2 = 48; + + /* + * Spec 3.6 First-Stage Translation: + * + * Software must limit addresses to less than the minimum of MGAW + * and the lower canonical address width implied by FSPM (i.e., + * 47-bit when FSPM is 4-level and 56-bit when FSPM is 5-level). + */ + cfg.common.hw_max_vasz_lg2 = min(cap_mgaw(iommu->cap), + cfg.common.hw_max_vasz_lg2); cfg.common.hw_max_oasz_lg2 = 52; cfg.common.features = BIT(PT_FEAT_SIGN_EXTEND) | BIT(PT_FEAT_FLUSH_RANGE); |