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2013-04-09Merge tag 'renesas-soc-r8a7779-for-v3.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 From Simon Horman <horms+renesas@verge.net.au>: Renesas ARM r8a7779 SoC update for v3.10 Update to the r8a7779 SoC: * Add SH Ethernet support * Add comment describing clock ratios This pull request is based on: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 * tag 'renesas-soc-r8a7779-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: R8A7779: add Ether support ARM: shmobile: r8a7779: add each clocks ratio on comment area Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08Merge branch 'gic/cleanup' into next/soc2Arnd Bergmann
Both zynq and shmobile have conflicts against the gic cleanup series, resolved here. Conflicts: arch/arm/mach-shmobile/smp-emev2.c arch/arm/mach-shmobile/smp-r8a7779.c arch/arm/mach-shmobile/smp-sh73a0.c arch/arm/mach-zynq/platsmp.c drivers/gpio/gpio-pl061.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08Merge branch 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx into next/soc2Arnd Bergmann
From Michal Simek <michal.simek@xilinx.com>: This branch is based on zynq/clksrc/cleanup parts because there are some dependencies on moving timer to generic location. I could based it on standard Linux tagged version but you will get several conflicts you will have to resolve. If you are OK to resolving these problems, please let me know I will create another branch with core-smp changes which are not based on zynq/clksrc/cleanup branch. * 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx: arm: zynq: Add hotplug support arm: zynq: Add smp support arm: zynq: Add smp_twd timer arm: zynq: Get rid of xilinx function prefix arm: zynq: Add support for system reset arm: zynq: Move slcr initialization to separate file arm: zynq: Load scu baseaddress at run time Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-05ARM: shmobile: R8A7779: add Ether supportSergei Shtylyov
Add Ether clock and platform device for R8A7779 SoC; add a function to register this device with board-specific platform data. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-04ARM: shmobile: r8a7779: add each clocks ratio on comment areaKuninori Morimoto
Adding comment describing the r8a7779 clock frequencies depending on MD pin settings. Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-04arm: zynq: Add hotplug supportMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Add smp supportMichal Simek
Zynq is dual core Cortex A9 which starts always at zero. Using simple trampoline ensure long jump to secondary_startup code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
2013-04-04arm: zynq: Add smp_twd timerMichal Simek
The zynq has a Cortex-A9 with the corresponding smp_twd timers. Use them. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Get rid of xilinx function prefixMichal Simek
Xilinx is vendor name not SoC name. Use zynq instead. Also remove one checkpatch warning: WARNING: static const char * array should probably be static const char * const +static const char *xilinx_dt_match[] = { Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Add support for system resetMichal Simek
Do system reset via slcr registers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Move slcr initialization to separate fileMichal Simek
Create separate slcr driver instead of polluting common code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Load scu baseaddress at run timeMichal Simek
Use Cortex a9 cp15 to read scu baseaddress. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Move timer to generic locationMichal Simek
Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Do not use xilinx specific function namesMichal Simek
Remove all xilinx specific names from the driver because this is generic driver for cadence ttc. xttc->ttc ttcps->ttc ... No functional changes in this driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Move timer to clocksource interfaceMichal Simek
Use clocksource timer initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-04arm: zynq: Use standard timer bindingMichal Simek
Use cdns,ttc because this driver is Cadence Rev06 Triple Timer Counter and everybody can use it without xilinx specific function name or probing. Also use standard dt description for timer and also prepare for moving to clocksource initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-04-02Merge tag 'renesas-pinmux2-for-v3.10' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 * tag 'renesas-pinmux2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (185 commits) sh-pfc: r8a73a4: Remove unused GPIO bias data ARM: shmobile: r8a73a4: Remove all GPIO enums sh-pfc: r8a73a4: Remove function GPIOs ARM: shmobile: r8a73a4: Remove IRQC function GPIOs ARM: shmobile: r8a73a4: Remove SCIF function GPIOs sh-pfc: r8a73a4: Remove IRQC function GPIOS sh-pfc: r8a73a4: Remove SCIF function GPIOS sh-pfc: r8a73a4: Add IRQC pin groups and functions sh-pfc: r8a73a4: Add SCIF pin groups and functions sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf support sh-pfc: r8a73a4: GPIO IRQ support sh-pfc: r8a73a4: Support sparse GPIO numbers sh-pfc: Add r8a73a4 pinmux support sh-pfc: r8a7779: Split DU input and output pixel clocks sh-pfc: r8a7779: Remove GPIO data ARM: shmobile: r8a7779: Register GPIO devices sh-pfc: Configure pins as GPIOs at request time when handled externally sh-pfc: Skip gpiochip registration when no GPIO resource is found sh-pfc: Make GPIO support optional sh-pfc: Make function GPIOs support optional ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02Merge tag 'renesas-soc2-for-v3.10' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2 Second round of Renesas ARM SoC updates for v3.10 Some Highlights: * Add r8a7790 SoC * Add r8a73a4 SoC * Migrate r8a7740 SoC from INTC to GIC * Add thermal driver support to r8a73a4 SoC * Add irqpin DT nodes to sh73a0 SoC * Add SCIF support to r8a7778 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-intc-external-irq2-for-v3.10 * tag 'renesas-soc2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (88 commits) ARM: shmobile: r8a7790 SoC 64-bit DT support ARM: shmobile: r8a73a4 SoC 64-bit DT support ARM: shmobile: r8a7790 PFC support ARM: shmobile: r8a7790 IRQC support ARM: shmobile: r8a7790 SCIF support ARM: shmobile: Initial r8a7790 SoC support ARM: shmobile: r8a7779: move global functions to r8a7779.h ARM: shmobile: r8a7740: move global functions to r8a7740.h ARM: shmobile: sh73a0: move global functions to sh73a0.h ARM: shmobile: sh7372: move global functions to sh7372.h ARM: shmobile: r8a7779: remove DIV4 clocks and use fixed ratio clock ARM: shmobile: r8a7740: use fixed ratio clock ARM: shmobile: r8a7740: tidyup comment/implementation mismatch ARM: shmobile: sh73a0: use fixed ratio clock ARM: shmobile: sh7372: use fixed ratio clock ARM: shmobile: add struct clk_ratio and fixed ratio clock macro ARM: shmobile: sh7372: remove DIV4_ZT* clocks ARM: shmobile: sh73a0: remove DIV4_ZT* clocks ARM: shmobile: sh73a0: add a TWD clock ARM: shmobile: r8a7740: Migrate from INTC to GIC ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-03sh-pfc: r8a73a4: Remove unused GPIO bias dataMagnus Damm
Remove unused pull-up/down data from the r8a73a4 PFC code. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03ARM: shmobile: r8a73a4: Remove all GPIO enumsMagnus Damm
Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Remove function GPIOsMagnus Damm
All r8a73a4 platforms use the pinctrl API to control pin functions. Function GPIOs are no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03ARM: shmobile: r8a73a4: Remove IRQC function GPIOsMagnus Damm
Remove IRQ pin function GPIOs that have been deprecated by the pinctrl API. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03ARM: shmobile: r8a73a4: Remove SCIF function GPIOsMagnus Damm
Remove SCIF function GPIOs that have been deprecated by the pinctrl API. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Remove IRQC function GPIOSMagnus Damm
The r8a73a4 board support will use the pinctrl API to control the external IRQ pins so remove the unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Remove SCIF function GPIOSMagnus Damm
The r8a73a4 board support will use the pinctrl API to control the SCIF pins, remove the corresponding unused function GPIOS. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Add IRQC pin groups and functionsMagnus Damm
V2 of PINCTRL support for r8a73a4 IRQC hardware and in particular the external pins IRQ0 -> IRQ57. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Add SCIF pin groups and functionsMagnus Damm
Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and SCIFB0->SCIFB3. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Add bias (pull-up/down) pinconf supportMagnus Damm
Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: GPIO IRQ supportMagnus Damm
V2 of code to add GPIO -> IRQ mappings to the PFC table for the r8a73a4 SoC. Requires the IRQs to be mapped at a fixed location in Linux IRQ space. The actual IRQs are not handled by the PFC, instead IRQC is used on r8a73a4. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a73a4: Support sparse GPIO numbersMagnus Damm
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers in the PFC SoC data. Pin numbers shall be used with the GPIO API from this point on. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Add r8a73a4 pinmux supportMagnus Damm
Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a7779: Split DU input and output pixel clocksLaurent Pinchart
The output pixel clocks can be used without the input pixel clocks. Split them in different groups. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: r8a7779: Remove GPIO dataLaurent Pinchart
GPIOs are now handled by a separate driver, remove GPIO data from the SoC information structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03ARM: shmobile: r8a7779: Register GPIO devicesLaurent Pinchart
Move GPIOs handling from the PFC device to separate GPIO devices. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Configure pins as GPIOs at request time when handled externallyLaurent Pinchart
When a GPIO is handled by a separate driver the pinmux gpio_set_direction() handler won't be called. The pin mux type then need to be configured to GPIO at request time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Skip gpiochip registration when no GPIO resource is foundLaurent Pinchart
Boards/platforms that register dedicated GPIO devices will not supply a memory resource for GPIOs. Try to locate the GPIO memory resource at initialization time, and skip registration of the gpiochip if the resource can't be found. This is a temporary modification to ease the transition to separate GPIO drivers. It should be reverted when all boards and platforms will have been moved. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Make GPIO support optionalLaurent Pinchart
When implemented as a separate IP block, GPIOs should be handled by a separate driver. To make this possible GPIO support needs to be optional in the sh-pfc driver. If no GPIO data registers are supplied in the SoC information structure skip registration of the gpiochip. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03sh-pfc: Make function GPIOs support optionalLaurent Pinchart
The target is to get rid of function GPIOs completely. To reach this, make function GPIOs support optional by skipping the function GPIO chip registration if no function GPIOS are defined in SoC data. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03ARM: shmobile: marzen: Add GPIO LEDsLaurent Pinchart
The board has 3 LEDs connected to GPIOs. Add a led-gpio device to support them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03gpio-rcar: Add pinctrl supportLaurent Pinchart
Register the GPIO pin range, and request and free GPIO pins using the pinctrl API. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-03gpio: Renesas R-Car GPIO driver V3Magnus Damm
This patch is V3 of a GPIO driver for the R-Car series of SoCs from Renesas. This driver is designed to be reusable between multiple SoCs that share the same basic building block, but so far it has only been used on R-Car H1 (r8a7779). Each driver instance handles 32 GPIOs with individually maskable IRQs. The driver operates on a single I/O memory range and the 32 GPIOs are hooked up a single interrupt. In the case of R-Car H1 either external IRQ pins or GPIOs with interrupts can be used for on-board interupts. For external IRQs 4 pins are supported, and in the case of GPIO there are 202 GPIOS as 202 interrupts hooked up via 6 driver instances and to the GIC and the Cortex-A9 Quad. At this point this driver is interfacing as a regular platform device driver. In the future DT support will be submitted as an incremental feature patch. Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02irqchip: vic: add include of linux/irq.hOlof Johansson
With the include of <asm/mach/irq.h> removed, the implicit include of linux/irq.h also disappeared. Add it back. Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02ARM: shmobile: r8a7779: Remove all GPIOsLaurent Pinchart
Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh-pfc: r8a7779: Don't use GPIO enum entriesLaurent Pinchart
Refactor the GPIO macro magic to use GPIO numbers directly instead of the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum entries from the mach/r8a7779.h header. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh-pfc: r8a7779: Remove function GPIOsLaurent Pinchart
All r8a7779 platforms use the pinctrl API to control functions. Function GPIOs are unused and unneeded, remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh: sh7269: Fix compilation by adding missing includesLaurent Pinchart
struct resource is defined in linux/ioport.h. Include it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02sh-pfc: Fix compiler warning when BUG()Laurent Pinchart
The sh_pfc_phys_to_virt() function ends with a BUG() statement without a return. When CONFIG_BUG isn't set the function will thus have no return value. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02Merge branch 'soc' into pinmux-baseSimon Horman
Conflicts: drivers/pinctrl/sh-pfc/pfc-r8a7740.c This merge is to provide r8a73a4 SoC files, which are added in the soc branch and depended on by r8a73a4 pfc-changes which are to be added to the pinmux branch.
2013-04-02ARM: shmobile: r8a7790 SoC 64-bit DT supportTakashi Yoshii
The r8a7790 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-02ARM: shmobile: r8a73a4 SoC 64-bit DT supportTakashi Yoshii
The r8a73a4 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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