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2024-02-22drm/amd/display: reenable windowed mpo odm support on dcn32 and dcn321Wenjing Liu
[why] The feature was disabled due to regression found during testing. Now that all the pending issues are addressed, we are reenabling the power saving feature again. The feature optimizes dispclk level when user is using MPO capable broswers or watching MPO capable videos in windowed mode. The feature achieves power optimization by utilizing free pipes to process incoming pixels in parallel. So it reduces max dispclk requirements for each pipe. Previously ODM power optimization will be disabled when MPO plane is present due to technical challeges. This is mainly because ODM divides pixel workload with respect to stream but MPO plane position and size are arbitrary with respect to stream. The pixel processing workload of an MPO plane is not guarenteed to be evenly distributed across DCN pipes. For example if a plane is moved inside single ODM slice, all the processing for the plane is distributed to the pipe in the current ODM slice, while the other ODM slices don't need to process this plane. If the plane is then moved to the middle crosing two ODM slices, each ODM slice gets half of the workload. This is especially difficult when the plane itself has a large source rect which can't be processed by single DCN pipe. In this case we can't enable ODM power optimization when the plane is only within one ODM slice. [how] To overcome the challeges, new pipe resource management is in place to make sure a plane is validated with ODM power optimization support if it can be validated regardless of its position and the same pipe topology can be used regardless of the plane's position. When the plane is moved outside current ODM slice, we will set recout to 0 so the pipe can be idling without the need to update pipe topology. When the user resizes a plane, it may result in downscaling ratio changes. When the downscaling ratio is above single pipe's threshold, we will seamlessly exit ODM power optimization and applies MPC combine to support the plane. when downscaling ratio becomes smaller, we will seamlessly enter ODM power optimization again. All these pipe transitions happen automatically and quietly when the conditions are met without any visual impacts to the user. Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Remove pixle rate limit for subvpAlvin Lee
Subvp bugs related to 8K60 have been fixed, so remove the limit that blocks 8K60 timings from enabling SubVP. Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Only log during optimize_bandwidth callEthan Bitnun
Prevent logs during a prepare_bandwidth call to ensure log accuracy. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Ethan Bitnun <etbitnun@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: fix input states translation error for dcn35 & dcn351Swapnil Patel
[Why] Currently there is an error while translating input clock sates into output clock states. The highest fclk setting from output sates is being dropped because of this error. [How] For dcn35 and dcn351, make output_states equal to input states. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Swapnil Patel <swapnil.patel@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Generalize new minimal transition pathAlvin Lee
Previously the new minimal transition path was only used for windowed MPO + ODM for plane scaling updates. However, we want to generalize the transition for all cases whenever a non-seamless transition is detected (such as for MPO -> SubVP + MPC). To make this change we add pointers in the plane state, stream, and pointers in the stream state to the dc_scratch state and backup and restore these so the minimal transition can take place successfully. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Check DP Alt mode DPCS state via DMUBGeorge Shen
[Why] Currently, driver state for DCN3.2 is not strictly matching HW state for the USBC port. To reduce inconsistencies while debugging, the driver should match HW configuration. [How] Update link encoder flag to indicate USBC port. Call into DMUB to check when DP Alt mode is entered, and also to check for 2-lane versuse 4-lane mode. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amdgpu: Remove pcie bw sys entryAsad Kamal
Remove pcie bw sys entry for asics not supporting such function Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22Revert "drm/amdgpu: Add pcie usage callback to nbio"Asad Kamal
pcie usage is now handled by fw This reverts commit 8d759dc6644df4141a151293cb0e77fd8ca379ed. Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Fix potential null pointer dereference in dc_dmub_srvSrinivasan Shanmugam
Fixes potential null pointer dereference warnings in the dc_dmub_srv_cmd_list_queue_execute() and dc_dmub_srv_is_hw_pwr_up() functions. In both functions, the 'dc_dmub_srv' variable was being dereferenced before it was checked for null. This could lead to a null pointer dereference if 'dc_dmub_srv' is null. The fix is to check if 'dc_dmub_srv' is null before dereferencing it. Thus moving the null checks for 'dc_dmub_srv' to the beginning of the functions to ensure that 'dc_dmub_srv' is not null when it is dereferenced. Found by smatch & thus fixing the below: drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:133 dc_dmub_srv_cmd_list_queue_execute() warn: variable dereferenced before check 'dc_dmub_srv' (see line 128) drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:1167 dc_dmub_srv_is_hw_pwr_up() warn: variable dereferenced before check 'dc_dmub_srv' (see line 1164) Fixes: 028bac583449 ("drm/amd/display: decouple dmcub execution to reduce lock granularity") Fixes: 65138eb72e1f ("drm/amd/display: Add DCN35 DMUB") Cc: JinZe.Xu <jinze.xu@amd.com> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Josip Pavic <josip.pavic@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Fix S4 hang polling on HW power up done for VBIOS DMCUBNicholas Kazlauskas
[Why] VBIOS DMCUB firmware doesn't set the dal_fw bit and we end up hanging waiting for HW power up done because of it. [How] Simplify the path and allow mailbox_rdy to be a functional check when we detect VBIOS firmware. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Only allow dig mapping to pwrseq in new asicLewis Huang
[Why] The old asic only have 1 pwrseq hw. We don't need to map the diginst to pwrseq inst in old asic. [How] 1. Only mapping dig to pwrseq for new asic. 2. Move mapping function into dcn specific panel control component Cc: Stable <stable@vger.kernel.org> # v6.6+ Cc: Mario Limonciello <mario.limonciello@amd.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3122 Reviewed-by: Anthony Koo <anthony.koo@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Lewis Huang <lewis.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amdgpu: Drop redundant parameter in amdgpu_gfx_kiq_init_ringMa Jun
Drop redundant parameters in function amdgpu_gfx_kiq_init_ring to simplify the code Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22Revert "drm/amdgpu: Add pci usage to nbio v7.9"Asad Kamal
Remove implementation to get pcie usage for nbio v7.9 as pcie usage is handled by fw This reverts commit 59070fd9ccea58c3363d39f69c25fa98c71eb02f. Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: adjust few initialization order in dmWayne Lin
[Why] Observe error message "Can't retrieve aconnector in hpd_rx_irq_offload_work" when boot up with a mst tbt4 dock connected. After analyzing, there are few parts needed to be adjusted: 1. hpd_rx_offload_wq[].aconnector is not initialzed before the dmub outbox hpd_irq handler get registered which causes the error message. 2. registeration of hpd and hpd_rx_irq event for usb4 dp tunneling is not aligned with legacy interface sequence [How] Put DMUB_NOTIFICATION_HPD and DMUB_NOTIFICATION_HPD_IRQ handler registration into register_hpd_handlers() to align other interfaces and get hpd_rx_offload_wq[].aconnector initialized earlier than that. Leave DMUB_NOTIFICATION_AUX_REPLY registered as it was since we need that while calling dc_link_detect(). USB4 connection status will be proactively detected by dc_link_detect_connection_type() in amdgpu_dm_initialize_drm_device() Cc: Stable <stable@vger.kernel.org> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Remove redundant FPU guardRodrigo Siqueira
The function dcn32_build_wm_range_table call DC_FP_START/END. Drop the unnecessary FPU guard. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Add SMU timeout check and retryRodrigo Siqueira
Instead of only asserting in the case of the SMU wait time is not what we expect, add the SMU timeout check and try again. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Remove unused fileRodrigo Siqueira
The file rv1_clk_mgr_clk.c is not used and for this reason useless. Drop the unnecessary file. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amd/display: Initialize variable with default valueRodrigo Siqueira
Set a default value for target_div. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amdgpu: add tmz support for GC IP v11.5.1Yifan Zhang
Add tmz support for GC 11.5.1. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amdgpu: Do not toggle bif ras irq from guestHawking Zhang
Only do this from host side. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22drm/amdgpu: add GFXHUB 11.5.1 supportYifan Zhang
This patch to add GFXHUB 11.5.1 support. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-19drm/amdgpu: add MMHUB 3.3.1 supportYifan Zhang
This patch to add MMHUB 3.3.1 support. v2: squash in fault info fix (Alex) Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-19drm/amd/display: Remove break after returnRodrigo Siqueira
Remove break after return since it will never be reached. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amd: Change `jpeg_v4_0_5_start_dpg_mode()` to voidMario Limonciello
jpeg_v4_0_5_start_dpg_mode() always returns 0 and the return value doesn't get used in the caller jpeg_v4_0_5_start(). Modify the function to be void. Reported-by: coverity-bot <keescook+coverity-bot@chromium.org> Addresses-Coverity-ID: 1583635 ("Code maintainability issues") Fixes: 0a119d53f74a ("drm/amdgpu/jpeg: add support for jpeg DPG mode") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amd/display: Add 'replay' NULL check in 'edp_set_replay_allow_active()'Srinivasan Shanmugam
In the first if statement, we're checking if 'replay' is NULL. But in the second if statement, we're not checking if 'replay' is NULL again before calling replay->funcs->replay_set_power_opt(). if (replay == NULL && force_static) return false; ... if (link->replay_settings.replay_feature_enabled && replay->funcs->replay_set_power_opt) { replay->funcs->replay_set_power_opt(replay, *power_opts, panel_inst); link->replay_settings.replay_power_opt_active = *power_opts; } If 'replay' is NULL, this will cause a null pointer dereference. Fixes the below found by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c:895 edp_set_replay_allow_active() error: we previously assumed 'replay' could be null (see line 887) Fixes: c7ddc0a800bc ("drm/amd/display: Add Functions to enable Freesync Panel Replay") Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Suggested-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: Fix missing parameter descriptions in ih_v7_0.cSrinivasan Shanmugam
Rectifies kdoc warnings related to the 'ih' parameter in the 'ih_v7_0_get_wptr', 'ih_v7_0_irq_rearm', and 'ih_v7_0_set_rptr' functions within the 'ih_v7_0.c' file. Fixes the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/ih_v7_0.c:392: warning: Function parameter or member 'ih' not described in 'ih_v7_0_get_wptr' drivers/gpu/drm/amd/amdgpu/ih_v7_0.c:432: warning: Function parameter or member 'ih' not described in 'ih_v7_0_irq_rearm' drivers/gpu/drm/amd/amdgpu/ih_v7_0.c:458: warning: Function parameter or member 'ih' not described in 'ih_v7_0_set_rptr' Fixes: 12443fc53e7d ("drm/amdgpu: Add ih v7_0 ip block support") Cc: Likun Gao <Likun.Gao@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: add SDMA 6.1.1 discovery supportYifan Zhang
This patch to add SDMA 6.1.1 support. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: add sdma 6.1.1 firmwareYifan Zhang
This patch to add sdma 6.1.1 firmware declaration. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: add psp 14.0.1 discovery supportYifan Zhang
This patch to add psp 14.0.1 support. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: add PSP 14.0.1 supportYifan Zhang
This patch to add PSP 14.0.1 support. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: add smuio 14.0.1 supportYifan Zhang
This patch to add smuio 14.0.1 support. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu: add nbio 7.11.1 discovery supportYifan Zhang
This patch to add nbio 7.11.1 support. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdgpu/nbio: Add NBIO 7.11.1 SupportYifan Zhang
Fix up doorbell setup and clockgating. v2: squash in fixes (Alex) Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amdkfd: Relocate TBA/TMA to opposite side of VM holeFelix Kuehling
The TBA and TMA, along with an unused IB allocation, reside at low addresses in the VM address space. A stray VM fault which hits these pages must be serviced by making their page table entries invalid. The scheduler depends upon these pages being resident and fails, preventing a debugger from inspecting the failure state. By relocating these pages above 47 bits in the VM address space they can only be reached when bits [63:48] are set to 1. This makes it much less likely for a misbehaving program to generate accesses to them. The current placement at VA (PAGE_SIZE*2) is readily hit by a NULL access with a small offset. v2: - Move it to the reserved space to avoid concflicts with Mesa - Add macros to make reserved space management easier v3: - Move VM max PFN calculation into AMDGPU_VA_RESERVED macros Cc: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-16drm/amd/display: 3.2.272Aric Cyr
Summary: * Revert some changes related to pixel encoding and clocks that cause corruption * IPS hang fix and FGCG enable by default for DCN35 * PSR-SU/Replay fixes * Plane clip size change treated as medium update * Fix for checking link alignment done during link training. * HDMI compliance test fixes and other improvements Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: support psp ip block discovery for psp v14Likun Gao
Support PSP ip block discovery for psp v14. Add psp ip block for psp v14_0_2 and v14_0_3. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: add psp_timeout to limit PSP related operationLikun Gao
Add a new parameter psp_timeout to limit psp related operation to unify the timeout limition for psp. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu/psp: set boot_time_tmr flagLikun Gao
Set boot_time_tmr flag for the ASIC which MP0 ip version newer than 14.0.2 For runtime TMR: Init tmr and load tmr should did. For boottime TMR: If do not support autoload, skip init TMR. If support autoload, excute init TMR but skip load tmr. v2: rebase (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu/psp: handle TMR type via flagLikun Gao
Add flag boot_time_tmr to indicate boot time TMR or runtime TMR instead of function. v2: rework logic (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu/psp: set autoload support by defaultLikun Gao
Set psp->autoload_supported to true by default, as only a few version of ASIC not support autoload, and the furture version of PSP should support this. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14Revert "drm/amd/display: Add left edge pixel for YCbCr422/420 + ODM pipe split"George Shen
[Why/How] A regression was identified with the change to add left edge pixel for YCbCr422/420 + ODM combine cases. This reverts commit 288c0254a0b0c9980dba9df7d5afadf27280b99c Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: support psp ip block for psp v14Likun Gao
Support PSP ip block for psp v14. Add psp ip block for psp v14_0_2 and v14_0_3. v2: sqaush in 14.0.3 firmware fix (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: use spirom update wait_for helper for psp v14Likun Gao
Spirom update typically requires extremely long duration for command execution, and special helper function to wait for it's completion. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amd/pm: Allow setting max UCLK on SMU v13.0.6Lijo Lazar
Allow reducing max UCLK in MANUAL performance level. New UCLK value should be less than the max DPM level UCLK level value. Ex: echo manual > "/sys/bus/pci/devices/.../power_dpm_force_performance_level" echo m 1 900 > "/sys/bus/pci/devices/.../pp_od_clk_voltage” echo c > "/sys/bus/pci/devices/.../pp_od_clk_voltage” Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Tested-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: Reduce VA_RESERVED_BOTTOM to 64KBFelix Kuehling
The reservation is there to catch NULL pointer dereferences from the GPU. Reduce the size to 64KB to make sure that shared virtual address programming models can map all CPU-accessible virtual addresses for GPU access. This is also the default for CPU virtual address mappings as seen in /proc/sys/vm/mmap_min_addr. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: Add psp v14_0 ip block supportHawking Zhang
Add psp v14_0 ip block support. v2: rebase (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: Add mp v14_0_2 ip headers (v5)Hawking Zhang
v1: Add mp v14_0_2 register offset and shift masks header files. (Hawking) v2: Update mp v14_0_2 register offset and shift masks header files to RE2. (Likun) v3: Update mp v14_0_2 register offset and shift masks header files to RE2.5. (Likun) v4: Update mp v14_0_2 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdgpu: Fix implicit assumtion in gfx11 debug flagsRajneesh Bhardwaj
Gfx11 debug flags mask is currently set with an implicit assumption that no other mqd update flags exist. This needs to be fixed with newly introduced flag UPDATE_FLAG_IS_GWS by the previous patch. Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amdkfd: update SIMD distribution algo for GFXIP 9.4.2 onwardsRajneesh Bhardwaj
In certain cooperative group dispatch scenarios the default SPI resource allocation may cause reduced per-CU workgroup occupancy. Set COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST=1 to mitigate soft hang scenarions. Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Suggested-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-14drm/amd/display: Increase ips2_eval delay for DCN35Nicholas Kazlauskas
[Why] New worst-case measurement observed at 1897us. [How] Increase to 2000us to cover the new worst case + margin. Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-07-15 08:17:07 +0000