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2014-09-15drm/nouveau/fb/ram: Support strided regsRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nv50/fb/ram: Store the number of partitions in the designated fieldsRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nv50/kms: Set VBLANK time in modeset scriptRoy Spliet
Solves blinking on reclocking memory. The value set is an underestimate, but with non-reduced vblanking this should give us plenty of time Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios: Add rammap support for version 1.0Roy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gf100-/pwr/memx: block host and fifo around reclockBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr/memx: fix command ordering around block/unblockBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr/memx: rename fb off/on to block/unblockBen Skeggs
More accurate as to the function of the opcodes. Not only is FB disabled, but the host is prevented from touching the GPU. An upcoming patch for Kepler will also halt PFIFO (as NVIDIA does). Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: Pause the GPU before reclockingRoy Spliet
V2: always call post correctly even if pre fails V3: move function prototype to nva3.h Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
2014-09-15drm/nouveau/gpio: rename g92 class to g94Emil Velikov
nv92 hardware has only 16 interrupt lines, while nv94 and later has 32. Accessing 0xe0c{0,4} registers on nv92 can lead to incorrect PDISP setup. This is a regression introduced with commit 9d0f5ec9ee0fd5dc5fc1cc2cf559286431e406e3 Author: Ben Skeggs <bskeggs@redhat.com> Date: Mon May 12 15:22:42 2014 +1000 gpio: split g92 class from nv50 Reported-by: estece on #nouveau Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104-/fb/ram: move fb enable/disable to same place as nvidiaBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104/fb/ram: twiddle some more bits when reclockingBen Skeggs
*when* this is done is only a rough approximation of what the binary driver does.. need to investigate more to see if it matters Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios: parse another large chunk of random memory config dataBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104-/fb/ram: perform certain steps only when bios data differsBen Skeggs
Awful, awful. But, on the GK106 I have, some upcoming patches show that this is actually necessary after all. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104-/fb/ram: parse ramcfg data for all frequencies up-frontBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104-/fb/ram: use parsed timing data in mr routinesBen Skeggs
All the other chipsets should be moved over to this too. It's not needed yet for the upcoming commits, so left this step as it'll conflict badly with Roy's GT21x reclocking work. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios: parse freq ranges and timing id into ramcfg structBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios: memset dcb struct to zero before parsingBen Skeggs
Fixes type/mask calculation being based on uninitialised data for VGA outputs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104/fb/ram: make use of training data provided by vbiosBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x09Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x05Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104/fb/ram: fix register for second set of training dataBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104/fb/ram: more random magic in fb initBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gk104/fb/ram: skip table entry for mode we're already inBen Skeggs
NVIDIA binary driver appears to, not sure if it's for a good reason, but grasping at straws for some GDDR5 reclocking issues here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/fb/sddr2: Generate MR valuesRoy Spliet
V2: Always disable DLL reset Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/fb/sddr3: Expand MR generationRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/pwr/memx: Match blob's fb access behaviourRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr/memx: Return debugging informationRoy Spliet
Time measured from disabling FB to re-enabling, PPWR_IN reveals status of heads at the end of script. Helps debug various issues (like flicker). Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr/memx: Make FB disable and enable explicitRoy Spliet
Needs to be done after wait-for-VBLANK, and NVA3 requires register writes in between. Rather than hard-coding register writes, just split out fb_disable and fb_enable. v2. Squashed "fb/ramnve0: disable fb before reclocking" Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/pwr/memx: Implement "wait for VBLANK"Roy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/therm/nv84+: do not expose non-calibrated internal temp sensorMartin Peres
Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/therm: make sure the temperature settings are sane on nv84+Martin Peres
One of my nv92 has a calibrated internal sensor but it displays 0°C as the default values use sw calibration values to force the temperature to 0. Since we cannot read the temperature from the adt7473 present on this board, let's re-enable the internal reading! Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/subdev: add a pfuse subdev v2Martin Peres
We will use this subdev to disable temperature reading on cards that did not get a sensor calibration in the factory. v2: - rename "nouveau_fuse_rd32" to "gxXXX_fuse_rd32" as adviced by Christian Costa - fold the code a little as adviced by Emil Velikov Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: Set intermediate core clock on reclockingRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: For PLL clocks always make sure the PLL is not in useRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: Abort when PLL doesn't lockRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: HOST clockRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: Set PLL refclkRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nva3/clk: Parse clock control registers more accuratelyRoy Spliet
Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau: Fix duplicate definition of NV04_PFB_BOOT_0_*Pierre Moreau
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau: Display Nouveau boot options at launchPierre Moreau
It can help to remove any ambiguity about which options were passed to Nouveau, especially in case the user had some options set in /etc/modprobe.d/*.conf that he forgot about, as they won't appear in a dmesg. Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr: wait for scrubbers to finish before uploading new ucodeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr/fuc: make $r1-$r10 registers callee-saved in kernel.fucMartin Peres
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr/fuc: add ld/st macrosMartin Peres
Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr: add helpers for delay-to-ticks and ticks-to-delayMartin Peres
Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr: add some arith functions (mul32_32_64, subu64 and addu64)Martin Peres
Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/pwr: fix the timers implementation with concurent processesMartin Peres
The problem with the current implementation is that adding a timer improperly checked which process would time up first by not taking into account how much time elapsed since their timer got scheduled. Rework the re-scheduling decision t fix this. The catch with this fix is that we are limited to scheduling timers of up to 2^31 ticks to avoid any potential overflow. Since we are unlikely to need to wait for more than a second, this won't be a problem :) Another possible fix would be to decrement the timeouts of all processes but it would duplicate a lot of code and dealing with edge cases wasn't pretty last time I checked. Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/ppwr: enable ppwr on gm107Martin Peres
For some reason, it is now required to wait a 20 µs after the 0x200 reset of the engine. Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/gm107/therm: add PWM fan support v2Martin Peres
v2: change the copyright ownership from "Nouveau Community" to myself, as per Illia's recommendation. Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/therm/fan: do not use the pwm mode when the vbios tells us to ↵Martin Peres
use toggle Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15drm/nouveau/bios/fan: add support for maxwell's fan management table v2Martin Peres
Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>