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2025-05-09drm/i915/display: Indexed 8bit format does not support async flipArun R Murthy
Async flip is not supported with Indexed 8 bit format as it depends on LUT and can't be updated atomically. Note: This may change the alignment for C8 framebuffers on some platforms. Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250407-asyn-v13-5-b93ef83076c5@intel.com
2025-05-09drm/i915/display: Add i915 hook for format_mod_supported_asyncArun R Murthy
Hook up the newly added plane function pointer format_mod_supported_async to populate the modifiers/formats supported by asynchronous flips. v5: Correct the if condition for modifier support check (Chaitanya) v6: Replace uint32_t/uint64_t with u32/u64 (Jani) v7: Move plannar check from intel_async_flip_check_hw() to intel_plane_format_mod_supported_async() (Ville) v8: In case of error print format/modifier (Chaitanya) v9: Exclude C8 format as its not supported by hardware v10: filter only planar formats move changes in can_async_flip to new patch (Ville) Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250407-asyn-v13-4-b93ef83076c5@intel.com
2025-05-09drm/i915/display: Acomodate format check in intel_plane_can_async_flip()Arun R Murthy
The function intel_plane_can_async_flip() checks for async supported modifier, add format support check also in the same function. Note: on ADL the surface base addr is required to be 16k aligned and if not might generate DMAR and GGTT faults leading to glitches. This patch changes the 16k alignment to 4k for planar formats. v11: Move filtering Indexed 8bit to a separate patch (Ville) v12: correct the commit msg and remove unwanted debug print (Ville) Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250407-asyn-v13-3-b93ef83076c5@intel.com
2025-05-09drm/plane: modify create_in_formats to acommodate asyncArun R Murthy
create_in_formats creates the list of supported format/modifiers for synchronous flips, modify the same function so as to take the format_mod_supported as argument and create list of format/modifier for async as well. v5: create_in_formats can return -ve value in failure case, correct the if condition to check the creation of blob <Chaitanya> Dont add the modifier for which none of the formats is not supported. v6: Remove the code for masking the unsupported modifiers as UMD can leave with it. (Naveen/Chaitanya) v7: Retain the unsupported modifiers, userspace should have no impact, return pointer to blob instead of blob_id(Ville) Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Acked-by: Xaver Hugl <xaver.hugl@kde.org> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Naveen Kumar <naveen1.kumar@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250407-asyn-v13-2-b93ef83076c5@intel.com
2025-05-09drm/plane: Add new plane property IN_FORMATS_ASYNCArun R Murthy
There exists a property IN_FORMATS which exposes the plane supported modifiers/formats to the user. In some platforms when asynchronous flip are used all of modifiers/formats mentioned in IN_FORMATS are not supported. This patch adds a new plane property IN_FORMATS_ASYNC to expose the async flip supported modifiers/formats so that user can use this information ahead and do flip with unsupported formats/modifiers. This will save flip failures. Add a new function pointer similar to format_mod_supported specifically for asynchronous flip. v2: Remove async variable from drm_plane (Ville) v3: Add new function pointer for async (Ville) v5: Typo corrected in commit message & some correction in the kernel documentation. (Chaitanya) v7: Place IN_FORMATS_ASYNC next to IN_FORMATS (Ville) v8: replace uint32_t with u32 and uint64_t with u64 (Chaitanya) Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Acked-by: Xaver Hugl <xaver.hugl@kde.org> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Naveen Kumar <naveen1.kumar@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250407-asyn-v13-1-b93ef83076c5@intel.com
2025-05-09drm/cirrus: Use non-hybrid PCI devres APIPhilipp Stanner
cirrus enables its PCI device with pcim_enable_device(). This, implicitly, switches the function pci_request_regions() into managed mode, where it becomes a devres function. The PCI subsystem wants to remove this hybrid nature from its interfaces. To do so, users of the aforementioned combination of functions must be ported to non-hybrid functions. Replace the call to sometimes-managed pci_request_regions() with one to the always-managed pcim_request_all_regions(). Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Philipp Stanner <phasta@kernel.org> Link: https://lore.kernel.org/r/20250417094009.29297-2-phasta@kernel.org
2025-05-09Merge tag 'drm-intel-gt-next-2025-05-08-1' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Driver Changes: - Fix SLPC wait boosting reference counting to avoid getting stuck on non-boost frequency on power saving profile on DG1/DG2 (Vinay) - Add 20ms delay to engine reset for robustness on HSW (Nitin) - Use proper sleeping functions for timeouts shorter than 20ms (Andi) - Fix fence not released on early probe errors for HuC (Janusz) - Remove const from struct i915_wa list allocation (Kees) - Apply SPDX license format where missing and use single-line format (Andi) - Whitespace fixes (Dan, Andi) - Selftest improvements (Mikolaj, Badal, Sk, Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://lore.kernel.org/r/aBxNYp0IviE23zy-@jlahtine-mobl
2025-05-08accel/amdxdna: Support submit commands without argumentsLizhi Hou
The latest userspace runtime allows generating commands which do not have any argument. Remove the corresponding check in driver IOCTL to enable this use case. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://lore.kernel.org/r/20250507161500.2339701-1-lizhi.hou@amd.com Link: https://lore.kernel.org/r/20250507161500.2339701-1-lizhi.hou@amd.com
2025-05-08drm/panel: Add Novatek NT37801 panel driverKrzysztof Kozlowski
Add driver for the Novatek NT37801 or NT37810 AMOLED DSI 1440x3200 panel in CMD mode, used on Qualcomm MTP8750 board (SM8750). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250508-sm8750-display-panel-v2-2-3ca072e3d1fa@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250508-sm8750-display-panel-v2-2-3ca072e3d1fa@linaro.org
2025-05-08dt-bindings: display: panel: Add Novatek NT37801Krzysztof Kozlowski
Add bindings for the Novatek NT37801 or NT37810 AMOLED DSI panel. Sources, like downstream DTS, schematics and hardware manuals, use two model names (NT37801 and NT37810), so choose one and hope it is correct. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250508-sm8750-display-panel-v2-1-3ca072e3d1fa@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250508-sm8750-display-panel-v2-1-3ca072e3d1fa@linaro.org
2025-05-08dt-bindings: display: panel: convert truly,nt35597.txt to dt-schemaNeil Armstrong
Convert the Truly NT35597 2K display panel bindings to dt-schema. The vdispp-supply & vdispn-supply are not marked as required since in practice they are not defined in sdm845-mtp.dts which is the only used of these bindings. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250507-topic-misc-truly-nt35597-yaml-v1-1-bc719ad8dfff@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250507-topic-misc-truly-nt35597-yaml-v1-1-bc719ad8dfff@linaro.org
2025-05-08Reapply: drm/amdgpu: Use generic hdp flush functionLijo Lazar
Except HDP v5.2 all use a common logic for HDP flush. Use a generic function. HDP v5.2 forces NO_KIQ logic, revisit it later. Reapply after fixing up an HDP regression. v2: merge the fix (Alex) Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08drm/amdgpu/hdp7: use memcfg register to post the write for HDP flushAlex Deucher
Reading back the remapped HDP flush register seems to cause problems on some platforms. All we need is a read, so read back the memcfg register. Fixes: 689275140cb8 ("drm/amdgpu/hdp7.0: do a posting read when flushing HDP") Reported-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119 Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908 Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08drm/amdgpu/hdp6: use memcfg register to post the write for HDP flushAlex Deucher
Reading back the remapped HDP flush register seems to cause problems on some platforms. All we need is a read, so read back the memcfg register. Fixes: abe1cbaec6cf ("drm/amdgpu/hdp6.0: do a posting read when flushing HDP") Reported-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119 Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908 Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08drm/amdgpu: cleanup sriov function for psp v12Huang Rui
PSP v12 won't have SRIOV function. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08drm/amdgpu/hdp5.2: use memcfg register to post the write for HDP flushAlex Deucher
Reading back the remapped HDP flush register seems to cause problems on some platforms. All we need is a read, so read back the memcfg register. Fixes: f756dbac1ce1 ("drm/amdgpu/hdp5.2: do a posting read when flushing HDP") Reported-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119 Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908 Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08drm/amdgpu/hdp5: use memcfg register to post the write for HDP flushAlex Deucher
Reading back the remapped HDP flush register seems to cause problems on some platforms. All we need is a read, so read back the memcfg register. Fixes: cf424020e040 ("drm/amdgpu/hdp5.0: do a posting read when flushing HDP") Reported-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119 Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908 Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08drm/amdgpu: remove re-route ih in psp v12Huang Rui
APU doesn't have second IH ring, so re-routing action here is a no-op. It will take a lot of time to wait timeout from PSP during the initialization. So remove the function in psp v12. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-08dma-buf/sw-sync: Remove unused debug codeDr. David Alan Gilbert
sync_file_debug_add() and sync_file_debug_remove() have been unused since 2016's commit d4cab38e153d ("staging/android: prepare sync_file for de-staging") Remove them. Since sync_file_debug_add was the only thing to add to sync_file_list_head, the code that dumps it in part of sync_info_debugfs_show can be removed, and the declaration of the list and it's associated lock can be removed. (The 'fences:\n...' marker in that debugfs file is left in so as not to change the output) That leaves the sync_print_sync_file() helper unused, and is thus removed. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Link: https://lore.kernel.org/r/20250505233838.105668-1-linux@treblig.org
2025-05-07drm/amd: Add per-ring reset for vcn v5.0.0 useMario Limonciello
If there is a problem requiring a reset of the VCN engine, it is better to reset the VCN engine rather than the entire GPU. Add a reset callback for the ring which will stop and start VCN if an issue happens. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20250506204948.12048-4-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd: Add per-ring reset for vcn v4.0.0 useMario Limonciello
If there is a problem requiring a reset of the VCN engine, it is better to reset the VCN engine rather than the entire GPU. Add a reset callback for the ring which will stop and start VCN if an issue happens. Link: https://lore.kernel.org/r/20250506204948.12048-3-mario.limonciello@amd.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd: Add per-ring reset for vcn v4.0.5 useMario Limonciello
There is a problem occurring on VCN 4.0.5 where in some situations a job is timing out. This triggers a job timeout which then causes a GPU reset for recovery. That has exposed a number of issues with GPU reset that have since been fixed. But also a GPU reset isn't actually needed for this circumstance. Just restarting the ring is enough. Add a reset callback for the ring which will stop and start VCN if the issue happens. Link: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12528 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3909 Link: https://lore.kernel.org/r/20250506204948.12048-2-mario.limonciello@amd.com Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu/hdp4: use memcfg register to post the write for HDP flushAlex Deucher
Reading back the remapped HDP flush register seems to cause problems on some platforms. All we need is a read, so read back the memcfg register. Fixes: c9b8dcabb52a ("drm/amdgpu/hdp4.0: do a posting read when flushing HDP") Reported-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119 Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908 Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07Revert "drm/amdgpu: Use generic hdp flush function"Alex Deucher
This reverts commit 18a878fd8aef0ec21648a3782f55a79790cd4073. Revert this temporarily to make it easier to fix a regression in the HDP handling. Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd/pm/smu13: Remove unused smu_v3 functionsDr. David Alan Gilbert
smu_v13_0_display_clock_voltage_request() and smu_v13_0_set_min_deep_sleep_dcefclk() were added in 2020 by commit c05d1c401572 ("drm/amd/swsmu: add aldebaran smu13 ip support (v3)") but have remained unused. Remove them. smu_v13_0_display_clock_voltage_request() was the only user of smu_v13_0_set_hard_freq_limited_range(). Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd/pm/smu11: Remove unused smu_v11_0_get_dpm_level_rangeDr. David Alan Gilbert
The last use of smu_v11_0_get_dpm_level_range() was removed in 2020 by commit 46a301e14e8a ("drm/amd/powerplay: drop unnecessary Navi1x specific APIs") Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd/pm/smu7: Remove unused smu7_copy_bytes_from_smcDr. David Alan Gilbert
smu7_copy_bytes_from_smc() was added in 2016 by commit 1ff55f465103 ("drm/amd/powerplay: implement smu7_smumgr for asics with smu ip version 7.") but never used. Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: fix the indentationSunil Khatri
fix the indentation drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:6992 gfx_v11_ip_dump compiler: gcc-11 (Debian 11.3.0-12) 11.3.0 Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202505071619.7sHTLpNg-lkp@intel.com/ Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Arvind Yadav <Arvind.Yadav@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: remove mdelay in psp v12Huang Rui
Since secure firmware is more stable than bring up phase, I believe we don't need such mdelays any more before wait PSP response on PSP v12. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Trigger Huang <Trigger.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07amd/amdkfd: Trigger segfault for early userptr unmmappingShane Xiao
If applications unmap the memory before destroying the userptr, it needs trigger a segfault to notify user space to correct the free sequence in VM debug mode. v2: Send gpu access fault to user space v3: Report gpu address to user space, remove unnecessary params v4: update pr_err into one line, remove userptr log info Signed-off-by: Shane Xiao <shane.xiao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: Add debug bit for userptr usageShane Xiao
In VM debug mode, it is desirable to notify the application to correct the freeing sequence by unmapping the memory before destroying the userptr in the old userptr path. Add a bitmask to decide whether to send gpu vm fault to the applition. Signed-off-by: Shane Xiao <shane.xiao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: unreserve the gem BO before returning from attach errorPrike Liang
It requires unlocking the reserved gem BO before returning from attaching the eviction fence error. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: promote the implicit sync to the dependent read fencesPrike Liang
The driver doesn't want to implicitly sync on the DMA_RESV_USAGE_BOOKKEEP usage fences, and the BOOKEEP fences should be synced explicitly. So, as the VM implicit syncing only need to return and sync the dependent read fences. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu/psp: mark securedisplay TA as optionalAlex Deucher
This is an optional TA which is only available on certain embedded systems. Mark it as optional to avoid user confusion. This mirrors what we already do for other optional TAs. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4181 Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: fix pm notifier handlingAlex Deucher
Set the s3/s0ix and s4 flags in the pm notifier so that we can skip the resource evictions properly in pm prepare based on whether we are suspending or hibernating. Drop the eviction as processes are not frozen at this time, we we can end up getting stuck trying to evict VRAM while applications continue to submit work which causes the buffers to get pulled back into VRAM. v2: Move suspend flags out of pm notifier (Mario) Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4178 Fixes: 2965e6355dcd ("drm/amd: Add Suspend/Hibernate notification callback support") Cc: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: Implement unrecoverable error message handling for VFsEllen Pan
This notification may arrive in VF mailbox while polling for response from another event. This patches covers the following scenarios: - If VF is already in RMA state, then do not attempt to contact the host. Host will ignore the VF after sending the notification. - If the notification is detected during polling, then set the RMA status, and return error to caller. - If the notification arrives by interrupt, then set the RMA status and queue a reset. This reset will fail and VF will stop runtime services. Reviewed-by: Shravan Kumar Gande <Shravankumar.Gande@amd.com> Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com> Signed-off-by: Ellen Pan <yunru.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: Add unrecoverable error message definitions for VFsEllen Pan
Host may stop runtime services after reaching a bad page threshold. This notification will indicate to the VF that it no longer has access to the GPU. Reviewed-by: Shravan Kumar Gande <Shravankumar.Gande@amd.com> Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com> Signed-off-by: Ellen Pan <yunru.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07Revert "drm/amd: Stop evicting resources on APUs in suspend"Alex Deucher
This reverts commit 3a9626c816db901def438dc2513622e281186d39. This breaks S4 because we end up setting the s3/s0ix flags even when we are entering s4 since prepare is used by both flows. The causes both the S3/s0ix and s4 flags to be set which breaks several checks in the driver which assume they are mutually exclusive. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3634 Cc: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu/vcn: using separate VCN1_AON_SOC offsetRuijing Dong
VCN1_AON_SOC_ADDRESS_3_0 offset varies on different VCN generations, the issue in vcn4.0.5 is caused by a different VCN1_AON_SOC_ADDRESS_3_0 offset. This patch does the following: 1. use the same offset for other VCN generations. 2. use the vcn4.0.5 special offset 3. update vcn_4_0 and vcn_5_0 Acked-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: fix the eviction fence dereferencePrike Liang
The dma_resv_add_fence() already refers to the added fence. So when attaching the evciton fence to the gem bo, it needn't refer to it anymore. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: Implement Runtime Bad Page query for VFsEllen Pan
Host will send a notification when new bad pages are available. Uopn guest request, the first 256 bad page addresses will be placed into the PF2VF region. Guest should pause the PF2VF worker thread while the copy is in progress. Reviewed-by: Shravan Kumar Gande <Shravankumar.Gande@amd.com> Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com> Signed-off-by: Ellen Pan <yunru.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: Add Runtime Bad Page message definitions for VFsEllen Pan
Currently VFs rely on poison consumption interrupt from HW to kick off the bad page retirement process. Part of this process includes a VF reset. This patch adds the following: 1) Host Bad Pages notification message. 2) Guest request bad pages message. When combined, VFs are able to reserve the pages early, and potentially avoid future poison consumption that will disrupt user services from consequent FLR. Reviewed-by: Shravan Kumar Gande <Shravankumar.Gande@amd.com> Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com> Signed-off-by: Ellen Pan <yunru.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07Documentation/gpu: Add new entries to amdgpu glossaryRodrigo Siqueira
Add some additional entries. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdgpu: Add documentation to some parts of the AMDGPU ring and wbRodrigo Siqueira
Add some random documentation associated with the ring buffer manipulations and writeback. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amdkfd: change error to warning message for SDMA queues creationEric Huang
SDMA doesn't support oversubsciption, it is the user matter to create queues over HW limit, but not supposed to be a KFD error. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd/display: Don't check for NULL divisor in fixpt codeHarry Wentland
[Why] We check for a NULL divisor but don't act on it. This check does nothing other than throw a warning. It does confuse static checkers though: See https://lkml.org/lkml/2025/4/26/371 [How] Drop the ASSERTs in both DC and SPL variants. Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)") Fixes: 6efc0ab3b05d ("drm/amd/display: add back quality EASF and ISHARP and dc dependency changes") Signed-off-by: Harry Wentland <harry.wentland@amd.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd/display: Use true/false for boolean variables in DML2 core filesIvan Shamliev
Replace 0 and 1 with false and true for boolean variables in dml2_core_dcn4_calcs.c and dml2_core_utils.c to align with the Linux kernel coding style guidelines, which recommend using C99 bool type with true/false values. Signed-off-by: Ivan Shamliev <ivan.shamliev.dev@abv.bg> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/amd/display: adds kernel-doc comment for dc_stream_remove_writeback()James Flowers
Adds kernel-doc for externally linked dc_stream_remove_writeback function. Signed-off-by: James Flowers <bold.zone2373@fastmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-07drm/xe/doc: Wire up PCIe Gen5 limitationsRaag Jadav
Append PCIe Gen5 limitations to xe_firmware document. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250506054835.3395220-4-raag.jadav@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-05-07drm/xe: Expose PCIe link downgrade attributesRaag Jadav
Expose sysfs attributes for PCIe link downgrade capability and status. v2: Move from debugfs to sysfs (Lucas, Rodrigo, Badal) Rework macros and their naming (Rodrigo) v3: Use sysfs_create_files() (Riana) Fix checkpatch warning (Riana) v4: s/downspeed/downgrade (Lucas, Rodrigo, Riana) v5: Use PCIe Gen agnostic naming (Rodrigo) v6: s/pcie_gen/auto_link (Lucas) Signed-off-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Riana Tauro <riana.tauro@intel.com> Link: https://lore.kernel.org/r/20250506054835.3395220-3-raag.jadav@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
generated by cgit (git 2.34.1) at 2025-07-16 00:25:24 +0000