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2023-04-07drm/msm/dpu: mark remaining pp data as constDmitry Baryshkov
Fix several leftover _pp strutures and mark them as const, making all hw catalog fit into the rodata section. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530821/ Link: https://lore.kernel.org/r/20230404130622.509628-6-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-07drm/msm/dpu: constify DSC data structuresDmitry Baryshkov
DSC hw catalog data is not supposed to be changed, so mark it as const data. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530818/ Link: https://lore.kernel.org/r/20230404130622.509628-5-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-07drm/msm/dpu: Allow variable INTF_BLK sizeKonrad Dybcio
These blocks are of variable length on different SoCs. Set the correct values where I was able to retrieve it from downstream DTs and leave the old defaults (0x280) otherwise. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> [DB: fixed some lengths, split the INTF changes away] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/530816/ Link: https://lore.kernel.org/r/20230404130622.509628-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-07drm/msm/dpu: Allow variable SSPP_BLK sizeKonrad Dybcio
These blocks are of variable length on different SoCs. Set the correct values where I was able to retrieve it from downstream DTs and leave the old defaults (0x1c8) otherwise. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> [DB: fixed some of lengths, split the INTF changes away] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530814/ Link: https://lore.kernel.org/r/20230404130622.509628-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/scheduler: Fix UAF race in drm_sched_entity_push_job()Asahi Lina
After a job is pushed into the queue, it is owned by the scheduler core and may be freed at any time, so we can't write nor read the submit timestamp after that point. Fixes oopses observed with the drm/asahi driver, found with kASAN. Signed-off-by: Asahi Lina <lina@asahilina.net> Link: https://lore.kernel.org/r/20230406-scheduler-uaf-2-v1-1-972531cf0a81@asahilina.net Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2023-04-06Merge branches 'msm-next-lumag-dp', 'msm-next-lumag-dsi', ↵Dmitry Baryshkov
'msm-next-lumag-mdp5' and 'msm-next-lumag-mdp4' into msm-next-lumag Core: - Bugfixes for error handling during probe - rework UBWC decoder programming - prepare_commit cleanup - bindings for SM8550 (MDSS, DPU), SM8450 (DP) - uapi C++ compatibility fix - timeout calculation fixup - msm_fbdev conversion to drm_client DP: - interrupts cleanup DPU: - DSPP sub-block flush on sc7280 - support AR30 in addition to XR30 format - Allow using REC_0 and REC_1 to handle wide (4k) RGB planes DSI: - rework DSI instance ID detection on obscure platforms and misc small fixes as usual. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06Merge branch 'msm-next-lumag-dpu' into msm-next-lumagDmitry Baryshkov
Merge DPU changes, resolving conflicts between branches. Full changelog will be present in the final merge commit. DPU: - DSPP sub-block flush on sc7280 - support AR30 in addition to XR30 format - Allow using REC_0 and REC_1 to handle wide (4k) RGB planes Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/mdp4: Remove empty prepare_commit() functionJessica Zhang
Remove empty prepare_commit() function from MDP4 driver. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/523608/ Link: https://lore.kernel.org/r/20230221184256.1436-5-quic_jesszhan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06dt-bindings: display/msm: dsi-controller-main: Add SM6115Konrad Dybcio
Add a compatible for the DSI on SM6115. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527664/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-8-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/mdp5: set varaiable msm8x76_config storage-class-specifier to staticTom Rix
smatch reports drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:658:26: warning: symbol 'msm8x76_config' was not declared. Should it be static? This variable is only used in one file so should be static. Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/530950/ Link: https://lore.kernel.org/r/20230404185329.1925964-1-trix@redhat.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dsi: Remove custom DSI config handlingKonrad Dybcio
Now that the only user is handled by common code, remove the option to specify custom handlers through match data. This is effectively a revert of commit: 5ae15e76271 ("drm/msm/dsi: Allow to specify dsi config as pdata") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527662/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-7-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dsi: Switch the QCM2290-specific compatible to index autodetectionKonrad Dybcio
Now that the logic can handle multiple sets of registers, move the QCM2290 to the common logic and mark it deprecated. This allows us to remove a couple of structs, saving some memory. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527656/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-6-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dp: Fix spelling mistake "Capabiity" -> "Capability"Colin Ian King
There is a spelling mistake in a drm_dbg_dp message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/526658/ Link: https://lore.kernel.org/r/20230314082050.26331-1-colin.i.king@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dsi: dsi_cfg: Merge SC7180 config into SDM845Konrad Dybcio
The configs are identical, other than the number of *maximum* DSI hosts allowed. This isn't an issue, unless somebody deliberately tries to access the inexistent host by adding a dt node for it. Remove the SC7180 struct and point the hw revision match to the SDM845's one. On a note, this could have been done back when 7180 support was introduced. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527654/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-5-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06dt-bindings: display: msm: dp-controller: document SM8450 compatibleNeil Armstrong
The SM8450 & SM350 shares the same DT TX IP version, use the SM8350 compatible as fallback for SM8450. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527564/ Link: https://lore.kernel.org/r/20230206-topic-sm8450-upstream-dp-controller-v6-1-d78313cbc41d@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dsi: dsi_cfg: Deduplicate identical structsKonrad Dybcio
Some structs were defined multiple times for no apparent reason. Deduplicate them. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527653/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-4-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dp: Return IRQ_NONE for unhandled interruptsDouglas Anderson
If our interrupt handler gets called and we don't really handle the interrupt then we should return IRQ_NONE. The current interrupt handler didn't do this, so let's fix it. NOTE: for some of the cases it's clear that we should return IRQ_NONE and some cases it's clear that we should return IRQ_HANDLED. However, there are a few that fall somewhere in between. Specifically, the documentation for when to return IRQ_NONE vs. IRQ_HANDLED is probably best spelled out in the commit message of commit d9e4ad5badf4 ("Document that IRQ_NONE should be returned when IRQ not actually handled"). That commit makes it clear that we should return IRQ_HANDLED if we've done something to make the interrupt stop happening. The case where it's unclear is, for instance, in dp_aux_isr() after we've read the interrupt using dp_catalog_aux_get_irq() and confirmed that "isr" is non-zero. The function dp_catalog_aux_get_irq() not only reads the interrupts but it also "ack"s all the interrupts that are returned. For an "unknown" interrupt this has a very good chance of actually stopping the interrupt from happening. That would mean we've identified that it's our device and done something to stop them from happening and should return IRQ_HANDLED. Specifically, it should be noted that most interrupts that need "ack"ing are ones that are one-time events and doing an "ack" is enough to clear them. However, since these interrupts are unknown then, by definition, it's unknown if "ack"ing them is truly enough to clear them. It's possible that we also need to remove the original source of the interrupt. In this case, IRQ_NONE would be a better choice. Given that returning an occasional IRQ_NONE isn't the absolute end of the world, however, let's choose that course of action. The IRQ framework will forgive a few IRQ_NONE returns now and again (and it won't even log them, which is why we have to log them ourselves). This means that if we _do_ end hitting an interrupt where "ack"ing isn't enough the kernel will eventually detect the problem and shut our device down. Signed-off-by: Douglas Anderson <dianders@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/520660/ Link: https://lore.kernel.org/r/20230126170745.v2.2.I2d7aec2fadb9c237cd0090a47d6a8ba2054bf0f8@changeid [DB: reformatted commit message to make checkpatch happy] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dsi: Fix DSI index detection when version clash occursKonrad Dybcio
Currently, we allow for MAX_DSI entries in io_start to facilitate for MAX_DSI number of DSI hosts at different addresses. The configuration is matched against the DSI CTRL hardware revision read back from the component. We need a way to resolve situations where multiple SoCs with different register maps may use the same version of DSI CTRL. In preparation to do so, make msm_dsi_config a 2d array where each entry represents a set of configurations adequate for a given SoC. This is totally fine to do, as the only differentiating factors between same-version-different-SoCs configurations are the number of DSI hosts (1 or 2, at least as of today) and the set of base registers. The regulator setup is the same, because the DSI hardware is the same, regardless of the SoC it was implemented in. In addition to that, update the matching logic such that it will loop over VARIANTS_MAX variants, making sure they are all taken into account. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527652/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-3-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dp: Clean up handling of DP AUX interruptsDouglas Anderson
The DP AUX interrupt handling was a bit of a mess. * There were two functions (one for "native" transfers and one for "i2c" transfers) that were quite similar. It was hard to say how many of the differences between the two functions were on purpose and how many of them were just an accident of how they were coded. * Each function sometimes used "else if" to test for error bits and sometimes didn't and again it was hard to say if this was on purpose or just an accident. * The two functions wouldn't notice whether "unknown" bits were set. For instance, there seems to be a bit "DP_INTR_PLL_UNLOCKED" and if it was set there would be no indication. * The two functions wouldn't notice if more than one error was set. Let's fix this by being more consistent / explicit about what we're doing. By design this could cause different handling for AUX transfers, though I'm not actually aware of any bug fixed as a result of this patch (this patch was created because we simply noticed how odd the old code was by code inspection). Specific notes here: 1. In the old native transfer case if we got "done + wrong address" we'd ignore the "wrong address" (because of the "else if"). Now we won't. 2. In the old native transfer case if we got "done + timeout" we'd ignore the "timeout" (because of the "else if"). Now we won't. 3. In the old native transfer case we'd see "nack_defer" and translate it to the error number for "nack". This differed from the i2c transfer case where "nack_defer" was given the error number for "nack_defer". This 100% can't matter because the only user of this error number treats "nack defer" the same as "nack", so it's clear that the difference between the "native" and "i2c" was pointless here. 4. In the old i2c transfer case if we got "done" plus any error besides "nack" or "defer" then we'd ignore the error. Now we don't. 5. If there is more than one error signaled by the hardware it's possible that we'll report a different one than we used to. I don't know if this matters. If someone is aware of a case this matters we should document it and change the code to make it explicit. 6. One quirk we keep (I don't know if this is important) is that in the i2c transfer case if we see "done + defer" we report that as a "nack". That seemed too intentional in the old code to just drop. After this change we will add extra logging, including: * A warning if we see more than one error bit set. * A warning if we see an unexpected interrupt. * A warning if we get an AUX transfer interrupt when shouldn't. It actually turns out that as a result of this change then at boot we sometimes see an error: [drm:dp_aux_isr] *ERROR* Unexpected DP AUX IRQ 0x01000000 when not busy That means that, during init, we are seeing DP_INTR_PLL_UNLOCKED. For now I'm going to say that leaving this error reported in the logs is OK-ish and hopefully it will encourage someone to track down what's going on at init time. One last note here is that this change renames one of the interrupt bits. The bit named "i2c done" clearly was used for native transfers being done too, so I renamed it to indicate this. Signed-off-by: Douglas Anderson <dianders@chromium.org> Tested-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/520658/ Link: https://lore.kernel.org/r/20230126170745.v2.1.I90ffed3ddd21e818ae534f820cb4d6d8638859ab@changeid Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dsi: Get rid of msm_dsi_config::num_dsiKonrad Dybcio
In preparation for supporting multiple sets of possible base registers, remove the num_dsi variable. We're comparing the io_start array contents with the reg value from the DTS, so it will either match one of the expected values or don't match against a zero (which we get from partial array initialization). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527658/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-2-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06dt-bindings: display/msm: dsi-controller-main: Fix deprecated QCM2290 compatibleKonrad Dybcio
The point of the previous cleanup was to disallow "qcom,mdss-dsi-ctrl" alone. This however didn't quite work out and the property became undocumented instead of deprecated. Fix that. Additionally, the "qcom," prefix was missed previously. Fix it. Fixes: 0c0f65c6dd44 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC") Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527651/ Link: https://lore.kernel.org/r/20230307-topic-dsi_qcm-v6-1-70e13b1214fa@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06msm/disp/dpu: allow atomic_check in PSR usecaseVinod Polimera
Certain flags like dirty_fb will be updated into the plane state during crtc atomic_check. Allow those updates during PSR commit. Reported-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/all/20230326162723.3lo6pnsfdwzsvbhj@ripper/ Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/530208/ Link: https://lore.kernel.org/r/1680271114-1534-3-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: set dirty_fb flag while in self refresh modeVinod Polimera
While in virtual terminal mode with PSR enabled, there will be no atomic commits triggered without dirty_fb being set. This will create a notion of no screen update. Allow atomic commit when dirty_fb ioctl is issued, so that it can trigger a PSR exit and shows update on the screen. Reported-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/all/20230326162723.3lo6pnsfdwzsvbhj@ripper/ Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/530206/ Link: https://lore.kernel.org/r/1680271114-1534-2-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: manage DPU resources if CTM is requestedKalyan Thota
Allow modeset to be triggered during CTM enable/disable. In the modeset callbacks, DPU resources required for the CTM feature are managed appropriately. Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/522448/ Link: https://lore.kernel.org/r/1676286704-818-5-git-send-email-quic_kalyant@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: avoid unnecessary check in DPU reservationsKalyan Thota
Return immediately on failure, this will make dpu reservations part look cleaner. Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/522442/ Link: https://lore.kernel.org/r/1676286704-818-4-git-send-email-quic_kalyant@quicinc.com [DB: fixed merge conflict with b6975693846b, retain those changes] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: add DSPPs into reservation upon a CTM requestKalyan Thota
Add DSPP blocks into the topology for reservation, if there is a CTM request for that composition. Signed-off-by: Kalyan Thota <quic_kalyant@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/522445/ Link: https://lore.kernel.org/r/1676286704-818-3-git-send-email-quic_kalyant@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: Fix bit-shifting UB in DPU_HW_VER() macroGeert Uytterhoeven
With gcc-5 and CONFIG_UBSAN_SHIFT=y: drivers/gpu/drm/msm/msm_mdss.c: In function 'msm_mdss_enable': drivers/gpu/drm/msm/msm_mdss.c:296:2: error: case label does not reduce to an integer constant case DPU_HW_VER_800: ^ drivers/gpu/drm/msm/msm_mdss.c:299:2: error: case label does not reduce to an integer constant case DPU_HW_VER_810: ^ drivers/gpu/drm/msm/msm_mdss.c:300:2: error: case label does not reduce to an integer constant case DPU_HW_VER_900: ^ This happens because for major revisions 8 or greather, the non-sign bit of the major revision number is shifted into bit 31 of a signed integer, which is undefined behavior. Fix this by casting the major revision number to unsigned int. Fixes: efcd0107727c4f04 ("drm/msm/dpu: add support for SM8550") Fixes: 4a352c2fc15aec1e ("drm/msm/dpu: Introduce SC8280XP") Fixes: 100d7ef6995d1f86 ("drm/msm/dpu: add support for SM8450") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/525152/ Link: https://lore.kernel.org/r/20230306090633.65918-1-geert+renesas@glider.be Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: remove unused dpu_plane_validate_multirect_v2 functionAbhinav Kumar
After cleaning up the older multirect support the function dpu_plane_validate_multirect_v2() is unused. Lets remove it. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> [DB: also drop struct dpu_multirect_plane_states and R0/R1/R_MAX] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527348/ Link: https://lore.kernel.org/r/20230316161653.4106395-33-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: log the multirect_index in _dpu_crtc_blend_setup_pipeAbhinav Kumar
Lets print the multirect_index as well in _dpu_crtc_blend_setup_pipe() as it will give the complete information of the sw_pipe as well. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527350/ Link: https://lore.kernel.org/r/20230316161653.4106395-32-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: drop smart_dma_rev from dpu_capsDmitry Baryshkov
The code doesn't use dpu_caps::smart_dma_rev field. It checks if the corresponding feature is enabled in the SSPP features. Drop the smart_dma_rev field completely. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527369/ Link: https://lore.kernel.org/r/20230316161653.4106395-31-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: populate SmartDMA features in hw catalogDmitry Baryshkov
Downstream driver uses dpu->caps->smart_dma_rev to update sspp->cap->features with the bit corresponding to the supported SmartDMA version. Upstream driver does not do this, resulting in SSPP subdriver not enabling setup_multirect callback. Add corresponding SmartDMA SSPP feature bits to dpu hw catalog. Per Abhinav's request enable the SmartDMA features only on the platforms where the multirect was actually verified visually (sdm845 and sm8250). An (untested) enablement on the rest of the platforms comes in the next patch. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527362/ Link: https://lore.kernel.org/r/20230316161653.4106395-29-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: add support for wide planesDmitry Baryshkov
It is possible to use multirect feature and split source to use the SSPP to output two consecutive rectangles. This commit brings in this capability to support wider screen resolutions. Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/527358/ Link: https://lore.kernel.org/r/20230316161653.4106395-28-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixerDmitry Baryshkov
Rework _dpu_crtc_blend_setup_mixer() to split away pipe handling to a separate functon. This is a preparation for the r_pipe support. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527354/ Link: https://lore.kernel.org/r/20230316161653.4106395-27-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: rework static color fill codeDmitry Baryshkov
Rework static color fill code to separate the pipe / pipe_cfg handling. This is a preparation for the r_pipe support. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527340/ Link: https://lore.kernel.org/r/20230316161653.4106395-26-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: rework plane CSC settingDmitry Baryshkov
Rework the code flushing CSC settings for the plane. Separate out the pipe and pipe_cfg as a preparation for r_pipe support. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527347/ Link: https://lore.kernel.org/r/20230316161653.4106395-25-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: rework dpu_plane_atomic_check()Dmitry Baryshkov
Split pipe-dependent code from dpu_plane_atomic_check() into the separate function dpu_plane_atomic_check_pipe(). This is one of preparational steps to add r_pipe support. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527336/ Link: https://lore.kernel.org/r/20230316161653.4106395-24-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: rework dpu_plane_sspp_atomic_update()Dmitry Baryshkov
Split pipe-dependent code from dpu_plane_sspp_atomic_update() into the separate function dpu_plane_sspp_update_pipe(). This is one of preparational steps to add r_pipe support. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527337/ Link: https://lore.kernel.org/r/20230316161653.4106395-23-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: simplify dpu_plane_validate_src()Dmitry Baryshkov
The plane's clipped coordinates has already been validated against FB size in the drm_atomic_plane_check(). There is no need to check them again. Remove corresponding checks and inline dpu_plane_validate_src(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527364/ Link: https://lore.kernel.org/r/20230316161653.4106395-22-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: add dpu_hw_sspp_cfg to dpu_plane_stateDmitry Baryshkov
Now as all accesses to pipe_cfg and pstate have been cleaned, add struct dpu_hw_sspp_cfg to struct dpu_plane_state, so that dpu_plane_atomic_check() and dpu_plane_atomic_update() do not have a chance to disagree about src/dst rectangles (currently dpu_plane_atomic_check() uses unclipped rectangles, while dpu_plane_atomic_update() uses clipped rectangles calculated by drm_atomic_helper_check_plane_state()). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527352/ Link: https://lore.kernel.org/r/20230316161653.4106395-21-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: make _dpu_plane_calc_clk accept mode directlyDmitry Baryshkov
Rework bandwidth/clock calculation functions to use mode directly rather than fetching it through the plane data. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527344/ Link: https://lore.kernel.org/r/20230316161653.4106395-20-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: rewrite plane's QoS-related functions to take dpu_sw_pipe and ↵Dmitry Baryshkov
dpu_format Rewrite dpu_plane's QoS related functions to take struct dpu_sw_pipe and struct dpu_format as arguments rather than fetching them from the pstate or drm_framebuffer. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527339/ Link: https://lore.kernel.org/r/20230316161653.4106395-19-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: drop redundant plane dst check from dpu_crtc_atomic_check()Dmitry Baryshkov
The helper drm_atomic_helper_check_plane_state() already checks whether the scaled and clipped plane falls into the CRTC visible region (and clears plane_state->visible if it doesn't). Drop the redundant check from dpu_crtc_atomic_check(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527343/ Link: https://lore.kernel.org/r/20230316161653.4106395-18-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: move the rest of plane checks to dpu_plane_atomic_check()Dmitry Baryshkov
Move plane state updates from dpu_crtc_atomic_check() to the function where they belong: to dpu_plane_atomic_check(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527335/ Link: https://lore.kernel.org/r/20230316161653.4106395-17-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: don't use unsupported blend stagesDmitry Baryshkov
The dpu_crtc_atomic_check() compares blending stage with DPU_STAGE_MAX (maximum amount of blending stages supported by the driver), however we should compare it against .max_mixer_blendstages, the maximum blend stage supported by the mixer. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527338/ Link: https://lore.kernel.org/r/20230316161653.4106395-16-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_checkDmitry Baryshkov
Neither source split nor multirect are properly supported at this moment. Both of these checks depend on normalized_zpos being equal for several planes (which is never the case for normalized zpos). Drop these checks to simplify dpu_crtc_atomic_check(). The actual support for either of these features is not removed from the backend code (sspp, ctl, etc). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527332/ Link: https://lore.kernel.org/r/20230316161653.4106395-15-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: rename dpu_hw_sspp_cfg to dpu_sw_pipe_cfgDmitry Baryshkov
As struct dpu_hw_sspp_cfg describes only the source and destination rectangles, it is a software pipe configuration now. Rename it accordingly. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527334/ Link: https://lore.kernel.org/r/20230316161653.4106395-14-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: remove dpu_hw_fmt_layout from struct dpu_hw_sspp_cfgDmitry Baryshkov
Remove dpu_hw_fmt_layout instance from struct dpu_hw_sspp_cfg, leaving only src_rect and dst_rect. This way all the pipes used by the plane will have a common layout instance (as the framebuffer is shared between them), while still keeping a separate src/dst rectangle configuration for each pipe. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527329/ Link: https://lore.kernel.org/r/20230316161653.4106395-13-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: move stride programming to dpu_hw_sspp_setup_sourceaddressDmitry Baryshkov
Move stride programming to dpu_hw_sspp_setup_sourceaddress(), so that dpu_hw_sspp_setup_rects() programs only source and destination rectangles. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527330/ Link: https://lore.kernel.org/r/20230316161653.4106395-12-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: clean up SRC addresses when setting up SSPP for solid fillDmitry Baryshkov
Set SSPP_SRCn_ADDR registers to 0 while setting up solid fill, as we can not be sure that the previous address is still valid. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527324/ Link: https://lore.kernel.org/r/20230316161653.4106395-11-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-04-06drm/msm/dpu: pass dpu_format to _dpu_hw_sspp_setup_scaler3()Dmitry Baryshkov
There is no need to pass full dpu_hw_sspp_cfg instance to _dpu_hw_sspp_setup_scaler3, pass just struct dpu_format pointer. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/527328/ Link: https://lore.kernel.org/r/20230316161653.4106395-10-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
generated by cgit (git 2.34.1) at 2025-07-15 11:46:26 +0000