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2023-07-21drm/amd/display: remove an unused fileAurabindo Pillai
[Why&How] Internal subvp state is not referenced in driver code, so it can be removed. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-21drm/radeon: Prefer pr_err/_info over printkSrinivasan Shanmugam
Fixes the following checkpatch.pl: WARNING: printk() should include KERN_<LEVEL> facility level Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-21drm/amdgpu: allow secure submission on VCN4 ringsguttula
This patch will enable secure decode playback on VCN4_0_2 Signed-off-by: sguttula <Suresh.Guttula@amd.com> Reviewed-by: Leo Liu <leo.liiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-21drm/amd: Avoid reading the VBIOS part number twiceMario Limonciello
The VBIOS part number is read both in amdgpu_atom_parse() as well as in atom_get_vbios_pn() and stored twice in the `struct atom_context` structure. Remove the first unnecessary read and move the `pr_info` line from that read into the second. v2: squash in unused variable removal Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: use a macro to define no xcp partition caseGuchun Chen
~0 as no xcp partition is used in several places, so improve its definition by a macro for code consistency. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu/vm: use the same xcp_id from root PDGuchun Chen
Other PDs/PTs allocation should just use the same xcp_id as that stored in root PD. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: fix slab-out-of-bounds issue in amdgpu_vm_pt_createGuchun Chen
Recent code set xcp_id stored from file private data when opening device to amdgpu bo for accounting memory usage etc, but not all VMs are attached to this fpriv structure like the vm cases in amdgpu_mes_self_test, otherwise, KASAN will complain below out of bound access. And more importantly, VM code should not touch fpriv structure, so drop fpriv code handling from amdgpu_vm_pt. [ 77.292314] BUG: KASAN: slab-out-of-bounds in amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.293845] Read of size 4 at addr ffff888102c48a48 by task modprobe/1069 [ 77.294146] Call Trace: [ 77.294178] <TASK> [ 77.294208] dump_stack_lvl+0x49/0x63 [ 77.294260] print_report+0x16f/0x4a6 [ 77.294307] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.295979] ? kasan_complete_mode_report_info+0x3c/0x200 [ 77.296057] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.297556] kasan_report+0xb4/0x130 [ 77.297609] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.299202] __asan_load4+0x6f/0x90 [ 77.299272] amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu] [ 77.300796] ? amdgpu_init+0x6e/0x1000 [amdgpu] [ 77.302222] ? amdgpu_vm_pt_clear+0x750/0x750 [amdgpu] [ 77.303721] ? preempt_count_sub+0x18/0xc0 [ 77.303786] amdgpu_vm_init+0x39e/0x870 [amdgpu] [ 77.305186] ? amdgpu_vm_wait_idle+0x90/0x90 [amdgpu] [ 77.306683] ? kasan_set_track+0x25/0x30 [ 77.306737] ? kasan_save_alloc_info+0x1b/0x30 [ 77.306795] ? __kasan_kmalloc+0x87/0xa0 [ 77.306852] amdgpu_mes_self_test+0x169/0x620 [amdgpu] v2: without specifying xcp partition for PD/PT bo, the xcp id is -1. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2686 Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by: Guchun Chen <guchun.chen@amd.com> Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Allocate root PD on correct partitionGuchun Chen
file_priv needs to be setup firstly, otherwise, root PD will always be allocated on partition 0, even if opening the device from other partitions. Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo") Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Add RLCG interface driver implementation for gfx v9.4.3 (v3)Victor Lu
Add RLCG interface support for gfx v9.4.3 and multiple XCCs. Do not enable it yet. v2: Fix amdgpu_rlcg_reg_access_ctrl init, add support for multiple XCCs in amdgpu_mm_wreg_mmio_rlc v3: Use GET_INST() when indexing amdgpu_rlcg_reg_access_ctrl Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Zhigang Luo <zhigang.luo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Promote DAL to 3.2.243Aric Cyr
This version brings along following fixes: - Update 128b/132b downspread factor to 0.3% - Add helpers to get DMUB FW boot options - Initialize necessary uninitialized variables - Add stream overhead in BW calculations for 128b/132b - Add link encoding to timing BW calculation parameters - Prevent vtotal from being set to 0 - Fix race condition when turning off an output alone - Keep PHY active for DP displays on DCN31 - Fix ASIC check in aux timeout workaround - ABM pause toggle - Add missing triggers for full updates - Disable MPC split by default on special asic - Add additional refresh rate conditions for SubVP cases - Fix DP2 link training failure with RCO - Reenable all root clock gating options - Cache backlight_millinits in link structure and setting brightness accordingly - Refine to decide the verified link setting - Update SW cursor fallback for subvp high refresh Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Add missing triggers for full updatesAlvin Lee
[Description] - Full update was missed for the following cases: - Idle optimization is enabled - Plane is not in current context - Also don't clear surface updates at end of commit_plane_for_stream_fast as they are cleared at the beginning of each flip (only stream updates need to be cleared in case there is no stream update in the next flip) Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: ABM pause toggleReza Amini
[why] Allow ABM states to be transferred across display adapters for smooth display transitions. [how] We call DMUB to pause and get ABM states. We transfer data to other gpu, and deliver data and ask ABM to un-pause. Reviewed-by: Harry Vanzylldejong <harry.vanzylldejong@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Reza Amini <reza.amini@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Fix ASIC check in aux timeout workaroundTaimur Hassan
[Why] Aux write was meant to be ASIC specific, and is causing compliance failures on newer parts. [How] Make workaround specific to single ASIC. Reviewed-by: Michael Strauss <michael.strauss@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Keep PHY active for DP displays on DCN31Nicholas Kazlauskas
[Why & How] Port of a change that went into DCN314 to keep the PHY enabled when we have a connected and active DP display. The PHY can hang if PHY refclk is disabled inadvertently. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Josip Pavic <josip.pavic@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Prevent vtotal from being set to 0Daniel Miess
[Why] In dcn314 DML the destination pipe vtotal was being set to the crtc adjustment vtotal_min value even in cases where that value is 0. [How] Only set vtotal to the crtc adjustment vtotal_min value in cases where the value is non-zero. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Add link encoding to timing BW calculation parametersGeorge Shen
[Why] There certain cases where the timing BW is dependent on the type of link encoding in use. Thus to calculate the correct BW required for a given timing, the link encoding should be added as a parameter. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Add stream overhead in BW calculations for 128b/132bGeorge Shen
[Why] Current BW calculations do not account for the additional padding added for uncompressed pixel-to-symbol packing. This results in X.Y being too low for 128b/132b SST streams in certain scenarios. If X.Y is too low, end user can observe image corruption. [How] Add function to calculate stream overhead to timing BW calculation for 128b/132b SST cases. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Initialize necessary uninitialized variablesMeera Patel
This commit initializes uninitialized variables. For some compilers uninitialized variable warnings are treated as Error. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Meera Patel <meera.patel@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Add helpers to get DMUB FW boot optionsCruise Hung
[Why & How] To query the bits and print them out for debug purposes. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Cruise Hung <cruise.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Promote DAL to 3.2.242Aric Cyr
This version brings along following fixes: - Setup stream encoder before link enable for TMDS - Use is_dig_enable function instead of dcn10 hardcode - Re-add aux intercept disable delay generically for 2+ LTTPRs - Add polling method to handle MST reply packet - Remove unused function - Improve the include of header file - Add missing static - Hardcode vco_freq for dcn316 - Reduce stack size - Skip enabling DMCUB when using emulation - Check TG is non-null before checking if enabled - Update scaler recout data for visual confirm - Skip querying caps when DMCUB emulation is in use Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Disable MPC split by default on special asicZhikai Zhai
[WHY] All of pipes will be used when the MPC split enable on the dcn which just has 2 pipes. Then MPO enter will trigger the minimal transition which need programe dcn from 2 pipes MPC split to 2 pipes MPO. This action will cause lag if happen frequently. [HOW] Disable the MPC split for the platform which dcn resource is limited Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Zhikai Zhai <zhikai.zhai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Update 128b/132b downspread factor to 0.3%George Shen
[Why] Updating downspread factor to 0.3% to add additional margin to account for potential link rate deviations (up to 300ppm as per the DP spec). Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Fix race condition when turning off an output aloneAlan Liu
[Why] When 2 threads are doing commit_tail parallelly, one thread could commit new streams to dc state but another thread remove it from dc right away. [How] If we don't have new dm state change from commit_check, then we should not call dc_commit_streams() in commit_tail. A new function amdgpu_dm_commit_streams() is introduced to refator dc_commit_stream() adjacent code and fix this issue. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Alan Liu <haoping.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: add additional refresh rate conditions for SubVP casesSamson Tam
[Why] Want to further constrain these refresh rate conditions for SubVP: - SubVP + SubVP: either both <= 120Hz or both between 120-165Hz - SubVP + DRR: SubVP <= 120Hz - SubVP + VBlank: SubVP <= 120Hz [How] Add constraints in subvp_subvp_admissable(), dcn32_subvp_drr_admissable() and dcn32_subvp_vblank_admissable() Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: refine to decide the verified link settingZhikai Zhai
[WHY] We return false by default when link training fail at link loss. It will cause we get a fail verified link caps directly. [HOW] Record the highest verified link caps. Use the recorded value as the verified link caps if it is not successful in the last attempt to avoid to use the lowest link setting. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Zhikai Zhai <zhikai.zhai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Fix DP2 link training failure with RCODaniel Miess
[Why] When RCO is enabled for symclk32_le we get failures during DP2 link traing compliance tests. [How] Break out symclk32_le RCO into a separate function that is called for hpo when link is enabled/disabled. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Cache backlight_millinits in link structure and setting ↵Nicholas Susanto
brightness accordingly [Why] Need to save the cached backlight level so that display lights up using appropriate brightness level instead of the default brightness when waking up from s0i3. [How] Adding a backlight level cache in link structure. Also instead on calling set_default_brightness_aux, check if cached values exists. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Nicholas Susanto <nicholas.susanto@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Reenable all root clock gating optionsDaniel Miess
[Why & How] Re-enable all RCO options now that all known issues with RCO have been addressed Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Update SW cursor fallback for subvp high refreshAlvin Lee
[Description] Since SubVP high refresh is now enabled, we must fallback to SW cursor under if we're in a SubVP high refresh config Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Skip querying caps when DMCUB emulation is in useNicholas Kazlauskas
[Why] Workaround to avoid accessing DMCUB state too early if the emulator is in use - we don't support any of the features the caps are querying with emulation anyway. [How] Guard the query if emulation is in use. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Update scaler recout data for visual confirmLeo Ma
[Why] Visual confirm color is not as expected for Autoa Color Management feature test. [How] Calculate scaler recout data when visual confirm enabled to update the visual confirm bar on the display. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Leo Ma <hanghong.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: check TG is non-null before checking if enabledTaimur Hassan
[Why & How] If there is no TG allocation we can dereference a NULL pointer when checking if the TG is enabled. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Skip enabling DMCUB when using emulationTaimur Hassan
[Why & How] Shouldn't be touching path for HW DMCUB when emulating. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Reduce stack sizeRodrigo Siqueira
Reduce stack size pointed by clang: amdgpu_dm/amdgpu_dm.c:8655:13: error: stack frame size (1048) exceeds limit (1024) in 'amdgpu_dm_atomic_commit_tail' [-Werror,-Wframe-larger-than] Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Hardcode vco_freq for dcn316Alan Liu
There is no need to calculate the VCO frequency. In our internal branch we've hard-coded this for a while, so it's well-tested. This also allows us to remove the now unused code for calculating the VCO frequency. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Alan Liu <haoping.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Add missing staticRodrigo Siqueira
After enable DRM_AMDGPU_WERROR, clang highlight multiple functions that need to have `static`, and this commit address those issues and also improve the indents. Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Remove unused functionRodrigo Siqueira
The get_engine_type is never used in the code, for this reason, this commit drops this function. Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Improve the include of header fileRodrigo Siqueira
This commit improves the include of some header files to make them align with other includes. Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Add polling method to handle MST reply packetWayne Lin
[Why] Specific TBT4 dock doesn't send out short HPD to notify source that IRQ event DOWN_REP_MSG_RDY is set. Which violates the spec and cause source can't send out streams to mst sinks. [How] To cover this misbehavior, add an additional polling method to detect DOWN_REP_MSG_RDY is set. HPD driven handling method is still kept. Just hook up our handler to drm mgr->cbs->poll_hpd_irq(). Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Re-add aux intercept disable delay generically for 2+ LTTPRsMichael Strauss
[WHY] Issue not display generic, required for multiple 2+ LTTPR link configurations. [HOW] Revert monitor patch change and remove delay for single LTTPR case Reviewed-by: George Shen <george.shen@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Use is_dig_enable function instead of dcn10 hardcodeNicholas Kazlauskas
[Why] This can differ depending on ASIC and we can end up skipping all transmitter control if we're relying on the wrong bit as a shortcut for whether link is on/off. [How] The ASIC table itself provides the correct DIG check, use that instead of the dcn10 hardcode. Reviewed-by: Syed Hassan <syed.hassan@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Setup stream encoder before link enable for TMDSJinZe Xu
[Why] HDMI spec requires TMDS clock to be not more than 340MHz. Stream encoder ensure this requirement but driver enable stream encoder later than PHY. So PHY will output full speed TMDS clock first. [How] Enable stream encoder first in TMDS case. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: JinZe Xu <jinze.xu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: create a new file for doorbell managerShashank Sharma
This patch: - creates a new file for doorbell management. - moves doorbell code from amdgpu_device.c to this file. V2: - remove doc from function declaration (Christian) - remove 'device' from function names to make it consistent (Alex) - add SPDX license identifier (Luben) V3: - change license to MIT license(Christian) Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Add dcdebugmask option to enable DPIA traceStylon Wang
[Why & How] It's useful to be able to enable DPIA trace with dcdebugmask option, especially to debug DPIA issues involved in transition of system power states. This patch adds an option to amdgpu.dcdebugmask to be picked up by amdgpu DM to enable DPIA trace. Signed-off-by: Stylon Wang <stylon.wang@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Allow the initramfs generator to include psp_13_0_6_taCandice Li
Allow the initramfs generator to automatically include psp_13_0_6_ta firmware to initramfs. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Disable RAS by default on APU flatformStanley.Yang
Disable RAS feature by default for aqua vanjaram on APU platform. Changed from V1: Splite Disable RAS by default on APU platform into a separated patch. Changed from V2: Avoid to modify global variable amdgpu_ras_enable. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Enable aqua vanjaram RASStanley.Yang
Enable RAS for aqua vanjaram. Changed from V1: Split the change in amdgpu_ras_asic_supported into a separated patch. Changed from V2: Avoid to modify global variable amdgpu_ras_enable. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amdgpu: Avoid possiblity of kernel crash in 'gmc_v8_0, ↵Srinivasan Shanmugam
gmc_v7_0_init_microcode()' If the function 'gmc_v8_0_ or gmc_v7_0_init_microcode()' fails, the driver will just fail to load, hence return -EINVAL rather having BUG(), fixes WARNING: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants Fixes: 2f77b5931f68 ("drm/amdgpu: Fix error & warnings in gmc_v8_0.c") Fixes: 0cfc1d683046 ("drm/amdgpu: Fix errors & warnings in gmc_ v6_0, v7_0.c") Suggested-by: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Eliminate warnings in amdgpu_dm_helpers.cSrinivasan Shanmugam
Fix the following warnings reported by checkpatch: WARNING: Block comments use a trailing */ on a separate line WARNING: Prefer using '"%s...", __func__' to using 'execute_synaptics_rc_command', this function's name, in a string WARNING: Prefer using '"%s...", __func__' to using 'apply_synaptics_fifo_reset_wa', this function's name, in a string WARNING: braces {} are not necessary for single statement blocks Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-07-18drm/amd/display: Clean up style problems in amdgpu_dm_hdcp.cSrinivasan Shanmugam
Conform to Linux kernel coding style. And promote sysfs entry for set/get srm to kdoc. Suggested-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-07-15 09:58:17 +0000