summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-10-30drm/amdgpu: remove unneeded semicolonTom Rix
A semicolon is not needed after a switch statement. Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: fix out-of-bound read on pptable->SkuReservedColin Ian King
A recent change added two uint16_t elements to PPTable_t and reduced the uint32_t array down to 8 elements. This results in the dev_info printing of pptable->SkuReserved[8] accessing a value that is out-of-range on array SkuReserved. The array has been shrunk by 1 element, so remove this extraneous dev_info message. Addresses-Coverity: ("Out-of-bounds read") Fixes: 1dc3c5a95b08 ("drm/amd/pm: update driver if file for sienna cichlid") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: remove useless if/elseZou Wei
Fix the following coccinelle report: ./drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:1367:3-5: WARNING: possible condition with no effect (if == else) Both branches are the same, so remove the if/else altogether. Fixes: 81875979f0b2 ("drm/amd/display: Remove extra pairs of parentheses in dce_calcs.c") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: drop CONFIG_DRM_AMD_DC_DCN3_01 from atomfirmware.hAlex Deucher
Not needed. Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu/display: remove dal_cmd_tbl_helper_dcn2_get_table2Alex Deucher
It's unused and identical to dal_cmd_tbl_helper_dce112_get_table2. Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINEAlex Deucher
No need for a separate config option at this point. Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu/powerplay: Only apply optimized mclk dpm policy on polarisAlex Deucher
Leads to improper dpm on older parts. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1353 Fixes: 8d89b96fe797 ("drm/amd/powerplay: optimize the mclk dpm policy settings") Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30MAINTAINERS: Update AMD POWERPLAY patternJoe Perches
commit e098bc9612c2 ("drm/amd/pm: optimize the power related source code layout") moved the directory, update the F: file pattern to match. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: do not use ixFEATURE_STATUS for checking smc runningEvan Quan
This reverts commit f87812284172a9809820d10143b573d833cd3f75 ("drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume"). It was intended to fix Hawaii S4(hibernation) issue but break S3. As ixFEATURE_STATUS is filled with garbage data on resume which can be only cleared by reloading smc firmware(but that will involve many changes). So, we will revert this S4 fix and seek a new way. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: perform SMC reset on suspend/hibernationEvan Quan
So that the succeeding resume can be performed based on a clean state. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: enable baco reset for HawaiiEvan Quan
Which can be used for S4(hibernation) support. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: correct the baco reset sequence for CI ASICsEvan Quan
Correct some registers bitmasks and add mmBIOS_SCRATCH_7 reset. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: perform srbm soft reset always on SDMA resumeEvan Quan
This can address the random SDMA hang after pci config reset seen on Hawaii. Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Sandeep Raghuraman <sandy.8925@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/amdgpu: simplify pa_sc_tile_steering_override checkChengming Gui
Use ">= CHIP_SIENNA_CICHLID" to replace per asic check Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking.Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30amdgpu:Add flag for updating MGCG on GFX10Jinzhou.Su
Add RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: cleanup gmc_v9_0_process_interruptChristian König
First of all don't snprintf into a char buffer allocated on the stack with a constant hubname. Then cleanup to exit the function early in case of a ratelimit or SRIOV. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/display: allow 18 bit dp output on DCN3Dmytro Laktyushkin
We need this to pass dp compliance. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Nikola Cornij <nikola.cornij@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdkfd: Fix getting unique_id in topologyKent Russell
Since the unique_id is now obtained in amdgpu in smu_late_init, topology misses getting the value during KFD device initialization. To work around this, we use amdgpu_amdkfd_get_unique_id to get the unique_id at read time. Due to this, we can remove unique_id from the kfd_dev structure, since we only need it in the KFD node properties struct Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30amdgpu: Add GFX MGCG and MGLS for vangoghJinzhou.Su
add GFX Medium Grain Light Sleep support for vangogh add AMD_CG_SUPPORT_GFX_CP_LS and AMD_CG_SUPPORT_GFX_RLC_LS v2: add GFX Medium Grain Clock Gating Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: enable the rest functions of swSMU for vangogh.Xiaojian Du
This patch is to enable the rest functions of swSMU for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: add some swSMU functions for vangogh.Xiaojian Du
This patch is to add some swSMU functions for vangogh, to support the sensor info on "hwmon" and pm info. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: add one new function to get 32 bit feature mask for vangoghXiaojian Du
This patch is to add one new function to get 32 bit feature mask for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: remove some redundant smu message mapping for vangoghXiaojian Du
This patch is to remove some redundant smu message mapping for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: set the initial value of pm info to zeroXiaojian Du
This patch is to set the initial value of pm info to zero. The "value64" is ported to the hwmon and debugfs node, it is a uint64 type. When it is used for NV10/VEGA10/VEGA20, its word size is appropriate, because NV10/VEGA10/VEGA20 has a 64bit smu feature mask, which is separated to high 32bit and low 32bit. But some asic has only 32bit smu feature mask,and this 32bit mask will fill the low 32bit of "value64". So if this "value64" is not initialized to zero, the high 32bit will be filled by a meaningless value, when the whole "value64" is ported to the "SMC Feature Mask" in the "amdgpu_pm_info" on some specific asic, it will be a wrong value. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: update the smu v11.5 driver interface header for vangoghXiaojian Du
This patch is to update the smu v11.5 driver interface header for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: add UMD Pstate Msg Parameters for vangogh temporarilyXiaojian Du
This patch is to add UMD Pstate Msg Parameters for vangogh temporarily, the values refer to renoir. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: add new smc message mapping for vangoghXiaojian Du
This patch is to add new smc message mapping for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: update the smu v11.5 firmware header for vangoghXiaojian Du
This patch is to update the smu v11.5 firmware header for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amd/pm: update the smu v11.5 smc header for vangoghXiaojian Du
This patch is to update the smu v11.5 smc header for vangogh. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: fix the issue of reserving bad pages failedDennis Li
In amdgpu_ras_reset_gpu, because bad pages may not be freed, it has high probability to reserve bad pages failed. Change to reserve bad pages when freeing VRAM. v2: 1. avoid allocating the drm_mm node outside of amdgpu_vram_mgr.c 2. move bad page reserving into amdgpu_ras_add_bad_pages, if vram mgr reserve bad page failed, it will put it into pending list, otherwise put it into processed list; 3. remove amdgpu_ras_release_bad_pages, because retired page's info has been moved into amdgpu_vram_mgr v3: 1. formate code style; 2. rename amdgpu_vram_reserve_scope as amdgpu_vram_reservation; 3. rename scope_pending as reservations_pending; 4. rename scope_processed as reserved_pages; 5. change to iterate over all the pending ones and try to insert them with drm_mm_reserve_node(); v4: 1. rename amdgpu_vram_mgr_reserve_scope as amdgpu_vram_mgr_reserve_range; 2. remove unused include "amdgpu_ras.h"; 3. rename amdgpu_vram_mgr_check_and_reserve as amdgpu_vram_mgr_do_reserve; 4. refine amdgpu_vram_mgr_reserve_range to call amdgpu_vram_mgr_do_reserve. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <hawking.zhang@amd.com> Signed-off-by: Dennis Li <Dennis.Li@amd.com> Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: remove redundant GPU resetDennis Li
Because bad pages saving has been moved to UMC error interrupt callback, which will trigger a new GPU reset after saving. Signed-off-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: Hawking Zhang <hawking.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: change to save bad pages in UMC error interrupt callbackDennis Li
Instead of saving bad pages in amdgpu_ras_reset_gpu, it will reduce the unnecessary calling of amdgpu_ras_save_bad_pages. Signed-off-by: Dennis Li <Dennis.Li@amd.com> Reviewed-by: Hawking Zhang <hawking.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: rename nv_is_headless_sku()Flora Cui
for headless NAVI ASICs Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKUFlora Cui
Navi14 0x7340/C9 SKU has no display and video support, remove them. Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-30drm/amdgpu/display: fix indentation in defer_delay_converter_wa()Alex Deucher
Fixes this warning: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c: In function ‘defer_delay_converter_wa’: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c:285:2: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation] 285 | if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c:291:3: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’ 291 | if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_006037 && | ^~ Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amdgpu/display: re-add surface size calculation in dcn30_hwseq.cAlex Deucher
This is required for MALL. Was accidently removed in PSR update. Fixes: 48e48e598478 ("drm/amd/display: Disable idle optimization when PSR is enabled") Fixes: 52f2e83e2fe5 ("drm/amdgpu/display: add MALL support (v2)") Acked-by: Slava Abramov <slava.abramov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/radeon: Expose vddc through hwmonSandeep Raghuraman
Create hwmon attribute for vddc, that uses previously declared get_current_vddc() callback if there's an implementation available. Also hides vddc, if there is no implementation for the current chipset (as per Alexander Deucher's suggestion). Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/radeon: Add implementation of get_current_vddc for SumoSandeep Raghuraman
Add implementation of get_current_vddc() callback for Sumo. Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/radeon: Add new callback that exposes vddcSandeep Raghuraman
This patch adds a callback for reporting vddc, to the dpm field of the radeon_asic structure. Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amdgpu/pm: fix the fan speed in fan1_input in manual mode for navi1xAlex Deucher
It has been confirmed that the SMU metrics table should always reflect the current fan speed even in manual mode. Fixes: f6eb433954bf ("drm/amdgpu/swsmu: handle manual fan readback on SMU11") Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amdgpu/swsmu: drop smu i2c bus on navi1xAlex Deucher
Stop registering the SMU i2c bus on navi1x. This leads to instability issues when userspace processes mess with the bus and also seems to cause display stability issues in some cases. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1314 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1341 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amdgpu: drop mem_global_referencedChristian König
Not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amdgpu: add vangogh apu flagHuang Rui
This patch is to add vangogh apu flag to support more kickers that belongs vangogh series. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amdgpu: enable MULTI_MON_PP_MCLK_SWITCH DC feature at defaultEvan Quan
With this, for multiple monitors in sync(e.g. with the same model), mclk switching will be allowed. That helps saving some idle power on some ASICs(e.g. Polaris). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amd/display: correct asic type check V2Evan Quan
Check chip family also to avoid wrong identification. V2: use the correct macro without AMDGPU prefix Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amd/pm: drop redundant display settingEvan Quan
As this is already performed in smu7_set_power_state_tasks(). Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amd/pm: reconfigure smc on display vbitimeout setting changeEvan Quan
Reconfigure smc display settings on vbitimeout change. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amd/pm: correct the mclk switching settingEvan Quan
Correct the mclk switching setting for multiple displays. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amd/pm: enable Polaris watermark table settingEvan Quan
Enable watermark table setting for Polaris. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-27drm/amd/pm: fulfill the Polaris implementation for ↵Evan Quan
get_clock_by_type_with_latency() Fulfill Polaris get_clock_by_type_with_latency(). Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-07-15 12:46:27 +0000