summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2021-01-29arm64: dts: imx8mq: use_dt_domains for pci nodePeng Fan
We are using Jailhouse Hypervsior which has virtual pci node that use dt domains. so also use dt domains for pci node, this will avoid conflict with Jailhouse Hypervisor to trigger the following error: pr_err("Inconsistent \"linux,pci-domain\" property in DT\n"); Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8m: add fsl,stop-mode property for FECJoakim Zhang
Add fsl,stop-mode property for FEC to enable stop mode. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8m: add mac address for FECJoakim Zhang
Add mac address in efuse, so that FEC driver can parse it from nvmem cell. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8mq: assign clock parents for FECJoakim Zhang
Assign clock parents for FEC, set "ptp" clock to 100M, "enet_clk_ref" to 125M. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8m: correct assigned clocks for FECJoakim Zhang
CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to CLK_ENET_PHY_REF clock. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: ls1028a: fix FlexSPI clockMichael Walle
Now that we have a proper driver for the FlexSPI interface use it. This will fix SCK frequency switching on Layerscape SoCs. This was tested on the Kontron sl28 board. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8mq: Add eCSPI DMA supportFabio Estevam
eCSPI ports have DMA capability. Describe the eCSPI DMA properties. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: freescale: sl28: enable SATA supportMichael Walle
With a newer bootloader SATA might be used in a mPCI slot using a mSATA card. Enable the SATA controller on the Kontron K-Box LS-230-A which comes with such a slot. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: lx2160a-cex7: delete RTC interruptRussell King
The RTC interrupt is incorrect and prevents the RTC driver initialising. In any case, the PCF2127 driver wants an active low interrupt, which neither the GIC nor the GPIO blocks support. There is an ISPPT block in the LX2160A, but this is not supported in mainline kernels. So, just delete the interrupt. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8mn-beacon-som: Configure RTC aliasesAdam Ford
On the i.MX8MN Beacon SOM, there is an RTC chip which is fed power from the baseboard during power off. The SNVS RTC integrated into the SoC is not fed power. Depending on the order the modules are loaded, this can be a problem if the external RTC isn't rtc0. Make the alias for rtc0 point to the external RTC all the time and rtc1 point to the SVNS in order to correctly hold date/time over a power-cycle. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8mm-beacon: add more pinctrl states for usdhc1Adam Ford
The WiFi chip is capable of communication at SDR104 speeds. Enable 100Mhz and 200MHz pinmux to support this. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: lx2160a-clearfog-itx: add power button supportRussell King
Add support for the power button. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: imx8mq: Add interconnect for lcdifMartin Kepplinger
Add interconnect ports for lcdif to set bus capabilities. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: imx8mq: Add interconnect provider propertyMartin Kepplinger
Add #interconnect-cells on main &noc so that it will probe the interconnect provider. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: imx8mq: Add NOC nodeLeonard Crestez
Add initial support for dynamic frequency scaling of the main NOC on imx8mq. Make DDRC the parent of the NOC (using passive governor) so that the main NOC is automatically scaled together with DDRC by default. Support for proactive scaling via interconnect will come on top. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: freescale: sl28: add variant 1Michael Walle
There is a new variant 1 of this board available. It features up to four SerDes lanes for customer use. Add a new device tree which features just the basic peripherals. A customer will then have to modify or append to this device tree. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MPTeresa Remmet
Add initial support for phyBOARD-Pollux-i.MX8MP. Supported basic features: * eMMC * i2c EEPROM * i2c RTC * i2c LED * PMIC * debug UART * SD card * 1Gbit Ethernet (fec) * watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mm: Add Gateworks i.MX 8M Mini Development KitsTim Harvey
The Gateworks Venice GW71xx-0x/GW72xx-0x/GW73xx-0x are development kits consisting of a GW700x SoM and a Baseboard. Future SoM's such as the GW701x will create additional combinations. The GW700x SoM contains: - i.MX 8M Mini SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (eeprom/pushbutton/reset/voltage-monitor) - GbE PHY connected to the i.MX 8M Mini FEC - Power Management IC The GW71xx Baseboard contains: - 1x MiniPCIe Socket with USB2.0, PCIe, and SIM - 1x RJ45 GbE (i.MX 8M Mini FEC) - I/O connector with 1x-SPI/1x-I2C/1x-UART/4x-GPIO signals - PCIe Clock generator - GPS and accelerometer - 1x USB 2.0 Front Panel connector - wide range power supply The GW72xx Baseboard contains: - 2x MiniPCIe Socket with USB2.0, PCIe, and SIM - 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x) - 1x MicroSD connector - 1x USB 2.0 Front Panel connector - 1x SPI connector - 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of: RS232 w/ flow-control, RS485, RS422 - PCIe Clock generator - GPS and accelerometer - Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S) - I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C - wide range power supply The GW73xx Baseboard contains: - 3x MiniPCIe Socket with USB2.0, PCIe, and SIM - 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x) - 1x MicroSD connector - 1x USB 2.0 Front Panel connector - 1x SPI connector - 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of: RS232 w/ flow-control, RS485, RS422 - WiFi/BT - PCIe Clock generator - GPS and accelerometer - Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S) - I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C - wide range power supply Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique IDAlice Guo
In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8m: add SoC ID compatibleAlice Guo
Add compatible string to .dtsi files for binding of imx8_soc_info and device. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: lx2160a: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls208xa: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls1088a: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls1046a: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls1043a: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls1028a: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls1012a: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mq-librem5-r3: workaround i2c1 issue with 1GHz cpu voltageMartin Kepplinger
This is a workaround for a hardware bug in the r3 revision that basically would stop the system due to traffic on the i2c1 bus. A cpu voltage change would trigger such traffic and that's what is avoided in order to work around it. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mq-librem5: Move usdhc clocks assignment to board DTMartin Kepplinger
According to commit e045f044e84e ("arm64: dts: imx8mq: Move usdhc clocks assignment to board DT") add the clocks assignment to imx8mq-librem5.dtsi too. Fixes: e045f044e84e ("arm64: dts: imx8mq: Move usdhc clocks assignment to board DT") Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mq-librem5: add pinctrl for the touchscreen descriptionMartin Kepplinger
In order for the touchscreen interrupt line to work, describe it properly. Otherwise it can work if defaults are ok, but we cannot be sure. Fixes: 8f0216b006e5 ("arm64: dts: Add a device tree for the Librem 5 phone") Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mq-librem5: add vin-supply to VDD_1V8Martin Kepplinger
buck7 is the supply here. Also, fix alphabetical ordering. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mq: Add clock parents for mipi dphyGuido Günther
This makes sure the clock tree setup for the dphy is not dependent on other components. Without this change bringing up the display can fail like kernel: phy phy-30a00300.dphy.2: Invalid CM/CN/CO values: 165/217/1 kernel: phy phy-30a00300.dphy.2: for hs_clk/ref_clk=451656000/593999998 ~ 165/217 if LCDIF doesn't set up that part of the clock tree first. This was noticed when testing the Librem 5 devkit with defconfig. It doesn't happen when modules are built in. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-10arm64: dts: imx8mm-beacon: Drop unused clock-names referenceAdam Ford
The wlf,wm8962 driver does not use the clock-names property. Drop it. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-10arm64: dts: imx8mq-librem5-devkit: Drop custom clock settingsGuido Günther
Otherwise the boot hangs early on and the resulting clock tree without this already closely matches the selected rates (722534400 and 786432000). audio_pll2 0 0 0 722534397 0 0 50000 audio_pll2_bypass 0 0 0 722534397 0 0 50000 audio_pll2_out 0 0 0 722534397 0 0 50000 audio_pll1 1 1 0 786431998 0 0 50000 audio_pll1_bypass 1 1 0 786431998 0 0 50000 audio_pll1_out 1 1 0 786431998 0 0 50000 sai2 1 1 0 24576000 0 0 50000 sai2_root_clk 1 1 0 24576000 0 0 50000 sai6 0 0 0 24576000 0 0 50000 sai6_root_clk 0 0 0 24576000 0 0 50000 Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-10arm64: dts: imx8mq-librem5-devkit: Disable snvs_rtcGuido Günther
The board has it's own RTC chip which is backed by the (optional) battery and hence preserves data/time on poweroff when that is inserted. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-10arm64: dts: imx8mq-librem5-devkit: Tweak pmic regulatorsGuido Günther
BUCK3 needs a regulator-enable-ramp-delay since otherwise the board freezes on etnaviv probe. With this pgc_gpu suspends and resumes as expected. This must have been always broken since gpcv2 support was enabled. We also enable all the regulators needed for Deep Sleep Mode (DSM) as always-on: - VDD_SOC supplied by BUCK1 - VDDA_1P8 supplied by BUCK7 - VDDA_0P9 supplied by LDO4 - VDDA_DRAM supplied by LDO3 - NVCC_DRAM supplied by BUCK8 - VDD_DRAM supplied by BUCK5 Finally LDO5 and LDO6 provide VDD_PHY_1V8 and VDD_PHY_0V9 used by the SOCs MIPI, HDMI and USB IP cores. While we would in theory be able to turn these off (and I've tested that or LDO6 and mipi with USB disabled) it is of little practical use atm since USB doesn't runtime suspend so let's revisit this at a later point. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-07arm64: dts: imx8mn-evk: Add sound-spdif card nodesShengjiu Wang
Add sound-spdif card nodes which are supported on imx8mn-evk board. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-07arm64: dts: imx8mn-evk: Add sound-wm8524 card nodesShengjiu Wang
Add sound-wm8524 card nodes which are supported on imx8mn-evk board. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-07arm64: dts: imx8mn: Configure clock rate for audio pllsShengjiu Wang
Configure clock rate for audio plls. audio pll1 is used as parent clock for clocks that is multiple of 8kHz. audio pll2 is used as parent clock for clocks that is multiple of 11kHz. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: freescale: use fixed index mmcN for NXP layerscape reference boardsYangbo Lu
The eSDHC driver has converted to use asynchronous probe. Let's use fixed index mmcN for eSDHC controllers, so that we can ignore the effect on usage, and avoid problem on previous use cases with fixed index mmcblkN. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: lx2160ardb: fix interrupt line for RTC nodeBiwen Li
Fix interrupt line for RTC node on lx2160ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: lx2160a: add DT node for external interrupt linesBiwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls208xa-rdb: add interrupt line for RTC nodeBiwen Li
Add interrupt line for RTC node on ls208xa-rdb Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls208xa: add DT node for external interrupt linesBiwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls1088ardb: fix interrupt line for RTC nodeBiwen Li
Fix interrupt line for RTC node on ls1088ardb Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls1088a: add DT node for external interrupt linesBiwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls1046ardb: Add interrupt line for RTC nodeHou Zhiqiang
Add interrupt line for RTC node, which is low level active. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls1046a: add DT node for external interrupt linesBiwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-05arm64: dts: ls1043a: add DT node for external interrupt linesBiwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-04arm64: dts: imx: Add Beacon i.MX8M Nano development kitAdam Ford
Beacon Embeddedworks is launching a development kit based on the i.MX8M Nano SoC. The kit consists of a System on Module (SOM) + baseboard. The SOM has the SoC, eMMC, and Ethernet. The baseboard has an wm8962 audio CODEC, a PDM microphone, and a single USB OTG. The baseboard is capable of two different, mutually exclusive video outputs, so the common items are in the baseboard file. When the video becomes available, LVDS output will be added to this kit file, and a second kit file will be added to support HDMI. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-07-15 11:41:19 +0000