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2018-07-18mtd: rawnand: davinci: Use uintptr_t casts instead of unsigned onesBoris Brezillon
uintptr_t should be used when casting a pointer to an unsigned int so that the code compiles without warnings even on 64-bit architectures. This is needed if we want to allow selection of this driver when COMPILE_TEST=y. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: davinci: Stop doing iomem pointer <-> u32 conversionsBoris Brezillon
There is no point in doing this sort of conversion since we can replace |= by += operations which are perfectly valid on pointers. This is done in preparation of COMPILE_TEST addition to the NAND_DAVINCI Kconfig entry, since building for x86 generates several warnings because of inappropriate u32 <-> void * conversions (pointers are 64-bit large on x86_64). Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: atmel: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARCH_AT91 enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: atmel: Add an __iomem cast on gen_pool_dma_alloc() callBoris Brezillon
gen_pool_dma_alloc() return type is void *, while internally, the memory region exposed by the sram driver has been mapped with ioremap(). Add a void * to void __iomem * cast to make sparse happy. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: atmel: Use uintptr_t casts instead of unsigned intBoris Brezillon
When casting a pointer to an unsigned int, uintptr_t should be used to cope with the pointer size differences between 32-bit and 64-bit architectures. This is needed if we want to allow compilation of this driver when COMPILE_TEST=y. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: hynix: Use ->exec_op() in hynix_nand_reg_write_op()Boris Brezillon
Modern NAND controller drivers implement ->exec_op() instead of ->cmdfunc(), make sure we don't end up with a NULL pointer dereference when hynix_nand_reg_write_op() is called. Fixes: 8878b126df76 ("mtd: nand: add ->exec_op() implementation") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: marvell: set reg_clk to NULL if it can't be obtainedDaniel Mack
Don't keep an error-pointer around in the private struct. If this optional clock can't be obtained, simply set the pointer to NULL instead so we can use clk_prepare_enable() on it without further checks, Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: marvell: remove bogus comment in marvell_nfc_select_chip()Daniel Mack
The comment in marvell_nfc_select_chip() about ndtr0 and ndtr1 didn't reflect what the driver was doing. The values of NDTR0 and NDTR1 are read from the registers at probe time and a copy is retained in 'struct marvell_nand_chip'. If keep-config is set in the DT properties, there are no other writers of these timing variables so they can safely be used when the chip is selected. As suggested by Miquel Raynal, simply remove the comment. Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: marvell: add suspend and resume hooksDaniel Mack
This patch restores the suspend and resume hooks that the old driver used to have. Apart from stopping and starting the clocks, the resume callback also nullifies the selected_chip pointer, so the next command that is issued will re-select the chip and thereby restore the timing registers. Factor out some code from marvell_nfc_init() into a new function marvell_nfc_reset() and also call it at resume time to reset some registers that don't retain their contents during low-power mode. Without this patch, a PXA3xx based system would cough up an error similar to the one below after resume. [ 44.660162] marvell-nfc 43100000.nand-controller: Timeout waiting for RB signal [ 44.671492] ubi0 error: ubi_io_write: error -110 while writing 2048 bytes to PEB 102:38912, written 0 bytes [ 44.682887] CPU: 0 PID: 1417 Comm: remote-control Not tainted 4.18.0-rc2+ #344 [ 44.691197] Hardware name: Marvell PXA3xx (Device Tree Support) [ 44.697111] Backtrace: [ 44.699593] [<c0106458>] (dump_backtrace) from [<c0106718>] (show_stack+0x18/0x1c) [ 44.708931] r7:00000800 r6:00009800 r5:00000066 r4:c6139000 [ 44.715833] [<c0106700>] (show_stack) from [<c0678a60>] (dump_stack+0x20/0x28) [ 44.724206] [<c0678a40>] (dump_stack) from [<c0456cbc>] (ubi_io_write+0x3d4/0x630) [ 44.732925] [<c04568e8>] (ubi_io_write) from [<c0454428>] (ubi_eba_write_leb+0x690/0x6fc) ... Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org Signed-off-by: Daniel Mack <daniel@zonque.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: mxc: Switch to SPDX identifierFabio Estevam
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: gpmi: Switch to SPDX identifierFabio Estevam
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: plat_nand: Kill pdata->ctrl.{hwcontrol, read_byte}()Boris Brezillon
None of the board files are overloading those hooks, so let's drop them from struct platform_nand_ctrl. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: orion_nand: Kill orion_nand_data.dev_ready()Boris Brezillon
None of the boards seem to overload the ->dev_ready() hook, just drop this field from orion_nand_data. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Kill the chip->scan_bbt() hookBoris Brezillon
None of the existing drivers are overloading the ->scan_bbt() method, let's get rid of it and replace calls to ->scan_bbt() by nand_create_bbt() ones. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Rename nand_default_bbt() into nand_create_bbt()Boris Brezillon
Rename nand_default_bbt() into nand_create_bbt() and pass it a nand_chip object to prepare removal of the chip->scan_bbt() hook. We add a temporary nand_default_bbt() wrapper which will be dropped after the removal of ->scan_bbt(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Remove forward declaration of device_nodeBoris Brezillon
struct device_node is defined in linux/of.h. Let's include this file instead of having a forward declaration of this struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Remove forward declaration of mtd_infoBoris Brezillon
struct mtd_info is defined in linux/mtd/mtd.h which is included at the beginning of nand_base.c, there's thus no need for the forward declaration of mtd_info. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Remove nand_do_read() prototype from rawnand.hBoris Brezillon
nand_do_read() is a static function implemented in nand_base.c. There's no good reason to expose its prototype in rawnand.h. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Kill cafe_nand_bug()Boris Brezillon
Leaving a function pointer to NULL should be enough to trigger a NULL pointer exception, and anyway, if we want to BUG() when some missing hooks are called, this should be done in the core, so let's drop the cafe_nand_bug() dummy function. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18bcma: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
This allows us to increase compile-test coverage without having to build a kernel for MIPS. That's particularly interesting for subsystem maintainers that want to test as many drivers as possible in a single build. We also add a dependency on HAS_IOMEM in BCMA_HOST_SOC to make sure the driver is not selected when the arch does not implement IO accessors. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: nuc900: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARCH_W90X900 enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: qcom: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARCH_QCOM enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: mxc: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARCH_MXC enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: mxc: Avoid inclusion of asm/mach headersBoris Brezillon
asm/mach/flash.h does not seem to be needed, drop this #include to make the code completely machine and arch independent and allow one to compile it when COMPILE_TEST=y. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: brcmnand: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARM, ARM64 or MIPS enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: lpc32xx: Allow selection of these drivers when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test these drivers without having ARCH_LPC32XX enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: sharpsl: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARCH_PXA enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: sharpsl: Remove inclusion of mach and asm headersBoris Brezillon
We don't need mach/hardware.h and sm/mach-types.h, and asm/io.h can be replaced by linux/io.h. Now that we removed those inclusions, we're ready to allow selection of this driver when COMPILE_TEST=y. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: omap2: Allow selection of this driver when COMPILE_TEST=yBoris Brezillon
It just makes NAND maintainers' life easier by allowing them to compile-test this driver without having ARCH_OMAP2PLUS or ARCH_KEYSTONE enabled. We also need to add a dependency on HAS_IOMEM to make sure the driver compiles correctly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: Add 'depends on HAS_IOMEM' where missingBoris Brezillon
When COMPILE_TEST is allowed and the platform needs uses the iomem API we need to add an explicit dependency on HAS_IOMEM to avoid selection of these drivers when building for an arch that has no iomem support (this is the case of arch/um). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: gpmi: Remove useless dependency on MTD_NANDBoris Brezillon
The MTD_NAND_GPMI_NAND entry is already defined in an 'if MTD_NAND' block, no need to add an extra "depends on MTD_NAND". Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: qcom: erased page bitflips detectionAbhishek Sahu
NAND parts can have bitflips in an erased page due to the process technology used. In this case, QCOM NAND controller is not able to identify that page as an erased page. Currently the driver calls nand_check_erased_ecc_chunk() for identifying the erased pages but this won’t work always since the checking is being with ECC engine returned data. In case of bitflips, the ECC engine tries to correct the data and then it generates the uncorrectable error. Now, this data is not equal to original raw data. For erased CW identification, the raw data should be read again from NAND device and this nand_check_erased_ecc_chunk function() should be called for raw data only. Now following logic is being added to identify the erased codeword bitflips. 1. In most of the cases, not all the codewords will have bitflips and only single CW will have bitflips. So, there is no need to read the complete raw page data. The NAND raw read can be scheduled for any CW in page. The NAND controller works on CW basis and it will update the status register after each CW read. Maintain the bitmask for the CW which generated the uncorrectable error. 2. Do raw read for all the CW's which generated the uncorrectable error. 3. Both DATA and OOB need to be checked for number of 0. The top-level API can be called with only data buf or OOB buf so use chip->databuf if data buf is null and chip->oob_poi if OOB buf is null for copying the raw bytes temporarily. 4. For each CW, check the number of 0 in cw_data and usable oob bytes, The bbm and spare (unused) bytes bit flip won’t affect the ECC so don’t check the number of bitflips in this area. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: gpmi: remove redundant variable payload_virtColin Ian King
Variable payload_virt is being assigned but is never used hence it is redundant and can be removed. Cleans up clang warning: warning: variable 'payload_virt' set but not used [-Wunused-but-set-variable] Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: docg4: fix the probe function error pathMiquel Raynal
nand_release() should not be called on an MTD device that has not been registered. While it should work thanks to the checks done in mtd_device_unregister() it's a bad practice to cleanup/release something that has not previously been initialized/allocated. Rework the error path to follow this rule. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: denali: optimize timing parameters for data interfaceMasahiro Yamada
This commit improves the ->setup_data_interface() hook. The denali_setup_data_interface() needs the frequency of clk_x and the ratio of clk_x / clk. The latter is currently hardcoded in the driver, like this: #define DENALI_CLK_X_MULT 6 The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just chose 6 because it is the most defensive value, but it is not optimal. By getting the clock rate of both "clk" and "clk_x", the driver can compute the timing values more precisely. To not break the existing platforms, the fallback value, 50 MHz is provided. It is true for all upstreamed platforms. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Richard Weinberger <richard@nod.at> Tested-by: Richard Weinberger <richard@nod.at> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: denali_dt: add more clocks based on IP datasheetMasahiro Yamada
Currently, denali_dt.c requires a single anonymous clock, but the Denali User's Guide requires three clocks for this IP: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run This commit supports these named clocks to represent the real hardware. For the backward compatibility, the driver still accepts a single clock just as before. The clk_x_rate is taken from the clock driver again if the named clock "clk_x" is available. This will happen only for future DT, hence the existing DT files are not affected. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Richard Weinberger <richard@nod.at> Tested-by: Richard Weinberger <richard@nod.at> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18dt-binding: mtd: denali_dt: document clock propertyMasahiro Yamada
Commit 30f9f2fb7ba0 ("mtd: denali: add a DT driver") supported the clock enablement, but did not document it in the DT binding. In addition to the existing clock, this commit adds more clocks based on the IP specification. According to the Denali User's Guide, this IP needs three clocks: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run The driver should accept the current single clock for the backward compatibility, but the DT binding should represent the real hardware, and future platforms must follow this. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: denali_dt: use dev as a shorthand of &pdev->devMasahiro Yamada
The probe function references &pdev->dev many times, and I will add more soon. Add 'dev' as a shorthand. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Richard Weinberger <richard@nod.at> Tested-by: Richard Weinberger <richard@nod.at> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: mxc: remove __init qualifier from mxcnd_probe_dtMartin Kaiser
Using the sysfs unbind, bind nodes, mxcnd_probe and mxcnd_probe_dt can potentially be called at any time. After the __init functions are cleaned, mxcnd_probe_dt is no longer available. Calling it anyway causes a crash. mxcnd_probe used to be marked as __init, this was removed years ago. Remove the __init qualifier from from mxcnd_probe_dt as well. Fixes: 06f255106923 ("mtd: remove use of __devinit") Signed-off-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: spinand: macronix: Add support for MX35LF2GE4ABMiquel Raynal
MX35LF2GE4AB is almost identical to MX35LF1GE4AB except it has 2 times more eraseblocks per LUN and exposes 2 planes instead of 1. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-07-18mtd: spinand: Add initial support for the MX35LF1GE4AB chipBoris Brezillon
Add minimal support for the MX35LF1GE4AB SPI NAND chip. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: spinand: Add initial support for Winbond W25M02GVFrieder Schrempf
Add support for the W25M02GV chip. Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: spinand: Add initial support for Micron MT29F2G01ABAGDPeter Pan
Add a basic driver for Micron SPI NANDs. Only one device is supported right now, but the driver will be extended to support more devices afterwards. Signed-off-by: Peter Pan <peterpandong@micron.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18dt-bindings: Add bindings for SPI NAND devicesBoris Brezillon
Add bindings for SPI NAND chips. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: nand: Add core infrastructure to support SPI NANDsPeter Pan
Add a SPI NAND framework based on the generic NAND framework and the spi-mem infrastructure. In its current state, this framework supports the following features: - single/dual/quad IO modes - on-die ECC Signed-off-by: Peter Pan <peterpandong@micron.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: provide only single helper function for ECC confAbhishek Sahu
Function nand_ecc_choose_conf() will be help for all the cases, so other helper functions can be made static. nand_check_ecc_caps(): Invoke nand_ecc_choose_conf() with both chip->ecc.size and chip->ecc.strength value set. nand_maximize_ecc(): Invoke nand_ecc_choose_conf() with NAND_ECC_MAXIMIZE flag. nand_match_ecc_req(): Invoke nand_ecc_choose_conf() with either chip->ecc.size or chip->ecc.strength value set and without NAND_ECC_MAXIMIZE flag. CC: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: qcom: code reorganization for raw readAbhishek Sahu
Make separate function to perform raw read for one codeword and call this function multiple times for each codeword in case of raw page read. This separate function will help in subsequent patches related with erased codeword bitflip detection. It will decrease throughput for raw page read. Raw page read is used for debug purpose so it won't affect normal flash operations. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: qcom: check for operation errors in case of raw readAbhishek Sahu
Currently there is no error checking for raw read. For raw reads, there won’t be any ECC failure but the operational failures are possible, so schedule the NAND_FLASH_STATUS read after each codeword. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: qcom: fix return value for raw page readAbhishek Sahu
Fix value returned by ->read_page_raw() to be the actual operation status, instead of always 0. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: qcom: modify write_oob to remove read codeword partAbhishek Sahu
QCOM NAND controller layout protects available OOB data bytes with ECC also so when ecc->write_oob() is being called then it can't update just OOB bytes. Currently, it first reads the last codeword which includes old OOB bytes. Then it updates the old OOB bytes with new ones and then again writes the codeword back. The reading codeword is unnecessary since user is responsible to have these bytes cleared to 0xFF. This patch removes the read part and updates the OOB bytes with data area padded with OxFF. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
generated by cgit (git 2.34.1) at 2025-07-16 03:24:02 +0000