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2023-01-22drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450Dmitry Baryshkov
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm variants inside the common 5+7nm driver. Co-developed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/514230/ Link: https://lore.kernel.org/r/20221207012231.112059-7-dmitry.baryshkov@linaro.org [DB: changed compatibles per Krzysztof's request] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: Reapply CTM if modeset is neededJessica Zhang
Add a !drm_atomic_crtc_needs_modeset() check to _dpu_crtc_setup_cp_blocks() so that CTM is reapplied if the LM/DSPP blocks were reallocated during modeset or after a suspend/resume. Changes in V2: - Fixed commit message Changes in V3: - Added mention of suspend/resume case back to commit message Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/23 Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/519151/ Link: https://lore.kernel.org/r/20230118233848.611-1-quic_jesszhan@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: use sm8350_regdma on SM8350 platformDmitry Baryshkov
Correct sm8350_dpu_cfg.dma_cfg to point to sm8350_regdma rather than sm8250_regdma. Fixes: 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518791/ Link: https://lore.kernel.org/r/20230118020455.1689929-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: point sc8280xp_dpu_cfg to sc8280xp_regdmaDmitry Baryshkov
SC8280XP configuration missed the reg_dma configuration. We do not use regdma for now, but let's put the correct pointer anyway. Fixes: 4a352c2fc15a ("drm/msm/dpu: Introduce SC8280XP") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518790/ Link: https://lore.kernel.org/r/20230118020455.1689929-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21dt-bindings: display/msm: qcom, sc8280xp-mdss: add DP / eDP child nodesDmitry Baryshkov
Describe DP and eDP devices as subdevices to the MDSS on SC8280XP platform. Fixes: 45af56bf2d74 ("dt-bindings: display/msm: Add binding for SC8280XP MDSS") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/518799/ Link: https://lore.kernel.org/r/20230118031718.1714861-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21dt-bindings: display/msm: add qcom, sc8280xp-edp to list of eDP devicesDmitry Baryshkov
Add qcom,sc8280xp-edp to the list of eDP devices, unblocking `aux-bus' property and fobidding `#sound-dai-cells' property. Also since sc8280xp-edp, overriding sc8280xp-dp, will contain 5 reg resources, drop the reg contraint (as it will become equivalent to the top-level one, requiring min 4 and max 5 reg entries). Fixes: b6f8c4debc00 ("dt-bindings: msm/dp: Add SDM845 and SC8280XP compatibles") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/518797/ Link: https://lore.kernel.org/r/20230118031718.1714861-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: add missing dpu_encoder kerneldocDmitry Baryshkov
Describe missing dpu_encoder_phys_wb_is_master() argument and struct dpu_encoder_virt.wide_bus_en field. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518794/ Link: https://lore.kernel.org/r/20230118020549.1690078-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: enable DPU_MDP_AUDIO_SELECT for sc8180xDmitry Baryshkov
According to the discussion ([1]) on the mailing list, platforms before sm8250 (and derivatives) should program HDMI_DP_CORE_SELECT register to route audio to the DP ports. Enable DPU_MDP_AUDIO_SELECT on sc8180x to program correponding register. [1] https://lore.kernel.org/all/f86504ba-835a-6e30-6c30-8bb89b1359c4@quicinc.com/ Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518461/ Link: https://lore.kernel.org/r/20230115140022.489881-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: simplify blend configurationDmitry Baryshkov
Rewrite dpu_hw_ctl_setup_blendstage() to use static data configuration rather than using a switch-case. This simplifies adding support for new pipes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550 Patchwork: https://patchwork.freedesktop.org/patch/518485/ Link: https://lore.kernel.org/r/20230116063316.728496-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: simplify ctl_setup_blendstage calculationDmitry Baryshkov
Extract the common expression in the dpu_hw_ctl_setup_blendstage() function. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550 Patchwork: https://patchwork.freedesktop.org/patch/518483/ Link: https://lore.kernel.org/r/20230116063316.728496-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-21drm/msm/dpu: fix blend setup for DMA4 and DMA5 layersDmitry Baryshkov
SM8550 uses new register to map SSPP_DMA4 and SSPP_DMA5 units to blend stages. Add proper support for this register to allow using these two planes for image processing. Fixes: efcd0107727c ("drm/msm/dpu: add support for SM8550") Cc: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550 Patchwork: https://patchwork.freedesktop.org/patch/518481/ Link: https://lore.kernel.org/r/20230116063316.728496-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-20dt-bindings: display/msm: rename mdp nodes to display-controllerDmitry Baryshkov
Follow the 'generic names' rule and rename mdp nodes to display-controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/518822/ Link: https://lore.kernel.org/r/20230118041243.1720520-6-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-20dt-bindings: display/msm: rename mdss nodes to display-subsystemDmitry Baryshkov
Follow the 'generic names' rule and rename mdss nodes to display-subsystem. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/518821/ Link: https://lore.kernel.org/r/20230118041243.1720520-5-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-20dt-bindings: display/msm: add core clock to the mdss bindingsDmitry Baryshkov
Add (optional) core clock to the mdss bindings to let the MDSS driver access hardware registers before MDP driver probes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/518816/ Link: https://lore.kernel.org/r/20230118041243.1720520-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-20dt-bindings: display/msm: add SoC-specific compats to qcom, mdp5.yamlDmitry Baryshkov
Add platform-specific compatible entries to the qcom,mdp5.yaml to allow distinguishing between various platforms. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/518817/ Link: https://lore.kernel.org/r/20230118041243.1720520-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-20dt-bindings: display/msm: convert MDP5 schema to YAML formatDmitry Baryshkov
Convert the mdp5.txt into the yaml format. Changes to the existing (txt) schema: - MSM8996 has additional "iommu" clock, define it separately - Add new properties used on some of platforms: - interconnects, interconnect-names - iommus - power-domains - operating-points-v2, opp-table Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/518815/ Link: https://lore.kernel.org/r/20230118041243.1720520-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm/dp: Remove INIT_SETUP delayBjorn Andersson
During initalization of the DisplayPort controller an EV_HPD_INIT_SETUP event is generated, but with a delay of 100 units. This delay existed to circumvent bug in the QMP combo PHY driver, where if the DP part was powered up before USB, the common properties would not be properly initialized - and USB wouldn't work. This issue was resolved in the recent refactoring of the QMP driver, so it's now possible to remove this delay. While there is still a timing dependency in the current implementation, test indicates that it's now possible to boot with an external display on USB Type-C and have the display power up, without disconnecting and reconnecting the cable. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518729/ Link: https://lore.kernel.org/r/20230117172951.2748456-1-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm/dpu: enable sourcesplit for sc7180/sc7280Dmitry Baryshkov
According to the vendor dts files, both sc7180 and sc7280 support the source split mode (using two LMs for a single output). Change these two platforms to use MIXER_SDM845_MASK, which includes DPU_MIXER_SOURCESPLIT. Rename MIXER_SC7180_MASK to MIXER_QCM2290_MASK, since this platform doesn't seem to support source split mode. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518479/ Link: https://lore.kernel.org/r/20230116034435.569512-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm/dpu: merge two CRTC debugfs dirsDmitry Baryshkov
For each CRTC we are creating two different debugfs directories one using crtc index (created automatically for the CRC files) and another one using CRTC name/object ID (for state and status files). This can be confusing, so move our custom files to crtc->debugfs_entry, effetively merging two debugfs dirs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/518065/ Link: https://lore.kernel.org/r/20230112053659.1361298-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm/dpu: Disallow unallocated resources to be returnedMarijn Suijten
In the event that the topology requests resources that have not been created by the system (because they are typically not represented in dpu_mdss_cfg ^1), the resource(s) in global_state (in this case DSC blocks, until their allocation/assignment is being sanity-checked in "drm/msm/dpu: Reject topologies for which no DSC blocks are available") remain NULL but will still be returned out of dpu_rm_get_assigned_resources, where the caller expects to get an array containing num_blks valid pointers (but instead gets these NULLs). To prevent this from happening, where null-pointer dereferences typically result in a hard-to-debug platform lockup, num_blks shouldn't increase past NULL blocks and will print an error and break instead. After all, max_blks represents the static size of the maximum number of blocks whereas the actual amount varies per platform. ^1: which can happen after a git rebase ended up moving additions to _dpu_cfg to a different struct which has the same patch context. Fixes: bb00a452d6f7 ("drm/msm/dpu: Refactor resource manager") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/517636/ Link: https://lore.kernel.org/r/20230109231556.344977-1-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm/dpu: remove dpu_encoder_virt_opsDmitry Baryshkov
Struct dpu_encoder_virt_ops is used to provide several callbacks to the phys_enc backends. However these ops are static and are not supposed to change in the foreseeble future. Drop the indirection and call corresponding functions directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/516518/ Link: https://lore.kernel.org/r/20230102154748.951328-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm: Add missing check and destroy for alloc_ordered_workqueueJiasheng Jiang
Add check for the return value of alloc_ordered_workqueue as it may return NULL pointer. Moreover, use the destroy_workqueue in the later fails in order to avoid memory leak. Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/517419/ Link: https://lore.kernel.org/r/20230109022038.2163-1-jiasheng@iscas.ac.cn Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18dt-bindings: display/msm: qcom, mdss: fix HDMI PHY node namesDmitry Baryshkov
On Qualcomm devices HDMI PHY node names were changed from hdmi-phy to phy. Follow this change. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/517446/ Link: https://lore.kernel.org/r/20230109045453.316089-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18dt-bindings: display/msm: Add SM8150 MDSS & DPUKonrad Dybcio
Add bindings for the display hardware on SM8150. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/514681/ Link: https://lore.kernel.org/r/20221212093315.11390-1-konrad.dybcio@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-18drm/msm/gem: Add check for kmallocJiasheng Jiang
Add the check for the return value of kmalloc in order to avoid NULL pointer dereference in copy_from_user. Fixes: 20224d715a88 ("drm/msm/submit: Move copy_from_user ahead of locking bos") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/514678/ Link: https://lore.kernel.org/r/20221212091117.43511-1-jiasheng@iscas.ac.cn Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-16drm/msm/gpu: Add default devfreq thresholdsRob Clark
Setup more appropriate devfreq tuning thresholds. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/517788/ Link: https://lore.kernel.org/r/20230110231447.1939101-4-robdclark@gmail.com Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2023-01-16drm/msm/gpu: Bypass PM QoS constraint for idle clampRob Clark
Change idle freq clamping back to the direct method, bypassing PM QoS requests. The problem with using PM QoS requests is they call (indirectly) the governors ->get_target_freq() which goes thru a get_dev_status() cycle. The problem comes when the GPU becomes active again and we remove the idle-clamp request, we go through another get_dev_status() cycle for the period that the GPU has been idle, which triggers the governor to lower the target freq excessively. This partially reverts commit 7c0ffcd40b16 ("drm/msm/gpu: Respect PM QoS constraints"), but preserves the use of boost QoS request, so that it will continue to play nicely with other QoS requests such as a cooling device. This also mostly undoes commit 78f815c1cf8f ("drm/msm: return the average load over the polling period") Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/517785/ Link: https://lore.kernel.org/r/20230110231447.1939101-3-robdclark@gmail.com Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2023-01-16drm/msm/gpu: Add devfreq tuning debugfsRob Clark
Make the handful of tuning knobs available visible via debugfs. v2: select DEVFREQ_GOV_SIMPLE_ONDEMAND because for some reason struct devfreq_simple_ondemand_data depends on this Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/517784/ Link: https://lore.kernel.org/r/20230110231447.1939101-2-robdclark@gmail.com Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2023-01-16drm/msm/a6xx: Update ROQ size in coredumpAkhil P Oommen
Since RoQ size differs between generations, calculate dynamically the RoQ size while capturing coredump. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515610/ Link: https://lore.kernel.org/r/20221221203925.v2.4.I07f22966395eb045f6b312710f53890d5d7e69d4@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-01-16drm/msm/a6xx: Update a6xx gpu coredumpAkhil P Oommen
Update gpu coredump for a660/a650 family of gpus with the extra information available. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515608/ Link: https://lore.kernel.org/r/20221221203925.v2.3.Ifbfce6d693b202dac92006345bb825e7c5aee9c6@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-01-16drm/msm: Fix failure paths in msm_drm_init()Akhil P Oommen
Ensure that we do drm_dev_put() when there is an early return in msm_drm_init(). Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515606/ Link: https://lore.kernel.org/r/20221221203925.v2.2.I49dfc3654040be61702e491f1aa63d3a5f308852@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-01-16drm/msm/adreno: Fix null ptr access in adreno_gpu_cleanup()Akhil P Oommen
Fix the below kernel panic due to null pointer access: [ 18.504431] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000048 [ 18.513464] Mem abort info: [ 18.516346] ESR = 0x0000000096000005 [ 18.520204] EC = 0x25: DABT (current EL), IL = 32 bits [ 18.525706] SET = 0, FnV = 0 [ 18.528878] EA = 0, S1PTW = 0 [ 18.532117] FSC = 0x05: level 1 translation fault [ 18.537138] Data abort info: [ 18.540110] ISV = 0, ISS = 0x00000005 [ 18.544060] CM = 0, WnR = 0 [ 18.547109] user pgtable: 4k pages, 39-bit VAs, pgdp=0000000112826000 [ 18.553738] [0000000000000048] pgd=0000000000000000, p4d=0000000000000000, pud=0000000000000000 [ 18.562690] Internal error: Oops: 0000000096000005 [#1] PREEMPT SMP **Snip** [ 18.696758] Call trace: [ 18.699278] adreno_gpu_cleanup+0x30/0x88 [ 18.703396] a6xx_destroy+0xc0/0x130 [ 18.707066] a6xx_gpu_init+0x308/0x424 [ 18.710921] adreno_bind+0x178/0x288 [ 18.714590] component_bind_all+0xe0/0x214 [ 18.718797] msm_drm_bind+0x1d4/0x614 [ 18.722566] try_to_bring_up_aggregate_device+0x16c/0x1b8 [ 18.728105] __component_add+0xa0/0x158 [ 18.732048] component_add+0x20/0x2c [ 18.735719] adreno_probe+0x40/0xc0 [ 18.739300] platform_probe+0xb4/0xd4 [ 18.743068] really_probe+0xfc/0x284 [ 18.746738] __driver_probe_device+0xc0/0xec [ 18.751129] driver_probe_device+0x48/0x110 [ 18.755421] __device_attach_driver+0xa8/0xd0 [ 18.759900] bus_for_each_drv+0x90/0xdc [ 18.763843] __device_attach+0xfc/0x174 [ 18.767786] device_initial_probe+0x20/0x2c [ 18.772090] bus_probe_device+0x40/0xa0 [ 18.776032] deferred_probe_work_func+0x94/0xd0 [ 18.780686] process_one_work+0x190/0x3d0 [ 18.784805] worker_thread+0x280/0x3d4 [ 18.788659] kthread+0x104/0x1c0 [ 18.791981] ret_from_fork+0x10/0x20 [ 18.795654] Code: f9400408 aa0003f3 aa1f03f4 91142015 (f9402516) [ 18.801913] ---[ end trace 0000000000000000 ]--- [ 18.809039] Kernel panic - not syncing: Oops: Fatal exception Fixes: 17e822f7591f ("drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}") Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515605/ Link: https://lore.kernel.org/r/20221221203925.v2.1.Ib978de92c4bd000b515486aad72e96c2481f84d0@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-01-16drm/msm/a2xx: support loading legacy (iMX) firmwareDmitry Baryshkov
Support loading A200 firmware generated from the iMX firmware header files. The firmware lacks protection support, however it allows GPU to function properly while using the firmware files with clear license which allows redistribution. Cc: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/516443/ Link: https://lore.kernel.org/r/20230101155753.779176-1-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-01-16drm/msm: Add MSM_SUBMIT_BO_NO_IMPLICITRob Clark
In cases where implicit sync is used, it is still useful (for things like sub-allocation, etc) to allow userspace to opt-out of implicit sync on per-BO basis. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/514216/ Link: https://lore.kernel.org/r/20221206192123.661448-1-robdclark@gmail.com
2023-01-12drm/msm/dpu: Add DSC configuration for SM8150 and SM8250Marijn Suijten
These DSC blocks on CTL V1 need to set its corresponding PINGPONG block index in a hardware register to configure where to send pixel output to, via the newly-added DPU_DSC_OUTPUT_CTRL feature flag. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515689/ Link: https://lore.kernel.org/r/20221221231943.1961117-9-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Implement DSC binding to PP block for CTL V1Marijn Suijten
All V1 CTL blocks (active CTLs) explicitly bind the pixel output from a DSC block to a PINGPONG block by setting the PINGPONG index in a DSC hardware register. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515698/ Link: https://lore.kernel.org/r/20221221231943.1961117-8-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Remove num_enc from topology struct in favour of num_dscMarijn Suijten
Downstream calls this num_enc yet the DSC patches introduced a new num_dsc struct member, leaving num_enc effectively unused. Fixes: 7e9cc175b159 ("drm/msm/disp/dpu1: Add support for DSC in topology") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/515688/ Link: https://lore.kernel.org/r/20221221231943.1961117-7-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Reject topologies for which no DSC blocks are availableMarijn Suijten
Resource allocation of DSC blocks should behave more like LMs and CTLs where NULL resources (based on initial hw_blk creation via definitions in the catalog) are skipped ^1. The current hardcoded mapping of DSC blocks however means that resource allocation shouldn't succeed at all when the DSC block on the corresponding index doesn't exist, rather than searching for the next free block. This hardcoded mapping should be loosened separately as DPU 5.0.0 introduced a crossbar where DSC blocks can be "somewhat" freely bound to any PP and CTL (in proper pairs). ^1: which, on hardware that supports DSC, can happen after a git rebase ended up moving additions to _dpu_cfg to a different struct which has the same patch context. Fixes: f2803ee91a41 ("drm/msm/disp/dpu1: Add DSC support in RM") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/515684/ Link: https://lore.kernel.org/r/20221221231943.1961117-6-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dsi: Flip greater-than check for slice_count and slice_per_intfMarijn Suijten
According to downstream /and the comment copied from it/ this comparison should be the other way around. In other words, when the panel driver requests to use more slices per packet than what could be sent over this interface, it is bumped down to only use a single slice per packet (and strangely not the number of slices that could fit on the interface). Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515686/ Link: https://lore.kernel.org/r/20221221231943.1961117-4-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dsi: Use DSC slice(s) packet size to compute word countMarijn Suijten
According to downstream the value to use for WORD_COUNT is bytes_per_pkt, which denotes the number of bytes in a packet based on how many slices have been configured by the panel driver times the width of a slice times the number of bytes per pixel. The DSC panels seen thus far use one byte per pixel, only one slice per packet, and a slice width of half the panel width leading to the desired bytes_per_pkt+1 value to be equal to hdisplay/2+1. This however isn't the case anymore for panels that configure two slices per packet, where the value should now be hdisplay+1. Note that the aforementioned panel (on a Sony Xperia XZ3, sdm845) with slice_count=1 has also been tested to successfully accept slice_count=2, which would have shown corrupted output previously. Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515694/ Link: https://lore.kernel.org/r/20221221231943.1961117-3-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Wire up DSC mask for active CTL configurationMarijn Suijten
Active CTLs have to configure what DSC block(s) have to be enabled, and what DSC block(s) have to be flushed; this value was initialized to zero resulting in the necessary register writes to never happen (or would write zero otherwise). This seems to have gotten lost in the DSC v4->v5 series while refactoring how the combination with merge_3d was handled. Fixes: 58dca9810749 ("drm/msm/disp/dpu1: Add support for DSC in encoder") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/515693/ Link: https://lore.kernel.org/r/20221221231943.1961117-2-marijn.suijten@somainline.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm: mdss: add support for SM8550Neil Armstrong
Add support for the MDSS block on SM8550 platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/517516/ Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-mdss-dsi-v3-5-660c3bcb127f@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: add support for SM8550Neil Armstrong
Add definitions for the display hardware used on Qualcomm SM8550 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/517512/ Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-mdss-dsi-v3-4-660c3bcb127f@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm: Introduce SC8280XP MDSSBjorn Andersson
Add compatible for the SC8280XP Mobile Display Subsystem and initialization for version 8.0.0. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/514402/ Link: https://lore.kernel.org/r/20221207220012.16529-4-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Introduce SC8280XPBjorn Andersson
The Qualcomm SC8280XP platform contains DPU version 8.0.0, has 9 interfaces, 2 DSI controllers and 4 DisplayPort controllers. Extend the necessary definitions and describe the DPU in the SC8280XP. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/514398/ Link: https://lore.kernel.org/r/20221207220012.16529-3-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12dt-bindings: display/msm: Add binding for SC8280XP MDSSBjorn Andersson
Add binding for the display subsystem and display processing unit in the Qualcomm SC8280XP platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/514396/ Link: https://lore.kernel.org/r/20221207220012.16529-2-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm: Add support for SM8350Robert Foss
Add compatibles string, "qcom,sm8350-mdss", for the multimedia display subsystem unit used on Qualcomm SM8350 platform. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/516345/ Link: https://lore.kernel.org/r/20221230153554.105856-6-robert.foss@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: disable DSC blocks for SM8350Dmitry Baryshkov
SM8350 has newer version of DSC blocks, which are not supported by the driver yet. Remove them for now until these blocks are supported by the driver. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/517629/ Link: https://lore.kernel.org/r/20230109214309.586130-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Add support for SM8350Robert Foss
Add compatibles string, "qcom,sm8350-dpu", for the display processing unit used on Qualcomm SM8350 platform. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/516342/ Link: https://lore.kernel.org/r/20221230153554.105856-5-robert.foss@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-01-12drm/msm/dpu: Add SM8350 to hw catalogRobert Foss
Add compatibility for SM8350 display subsystem, including required entries in DPU hw catalog. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/516340/ Link: https://lore.kernel.org/r/20221230153554.105856-4-robert.foss@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
generated by cgit (git 2.34.1) at 2025-07-16 08:32:25 +0000