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2018-05-29drm/amd/display: check if audio clk enable is applicableRoman Li
Fixing warning on dce10 with HDMI display. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amd/display: add register offset != 0 check.Charlene Liu
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amd/display: Release fake sinkMikita Lipski
If connector doesn't have a sink, fake sink is created, but never released as it assumed that its destroyed with the stream it is used for. But now sink is released before the stream maintaing refcount consistency. This way we also avoid assigning anything to connector keeping all the operation local. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amd/display: replace msleep with udelay in fbc pathRoman Li
FBC enabling and disabling path has msleep which leads to BUG hit when called in atomic context, hence this patch replaces msleeps with udelays appropriately. Signed-off-by: Shirish S <shirish.s@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amd/display: Do not limit color depth to 8bpcMikita Lipski
Delete if statement that would force any display's color depth higher than 8 bpc to 8 Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amdgpu: remove unnecessary scheduler entity for VCNLeo Liu
It should be stateless, and no need for scheduler to take care specially. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amdgpu: Add helper function to get buffer domainDeepak Sharma
Move logic of getting supported domain to a helper function Signed-off-by: Deepak Sharma <Deepak.Sharma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amdgpu: Use GTT for dumb buffer if sg display enabled (v2)Deepak Sharma
When vram size <= THRESHOLD(256M) lets use GTT for dumb buffer allocation. As SG will be enabled with vram size <= 256M scan out will not be an issue. v2: Use amdgpu_display_supported_domains to get supported domain. Signed-off-by: Deepak Sharma <Deepak.Sharma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amd/pp: Add cases for getting phys and disp clks for SMU10Mikita Lipski
Add case options to retrieve either physical or display clocks with voltage from SMU controller that are needed by display driver. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-29drm/amd/display: Fix wrong latency assignment for VEGA clock levelsHarry Wentland
Also drop wrong 10kHz comment Fixes: drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25drm/scheduler: fix a corner case in dependency optimizationNayan Deshmukh
When checking for a dependency fence for belonging to the same entity compare it with scheduled as well finished fence. Earlier we were only comparing it with the scheduled fence. Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25drm/amdgpu: vcn_v1_0_is_idle() can be statickbuild test robot
Fixes: 9b4c412a654c ("drm/amdgpu: Add static CG control for VCN on RV") Signed-off-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latencyHarry Wentland
This is required so we use the correct minimum clocks for Vega. Without this pplib will never be able to enter the lowest clock states. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25drm/amdgpu: fix 32-bit build warningArnd Bergmann
Casting a pointer to a 64-bit type causes a warning on 32-bit targets: drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:473:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] lower_32_bits((uint64_t)wptr)); ^ drivers/gpu/drm/amd/amdgpu/amdgpu.h:1701:53: note: in definition of macro 'WREG32' #define WREG32(reg, v) amdgpu_mm_wreg(adev, (reg), (v), 0) ^ drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:473:10: note: in expansion of macro 'lower_32_bits' lower_32_bits((uint64_t)wptr)); ^~~~~~~~~~~~~ The correct method is to cast to 'uintptr_t'. Fixes: d5a114a6c5f7 ("drm/amdgpu: Add GFXv9 kfd2kgd interface functions") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-05-25drm/exynos: fimc: signedness bug in fimc_setup_clocks()Dan Carpenter
"id" needs to be signed for the error handling to work. Fixes: 7a2d5c77c558 ("drm/exynos: fimc: Convert driver to IPP v2 core API") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-25drm/exynos: scaler: fix static checker warningInki Dae
drivers/gpu/drm/exynos/exynos_drm_scaler.c:402 scaler_task_done() warn: signedness bug returning '(-22)' Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-25Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next Last feature request for 4.18. Mostly vega20 support. - Vega20 support - clock and powergating for VCN - misc bug fixes Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180524152427.32713-1-alexander.deucher@amd.com
2018-05-24drm/amdgpu: Use dev_info() to report amdkfd is not supported for this ASICTom Stellard
This is an important message, so it should be visible to users without having to enable extra debugging. Signed-off-by: Tom Stellard <tstellar@redhat.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-05-24drm/amd/display: Remove use of division operator for long longsDavid Francis
In fixed31_32.h, in dc_fixpt_shl,'/' was used for division of one long long int by another long long int. As there is no inbuilt long long int division function in c, gcc inserted its own. However, gcc does not link the library that contains this function. To avoid this, use bitwise operators instead of / Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Update GFX info structure to match what vega20 usedShaoyun Liu
Update to the latest version from the vbios team. Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu/pp: remove duplicate assignmentAlex Deucher
is_dpm_running callback was assigned to the same value twice. Drop the duplicate. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/sched: add rcu_barrier after entity finiEmily Deng
To free the fence from the amdgpu_fence_slab, need twice call_rcu, to avoid the amdgpu_fence_slab_fini call kmem_cache_destroy(amdgpu_fence_slab) before kmem_cache_free(amdgpu_fence_slab, fence), add rcu_barrier after drm_sched_entity_fini. The kmem_cache_free(amdgpu_fence_slab, fence)'s call trace as below: 1.drm_sched_entity_fini -> drm_sched_entity_cleanup -> dma_fence_put(entity->last_scheduled) -> drm_sched_fence_release_finished -> drm_sched_fence_release_scheduled -> call_rcu(&fence->finished.rcu, drm_sched_fence_free) 2.drm_sched_fence_free -> dma_fence_put(fence->parent) -> amdgpu_fence_release -> call_rcu(&f->rcu, amdgpu_fence_free) -> kmem_cache_free(amdgpu_fence_slab, fence); v2:put the barrier before the kmem_cache_destroy v3:put the dma_fence_put(fence->parent) before call_rcu in drm_sched_fence_release_scheduled Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: move VM BOs on LRU againChristian König
Move all BOs belonging to a VM on the LRU with every submission. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: consistenly use VM moved flagChristian König
Instead of sometimes checking if the vm_status is empty use the moved flag and also reset it when the BO leaves the state machine. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: kmap PDs/PTs in amdgpu_vm_update_directoriesChristian König
In theory it is possible that PDs/PTs can move without eviction. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: further optimize amdgpu_vm_handle_movedChristian König
Splice the moved list to a local one to avoid taking the lock over and over again. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: cleanup amdgpu_vm_validate_pt_bos v2Christian König
Use list_for_each_entry_safe here. v2: Drop the optimization, it doesn't work as expected. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: rework VM state machine lock handling v2Christian König
Only the moved state needs a separate spin lock protection. All other states are protected by reserving the VM anyway. v2: fix some more incorrect cases Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Add runtime VCN PG supportRex Zhu
Enable support for dynamically powering up/down VCN on demand. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Enable VCN static PG by default on RVRex Zhu
Enable static VCN powergating by default on Raven. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Add VCN static PG support on RVRex Zhu
Implement static powergating suport on VCN. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Enable VCN CG by default on RVRex Zhu
Enable VCN clockgating by default on Raven. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Add static CG control for VCN on RVRex Zhu
Implement proper static clockgating support for VCN. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/exynos: Fix default value for zpos plane propertyMarek Szyprowski
The default zpos property for all planes in Exynos DRM was fixed as zero. Fix this by providing proper value provided by hardware drivers, which typically matches hardware window number. Reported-by: Seung-Woo Kim <sw0312.kim@samsung.com> Fixes: e47726a11e11 ("drm/exynos: use generic code for managing zpos plane property") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-24drm/exynos: Fix error value in exynos_drm_crtc_get_by_type()Marek Szyprowski
EPERM is not the correct error value when the driver is not able to get its resources. Change it to ENODEV. Reported-by: Russell King - ARM Linux <linux@armlinux.org.uk> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-24drm/exynos/dsi: mask frame-done interruptAndrzej Hajda
DSI driver is not really interested in this interrupt. It causes only unnecessary code execution of interrupt handler and could possibly cause FIFO overflow - as it triggers DSI interrupt handler to process next DSI transfer. With this patch we will get rid of about 30 IRQ handler calls per second. Fixes: e6f988a45857 ("drm/exynos: dsi: add support for Exynos5433") Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-24drm/amdgpu: Add SOC15_WAIT_ON_RREG macro defineRex Zhu
Add new macro to wait on a register field to be a specific value. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: Add CG/PG flags for VCNRex Zhu
Define new clock and powergating flags for VCN block. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amd/pp: Add smu support for VCN powergating on RVRex Zhu
Add the powerplay callback for powergating VCN (same as UVD and VCE). Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amdgpu: skip CG for VCN when late_init/finiRex Zhu
VCN clockgating is handled manually like VCE and UVD. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amd/pp: fix a couple locking issuesRex Zhu
We should return unlock on the error path Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/amd/pp: Fix static checker warningRex Zhu
error: uninitialized symbol 'xxxx' Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-23drm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabledAlex Deucher
The vbios mistakenly sets this bit on some boards without ECC. This can lead to reduced performance in some workloads. Disable the bit if the board does not have ECC. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-23drm/amdgpu: add a df 1.7 implementation of enable_ecc_force_par_wr_rmwAlex Deucher
Needed for proper memory setup depending on whether ECC is enabled on a particular board. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-23drm/amdgpu: add new DF callback for ECC setupAlex Deucher
The ForceParWrRMW setting needs to be enabled for ECC, but disabled when ECC is not enabled. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-23drm/amdgpu: add new DF 1.7 register defsAlex Deucher
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-23Remove calls to suspend/resume atomic helpers from ↵Andrey Grodzovsky
amdgpu_device_gpu_recover. (v2) First of all it's already being called from the display code from amd_ip_funcs.suspend/resume hooks. Second of all, the place in amdgpu_device_gpu_recover it's being called is wrong for GPU stalls since it is called BEFORE we cancel and force completion of all in flight jobs which were not yet processed. So, as Bas pointed in the ticket we will try to wait for fence in amdgpu_pm_compute_clocks but the pipe is hanged so we end up in deadlock. v2: remove unused variable Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106500 Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-24drm/exynos: decon: Add support for hardware windows no 4 and 5Marek Szyprowski
Enable support for 2 more hardware windows. This require enabling a few more clocks and set proper plane type for all windows. In the new configuration primary plane uses hardware window no 3 and cursor uses window no 5. The remaining hardware windows are used for overlays. This gives us an overlay plane both below and above primary plane for both Decon and DeconTV (which uses hardware window nr 0 for background). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-24dt-bindings: exynos5433-decon: add more required clocksMarek Szyprowski
Proper support for Decon's hardware window no 4 and 5 require enabling a few more clocks ("aclk_smmu_decon1x", "aclk_xiu_decon1x", "pclk_smmu_decon1x"). Add those clocks to required clocks list in Decon's dt bindings. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-05-24Merge tag 'exynos-drm-next-for-v4.18' of ↵Inki Dae
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into exynos-drm-next - Add S5PV210 FIMD variant support. - Add IPP v2 framework. . it is a rewritten version of the Exynos mem-to-mem image processing framework which supprts color space conversion, image up/down-scaling and rotation. This new version replaces existing userspace API with new easy-to-use and simple ones so we have already applied the use of these API to real user, Tizen Platform[1], and also makes existing Scaler, FIMC, GScaler and Rotator drivers to use IPP v2 core API. And below are patch lists we have applied to a real user, https://git.tizen.org/cgit/platform/adaptation/samsung_exynos/libtdm-exynos/log/?h=tizen&qt=grep&q=ipp https://git.tizen.org/cgit/platform/adaptation/samsung_exynos/libtdm-exynos/commit/?h=tizen&id=b59be207365d10efd489e6f71c8a045b558c44fe https://git.tizen.org/cgit/platform/kernel/linux-exynos/log/?h=tizen&qt=grep&q=ipp TDM(Tizen Display Manager) is a Display HAL for Tizen platform. Ps. Only real user using IPP API is Tizen. [1] https://www.tizen.org/ - Two cleanups . One is to just remove mode_set callback from MIPI-DSI driver because drm_display_mode data is already available from crtc atomic state. . And other is to just use new return type, vm_fault_t for page fault handler.
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