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2013-10-10drm/i915: Move edram detection early_sanitizeBen Widawsky
In order to be able to have virtual functions for the MMIO, we need to use the raw access function. To keep things simple, just move this to our early_sanitize code in uncore. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Prevent using uninitialized MMIO funcsBen Widawsky
For upcoming patches which will have GEN specific MMIO functions, we'll need to initialize the uncore data structure earlier than we do today. If we do not do this, the following will be problematic: intel_uncore_sanitize intel_disable_gt_powersave gen6_disable_rps I915_WRITE(GEN6_RC_CONTROL, 0); <--- MMIO intel_uncore_init // initializes MMIO By initializing the function pointers first, we should be safe. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: rip out gen2 reset codeDaniel Vetter
At least on my i830M here it reliably results in hard system hangs nowadays. This is much worse than falling back to software rendering, so I think we should simply rip this out. After all we don't have any gpu reset for gen3 either, and there are a lot more of those still around. Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: check that the i965g/gm 4G limit is really obeyedDaniel Vetter
In truly crazy circumstances shmem might give us the wrong type of page. So be a bit paranoid and double check this. Reviewer: Damien Lespiau <damien.lespiau@intel.com> Cc: Rob Clark <robdclark@gmail.com> References: http://lkml.org/lkml/2011/7/11/238 Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Undo the PIPEA quirk for i845Chris Wilson
The PIPEA quirk is specifically for the issue with the PIPEB PLL on 830gm being slaved to the PIPEA PLL, and so to use PIPEB requires PIPEA running. i845 doesn't even have the second PLL or pipe, and enabling the quirk results in a blank DVO LVDS. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Use the real cpu max frequency for ring scalingBen Widawsky
The policy's max frequency is not equal to the CPU's max frequency. The ring frequency is derived from the CPU frequency, and not the policy frequency. One example of how this may differ through sysfs. If the sysfs max frequency is modified, that will be used for the max ring frequency calculation. (/sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq). As far as I know, no current governor uses anything but max as the default, but in theory, they could. Similarly distributions might set policy as part of their init process. It's ideal to use the real frequency because when we're currently scaled up on the GPU. In this case we likely want to race to idle, and using a less than max ring frequency is non-optimal for this situation. AFAIK, this patch should have no impact on a majority of people. This behavior hasn't been changed since it was first introduced: commit 23b2f8bb92feb83127679c53633def32d3108e70 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Jun 28 13:04:16 2011 -0700 drm/i915: load a ring frequency scaling table v3 CC: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Flush primary plane changes in sprite codeVille Syrjälä
Flush the primary plane changes when enabling/disabling the primary plane in response to sprite visibility. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: WARN if primary plane state doesn't match expectationsVille Syrjälä
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Rename intel_{enable, disable}_plane to intel_{enable, ↵Ville Syrjälä
disable}_primary_plane The new names make it clearer which plane we're talking about. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Resolve small conflict with the haswell_crtc_disable_planes extraction.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Rename intel_flush_display_plane to intel_flush_primary_planeVille Syrjälä
The intel_flush_primary_plane name actually tells us which plane we're talking about. Also reorganize the internals a bit and add a missing POSTING_READ() to make sure the hardware has seen the changes by the time we return from the function. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Enable/disable IPS when primary is enabled/disabledVille Syrjälä
IPS should be OK as long as one plane is enabled on the pipe, but it does seem to cause problems when going between primary only and sprite only. This needs more investigations, but for now just disable IPS whenever the primary plane is disabled. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Do the fbc vs. primary plane enable/disable in the right orderVille Syrjälä
Disable fbc before disabling the primary plane, and enable fbc after the primary plane has been enabled again. Also use intel_disable_fbc() to disable FBC to avoid the pointless overhead of intel_update_fbc(), and especially avoid having to clean up and set up the stolen mem compressed buffer again. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Save user requested plane coordinates only on successVille Syrjälä
If the setplane operation fails, we shouldn't save the user's requested plane coordinates. Since we adjust the coordinates during the clipping process, make a copy of the originals, and once the operation has succeeded save them for later reuse when the plane gets re-enabled. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Do a bit of cleanup in the sprite codeVille Syrjälä
Move the variable initialization to where the variables are declared, and kill a pointless to_intel_crtc() cast when we already have the casted pointer. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Kill a goto from sprite disable codeVille Syrjälä
Let's not use goto when a simple if suffices. This is not error handling code or anything, so the goto looks out of place. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Reduce the time we hold struct mutex in sprite update_plane codeVille Syrjälä
We used to call the entire intel specific update_plane hook while holding struct_mutex. Actually we only need to hold struct_mutex while pinning/unpinning the obj. The plane state itself is protected by the kms locks, and as the object is pinned we can dig out the offset and tiling information from it without fearing that it would change underneath us. So now we don't need to drop and reacquire the lock around the wait_for_vblank. Also we will need another wait_for_vblank in the IVB specific update_plane hook, and this way we don't need to worry about struct_mutex there either. Also move the intel_plane->obj=NULL assignment outside strut_mutex in disable_plane to make it clear that it's not protected by struct_mutex. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Allow sprites to be configured on a disabled pipeVille Syrjälä
We allow cursors to be set up when the pipe is disabled. Do the same for sprites as well. We need to be somewhat careful with the primary disable logic as we don't want to accidentally enable the primary plane on a disabled pipe. v2: Skip primary enable/disable and plane registers writes on disabled pipe Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Set primary_disabled in intel_{enable, disable}_planeVille Syrjälä
If the primary gets marked as disabled while the pipe is off for instance, we should still re-enable it when the pipe is turned on, unless the sprite covers it fully also in that configuration. Unfortunately we do the plane visibility checks only in the sprite code, which is executed after the primary enabling when turning the pipe off. Ideally we should compute the plane visibility before touching the hardware at all, but for now just set the primary_disabld flag in intel_{enable,disable}_plane. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915/dp: promote clock recovery failures to DRM_ERRORJani Nikula
If channel equalization succeeds, there's no indication something went wrong in clock recovery (unless debug is enabled). We should shout about the failures and fix them instead of hiding them under the carpet. This has allowed bugs like [1] stay dormant for a long time. [1] https://bugs.freedesktop.org/show_bug.cgi?id=70117 Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Fix VGA_DISP_DISABLE checkVille Syrjälä
The VGACNTRL register contains a bunch of other stuff besides the VGA_DISP_DISABLE bit. When we write the register we always set those other bits to zero, so normally the current check would work. However on HSW disabling and re-enabling the power well will reset the VGACNTRL register to its default value, which has several of the other bits set as well. So only look at the VGA_DISP_DISABLE bit when checking whether the VGA plane needs re-disabling. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Use intel_PLL_is_valid() in vlv_find_best_dpll()Ville Syrjälä
Everyone else uses intel_PLL_is_valid(), so make VLV use it as well. We don't have any special p and m limits on VLV, so skip those tests, and we also need to skip the m1<=m2 test line PNV. Reorganize the function a bit to move the n check alongside the rest of the test for the non-derived dividers, and check the derived values afterwards. Note that this changes vlv_find_best_dpll() in two ways: - The .vco comparison is now >max instead of >=max, and since we round down when calculating that stuff, we may now allow frequencies slightly above the max as we do on other platforms. The previous method disallowed exactly max and anything above it. - We now check the .dot frequency against the data rate limits, which we didn't do before. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Don't lie about findind suitable PLL settings on VLVVille Syrjälä
If vlv_find_best_dpll() couldn't find suitable PLL settings, just say so instead of lying to caller. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: intel_limits_vlv_dac and intel_limits_vlv_hdmi are the sameVille Syrjälä
After aligning the p1 divider limits, and removing the unused p and m limits, intel_limits_vlv_dac and intel_limits_vlv_hdmi are identical. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Remove unused dot_limit from VLV PLL limitsVille Syrjälä
We don't use .dot_limit for anything on VLV, so don't populate it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Remove the unused p and m limits for VLVVille Syrjälä
We never check the p and m limits (which according to comments are based on someone's guesswork), so just remove them. VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm has no p and m limits listed. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Respect p2 divider minimum limit on VLVVille Syrjälä
VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm tells us that the minimum p2 divider is 2. Use that limit on the code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Allow p1 divider 2 on VLVVille Syrjälä
According to VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm p1 can be 2-3 always. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Clarify VLV PLL p1 limitsVille Syrjälä
For some reason there's a sort of off by one issue with the p1 divider. The actual p1 limits according to VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm is 2-3, so we should just say that instead of saying 1-3 and avoiding the 1 via the choice of comparison operator. I don't know why we're using different p1 limits for intel_limits_vlv_dac and intel_limits_vlv_hdmi, but let's preserve that for now. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Make sure we respect n.max on VLVVille Syrjälä
We limit the maximum n divider value in order to make sure the PLL's reference inout is at least 19.2 MHz. I assume that is done to satisfy some hardware requirement. However we never check whether that calculated limit is below the maximum supoorted N divider value (7). In practice that is always true since we only support 100 MHz reference clock, but making the code safe against higher reference clocks seems like a reasoanble thing to do. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: De-magic the VLV p2 divider step sizeVille Syrjälä
The p2 divider on VLV needs to be even when it's > 10. The current code to make that happen is rather weird. Just make the step size adjustement in the for loop decrement step. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Rewrite vlv_find_best_dpll()Ville Syrjälä
Rewrite vlv_find_best_dpll() to use intel_clock_t rather than an army of local variables. Also extract the code to calculate the derived values into vlv_clock(). v2: Split up the earlier fixes, extract vlv_clock() v3: Initialize best_clock Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Don't underflow bestppmVille Syrjälä
We do 'bestppm - 10' in vlv_find_best_dpll() but never check whether that might underflow. Add such a check. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Make vlv_find_best_dpll() ppm calculation safeVille Syrjälä
Use div_u64() to make the ppm calculation in vlv_find_best_dpll() safe against interger overflows. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915/dp: use sizeof for memset instead of magic valueJani Nikula
Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Remove yet another unused defineDamien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Fix type mismatch and accounting in i915_gem_shrinkChris Wilson
The interface uses an unsigned long, and we can use the unsigned counter throughout our code, so do so. In the process, we notice one instance where the shrink count is based on a heuristic rather than the result, and another where we ask for too many pages to be purged. v2: nr_to_scan needs to be promoted to a long as well, so just use sc->nr_to_scan directly. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10drm/i915: Call io_schedule() whilst whilsting for the GPUChris Wilson
Since we are waiting upon IO completion, inform the kernel through use of the io_schedule() call rather than the regular schedule(). This should allow the kernel to make better decisions regarding scheduling and power management. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-10Merge remote-tracking branch 'airlied/drm-next' into drm-intel-nextDaniel Vetter
The conflict in intel_drv.h tripped me up a bit since a patch in dinq moves all the functions around, but another one in drm-next removes a single function. So I'ev figured backing this into a backmerge would be good. i915_dma.c is just adjacent lines changed, nothing nefarious there. Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/i915/intel_drv.h Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-09drm/i915/dp: get rid of intel_dp->link_configurationJani Nikula
It's not really needed, rather just adds another place to hold intermediate values that could go wrong, and it's not clear that the training pattern set or training lane set should be written at this point at all. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm/radeon/dp: use drm_dp_enhanced_frame_cap()Jani Nikula
Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm/dp: add helper for checking DP_ENHANCED_FRAME_CAP in DPCDJani Nikula
Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Kill drm perf counter leftoversVille Syrjälä
The user of these counters was killed in commit d79cdc8312689b39c6d83718c1c196af4b3cd18c Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Aug 8 15:41:32 2013 +0200 drm: no-op out GET_STATS ioctl so clean up the leftovers as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Remove pci_vendor and pci_device from struct drm_deviceVille Syrjälä
We can get the PCI vendor and device IDs via dev->pdev. So we can drop the duplicated information. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Kill ctx_count from struct drm_deviceVille Syrjälä
The only user of ctx_count is the via driver, and we can replace that use with list_is_singular(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Kill unused stuff from struct drm_deviceVille Syrjälä
'map_count' and 'work' are never used. Kill them both. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Make irq_enabled boolVille Syrjälä
irq_enabled is only ever 0 or 1, so make it a bool. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Collect per-crtc vblank stuff to a structVille Syrjälä
drm_vblank_init() is too ugly. Make it a bit easier on the eye by collecting all the per-crtc vblank counters, timestamps etc. to a structure and just allocate an array of those. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Make vblank_enabled boolVille Syrjälä
vblank_enabled is only ever 0 or 1, so make it a bool. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Make vblank_inmodeset unsignedVille Syrjälä
vblank_inmodeset is a bitmask, with only two bits mind you, but better make it unsigned anyway. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-09drm: Make vblank_disable_allowed boolVille Syrjälä
vblank_disable_allowed is only ever 0 or 1, so make it a bool. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
generated by cgit (git 2.34.1) at 2025-07-15 13:06:02 +0000