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2014-02-04drm/i915: release mutex in i915_gem_init()'s error pathMika Kuoppala
Found with smatch. Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-04drm/i915: check for oom when allocating private_default_ctxMika Kuoppala
Found with smatch Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-04drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is ↵Deepak S
power gated. When we enter RC6 and GFX Clocks are off, the voltage remains higher than Vmin. When we try to set the freq to RPn, it might fail since the Gfx clocks are down. So to fix this in Gfx idle, Bring the GFX clock up and set the freq to RPn then move GFx down. v2: remove vlv_update_rps_cur_delay function. Update commit message (Daniel) v3: Fix the timeout during wait for gfx clock (Jesse) v4: addressed comments on set freq and punit wait (Ville) v5: use wait_for while waiting for GFX clk to be up. (Daniel) update cur_delay before requesting min_delay. (Ville) v6: use wait_for while waiting for punit. (Ville) Signed-off-by: Deepak S <deepak.s@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-04drm/i915: Get rid of acthd based guilty batch searchMika Kuoppala
As we seek the guilty batch using request and hangcheck score, this code is not needed anymore. v2: Rebase. Passing dev_priv instead of getting it from last_ring Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v1) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-04drm/i915: Use hangcheck score to find guilty contextMika Kuoppala
With full ppgtt using acthd is not enough to find guilty batch buffer. We get multiple false positives as acthd is per vm. Instead of scanning which vm was running on a ring, to find corressponding context, use a different, simpler, strategy of finding batches that caused gpu hang: If hangcheck has declared ring to be hung, find first non complete request on that ring and claim it was guilty. v2: Rebase Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73652 Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v1) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-04drm/i915: Drop WaDisablePSDDualDispatchEnable:ivb for IVB GT2Ville Syrjälä
Both Bspec and the W/A database state that WaDisablePSDDualDispatchEnable is only needed for IVB GT1. The only real confusion here is that the the W/A database also says to write to the GT2 only register as well, which is strange if the W/A is only for GT1. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-04drm/i915: Fix IVB GT2 WaDisableDopClockGating and WaDisablePSDDualDispatchEnableVille Syrjälä
IVB GT2 has two registers for these things, and both must be written. To add a bit more confusion both Bspec and the W/A database state that WaDisablePSDDualDispatchEnable is only needed for IVB GT1, but the W/A database also says to write even the second GT2 only register. So I don't really know what the right thing here is. Note that Bspec disagrees with the w/a database here, but Ville confirmed (by asking Chris) that on gt1 the 2nd reg doesn't exist. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> [danvet: Add note as requested by Rodrigo.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Don't access snooped pages through the GTT (even for error capture)Chris Wilson
We want to use the GTT for reading back objects upon an error so that we have exactly the information that the GPU saw. However, it is verboten to access snoopable pages through the GTT and causes my PineView GPU to throw a page fault instead. This has not been a problem in the past as we only dumped ringbuffers and batchbuffers, both of which must be not snooped. However, the introduction of HWS page dumping leads to a read of a snooped object through the GTT. This was introduced by commit f3ce3821393e31a3f1a8ca6c24eb2d735a428445 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jan 23 22:40:36 2014 +0000 drm/i915: Include HW status page in error capture Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet:s/uncached/not snooped/ for one case in the commit message as requested by Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Only print information for filing bug reports onceChris Wilson
Repeating the same information multiple times is just annoying. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Tune down debug output when context is bannedMika Kuoppala
If we have stopped rings then we know that test is running so no need for spam. In addition, only spam when default context gets banned. v2: - make sure default context ban gets shown (Chris) - use helper for checking for default context, everywhere (Chris) v3: - dont be quiet when debug is set (Ben, Daniel) Reference: https://bugs.freedesktop.org/show_bug.cgi?id=73652 Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Use i915_hw_context to set reset statsMika Kuoppala
With full ppgtt support drm_i915_file_private gained knowledge about the default context. Also reset stats are now inside i915_hw_context so we can use proper abstraction. v2: Move BUG_ON and WARN_ON to more proper locations (Ben) v3: Pass dev directly to i915_context_is_banned to avoid the need to dereference ctx->last_ring. Spotted by Mika when checking my s/BUG/WARN/ change, I've missed this ->last_ring dereference. Suggested-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> (v2) Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v2) [danvet: s/BUG/WARN/] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: enable HiZ Raw Stall Optimization on IVBChia-I Wu
The optimization helps IVB too. No piglit regression. Signed-off-by: Chia-I Wu <olv@lunarg.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: enable HiZ Raw Stall Optimization on HSWChia-I Wu
The optimization is available on Ivy Bridge and later, and is disabled by default. Enabling it helps certain workloads such as GLBenchmark TRex test. No piglit regression. v2 - no need to save the register before suspend as init_clock_gating can correctly program it after resume - split IVB change to another commit Signed-off-by: Chia-I Wu <olv@lunarg.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Capture PPGTT info on error captureBen Widawsky
v2: Rebased upon cleaned up error state v3: Make sure hangcheck info remains last (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Add some more registers to error stateBen Widawsky
Chris: Do we also want to capture? GAC_ECO_BITS /* gen6,7 */ GAM_ECOCHK /* gen6,7 */ GAB_CTL /* gen6 */ GFX_MODE /* gen6 */ Requested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Move per ring error state to ring_errorBen Widawsky
v2: Moved num_requests up (Chris) Rebased on new hws page capture which required a rename since it made two members named, 'hws' in the per ring error state. (Ben) Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Reorder struct membersBen Widawsky
This helps make an upcoming patch a bit more reviewable Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Logically reorder error register captureBen Widawsky
Create logical sections in an attempt to clean up, and continue to keep future additions clean. v2: Reworded the comments. Added section headers (Chris) Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30drm/i915: Extract register state error captureBen Widawsky
The code has become quite hairy. By relocating all the generic registers it will become more obvious where future ones should go. There is still admittedly a bit of confusion left for things like per ring registers. A subsequent patch will clean this function up. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter
Backmerge drm-next - I need to backmerge drm-intel-fixes patches touching the error capture code to be able to merge Ben's cleanup patches. Conflicts: drivers/gpu/drm/i915/i915_gpu_error.c Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-30Merge branch 'drm-nouveau-next' of ↵Dave Airlie
git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next more fixes for nouveau. * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nouveau: resume display if any later suspend bits fail drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip drm/nouveau: implement hooks for needed for drm vblank timestamping support drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping drm/nv50: fill in crtc mode struct members from crtc_mode_fixup
2014-01-30Merge branch 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next more radeon fixes * 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux: drm/radeon/dce8: workaround for atom BlankCrtc table drm/radeon/DCE4+: clear bios scratch dpms bit (v2) drm/radeon: set si_notify_smc_display_change properly drm/radeon: fix DAC interrupt handling on DCE5+ drm/radeon: clean up active vram sizing drm/radeon: skip async dma init on r6xx drm/radeon/runpm: don't runtime suspend non-PX cards drm/radeon: add ring to fence trace functions drm/radeon: add missing trace point drm/radeon: fix VMID use tracking
2014-01-30drm/nouveau: resume display if any later suspend bits failIlia Mirkin
If either idling channels or suspending the fence were to fail, the display would never be resumed. Also if a client fails, resume the fence (not functionally important, but it would potentially leak memory). See https://bugs.freedesktop.org/show_bug.cgi?id=70213 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-30drm/nouveau: fix lock unbalance in nouveau_crtc_page_flipMaarten Lankhorst
Fixes a regression introduced by d5c1e84b3a130f0 "drm/nouveau: hold mutex while syncing to kernel channel". Cc: stable@vger.kernel.org #3.13 Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-30drm/nouveau: implement hooks for needed for drm vblank timestamping supportBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-30drm/nouveau/disp: add a method to fetch info needed by drm vblank timestampingBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-30drm/nv50: fill in crtc mode struct members from crtc_mode_fixupBen Skeggs
The DRM uses the adjusted mode to calculate constants for vblank timestamping. Our encoder mode_fixup (usually) replaces this data with our backend mode information, which doesn't have the needed data filled in already. Reported-by: Mario Kleiner mario.kleiner.de@gmail.com Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-01-29drm/i915: Kerneldoc for i915_gem_evict.cDaniel Vetter
Request by Ben Widawsky in his review of a patch touching this code. v2: Clarify the disdinction between evicting vmas (to free up virtual address space) and evicting objects (to free up actual system memory). Suggested by Ben. Cc: Ben Widawsky <benjamin.widawsky@intel.com> Acked-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/radeon/dce8: workaround for atom BlankCrtc tableAlex Deucher
Some DCE8 boards have a funky BlankCrtc table that results in a timeout when trying to blank the display. The timeout is harmless (all operations needed from the table are complete), but wastes time and is confusing to users so work around it. bug: https://bugs.freedesktop.org/show_bug.cgi?id=73420 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-29drm/radeon/DCE4+: clear bios scratch dpms bit (v2)Alex Deucher
The BlankCrtc table in some DCE8 boards has some logic shortcuts for the vbios when this bit is set. Clear it for driver use. v2: fix typo Bug: https://bugs.freedesktop.org/show_bug.cgi?id=73420 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-29drm/radeon: set si_notify_smc_display_change properlyAlex Deucher
This is effectively a revert of 4573388c92ee60b4ed72b8d95b73df861189988c. Forcing a display active when there is none causes problems with dpm on some SI boards which results in improperly initialized dpm state and boot failures on some boards. As for the bug commit 4573388c92ee tried to address, one can manually force the state to high for better performance when using the card as a headless compute node until a better fix is developed. bugs: https://bugs.freedesktop.org/show_bug.cgi?id=73788 https://bugs.freedesktop.org/show_bug.cgi?id=69395 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> cc: stable@vger.kernel.org
2014-01-29drm/i915: VM eviction only targets address space not physical pagesChris Wilson
During eviction, we are only considering how to free up space within the current address space and not concerned with freeing up physical memory. As such we need only skip nodes that pinned in the current VM and not globally. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ben Widawsky <benjamin.widawsky@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/radeon: fix DAC interrupt handling on DCE5+Alex Deucher
DCE5 and newer hardware only has 1 DAC. Use the correct offset. This may fix display problems on certain board configurations. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-29drm/radeon: clean up active vram sizingAlex Deucher
If we are not able to properly initialize one of the gpu engines for buffer paging, we limit vram to the size of the cpu visible aperture. We generally either use the gfx or dma engine to do this. Clean up the size limiting code to only adjust the size based on what ring is selected for buffer paging rather than making assumptions about which engine is selected for paging. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2014-01-29drm/radeon: skip async dma init on r6xxAlex Deucher
The hw is buggy and it's not currently used, but it's currently still initialized by the driver. Skip the init. Skipping init also seems to improve stability with dpm on some r6xx asics. bug: https://bugs.freedesktop.org/show_bug.cgi?id=66963 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2014-01-29drm/radeon/runpm: don't runtime suspend non-PX cardsAlex Deucher
Prevent runtime suspend of non-PX GPUs. Runtime suspend is not what we want in those cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-01-29drm/radeon: add ring to fence trace functionsChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-29drm/radeon: add missing trace pointChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-29drm/radeon: fix VMID use trackingChristian König
Otherwise we allocate a new VMID on nearly every submit. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-29drm/i915: fix initial timestamps for PP sequencing logicImre Deak
The initial jiffies value can be non-0, so set the inital panel power sequencer timestamps accordingly. This didn't cause a problem on 64 bit machines but on 32 bit jiffies is initially -300*HZ, so if the panel power is initally off in the call from edp_panel_vdd_on()-> wait_panel_power_cycle() we'd wait up to ~300 sec more than needed. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: fix wait_remaining_ms_from_jiffiesImre Deak
schedule_timeout_uninterruptible() takes jiffies not ms. v2: - ignore the overflow issue, the practical part of that should be solved instead in the caller (Chris) Note that this issue was introduced in commit dce56b3c626fb1d533258a624d42a1a3fc17da17 Author: Paulo Zanoni <paulo.r.zanoni@intel.com> Date: Thu Dec 19 14:29:40 2013 -0200 drm/i915: save some time when waiting the eDP timings I've accidentally merged the broken v4 version of the patch (where Jani noticed the issue [1]) instead of the v5, which was fixed [2]. [1] http://mid.gmane.org/87fvpnkgyg.fsf@intel.com [2] http://mid.gmane.org/1388778311-2020-1-git-send-email-przanoni@gmail.com Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Add admission of incompetence in the form of a note.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: Disable/Enable PM Intrrupts based on the current freq.Deepak S
When current delay is already at max delay, Let's disable the PM UP THRESHOLD INTRRUPTS, so that we will not get further interrupts until current delay is less than max delay, Also request for the PM DOWN THRESHOLD INTRRUPTS to indicate the decrease in clock freq. and viceversa for PM DOWN THRESHOLD INTRRUPTS. v2: Use bool variables (Daniel) v3: Fix Interrupt masking bit (Deepak) v4: Use existing symbolic constants in i915_reg.h (Daniel) v5: Add pm interrupt mask after new_delay calculation (Ville) Signed-off-by: Deepak S <deepak.s@intel.com> [danvet: Pass new_delay by value as suggested by Ville. Also appease checkpatch.] Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29Revert "drm/i915: set conservative clock gating values on VLV v2"Ville Syrjälä
We're disabling a boatload of clock gating features on VLV. Maybe these days we don't need to do that. At least I'm not aware of any workarounds with this level of paranoia. This reverts commit 4e8c84a5b14bbb5b88c63941f1d939560f4abd0b. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: Clarify WaDisable4x2SubspanOptimization situation for VLVVille Syrjälä
WaDisable4x2SubspanOptimization isn't listed for VLV in the workaround database, but BSpec says that the relevant bit must be set. Add a comment to remind people of this. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: VLV wants WaVSThreadDispatchOverride tooVille Syrjälä
Call gen7_setup_fixed_func_scheduler() on VLV as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: Don't apply WaVSThreadDispatchOverride on HSWVille Syrjälä
BSpec states that the thread override values set by gen7_setup_fixed_func_scheduler() are invalid for HSW. So let's not muck around with them. Since gen7_setup_fixed_func_scheduler() now has two totally independent parts, one for IVB and one for HSW, move the HSW part directly into haswell_init_clock_gating(). Note tht there's another workaround by the name of WaHSWVSRefCountFullforceMissDisable which basically claims that later steppings don't need the fix, but since WaVSRefCountFullforceMissDisable is listed to be needed for all steppings play it safe and keep applying the workaround. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: gen7_setup_fixed_func_scheduler() actually implements ↵Ville Syrjälä
WaVSThreadDispatchOverride The current comments indicate that this function implements WaVSRefCountFullforceMissDisable, which is only true for HSW. The original purpose of the function is to implement WaVSThreadDispatchOverride (and a bit more). Fix up the comments to match reality. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: Drop WaDisableTDLUnitClockGating:vlvVille Syrjälä
WaDisableTDLUnitClockGating is only relevant for early steppings of VLV. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29drm/i915: Drop WaDisableVDSUtnitClockGating:vlvVille Syrjälä
WaDisableVDSUtnitClockGating was only relevant for early steepings of VLV. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-01-29Merge tag 'drm/for-3.14-rc1-20140123' of ↵Dave Airlie
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v3.14-rc1 (update) These patches fix some issues caused by the DRM panel support from the previous pull request and add two more panels (for the Toshiba AC100 as well as the Seaboard and Ventana). * tag 'drm/for-3.14-rc1-20140123' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: Obtain head number from DT drm/panel: update EDID BLOB in panel_simple_get_modes() gpu: host1x: Remove unnecessary include drm/tegra: Use proper data type drm/tegra: Clarify how panel modes override others drm/tegra: Fix possible CRTC mask for RGB outputs drm/i915: Use drm_encoder_crtc_ok() drm: Move drm_encoder_crtc_ok() to core drm: provide a helper for the encoder possible_crtcs mask drm/tegra: Don't check resource with devm_ioremap_resource() drm/panel: Add support for Chunghwa CLAA101WA01A panel drm/panel: Add support for Samsung LTN101NT05 panel
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