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2023-05-24arm64: dts: qcom: pmk8550: add reboot-mode node using sdam_2 nvmemNeil Armstrong
Introduce sdam_2 node, which is to be used via nvmem for power on reasons during reboot. Add supported PoN reasons supported via sdam_2 node. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-upstream-reboot-reason-v1-2-c5ac3dd5b49f@linaro.org
2023-05-24arm64: dts: qcom: pmk8350: add reboot-mode node using sdam_2 nvmemNeil Armstrong
Introduce sdam_2 node, which is to be used via nvmem for power on reasons during reboot. Add supported PoN reasons supported via sdam_2 node. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-upstream-reboot-reason-v1-1-c5ac3dd5b49f@linaro.org
2023-05-24arm64: dts: qcom: enable dual ("bonded") DSI mode for DB845cDmitry Baryshkov
Now as both lt9611 and drm/msm drivers were updated to handle the 4k modes over DSI, enable "bonded" DSI mode on DB845c. This way the board utilizes both DSI links and thus can support 4k on the HDMI output. Cc: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230504160430.4014206-1-dmitry.baryshkov@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Enable aDSP and cDSP remoteproc nodesBhupesh Sharma
Enable the aDSP and cDSP remoteproc nodes on Qualcomm QRB4210 RB2 board. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516075908.2323372-4-bhupesh.sharma@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Fix CD gpio for SDHC2Bhupesh Sharma
Card-Detect (CD) gpio for SDHC2 is an active GPIO line. Fix the same. This allows the uSD card to be properly detected on the board. Fixes: 8d58a8c0d930 ("arm64: dts: qcom: Add base qrb4210-rb2 board dts") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516075908.2323372-3-bhupesh.sharma@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Add SD pinctrl statesBhupesh Sharma
Add the default and sleep pinctrl states for SDHC1 & 2 controllers on QRB4210 RB2 board. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516075908.2323372-2-bhupesh.sharma@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Enable CAN bus controllerKonrad Dybcio
Enable the Microchip mcp2518fd hosted on the SPI5 bus. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-and-Tested-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515-topic-rb2-bits-v1-5-a52d154a639d@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Enable load setting on SDHCI VQMMCKonrad Dybcio
The MMC core calls regulator_set_load on VQMMC, enable loadsetting to make it effective. Fixes: 8d58a8c0d930 ("arm64: dts: qcom: Add base qrb4210-rb2 board dts") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-and-Tested-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515-topic-rb2-bits-v1-4-a52d154a639d@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Add GPIO LEDsKonrad Dybcio
Add the three LEDs (blue/yellow/green) connected to TLMM GPIOs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-and-Tested-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515-topic-rb2-bits-v1-3-a52d154a639d@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Enable display outKonrad Dybcio
The RB2 has a HDMI output via an LT9611UXC bridge. Set it up. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-and-Tested-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515-topic-rb2-bits-v1-2-a52d154a639d@linaro.org
2023-05-23arm64: dts: qcom: qrb4210-rb2: Describe fixed regulatorsKonrad Dybcio
The board hosts a whole lot of fixed regulators. Describe them. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-and-Tested-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515-topic-rb2-bits-v1-1-a52d154a639d@linaro.org
2023-05-23arm64: dts: qcom: sm8550-qrd: add USB OTGKrzysztof Kozlowski
Add missing parts of USB stack to enable USB OTG mode. The QRD8550 comes with one USB Type-C port. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516133011.108093-2-krzysztof.kozlowski@linaro.org
2023-05-23arm64: dts: qcom: sm8550-qrd: add PCIe0Krzysztof Kozlowski
Add PCIe0 nodes used with WCN7851 device. The PCIe1 is not connected, thus skip pcie_1_phy_aux_clk input clock to GCC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230516133011.108093-1-krzysztof.kozlowski@linaro.org
2023-05-23arm64: dts: qcom: sm8450-hdk: Add QMP & DP to SuperSpeed graphNeil Armstrong
With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the Type-C connector, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-4-6c43d293995f@linaro.org
2023-05-23arm64: dts: qcom: sm8350-hdk: Add QMP & DP to SuperSpeed graphNeil Armstrong
With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the Type-C connector, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-3-6c43d293995f@linaro.org
2023-05-23arm64: dts: qcom: sm8450: add ports subnodes in usb1 qmpphy nodeNeil Armstrong
Add the USB3+DP Combo QMP PHY port subnodes in the SM8450 SoC DTSI to avoid duplication in the devices DTs. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-2-6c43d293995f@linaro.org
2023-05-23arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy nodeNeil Armstrong
Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI to avoid duplication in the devices DTs. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-1-6c43d293995f@linaro.org
2023-05-22arm64: dts: qcom: sc8280xp: Add SDC2 and enable on CRDBjorn Andersson
The CRD has Micro SD slot, introduce the necessary DeviceTree nodes for enabling this. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517235217.1728548-1-quic_bjorande@quicinc.com
2023-05-22arm64: dts: qcom: sc8280xp-x13s: Add QMP to SuperSpeed graphBjorn Andersson
Following the CRD, connect the two QMP phys inbetween the USB Type-C connectors and the DisplayPort controller, to handle orientation switching. Tested-by: Abel Vesa <abel.vesa@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450 Tested-by: Johan Hovold <johan+linaro@kernel.org> # X13s Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515032743.400170-9-quic_bjorande@quicinc.com
2023-05-22arm64: dts: qcom: sc8280xp-crd: Add QMP to SuperSpeed graphBjorn Andersson
With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the two USB Type-C connectors, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Tested-by: Abel Vesa <abel.vesa@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450 Tested-by: Johan Hovold <johan+linaro@kernel.org> # X13s Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515032743.400170-8-quic_bjorande@quicinc.com
2023-05-17arm64: dts: qcom: ipq9574: Drop bias_pll_ubi_nc_clk inputDevi Priya
Drop unused bias_pll_ubi_nc_clk input to the clock controller. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230425084010.15581-6-quic_devipriy@quicinc.com
2023-05-17arm64: dts: qcom: ipq9574: Update the size of GICC & GICV regionsDevi Priya
Update the size of GICC and GICV regions to 8kB as the GICC_DIR & GICV_DIR registers lie in the second 4kB region. Also, add target CPU encoding. Fixes: 97cb36ff52a1 ("arm64: dts: qcom: Add ipq9574 SoC and AL02 board support") Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230425084010.15581-2-quic_devipriy@quicinc.com
2023-05-17arm64: dts: qcom: msm8916-longcheer-l8910: Add front flash LEDAndré Apitzsch
l8910 uses OCP8110 flash LED driver. Add it to the device tree. Tested-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: André Apitzsch <git@apitzsch.eu> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230514-x5_front_flash-v2-1-845a8bb0483b@apitzsch.eu
2023-05-17arm64: dts: qcom: sm8550: Add missing RPMhPD OPP levelsKonrad Dybcio
We need more granularity for things like the GPU. Add the missing levels. This unfortunately requires some re-indexing, resulting in an ugly diff. Rename the nodes to prevent that in the future. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-3-3063ce19c491@linaro.org
2023-05-17dt-bindings: power: qcom,rpmpd: Format RPMh levels betterKonrad Dybcio
After adding the missing levels with a nice, easy-to-read diff, reformat the defines to make them nice to look at.. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-2-3063ce19c491@linaro.org
2023-05-17dt-bindings: power: qcom,rpmpd: add missing RPMH levelsKonrad Dybcio
There are a lot of RPMh levels that we haven't included yet.. some sadly turned out to be necessary, add them! Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230517-topic-kailua-rpmhpd-v2-1-3063ce19c491@linaro.org
2023-05-17arm64: dts: qcom: sa8775p: mark the UFS controller as dma-coherentBartosz Golaszewski
The UFS controller is cache coherent, so mark it as such in the dtsi. Fixes: be543efeee17 ("arm64: dts: qcom: sa8775p: add UFS nodes") Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Suggested-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230515121908.303432-1-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sc8280xp: correct GIC child node nameKrzysztof Kozlowski
GIC child node is supposed to be named msi-controller: sa8295p-adp.dtb: interrupt-controller@17a00000: gic-its@17a40000: False schema does not allow Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417080939.28648-3-krzysztof.kozlowski@linaro.org
2023-05-14arm64: dts: qcom: sm8150: drop snps,dw-pcie fallback compatibleKrzysztof Kozlowski
Qualcomm PCI express root complex does not use snps,dw-pcie fallback: ['qcom,pcie-sm8150', 'snps,dw-pcie'] is too long Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417080939.28648-2-krzysztof.kozlowski@linaro.org
2023-05-14arm64: dts: qcom: sm8150: add missing qcom,smmu-500 fallbackKrzysztof Kozlowski
Since commit 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") the SMMU is supposed to use qcom,smmu-500 compatible fallback. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417080939.28648-1-krzysztof.kozlowski@linaro.org
2023-05-14arm64: dts: qcom: sm8150: drop incorrect serial propertiesKrzysztof Kozlowski
Drop incorrect and unused serial properties - address/size-cells and reg-names: sa8155p-adp.dtb: geniqup@ac0000: serial@a84000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'reg-names' were unexpected) Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417080818.28398-1-krzysztof.kozlowski@linaro.org
2023-05-14arm64: dts: qcom: sa8775p: enable AOSSBartosz Golaszewski
Enable the always-on subsystem controller on SA8775P platforms for use by upcoming support for other peripherals. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230504161755.197417-2-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p-ride: enable USB nodesShazad Hussain
Enable usb0, usb1 and usb2 nodes and their respective phy's. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Adrien Thierry <athierry@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230428130824.23803-7-quic_shazhuss@quicinc.com
2023-05-14arm64: dts: qcom: sa8775p: add USB nodesShazad Hussain
Add nodes for the USB and it's PHY on sa8775p platform. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230428130824.23803-6-quic_shazhuss@quicinc.com
2023-05-14arm64: dts: qcom: sa8775p: add the watchdog nodeBartosz Golaszewski
Now that the hypervisor issue is fixed, we can add the watchdog node for sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230427161218.201828-1-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: pmic: add the sdam_0 nodeParikshit Pareek
Introduce sdam_0 node, which is to be used via nvmem for power on reasons during reboot. Add supported PoN reaons supported via sdam_0 node. Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Tested-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417145536.414490-4-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: pmic: remove the PON modesParikshit Pareek
On this PMIC, the PON peripheral does not provide passing reboot modes over HLOS. They must be passed over SDAM. Remove the reboot-mode properties as we'll provide a proper SDAM node in a later commit. Fixes: d2d9a592746c ("arm64: dts: qcom: sa8775p: add the Power On device node") Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417145536.414490-2-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: add the GPU IOMMU nodeBartosz Golaszewski
Add the Adreno GPU IOMMU for sa8775p-based platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417125844.400782-6-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: add the GPU clock controller nodeBartosz Golaszewski
Add the GPUCC node for sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417125844.400782-4-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: add the pcie smmu nodeBartosz Golaszewski
Add the PCIe SMMU node for sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230417125844.400782-3-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p-ride: enable UFSBartosz Golaszewski
Enable the UFS and its PHY on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411130446.401440-6-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: add UFS nodesBartosz Golaszewski
Add nodes for the UFS and its PHY on sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411130446.401440-5-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: sa8775p: add the PMU nodeBartosz Golaszewski
Add the PMU node for sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230414123016.176457-1-brgl@bgdev.pl
2023-05-14arm64: dts: qcom: Add Fxtec Pro1X (QX1050) DTSDang Huynh
The F(x)tec Pro1X is a mobile phone released by FX Technologies Ltd in 2022. The phone is exactly the same as the Pro1 released in 2019 with some changes: - MSM8998 -> SM6115 - Camera button is no longer multistate - Only one 48MP back camera - A new keyboard layout picked by the community. This commit has the following features working: - Display (using simplefb) - UFS - Power and volume buttons - Pinctrl - RPM Regulators - USB (Device Mode) To get a successful boot run: cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/\ sm6115-fxtec-pro1x.dtb > .Image.gz-dtb mkbootimg --kernel .Image.gz-dtb \ --ramdisk initrd.img \ --base 0x0 \ --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 \ --second_offset 0xf00000 \ --tags_offset 0x100 \ --pagesize 4096 \ --cmdline "CMDLINE HERE" \ -o qx1050-boot.img fastboot flash boot qx1050-boot.img fastboot erase dtbo fastboot reboot Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230505-fxtec-pro1x-support-v3-2-0c9c7f58b205@riseup.net
2023-05-14dt-bindings: arm: qcom: Add Fxtec Pro1XDang Huynh
Document F(x)tec Pro1X as a SM6115 device. Signed-off-by: Dang Huynh <danct12@riseup.net> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230505-fxtec-pro1x-support-v3-1-0c9c7f58b205@riseup.net
2023-05-14arm64: dts: qcom: sa8540p-ride: Add ethernet nodesAndrew Halaney
Enable both the MACs found on the board. ethernet0 and ethernet1 both ultimately go to a series of on board switches which aren't managed by this processor. ethernet0 is connected to a Marvell 88EA1512 phy via RGMII. That goes to the series of switches via SGMII on the "media" side of the phy. RGMII_SGMII mode is enabled via devicetree register descriptions. The switch on the "media" side has auto-negotiation disabled, so configuration from userspace similar to: ethtool -s eth0 autoneg off speed 1000 duplex full is necessary to get traffic flowing on that interface. ethernet1 is in a mac2mac/fixed-link configuration going to the same series of switches directly via RGMII. Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230501205105.2518373-3-ahalaney@redhat.com
2023-05-14arm64: dts: qcom: sc8280xp: Add ethernet nodesAndrew Halaney
This platform has 2 MACs integrated in it, go ahead and describe them. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230501205105.2518373-2-ahalaney@redhat.com
2023-05-11arm64: dts: qcom: ipq9574: Add SMEM supportPoovendhan Selvaraj
Add the required nodes to support SMEM Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230511075814.2370-3-quic_poovendh@quicinc.com
2023-05-11arm64: dts: qcom: ipq9574: Enable the download mode supportPoovendhan Selvaraj
Enable the support for download mode to collect the crashdumps if system crashes, to debug crashes extensively. Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230511075814.2370-2-quic_poovendh@quicinc.com
2023-05-07Linux 6.4-rc1v6.4-rc1Linus Torvalds
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