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The driver and all downstream device trees [1] are using Hz units, but
the document claims MHz. DRAM frequency for these systems can't possibly
exceed 2^32-1 Hz, so the choice of unit doesn't really matter than much.
Rather than add unnecessary risk in getting the units wrong, let's just
go with the unofficial convention and make the docs match reality.
A sub-1MHz frequency is extremely unlikely, so include a minimum in the
schema, to help catch anybody who might have believed this was MHz.
[1] And notably, also those trying to upstream them:
https://lore.kernel.org/lkml/20210308233858.24741-3-daniel.lezcano@linaro.org/
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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These DRAM configuration properties are all handled in ARM Trusted
Firmware (and have been since the early days of this SoC), and there are
no in-tree users of the DMC binding yet. It's better to just defer to
firmware instead of maintaining this large list of properties.
There's also some confusion about units: many of these are specified in
MHz, but the downstream users and driver code are treating them as Hz, I
believe. Rather than straighten all that out, I just drop them.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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I want to add, deprecate, and bugfix some properties, as well as add the
first users. This is easier with a proper schema.
The transformation is mostly straightforward, plus a few notable tweaks:
* Renamed rockchip,dram_speed_bin to rockchip,ddr3_speed_bin. The
driver code and the example matched, but the description was
different. I went with the implementation. Note that this property is
also slated for deprecation/deletion in the subsequent patches.
* Drop upthreshold and downdifferential properties from the example.
These were undocumented (so, wouldn't pass validation), but were
representing software properties (governor tweaks). I drop them from
the driver in subsequent patches.
* Rename clock from pclk_ddr_mon to dmc_clk. The driver, DT example,
and all downstream users matched -- the binding definition was the
exception. Anyway, "dmc_clk" is a more appropriately generic name.
* Choose a better filename and location (this is a memory controller).
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the
R-Car H3, M3-W, M3-W+, M3-N, and E3 SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/3784b6cb76a008fb56d6cb4ba228d78c77e710fa.1648546583.git.geert+renesas@glider.be
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/fixes
Memory controller drivers - fixes for v5.18
Issues in v5.18:
1. Freescale/NXP: fix populating children of Integrated Flash Controller
DT nodes.
Issues existing before:
1. Renesas: fix platform-device leak in probe's error path.
2. Atmel: fix of_node reference leak in probe's error path.
3. Synopsys: correct the bindings for snps,ddrc-3.80a (interrupts are
required).
* tag 'memory-controller-drv-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: fsl_ifc: populate child nodes of buses and mfd devices
dt-bindings: memory: snps,ddrc-3.80a compatible also need interrupts
memory: atmel-ebi: Fix missing of_node_put in atmel_ebi_probe
memory: renesas-rpc-if: fix platform-device leak in error path
Link: https://lore.kernel.org/r/20220407081448.113208-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Since
8a4ab218ef70 ("powerpc/85xx: Change deprecated binding for 85xx-based boards")
those bindings are not used anymore.
A comment in drivers/edac/mpc85xx_edac.c say they are to be removed
with kernel 2.6.30.
Remove them now.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Scott Wood <oss@buserror.net>
Link: https://lore.kernel.org/r/82a8bc4450a4daee50ee5fada75621fecb3703ff.1648721299.git.christophe.leroy@csgroup.eu
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For the snps,ddrc-3.80a compatible, the interrupts property is also
required, also order the compatibles by name (s goes before x).
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Fixes: a9e6b3819b36 ("dt-bindings: memory: Add entry for version 3.80a")
Link: https://lore.kernel.org/r/20220321075131.17811-2-sherry.sun@nxp.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski's @canonical.com email stopped working, so switch to
generic @kernel.org account for all Devicetree bindings.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20220330074016.12896-2-krzysztof.kozlowski@linaro.org
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asm-generic
* 'remove-h8300' of git://git.infradead.org/users/hch/misc:
remove the h8300 architecture
This is clearly the least actively maintained architecture we have at
the moment, and probably the least useful. It is now the only one that
does not support MMUs at all, and most of the boards only support 4MB
of RAM, out of which the defconfig kernel needs more than half just
for .text/.data.
Guenter Roeck did the original patch to remove the architecture in 2013
after it had already been obsolete for a while, and Yoshinori Sato brought
it back in a much more modern form in 2015. Looking at the git history
since the reinstantiation, it's clear that almost all commits in the tree
are build fixes or cross-architecture cleanups:
$ git log --no-merges --format=%an v4.5.. arch/h8300/ | sort | uniq
-c | sort -rn | head -n 12
25 Masahiro Yamada
18 Christoph Hellwig
14 Mike Rapoport
9 Arnd Bergmann
8 Mark Rutland
7 Peter Zijlstra
6 Kees Cook
6 Ingo Molnar
6 Al Viro
5 Randy Dunlap
4 Yury Norov
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Add Krzysztof Kozlowski as co-maintainer for DT bindings providing
much needed help.
- DT schema validation now takes DTB files as input rather than
intermediate YAML files. This decouples the validation from the
source level syntax information. There's a bunch of schema fixes as a
result of switching to DTB based validation which exposed some errors
and incomplete schemas and examples.
- Kbuild improvements to explicitly warn users running 'make
dt_binding_check' on missing yamllint
- Expand DT_SCHEMA_FILES kbuild variable to take just a partial
filename or path instead of the full path to 1 file.
- Convert various bindings to schema format: mscc,vsc7514-switch,
multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS
bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel
SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display
subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma,
msm/mdp4, rda,8810pl-uart
- New schemas for u-boot environment variable partition, TI clksel
- New compatible strings for Renesas RZ/V2L SoC
- Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated
HiSilicon
- Add/fix schemas for QEMU Arm 'virt' machine
- Drop unused of_alias_get_alias_list() function
- Add a script to check DT unittest EXPECT message output. Pass
messages also now print by default at PR_INFO level to help test
automation.
* tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits)
dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable
dt-bindings: nvmem: add U-Boot environment variables binding
dt-bindings: ufs: qcom: Add SM6350 compatible string
dt-bindings: dmaengine: sifive,fu540-c000: include generic schema
dt-bindings: gpio: pca95xx: drop useless consumer example
Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs"
dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent'
dt-bindings: gnss: Add two more chips
dt-bindings: gnss: Rewrite sirfstar binding in YAML
dt-bindings: gnss: Modify u-blox to use common bindings
dt-bindings: gnss: Rewrite common bindings in YAML
dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible
dt-bindings: ata: ahci-platform: Add power-domains property
dt-bindings: ata: ahci-platform: Convert DT bindings to yaml
dt-bindings: kbuild: Use DTB files for validation
dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate
dt-bindings: Add QEMU virt machine compatible
dt-bindings: arm: Convert QEMU fw-cfg to DT schema
dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list
dt-bindings: i2c: convert i2c-at91 to json-schema
...
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.18, part two
1. TI: Two fixes for TI EMIF driver for quite old error path issues (so
for unlikely scenarios).
2. Renesas: Document RZ/V2L SoC in bindings.
* tag 'memory-controller-drv-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC
memory: emif: check the pointer temp in get_device_details()
memory: emif: Add check for setup_interrupts
Link: https://lore.kernel.org/r/20220307082552.55719-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Document RZ/V2L RPC-IF bindings. RZ/V2L RPC-IF is identical to one found
on the RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-rpc-if" will be used as a fallback.
While at it, drop the comment "# RZ/G2L family" for "renesas,rzg2l-rpc-if"
compatible string as this will avoid changing the line for every new SoC
addition.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220301123527.15950-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.18 - Mediatek SoC
1. Several updates in the MTK SMI bindings.
2. Add support for MT8186 MTK SMI and improvements in support for MT8195.
* tag 'memory-controller-drv-mediatek-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: mtk-smi: Enable sleep ctrl safety function for MT8195
memory: mtk-smi: mt8186: Add smi support
memory: mtk-smi: Add sleep ctrl function
memory: mtk-smi: handle positive return value for clk_bulk_prepare_enable
dt-bindings: memory: mediatek: Add mt8186 support
dt-bindings: memory: mtk-smi: Correct minItems to 2 for the gals clocks
dt-bindings: memory: mtk-smi: No need mediatek,larb-id for mt8167
dt-bindings: memory: mtk-smi: Rename clock to clocks
Link: https://lore.kernel.org/r/20220228164313.52931-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Commit 3539a2c6c689 ("dt-bindings: memory: lpddr2: Add revision-id
properties") added the properties `revision-id1` and `revision-id2` to
the "jedec,lpddr2" binding. The "jedec,lpddr3" binding already had a
single array property `revision-id` for the same purpose. For
consistency between related memory types, this patch deprecates the
LPDDR2 properties and instead adds a property in the same style as for
LPDDR3 to that binding.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220224003421.3440124-2-jwerner@chromium.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Signed-off-by: Christoph Hellwig <hch@lst.de>
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The timings node maximum frequency was passed as an unit address, which
is actually a workaround. Such workaround and unit address are not
needed at all, because the device memory node (parent) can contain
multiple timing nodes without unit addresses but with suffix used for
nodenames, e.g. timings-1.
LPDDR2 bindings already use such version, so unify the LPDDR3 with them.
Suggested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-7-krzysztof.kozlowski@canonical.com
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The memory manufacturer should be described in vendor part of
compatible, so there is no need to duplicate it in a separate property.
Similarly is done in LPDDR2 bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-6-krzysztof.kozlowski@canonical.com
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According to JEDEC Standard No. 209-3 (table 3.4.1 "Mode Register
Assignment and Definition in LPDDR3 SDRAM"), the LPDDR3 supports only
16- and 32-bit IO width. Drop the unsupported others.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-5-krzysztof.kozlowski@canonical.com
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Convert the LPDDR3 memory bindings to DT schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-4-krzysztof.kozlowski@canonical.com
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Convert the LPDDR3 memory timings bindings to DT schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-3-krzysztof.kozlowski@canonical.com
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Convert the LPDDR2 memory timings bindings to DT schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-2-krzysztof.kozlowski@canonical.com
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The 'phandle-array' type is a bit ambiguous. It can be either just an
array of phandles or an array of phandles plus args. Many schemas for
phandle-array properties aren't clear in the schema which case applies
though the description usually describes it.
The array of phandles case boils down to needing:
items:
maxItems: 1
The phandle plus args cases should typically take this form:
items:
- items:
- description: A phandle
- description: 1st arg cell
- description: 2nd arg cell
With this change, some examples need updating so that the bracketing of
property values matches the schema.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Georgi Djakov <djakov@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
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Convert the txt binding to yaml format and add description. Drop the
"simple-bus" compatible string from the example and not allowed by the
binding any more. This will help to enforce the correct probe order
between parent device and child devices, but will require the ifc driver
to probe the child devices to work properly.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211116211846.16335-2-leoyang.li@nxp.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Add mt8186 smi support in the bindings.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220113111057.29918-5-yong.wu@mediatek.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Mute the warning from "make dtbs_check":
larb@14017000: clock-names: ['apb', 'smi'] is too short
arch/arm64/boot/dts/mediatek/mt8183-evb.dt.yaml
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dt.yaml
...
larb@16010000: clock-names: ['apb', 'smi'] is too short
arch/arm64/boot/dts/mediatek/mt8183-evb.dt.yaml
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dt.yaml
larb@17010000: clock-names: ['apb', 'smi'] is too short
arch/arm64/boot/dts/mediatek/mt8183-evb.dt.yaml
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dt.yaml
If a platform's larb supports gals, there will be some larbs have one
more "gals" clock while the others still only need "apb"/"smi" clocks,
then the minItems for clocks and clock-names are 2.
Fixes: 27bb0e42855a ("dt-bindings: memory: mediatek: Convert SMI to DT schema")
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220113111057.29918-4-yong.wu@mediatek.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Mute the warning from "make dtbs_check":
larb@14016000: 'mediatek,larb-id' is a required property
arch/arm64/boot/dts/mediatek/mt8167-pumpkin.dt.yaml
larb@15001000: 'mediatek,larb-id' is a required property
arch/arm64/boot/dts/mediatek/mt8167-pumpkin.dt.yaml
larb@16010000: 'mediatek,larb-id' is a required property
arch/arm64/boot/dts/mediatek/mt8167-pumpkin.dt.yaml
As the description of mediatek,larb-id, the property is only
required when the larbid is not consecutive from its IOMMU point of view.
Also, from the description of mediatek,larbs in
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml, all the larbs
must sort by the larb index.
In mt8167, there is only one IOMMU HW and three larbs. The drivers already
know its larb index from the mediatek,larbs property of IOMMU, thus no
need this property.
Fixes: 27bb0e42855a ("dt-bindings: memory: mediatek: Convert SMI to DT schema")
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220113111057.29918-3-yong.wu@mediatek.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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The property "clock" should be rename to "clocks", and delete the "items",
the minItems/maxItems should not be put under "items".
Fixes: 27bb0e42855a ("dt-bindings: memory: mediatek: Convert SMI to DT schema")
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220113111057.29918-2-yong.wu@mediatek.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- DT schema conversions for Samsung clocks, RNG bindings, Qcom
Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl,
Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb
- DT schema conversions for Broadcom platforms: interrupt
controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux,
iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON,
SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB
arbiter, and SATA
- Add binding schemas for Tegra210 EMC table, TI DC-DC converters,
- Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues
- More fixes due to 'unevaluatedProperties' enabling
- Data type fixes and clean-ups of binding examples found in
preparation to move to validating DTB files directly (instead of
intermediate YAML representation.
- Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus
- Add various new compatible strings
DT core:
- Silence a warning for overlapping reserved memory regions
- Reimplement unittest overlay tracking
- Fix stack frame size warning in unittest
- Clean-ups of early FDT scanning functions
- Fix handling of "linux,usable-memory-range" on EFI booted systems
- Add support for 'fail' status on CPU nodes
- Improve error message in of_phandle_iterator_next()
- kbuild: Disable duplicate unit-address warnings for disabled nodes"
* tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (114 commits)
dt-bindings: net: mdio: Drop resets/reset-names child properties
dt-bindings: clock: samsung: convert S5Pv210 to dtschema
dt-bindings: clock: samsung: convert Exynos5410 to dtschema
dt-bindings: clock: samsung: convert Exynos5260 to dtschema
dt-bindings: clock: samsung: extend Exynos7 bindings with UFS
dt-bindings: clock: samsung: convert Exynos7 to dtschema
dt-bindings: clock: samsung: convert Exynos5433 to dtschema
dt-bindings: i2c: maxim,max96712: Add bindings for Maxim Integrated MAX96712
dt-bindings: iio: adi,ltc2983: Fix 64-bit property sizes
dt-bindings: power: maxim,max17040: Fix incorrect type for 'maxim,rcomp'
dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example
dt-bindings: iio/magnetometer: yamaha,yas530: Fix invalid 'interrupts' in example
dt-bindings: clock: imx5: Drop clock consumer node from example
dt-bindings: Drop required 'interrupt-parent'
dt-bindings: net: ti,dp83869: Drop value on boolean 'ti,max-output-impedance'
dt-bindings: net: wireless: mt76: Fix 8-bit property sizes
dt-bindings: PCI: snps,dw-pcie-ep: Drop conflicting 'max-functions' schema
dt-bindings: i2c: st,stm32-i2c: Make each example a separate entry
dt-bindings: net: stm32-dwmac: Make each example a separate entry
dt-bindings: net: Cleanup MDIO node schemas
...
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|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal:
"MTD core changes:
- mtdchar: Prevent unbounded allocation in MEMWRITE ioctl
- gen_probe: Use bitmap_zalloc() when applicable
- Introduce an expert mode for forensics and debugging purposes
- Clear out unregistered devices a bit more
- Provide unique name for nvmem device
- Remove unused header file <linux/mtd/latch-addr-flash.h>
- Fixed breaking list in __mtd_del_partition.
MTD device changes:
- Warn about failure to unregister mtd device in sst25l, mchp48l640,
mchp23k256, and dataflash drivers.
Raw NAND core changes:
- Export nand_read_page_hwecc_oob_first()
GPMC memory controller for OMAP2 NAND controller changes:
- Add support for AM64 SoC and allow build on K3 platforms
- Use a compatible match table when checking for NAND controller
- Use platform_get_irq() to get the interrupt
Raw NAND controller changes:
- OMAP2 NAND controller:
- Document the missing 'rb-gpios' DT property
- Drop unused variable
- Fix force_8bit flag behaviour for DMA mode
- Move to exec_op interface
- Use platform_get_irq() to get the interrupt
- Renesas:
- Add new NAND controller driver with its bindings and MAINTAINERS entry
- Onenand:
- Remove redundant variable ooblen
- MPC5121:
- Remove unused variable in ads5121_select_chip()
- GPMI:
- Add ERR007117 protection for nfc_apply_timings
- Remove explicit default gpmi clock setting for i.MX6
- Use platform_get_irq_byname() to get the interrupt
- Remove unneeded variable
- Ingenic:
- JZ4740 needs 'oob_first' read page function
- Davinci:
- Rewrite function description
- Avoid duplicated page read
- Don't calculate ECC when reading page
SPI NOR core changes:
- Add Pratyush as SPI NOR co-maintainer.
- Flash parameters initialization was done in a spaghetti way. Clean
flash parameters initialization.
- Rework the flash_info flags and clarify where one should be used.
- Initialize all flash parameters based on JESD216 SFDP where
possible. Flash parameters and settings that are SFDP discoverable
should not be duplicated via flash_info flags at flash declaration.
- Remove debugfs entries that duplicate sysfs entries.
SPI NOR manufacturer driver changes:
- Use late_init() hook in various drivers to make it clear that those
flash parameters are either not declared in the JESD216 SFDP
standard, or the SFDP tables which define those flash parameters
are not defined by the flash.
- Fix mtd size for s3an flashes.
- Write 2 bytes when disabling Octal DTR mode: 1 byte long
transactions are not allowed in 8D-8D-8D mode.
Hyperbus changes:
- Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on
module remove and for missing check for error value in probe"
* tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits)
mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries
mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode
mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode
mtd: spi-nor: core: use 2 data bytes for template ops
mtd: spi-nor: Constify part specific fixup hooks
mtd: spi-nor: core: Remove reference to spi-nor.c
mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt
mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt
mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3
memory: omap-gpmc: Use a compatible match table when checking for NAND controller
memory: omap-gpmc: Add support for GPMC on AM64 SoC
dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64
memory: omap-gpmc: Use platform_get_irq() to get the interrupt
MAINTAINERS: Add an entry for Renesas NAND controller
mtd: rawnand: renesas: Add new NAND controller driver
dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 & RZ/N1 NAND controller
mtd: rawnand: gpmi: remove unneeded variable
mtd: rawnand: omap2: drop unused variable
mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode
mtd: rawnand: omap2: Add compatible for AM64 SoC
...
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git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
- Add support for version 3 of the Synopsys DDR controller to
synopsys_edac
- Add support for DRR5 and new models 0x10-0x1f and 0x50-0x5f of AMD
family 0x19 CPUs to amd64_edac
- The usual set of fixes and cleanups
* tag 'edac_updates_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/amd64: Add support for family 19h, models 50h-5fh
EDAC/sb_edac: Remove redundant initialization of variable rc
RAS/CEC: Remove a repeated 'an' in a comment
EDAC/amd64: Add support for AMD Family 19h Models 10h-1Fh and A0h-AFh
EDAC: Add RDDR5 and LRDDR5 memory types
EDAC/sifive: Fix non-kernel-doc comment
dt-bindings: memory: Add entry for version 3.80a
EDAC/synopsys: Enable the driver on Intel's N5X platform
EDAC/synopsys: Add support for version 3 of the Synopsys EDAC DDR
EDAC/synopsys: Use the quirk for version instead of ddr version
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Pull ARM SoC devicetree updates from Arnd Bergmann:
"As usual, this is the bulk of the updates for the SoC tree, adding
more devices to existing files, addressing issues from ever improving
automated checking, and fixing minor issues.
The most interesting bits as usual are the new platforms. All the
newly supported SoCs belong into existing families this time:
- Qualcomm gets support for two newly announced platforms, both of
which can now work in production environments: the SDX65 5G modem
that can run a minimal Linux on its Cortex-A7 core, and the
Snapdragon 8 Gen 1, their latest high-end phone SoC.
- Renesas adds support for R-Car S4-8, the most recent automotive
Server/Communication SoC.
- TI adds support for J721s2, a new automotive SoC in the K3 family.
- Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
generation following their popular MT76xx series. Only basic
support is added for now.
- NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
series.
- TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
have supported for a long time.
New boards with the existing SoCs include
- Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
- AT91/SAMA5 based evaluation board
- NXP gains twenty new development and industrial boards for their
i.MX and Layerscape SoCs
- Intel IXP4xx now supports the final two machines in device tree
that were previously only supported in old style board files.
- Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
MT8183 is used in the Acer Chromebook 314.
- Qualcomm gains support for the reference machines using the two new
SoCs, plus a number of Chromebook variants and phones based on the
Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
devices and the Microsoft Surface Duo 2.
- ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
- Tegra now boots various older Android devices based on 32-bit chips
out of the box, including a number of ASUS Transformer tablets.
There is also a new Jetson AGX Orin developer kit.
- Apple support adds the missing device trees for all the remaining
M1 Macbook and iMac variants, though not yet the M1 Pro/Max
versions.
- Allwinner now supports another version of the Tanix TX6 set-top box
based on the H6 SoC.
- Broadcom gains support for the Netgear RAXE500 Wireless router
based on BCM4908"
* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
arm64: dts: qcom: sm8450-qrd: Enable USB nodes
arm64: dts: qcom: sm8450: Add usb nodes
ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
ARM: dts: aspeed: add LCLK setting into LPC IBT node
ARM: dts: aspeed: p10: Add TPM device
ARM: dts: aspeed: p10: Enable USB host ports
ARM: dts: aspeed: Add TYAN S8036 BMC machine
ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
ARM: dts: aspeed: Adding Facebook Bletchley BMC
ARM: dts: aspeed: g220a: Enable secondary flash
ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
ARM: dts: aspeed: Add secure boot controller node
dt-bindings: aspeed: Add Secure Boot Controller bindings
ARM: dts: Remove "spidev" nodes
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
...
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AM64 SoC contains the GPMC module. Add compatible for it.
Newer SoCs don't necessarily map GPMC data region at the same place
as legacy SoCs. Add reg-names "data", to provide this information to
the device driver.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211221131757.2030-2-rogerq@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The #interconnect-cells properties are required to hook up memory
clients to the MC/EMC in interconnects properties. Add a description for
these properties.
For the nested EMC controller, the list of required properties was
missing. Add it so that the validation can be more strict.
Also, allow multiple reg entries required by Tegra194 and later.
While at it, also remove the dummy BPMP node from the example because it
is incomplete and fails validation. It's also not necessary for this
file and the BPMP DT schema already has a full example.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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With 'unevaluatedProperties' support implemented, the TI GPMC example
has a warning:
Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.example.dt.yaml: memory-controller@6e000000: onenand@0,0: Unevaluated properties are not allowed ('compatible', '#address-cells', '#size-cells', 'partition@0', 'partition@100000' were unexpected)
The child node definition for GPMC is not a complete binding, so specifying
'unevaluatedProperties: false' for it is not correct and should be
dropped.
Fixup the unnecessary 'allOf' while we're here.
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211206174215.2297796-1-robh@kernel.org
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Add an entry for version 3.80a of the Synopsys DDR controller.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/20211012190709.1504152-4-dinguyen@kernel.org
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For completeness add optional interrupts property.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20211025205631.21151-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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SPI Multi I/O Bus Controller on RZ/G2L SoC is almost identical to
the RPC-IF interface found on R-Car Gen3 SoC's.
This patch adds a new compatible string to identify the RZ/G2L family
so that the timing values on RZ/G2L can be adjusted.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20211025205631.21151-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Not all @st.com email address are concerned, only people who have
a specific @foss.st.com email will see their entry updated.
For some people, who left the company, remove their email.
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Cc: Fabien Dessenne <fabien.dessenne@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Lionel Debieve <lionel.debieve@foss.st.com>
Cc: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Cc: Ludovic Barre <ludovic.barre@foss.st.com>
Cc: Christophe Kerello <christophe.kerello@foss.st.com>
Cc: pascal Paillet <p.paillet@foss.st.com>
Cc: Erwan Le Ray <erwan.leray@foss.st.com>
Cc: Philippe CORNU <philippe.cornu@foss.st.com>
Cc: Yannick Fertre <yannick.fertre@foss.st.com>
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: Olivier Moysan <olivier.moysan@foss.st.com>
Cc: Hugues Fruchet <hugues.fruchet@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com
Signed-off-by: Rob Herring <robh@kernel.org>
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Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are all the driver updates for SoC specific drivers. There are a
couple of subsystems with individual maintainers picking up their
patches here:
- The reset controller subsystem add support for a few new SoC
variants to existing drivers, along with other minor improvements
- The OP-TEE subsystem gets a driver for the ARM FF-A transport
- The memory controller subsystem has improvements for Tegra,
Mediatek, Renesas, Freescale and Broadcom specific drivers.
- The tegra cpuidle driver changes get merged through this tree this
time. There are only minor changes, but they depend on other tegra
driver updates here.
- The ep93xx platform finally moves to using the drivers/clk/
subsystem, moving the code out of arch/arm in the process. This
depends on a small sound driver change that is included here as
well.
- There are some minor updates for Qualcomm and Tegra specific
firmware drivers.
The other driver updates are mainly for drivers/soc, which contains a
mixture of vendor specific drivers that don't really fit elsewhere:
- Mediatek drivers gain more support for MT8192, with new support for
hw-mutex and mmsys routing, plus support for reset lines in the
mmsys driver.
- Qualcomm gains a new "sleep stats" driver, and support for the
"Generic Packet Router" in the APR driver.
- There is a new user interface for routing the UARTS on ASpeed BMCs,
something that apparently nobody else has needed so far.
- More drivers can now be built as loadable modules, in particular
for Broadcom and Samsung platforms.
- Lots of improvements to the TI sysc driver for better
suspend/resume support"
Finally, there are lots of minor cleanups and new device IDs for
amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
layerscape, allwinner, broadcom, and omap"
* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
optee: Fix spelling mistake "reclain" -> "reclaim"
Revert "firmware: qcom: scm: Add support for MC boot address API"
qcom: spm: allow compile-testing
firmware: arm_ffa: Remove unused 'compat_version' variable
soc: samsung: exynos-chipid: add exynosautov9 SoC support
firmware: qcom: scm: Don't break compile test on non-ARM platforms
soc: qcom: smp2p: Add of_node_put() before goto
soc: qcom: apr: Add of_node_put() before return
soc: qcom: qcom_stats: Fix client votes offset
soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
firmware: qcom: scm: Add support for MC boot address API
soc: qcom: spm: Add 8916 SPM register data
dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
soc: qcom: socinfo: Add PM8150C and SMB2351 models
firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
soc: aspeed: Add UART routing support
soc: fsl: dpio: rename the enqueue descriptor variable
soc: fsl: dpio: use an explicit NULL instead of 0
...
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Pull ARM SoC DT updates from Arnd Bergmann:
"This is a rather large update for the ARM devicetree files, after a
few quieter releases, with 775 total commits and 47 branches pulled
into this one.
There are 5 new SoC types plus some minor variations, and a total of
60 new machines, so I'm limiting the summary to the main noteworthy
items:
- Apple M1 gain support for PCI and pinctrl, getting a bit closer to
a usable system out of the box.
- Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as
SM7225, 11 new smartphones, and three additional Chromebooks, and
improvements all over the place.
- Samsung gains support for ExynosAutov9, an automotive version of
their smartphone SoC, but otherwise no major changes.
- Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number
of improvements for the recently added SAMA7 family. The LAN966 SoC
that was added in the platform code does not have dts files yet.
Two board files are added for the older at91sam9g20 SoC
- Aspeed supports two additional server boards using their AST2600 as
BMC, and improves support for qemu models
- Rockchip RK3566/RK3688 gets added, along with six new development
boards using RK3328/RK3399/RK3566, and one Chromebook tablet.
- Two NAS boxes are added using the ARMv4 based Gemini platform
- One new board is added to the Intel Arria SoC FPGA family
- Marvell adds one network switch based on Armada 381 and the new
MOCHAbin 7040 development board
- NXP adds support for the S32G2 automotive SoC, two imx6 based ebook
readers, and three additional development boards, which is notably
less than their usual additions, but they also gain improvements to
their many existing boards
- STmicroelectronics adds their stm32mp13 SoC family along with a
reference board
- Renesas adds new versions of their R-Car Gen3 SoCs and many updates
for their older generations
- Broadcom adds support for a number of Cisco Meraki wireless
controllers, along with two new boards and other updates for
BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards
- Mediatek improves support for the MT81xx SoCs used in Chromebooks
as well as the MT76xx networking SoCs
- NVIDIA adds a number of cleanups and additional support for more
hardware on the already supported machines
- TI K3 adds support for three new boards along with cleanups
- Toshiba adds one board for the Visconti family
- Xilinx adds five new ZynqMP based machines
- Amlogic support is added for the Radxa Zero and two Jethub home
automation controllers, along with changes to other machines
- Rob Herring continues his work on fixing dtc warnings all over the
tree.
- Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
Ux500, Unisoc"
* tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits)
arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
arm64: dts: apple: t8103: Add root port interrupt routing
arm64: dts: apple: t8103: Add PCIe DARTs
arm64: apple: Add PCIe node
arm64: apple: Add pinctrl nodes
ARM: dts: arm: Update ICST clock nodes 'reg' and node names
ARM: dts: arm: Update register-bit-led nodes 'reg' and node names
arm64: dts: exynos: add chipid node for exynosautov9 SoC
ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node
Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
arm64: dts: qcom: sm8350: Add CPU topology and idle-states
arm64: dts: qcom: Drop unneeded extra device-specific includes
arm64: dts: qcom: msm8916: Drop standalone smem node
arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
arm64: dts: qcom: msm8916-asus-z00l: Add sensors
arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
...
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.16, part two
1. Convert LPDDR2 bindings to dtschema and extend them with new
properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
devicetree.
* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: tegra20-emc: Add runtime dependency on devfreq governor module
memory: tegra20-emc: Support matching timings by LPDDR2 configuration
memory: Add LPDDR2-info helpers
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
dt-bindings: Add vendor prefix for Elpida Memory
dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
dt-bindings: memory: lpddr2: Add revision-id properties
dt-bindings: memory: lpddr2: Convert to schema
dt-bindings: Relocate DDR bindings
Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for
the memory chip identification and the identity information should be read
out from LPDDR2 chip in this case. Document new sub-node containing generic
LPDDR2 properties that will be used for the memory chip identification if
RAM code isn't available. The identification is done by reading out memory
configuration values from generic LPDDR2 mode registers of SDRAM chip and
comparing them with the values of device-tree 'lpddr2' sub-node.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-8-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Elpida B8132B2PB-6D-F memory chip is used by ASUS Transformer TF101
tablet, add compatible for it. We need to specify this compatible it
for a device-tree node containing corresponding memory timings in order
to allow software to match the timings with the detected hardware.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Add optional revision-id standard LPDDR2 properties which will help to
identify memory chip.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-4-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-*
compatibles since they were never used by device-trees and by the code.
I also changed "Elpida" compatible prefix to lowercase "elpida".
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-3-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Move DDR bindings to memory-controllers directory to make them more
discoverable.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211006224659.21434-2-digetx@gmail.com
[krzysztof: Correct path in lpddr3.txt and samsung,exynos5422-dmc.yaml]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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Add binding documentation for Mediatek's SDRAM memory controller present on
MT7621 SoC.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20211002060910.30613-1-sergio.paracuellos@gmail.com
Signed-off-by: Rob Herring <robh@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.16
1. Renesas RPC: fix unaligned bus access and QSPI data transfers in
manual modes.
2. Renesas RPC: select RESET_CONTROLLER as it is necessary for
operation.
3. FSL IFC: fix error paths.
4. Broadcom: allow building as module.
* tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe
memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER
memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module
memory: samsung: describe drivers in KConfig
memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash
memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode
dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF
Link: https://lore.kernel.org/r/20211010175836.13302-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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