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Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
compatible string for SG2044 SoC.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250413223507.46480-3-inochiama@gmail.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Convert the Conexant Digicolor SoCs Timer binding to DT schema format.
It's a straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/20250506022232.2587186-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Convert the C-SKY gx6605s timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250506022224.2586860-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Convert the C-SKY Multi-processor timer binding to DT schema format.
It's a straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Guo Ren <guoren@kernel.org>
Link: https://lore.kernel.org/r/20250506022228.2587029-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Convert the Marvell Orion Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250506022305.2588431-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Convert fsl,gtm.txt to YAML so that device trees using a Freescale
General-purpose Timers Module can be properly validated.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Link: https://lore.kernel.org/r/20250412-gtm-yaml-v2-1-e4d2292ffefc@posteo.net
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Add the System Timer Module description found on the NXP s32 platform
and the compatible for the s32g2 variant.
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
Cc: Thomas Fossati <thomas.fossati@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250417151623.121109-2-daniel.lezcano@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Back-merge of 6.15 devel branch for further development of HD-audio
stuff.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Sync up with mainline to bring in xpad controller changes.
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https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next
Mediatek DRM Next - 20250515
1. Prepare for support MT8195/88 HDMIv2 and DDCv2
2. DPI: Cleanups and add support for more formats
3. Cleanups and sanitization
4. Replace custom compare_dev with component_compare_of
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20250514233647.15907-1-chunkuang.hu@kernel.org
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Cross-merge networking fixes after downstream PR (net-6.15-rc7).
Conflicts:
tools/testing/selftests/drivers/net/hw/ncdevmem.c
97c4e094a4b2 ("tests/ncdevmem: Fix double-free of queue array")
2f1a805f32ba ("selftests: ncdevmem: Implement devmem TCP TX")
https://lore.kernel.org/20250514122900.1e77d62d@canb.auug.org.au
Adjacent changes:
net/core/devmem.c
net/core/devmem.h
0afc44d8cdf6 ("net: devmem: fix kernel panic when netlink socket close after module unload")
bd61848900bf ("net: devmem: Implement TX path")
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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PP1516 are Touchscreen devices built around the PX30 SoC and companion
devices to PX30-Cobra, again with multiple display options.
The devices feature an EMMC, OTG port and a 720x1280 display with a
touchscreen and camera
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-6-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Cobra are Touchscreen devices built around the PX30 SoC using
a variety of display options.
The devices feature an EMMC, network port, usb host + OTG ports and
a 720x1280 display with a touchscreen.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Cypress HX3 hubs use different default PID value depending
on the variant. Update compatibles list.
Becasuse all hub variants use the same driver data, allow the
dt node to have two compatibles: leftmost which matches the HW
exactly, and the second one as fallback.
Fixes: 1eca51f58a10 ("dt-bindings: usb: Add binding for Cypress HX3 USB 3.0 family")
Cc: stable@vger.kernel.org # 6.6
Cc: stable@vger.kernel.org # Backport of the patch ("dt-bindings: usb: usb-device: relax compatible pattern to a contains") from list: https://lore.kernel.org/linux-usb/20250418-dt-binding-usb-device-compatibles-v2-1-b3029f14e800@cherry.de/
Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-2-4a76a474a010@thaumatec.com
[taken with Greg's blessing]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Convert the Arasan/SPEAr Compact Flash Controller to DT schema format.
The "clock-frequency" property isn't actually used. Add a single
"clocks" entry as the Linux driver supports a single clock though the
platform still doesn't have clocks in DT.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
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Convert the Marvell Orion SATA Controller to DT schema format.
The clocks and clock-names properties were missing. The names for
phy-names were incorrect. The maximum "nr-ports" was determined from the
Linux driver.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
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Convert the Cavium Compact Flash Controller to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
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Convert the APM X-Gene AHCI SATA Controller to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
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Convert the ST AHCI SATA Controller to DT schema format.
The phy-names changes from "ahci_phy" to "sata-phy" with the inclusion
of ahci-common.yaml. That's an ABI change, but the Linux driver at least
ignores the names. The binding uses "ports-implemented" property, so
including ahci-common.yaml is required.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
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For Tegra264 device there is one clock, two resets and no power-domain.
Add the Tegra264 compatible and necessary logic to the binding doc to
determine appropriate clocks, resets and power-domain properties based
on the compatible string.
Signed-off-by: Sheetal <sheetal@nvidia.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250512064258.1028331-3-sheetal@nvidia.com
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- Tegra194 and Tegra234 HDA is not compatible with Tegra30, hence update
them as standalone compatibles. Also, add necessary logic to the binding
doc as HDA clocks and resets for Tegra194 and Tegra234 are different from
Tegra30. This fixes below dtbs_check errors:
- compatible: 'oneOf' conditional failed, one must be fixed:
['nvidia,tegra194-hda'] is too short
'nvidia,tegra30-hda' was expected
'nvidia,tegra132-hda' was expected
- compatible: 'oneOf' conditional failed, one must be fixed:
['nvidia,tegra234-hda'] is too short
'nvidia,tegra30-hda' was expected
'nvidia,tegra132-hda' was expected
- hda@3510000: clock-names:1: 'hda2hdmi' was expected
- hda@3510000: reset-names:1: 'hda2hdmi' was expected
Signed-off-by: Sheetal <sheetal@nvidia.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250512064258.1028331-2-sheetal@nvidia.com
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Merge series from Zhang Yi <zhangyi@everest-semi.com>:
The driver is for codec ES8389 of everest-semi.
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Add the 'iommus' property to the Tegra QSPI device tree binding.
The property is needed for Tegra234 when using the internal DMA
controller, and is not supported on other Tegra chips, as DMA is
handled by an external controller.
Signed-off-by: Vishwaroop A <va@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20250513200043.608292-1-va@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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According to the bindings, the MDIO subnode should be called "mdio".
Update the example to match this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/308d72c2fe8e575e6e137b99743329c2d53eceea.1747121550.git.geert+renesas@glider.be
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:". Add missing top-level constraints
for clocks and clock-names.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250501173411.134130-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:". Add missing top-level constraints
for clocks and clock-names.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250501173411.134130-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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Add a compatible for the HP EliteBook Ultra G1q 14 inch Notebook AI PC.
The laptop is based on the Snapdragon X Elite (x1e80100) SoC.
PDF link: http://www8.hp.com/h20195/v2/GetDocument.aspx?docname=c08996392
Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250429144957.2088284-3-juerg.haefliger@canonical.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Document the qcom,tcsr-ipq5018 compatible.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250512-ipq5018-syscon-v1-1-eb1ad2414c3c@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add a new compatible string for ax45mp-cache on QiLai SoC.
Also, add allOf constraints to enforce specific cache-sets and cache-size
values for qilai-ax45mp-cache.
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add optional gpio-ranges property.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250429-tegra186-pinctrl-v1-2-722c7c42394e@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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Rewrite the textual description for the WonderMedia SDMMC controller
as YAML schema, and switch the filename to follow the compatible
string.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250423-vt8500-sdmmc-binding-v2-1-ea4f17fd0638@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Add compatible for the SDHCI block found in SM7150.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-11-bf9a9081631d@jiaxyga.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Add compatible string fsl,ls1021a-esdhc for LS1021a SoC.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250417151300.3570021-1-Frank.Li@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Add a compatible for the MediaTek Dimensity 1200 (MT6893) SoC.
All of the MMC/SD controllers in this chip are compatible with
the ones found in MT8183, but do also make use of an optional
crypto clock when enabling HW disk encryption.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250416120245.147951-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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The sdhci IP of SG2044 is similar to it of SG2042. They
share the same clock and controller configuration.
Add compatible string for SG2044.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250413223507.46480-8-inochiama@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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This instance has a wakeup irq defined. It is currently not used by the
driver.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250405173631.13564-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Add SDHI bindings for the Renesas RZ/V2N (a.k.a R9A09G056) SoC. Use
`renesas,sdhi-r9a09g057` as a fallback since the SD/MMC block on
RZ/V2N is identical to the one on RZ/V2H(P), allowing reuse of the
existing driver without modifications.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250326143945.82142-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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The "axi" clock is optional on at least the "marvell,armada-ap806-sdhci"
variant. Not sure what's correct here, so just drop the constraint.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250320-dt-marvell-mmc-v1-3-e51002ea0238@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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The Marvell xenon-sdhci block is an SDHCI and can use properties from
sdhci-common.yaml, so change the reference.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250320-dt-marvell-mmc-v1-2-e51002ea0238@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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The Marvell xenon-sdhci block can be cache-coherent and needs the
"dma-coherent" property. It can also be behind an IOMMU and needs the
"iommus" property.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250320-dt-marvell-mmc-v1-1-e51002ea0238@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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The properties in sdhci.txt are documented in sdhci-common.yaml, too.
Remove the txt binding.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250320211922.1135669-1-robh@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Document the Renesas RZ/V2H(P) family of SoCs DMAC block.
The Renesas RZ/V2H(P) DMAC is very similar to the one found on the
Renesas RZ/G2L family of SoCs, but there are some differences:
* It only uses one register area
* It only uses one clock
* It only uses one reset
* Instead of using MID/IRD it uses REQ No
* It is connected to the Interrupt Control Unit (ICU)
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250423143422.3747702-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Make sure we don't allow for the clocks, clock-names, resets,
reset-names. and power-domains properties for the Renesas
RZ/A1H SoC because its DMAC doesn't have clocks, resets,
and power domains.
Fixes: 209efec19c4c ("dt-bindings: dma: rz-dmac: Document RZ/A1H SoC")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250423143422.3747702-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Add Tegra264 ADMA support to the device tree bindings documentation.
The Tegra264 ADMA hardware supports 64 DMA channels and requires
specific register configurations.
Signed-off-by: Sheetal <sheetal@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250512050010.1025259-2-sheetal@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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"mediatek,clk-provider" property is a string, not an string array, thus
"items" is not really correct.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250514105702.28622-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
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Some of the regulators on the MT6357 PMIC currently reference the
fixed-regulator dt-binding, which enforces the presence of a
regulator-fixed compatible. However since all regulators on the MT6357
PMIC are handled by a single mt6357-regulator driver, probed through
MFD, the compatibles don't serve any purpose. In fact they cause
failures in the DT kselftest since they aren't probed by the fixed
regulator driver as would be expected. Furthermore this is the only
dt-binding in this family like this: mt6359-regulator and
mt6358-regulator don't require those compatibles.
Commit d77e89b7b03f ("arm64: dts: mediatek: mt6357: Drop regulator-fixed
compatibles") removed the compatibles from Devicetree, but missed
updating the binding, which still requires them, introducing dt-binding
errors. Remove the compatible requirement by referencing the plain
regulator dt-binding instead to fix the dt-binding errors.
Fixes: d77e89b7b03f ("arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://patch.msgid.link/20250514-mt6357-regulator-fixed-compatibles-removal-bindings-v1-1-2421e9cc6cc7@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add compatible for the USB2 phy in the Rockchip RK3562 SoC.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250415050005.52773-1-kever.yang@rock-chips.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Add compatible for the USB2 phy in the Rockchip RK3036 SoC.
Apart from some bits that got swapped around in the phy registers, the
block is nearly the same as the one on the rk3128.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250503201512.991277-2-heiko@sntech.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Document USB2.0 phy bindings for RZ/V2H(P) ("R9A09gG57") SoC.
RZ/V2H(P) USB2.0 phy is similar to one found on the RZ/G2L SoC, but it
needs additional configuration to be done as compared RZ/G2L USB2.0 phy.
To handle this difference a SoC specific compat string is added for
RZ/V2H(P) SoC.
Like the RZ/G2L SoC, the RZ/V2H(P) USB2.0 PHY requires the `resets`
property and has two clocks.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250414145729.343133-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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The RZ/G2L family requires two clocks for USB2 PHY, which are already
defined in the DTSI files. Add a constraint in the DT binding document
to ensure validation with `dtbs_check`.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250414145729.343133-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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