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2025-05-13dt-bindings: interrupt-controller: Convert ti,cp-intc to DT schemaRob Herring (Arm)
Convert the TI Common Platform interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20250505144903.1293558-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert aspeed,ast2xxx-scu-ic to DT schemaRob Herring (Arm)
Convert the Aspeed SCU interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144613.1287360-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert aspeed,ast2400-i2c-ic to DT schemaRob Herring (Arm)
Convert the Aspeed I2C interrupt controller binding to schema format. Drop the "#address-cells" and "#size-cells" as they are unused and incorrect anyways. Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20250505144605.1287121-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert faraday,ftintc010 to DT schemaRob Herring (Arm)
Convert the Faraday FTINTC010 interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250505144654.1288979-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert arm,versatile-fpga-irq to DT schemaRob Herring (Arm)
Convert the Arm Versatile FPGA interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250505144558.1286889-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert marvell,orion-bridge-intc to DT ↵Rob Herring (Arm)
schema Convert the Marvell Orion bridge interrupt controller binding to schema format. marvell,orion-intc is already covered by mrvl,intc.yaml schema, so it can be dropped. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250505144743.1290672-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert brcm,bcm2835-armctrl-ic to DT schemaRob Herring (Arm)
Convert the Broadcom BCM2835 ARMCTRL interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144618.1287539-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: interrupt-controller: Convert cnxt,cx92755-ic to DT schemaRob Herring (Arm)
Convert the Conexant Digicolor interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Acked-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20250505144644.1288617-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: Move altr,msi-controller to interrupt-controller directoryRob Herring (Arm)
While altr,msi-controller is used with PCI, it is not a PCI host bridge and is just an MSI provider. Move it with other MSI providers in the 'interrupt-controller' directory. Acked-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250507154253.1593870-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-13dt-bindings: display: msm: correct example in SM8350 MDSS schemaDmitry Baryshkov
Fix the interconnects in the example to follow the schema changes. Fixes: 60b8d3a2365a ("dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path") Reported-by: Rob Herring <robh@kernel.org> Closes: http://lore.kernel.org/r/CAL_JsqKr8Xd8uxFzE0YJTyD+V6N++VV8SX-GB5Xt0_BKkeoGUQ@mail.gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/651775/ Link: https://lore.kernel.org/r/20250505-sm8350-fix-example-v1-1-36d5d9ccba66@oss.qualcomm.com
2025-05-13dt-bindings: remoteproc: qcom,sm8150-pas: Add missing SC8180X compatibleKrzysztof Kozlowski
Commit 4b4ab93ddc5f ("dt-bindings: remoteproc: Consolidate SC8180X and SM8150 PAS files") moved SC8180X bindings from separate file into this one, but it forgot to add actual compatibles in top-level properties section making the entire binding un-selectable (no-op) for SC8180X PAS. Fixes: 4b4ab93ddc5f ("dt-bindings: remoteproc: Consolidate SC8180X and SM8150 PAS files") Cc: stable@vger.kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250428075243.44256-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-13dt-bindings: remoteproc: qcom,sm8350-pas: Add SC8280XPKonrad Dybcio
From the software POV, it matches the SM8350's implementation. Describe it as such, with a fallback. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> # Lenovo X13s Link: https://lore.kernel.org/r/20250503-topic-8280_slpi-v1-1-9400a35574f7@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-13dt-bindings: cache: Convert marvell,tauros2-cache to DT schemaRob Herring (Arm)
Convert the Marvell Tauros2 Cache binding to DT schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-13dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schemaRob Herring (Arm)
Convert the Marvell Feroceon/Kirkwood Cache binding to DT schema format. Use "marvell,kirkwood-cache" for the filename instead as that's only compatible used in a .dts upstream. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-13Merge tag 'ib-mfd-gpio-nvmem-v6.16' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next Immutable branch between MFD, GPIO and NVMEM due for the v6.16 merge window
2025-05-13dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300Lijuan Gao
Correct the gpio-ranges in the QCS8300 TLMM pin controller example to include the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. This allows the UFS driver to toggle it. Fixes: 5778535972e2 ("dt-bindings: pinctrl: describe qcs8300-tlmm") Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/20250506-correct_gpio_ranges-v3-2-49a7d292befa@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-13dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615Lijuan Gao
Correct the gpio-ranges in the QCS615 TLMM pin controller example to include the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. This allows the UFS driver to toggle it. Fixes: 55c487ea6084 ("dt-bindings: pinctrl: document the QCS615 Top Level Mode Multiplexer") Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/20250506-correct_gpio_ranges-v3-1-49a7d292befa@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-13dt-bindings: mfd: stm32-lptimer: Add support for stm32mp25Fabrice Gasnier
Add a new stm32mp25 compatible to stm32-lptimer dt-bindings, to support STM32MP25 SoC. Some features has been updated or added to the low-power timer: - new capture compare channels - up to two PWM channels - PWM input capture - peripheral interconnect in stm32mp25 has been updated (new triggers). - registers/bits has been added or revisited (IER access). So introduce a new compatible to handle this diversity. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250429125133.1574167-2-fabrice.gasnier@foss.st.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-05-13dt-bindings: arm: sunxi: Add Liontron H-A133L board nameAndre Przywara
The Liontron H-A133L is an industrial development board using the Allwinner A133 SoC. Add its compatible name to the list of valid board names. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250505164729.18175-3-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-13dt-bindings: vendor-prefixes: Add Liontron nameAndre Przywara
Liontron is a company based in Shenzen, China, making industrial development boards and embedded computers, mostly using Rockchip and Allwinner SoCs. Add their name to the list of vendors. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250505164729.18175-2-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-13dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandlePeter Griffin
gs101 requires access to the pmu interrupt generation register region which is exposed as a syscon. Update the exynos-pmu bindings documentation to reflect this. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-2-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentationPeter Griffin
Add bindings documentation for the Power Management Unit (PMU) interrupt generator. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250506-contrib-pg-cpu-hotplug-suspend2ram-fixes-v1-v4-1-9f64a2657316@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-13Merge 6.15-rc6 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-12dt-bindings: vertexcom-mse102x: Fix IRQ type in exampleStefan Wahren
According to the MSE102x documentation the trigger type is a high level. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250509120435.43646-2-wahrenst@gmx.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-12dt-bindings: net: renesas-gbeth: Add support for RZ/V2N (R9A09G056) SoCLad Prabhakar
Document support for the GBETH IP found on the Renesas RZ/V2N (R9A09G056) SoC. The GBETH controller on the RZ/V2N SoC is functionally identical to the one found on the RZ/V2H(P) (R9A09G057) SoC, so `renesas,rzv2h-gbeth` will be used as a fallback compatible. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20250507173551.100280-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-12dt-bindings: cache: qcom,llcc: Document SM8750 LLCC blockMelody Olvera
Add documentation for the SM8750 LLCC. Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-1-d78dca6282a5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-12dt-bindings: hwmon: Add bindings for mpq8785 driverPawel Dembicki
Add device tree bindings for Monolithic Power Systems MPQ8785, MPM82504 and MPM3695 PMBus-compliant voltage regulators. These bindings also documents the optional "mps,vout-fb-divider-ratio-permille" property. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250511035701.2607947-2-paweldembicki@gmail.com Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-05-12dt-bindings: Add SQ52206 to ina2xx devicetree bindingsWenliang Yan
Add the sq52206 compatible to the ina2xx.yaml Signed-off-by: Wenliang Yan <wenliang202407@163.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250506053741.4837-5-wenliang202407@163.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-05-12dt-bindings: display/msm: hdmi: Fix constraints on additional 'port' propertiesRob Herring (Arm)
The MSM HDMI port nodes are missing any restrictions on additional properties. The $ref should be to "/properties/port" rather than "/$defs/port-base" as there are not additional properties in the nodes to define. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/652299/ Link: https://lore.kernel.org/r/20250507215912.2748964-1-robh@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-12dt-bindings: display/msm/hdmi: drop obsolete GPIOs from schemaDmitry Baryshkov
The commit 68e674b13b17 ("drm/msm/hdmi: drop unused GPIO support") dropped support for obsolete qcom,hdmi-tx-mux-* gpios. They were not used by any of the upstream platforms. Drop them from the bindings too. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/651708/ Link: https://lore.kernel.org/r/20250505-fd-hdmi-hpd-v5-1-48541f76318c@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-05-12dt-bindings: allwinner: add H616 DE33 clock bindingRyan Walklin
The Allwinner H616 and variants have a new display engine revision (DE33). Add a clock binding for the DE33. Signed-off-by: Ryan Walklin <ryan@testtoast.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Link: https://patch.msgid.link/20250511104042.24249-7-ryan@testtoast.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-12dt-bindings: cache: add specific RZ/Five compatible to ax45mpConor Dooley
When the binding was originally written, it was assumed that all ax45mp-caches had the same properties etc. This has turned out to be incorrect, as the QiLai SoC has a different number of cache-sets. Add a specific compatible for the RZ/Five for property enforcement and in case there turns out to be additional differences between these implementations of the cache controller. Acked-by: Ben Zong-You Xie <ben717@andestech.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-05-12Merge tag 'imx-bindings-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX dt-bindings change for 6.16: - New compatibles for TQ Group boards, i.MX943 EVK, Nitrogen8M Plus ENC Carrier, phyBOARD-Nash-i.MX93 and phyCORE-i.MX8MP FPSC from PHYTEC, and Toradex SMARC iMX8MP SoM/carrier * tag 'imx-bindings-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: bindings: arm: fsl: Add PHYTEC phyBOARD-Nash-i.MX93 board dt: bindings: arm: add bindings for TQMa95xxSA dt-bindings: arm: add TQMa8XxS boards dt-bindings: arm: fsl: add i.MX943 EVK board dt-bindings: arm: add imx8mp-libra-rdk-fpsc dt-bindings: arm: add MBa91xxCA Mainboard for TQMa93xxCA/LA SOM dt-bindings: arm: fsl: add Toradex SMARC iMX8MP SoM and carrier dt-bindings: arm: fsl: Add Boundary Device Nitrogen8M Plus ENC Carrier Board Link: https://lore.kernel.org/r/20250512103858.50501-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-12dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boardsAlexey Charkov
APC Rock is a development board based on WonderMedia WM8950 SoC released around 2013. Paper is the same as Rock but lacking a VGA port and shipped with a recycled cardboard case. While at that, put myself as the maintainer, given that Tony is unavailable as of lately. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250425-apc_paper_binding-v5-1-3aef49e97332@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-11Merge tag 'input-for-v6.15-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull input fixes from Dmitry Torokhov: - Synaptics touchpad on multiple laptops (Dynabook Portege X30L-G, Dynabook Portege X30-D, TUXEDO InfinityBook Pro 14 v5, Dell Precision M3800, HP Elitebook 850 G1) switched from PS/2 to SMBus mode - a number of new controllers added to xpad driver: HORI Drum controller, PowerA Fusion Pro 4, PowerA MOGA XP-Ultra controller, 8BitDo Ultimate 2 Wireless Controller, 8BitDo Ultimate 3-mode Controller, Hyperkin DuchesS Xbox One controller - fixes to xpad driver to properly handle Mad Catz JOYTECH NEO SE Advanced and PDP Mirror's Edge Official controllers - fixes to xpad driver to properly handle "Share" button on some controllers - a fix for device initialization timing and for waking up the controller in cyttsp5 driver - a fix for hisi_powerkey driver to properly wake up from s2idle state - other assorted cleanups and fixes * tag 'input-for-v6.15-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: xpad - fix xpad_device sorting Input: xpad - add support for several more controllers Input: xpad - fix Share button on Xbox One controllers Input: xpad - fix two controller table values Input: hisi_powerkey - enable system-wakeup for s2idle Input: synaptics - enable InterTouch on Dell Precision M3800 Input: synaptics - enable InterTouch on TUXEDO InfinityBook Pro 14 v5 Input: synaptics - enable InterTouch on Dynabook Portege X30L-G Input: synaptics - enable InterTouch on Dynabook Portege X30-D Input: synaptics - enable SMBus for HP Elitebook 850 G1 Input: mtk-pmic-keys - fix possible null pointer dereference Input: xpad - add support for 8BitDo Ultimate 2 Wireless Controller Input: cyttsp5 - fix power control issue on wakeup MAINTAINERS: .mailmap: update Mattijs Korpershoek's email address dt-bindings: mediatek,mt6779-keypad: Update Mattijs' email address Input: stmpe-ts - use module alias instead of device table Input: cyttsp5 - ensure minimum reset pulse width Input: sparcspkr - avoid unannotated fall-through input/joystick: magellan: Mark __nonstring look-up table
2025-05-10dt-bindings: input: convert dlg,da7280.txt to dt-schemaNeil Armstrong
Convert the Dialog Semiconductor DA7280 Low Power High-Definition Haptic Driver bindings to dt-schema. Due to the implementation and usage in DT the array must be an uint32 array. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250306-topic-misc-da7280-convert-v4-1-2972c4e81cb5@linaro.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-05-10dt-bindings: clock: add SM6350 QCOM video clock bindingsKonrad Dybcio
Add device tree bindings for video clock controller for SM6350 SoCs. Signed-off-by: Konrad Dybcio <konradybcio@kernel.org> Co-developed-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250324-sm6350-videocc-v2-2-cc22386433f4@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-10spi: dt-bindings: nuvoton,wpcm450-fiu: Drop unrelated nodes from DTS exampleKrzysztof Kozlowski
Binding example should not contain other nodes, including other providers like syscon, because this is redundant and only adds unnecessary bloat. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250509112130.123462-4-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-10spi: dt-bindings: fsl,dspi: Fix example indentationKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250509112130.123462-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-10dt-bindings: arm: rockchip: Add rk3562 evb2 boardKever Yang
Add device tree documentation for rk3562-evb2-v10. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250509102308.761424-4-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-10dt-bindings: soc: rockchip: Add rk3562 syscon compatiblesKever Yang
Add all syscon compatibles for rk3562. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250509102308.761424-3-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-10dt-bindings: rockchip: pmu: Add rk3562 compatibleKever Yang
Add the compatible for the pmu mfd on rk3562. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250509102308.761424-2-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-10dt-bindings: PCI: Convert v3,v360epc-pci to DT schemaRob Herring (Arm)
Convert the v3,v360epc-pci binding to DT schema format. Add "clocks" which was not documented and is required. Drop "syscon" which was documented, but is not used. Drop the "v3,v360epc-pci" compatible by itself as this device is only used on the Arm Integrator/AP and not likely going to be used anywhere else at this point. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patch.msgid.link/20250505220139.2202164-1-robh@kernel.org
2025-05-09dt-bindings: gpu: mali-bifrost: Add compatible for RZ/V2N SoCLad Prabhakar
Add a compatible string for the Renesas RZ/V2N SoC variants that include a Mali-G31 GPU. These variants share the same restrictions on interrupts, clocks, and power domains as the RZ/G2L SoC, so extend the existing schema validation accordingly. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250502162540.165962-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-05-09dt-bindings: soc: qcom: qcom,rpm: add missing clock/-names propertiesDmitry Baryshkov
Qualcomm MSM8660 and IPQ0864 platforms use additional clock for the RPM device. Document it in the schema. Fixes: aa0c4b815045 ("mfd: devicetree: bindings: Add Qualcomm RPM DT binding") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250318-fix-nexus-4-v2-2-bcedd1406790@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09dt-bindings: soc: qcom,rpm: add missing clock-controller nodeDmitry Baryshkov
On Qualcomm platforms in addition to regulators the RPM also provides clocks via the child clock-controller node. Describe it properly in the schema. Fixes: 872f91b5ea72 ("clk: qcom: Add support for RPM Clocks") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250318-fix-nexus-4-v2-1-bcedd1406790@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-09Merge tag 'tegra-for-6.16-dt-bindings' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt Device tree bindings updates for v6.16-rc1 Convert the legacy interrupt controller (LIC) and APBDMA controller device tree bindings from freeform text to dt-schema. Document the ASUS Transformer Pad TF300TL compatible string and add missing compatible strings for newer generations of the Tegra CEC. * tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: media: dt-bindings: Document Tegra186 and Tegra194 cec dt-bindings: arm: tegra: Add Asus Transformer Pad TF300TL dt-bindings: arm: tegra: Group Tegra30 based ASUS Transformers dt-bindings: interrupt-controller: Convert nvidia,tegra20-ictlr to DT schema dt-bindings: dma: nvidia,tegra20-apbdma: convert text based binding to json schema Link: https://lore.kernel.org/r/20250509212604.2849901-1-treding@nvidia.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'memory-controller-drv-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.16 1. Mediatek: Add support for MT6893 MTK SMI. 2. STM32: Add new driver for STM32 Octo Memory Manager (OMM), which manages muxing between two OSPI busses. 3. Several cleanups and minor improvements (OMAP GPMC, Kconfig entries, BT1 L2). * tag 'memory-controller-drv-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: MAINTAINERS: add entry for STM32 OCTO MEMORY MANAGER driver memory: Add STM32 Octo Memory Manager driver dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller bus: firewall: Fix missing static inline annotations for stubs memory: bt1-l2-ctl: replace scnprintf() with sysfs_emit() memory: mtk-smi: Add support for Dimensity 1200 MT6893 SMI dt-bindings: memory: mtk-smi: Add support for MT6893 memory: tegra: Do not enable by default during compile testing memory: Simplify 'default' choice in Kconfig memory: omap-gpmc: remove GPIO set() and direction_output() callbacks memory: omap-gpmc: use the dedicated define for GPIO direction Link: https://lore.kernel.org/r/20250508093451.55755-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'memory-controller-drv-renesas-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Renesas memory controller drivers for v6.16 Improvements and new device support for the Renesas RPC IF memory controller driver: 1. Minor cleanup and improvements. 2. Refactor the driver to accommodate for newly added Renesas RZ/G3E support: - Acquire two resets instead of only one, - Add RZ/G3E xSPI support with different register layout and its own, new interface for Renesas SPI. * tag 'memory-controller-drv-renesas-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: renesas-rpc-if: Add missing static keyword memory: renesas-rpc-if: Add RZ/G3E xSPI support memory: renesas-rpc-if: Add wrapper functions memory: renesas-rpc-if: Add regmap to struct rpcif_info memory: renesas-rpc-if: Use devm_reset_control_array_get_exclusive() memory: renesas-rpc-if: Move rpc-if reg definitions dt-bindings: memory: Document RZ/G3E support memory: renesas-rpc-if: Move rpcif_info definitions near to the user memory: renesas-rpc-if: Fix RPCIF_DRENR_CDB macro error Link: https://lore.kernel.org/r/20250508090749.51379-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-09Merge tag 'scmi-updates-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers Arm SCMI updates for v6.16 1. Quirk framework to handle buggy firmware With SCMI gaining broader adoption across arm64 platforms, it's increasingly important to address how we consistently manage out-of-spec SCMI firmware already deployed in the field. This change introduces a lightweight quirk framework built around static_keys, enabling developers to: - Define quirks and their match criteria, which can include: o A list of compatibles ({ comp, comp2, NULL }) o Vendor ID / Sub-Vendor ID o Firmware implementation version ranges ([Min_Vers, Max_Vers]) Matching proceeds from the most specific (longest match) to the least specific. NULL entries are treated as wildcards (i.e., match any value). This flexibility allows matching very specific combinations or just a general compatible string. The quirk code blocks/snippets implementing the workaround are placed near their intended usage and guarded by a static_key that's tied to the quirk. Once the SCMI core stack is initialized and retrieves platform info via the base protocol, any matching quirks will have their associated static_keys enabled. 2. Quirk for Qualcomm X1E platforms On some Qualcomm X1E platforms, such as the Lenovo ThinkPad T14s, the SCMI firmware fails to set the FastChannel support bit for PERF_LEVEL_GET, yet it crashes when the driver attempts to fall back to standard messaging which is clearly out-of-spec behavior. To work around this, the new SCMI quirk framework is used to unconditionally enable FC initialization for this firmware version. In the future, once the fixed firmware version is identified, an upper version bound can be added to the quirk match criteria. Alternatively, matching can be further restricted using a SoC-specific compatible string if always enabling FC proves problematic elsewhere. 3. Support for NXP i.MX LMM/CPU vendor protocol extensions The i.MX95 System Manager (SM) implements Logical Machine Management (LMM) and a CPU protocol to manage Logical Machines (LM) and CPUs (e.g., M7). These changes integrate the vendor-specific protocol extensions implementing the LMM and CPU protocols for the i.MX95, facilitating standardized communication between the operating system and the platform's firmware, which will be used by remoteproc drivers. The changes also include the necessary device tree bindings. 4. Miscellaneous cleanups/changes These mainly include polling support in SCMI raw mode. The cleanups centralize error logging for SCMI device creation into a single helper function, consolidate the device matching logic into a single function, and ensure that devices must have a name for registration—removing support for unnamed devices when matching drivers and devices for probing. Transport devices are now excluded from bus matching, and the correct assignment of the parent device for the arm-scmi platform device is ensured in the transport drivers. * tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: quirk: Force perf level get fastchannel firmware: arm_scmi: quirk: Fix CLOCK_DESCRIBE_RATES triplet firmware: arm_scmi: Add common framework to handle firmware quirks firmware: arm_scmi: Ensure that the message-id supports fastchannel MAINTAINERS: add entry for i.MX SCMI extensions firmware: imx: Add i.MX95 SCMI CPU driver firmware: imx: Add i.MX95 SCMI LMM driver firmware: arm_scmi: imx: Add i.MX95 CPU Protocol firmware: arm_scmi: imx: Add i.MX95 LMM protocol dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol firmware: arm_scmi: imx: Add LMM and CPU documentation firmware: arm_scmi: Add polling support to raw mode firmware: arm_scmi: Exclude transport devices from bus matching firmware: arm_scmi: Assign correct parent to arm-scmi platform device firmware: arm_scmi: Refactor error logging from SCMI device creation to single helper firmware: arm_scmi: Refactor device matching logic to eliminate duplication firmware: arm_scmi: Ensure scmi_devices are always matched by name as well Link: https://lore.kernel.org/r/20250507134713.49039-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit (git 2.34.1) at 2025-07-18 15:05:00 +0000