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2025-04-25media: dt-bindings: ti,ds90ub960: Allow setting serializer addressJai Luthra
The serializer's I2C address on the FPD-Link bus is usually communicated to the deserializer once the forward-channel is established. But in some cases it might be necessary to program the serializer (over the back-channel) before the forward-channel is established. This can be used e.g. to correct serializer configuration which otherwise would prevent the FC to be enabled. To be able to communicate to the serializer before the forward-channel is up, the deserializer driver neds to know the default i2c address of the serializer. Allow setting the serializer i2c address using the 'reg' property. This is optional, and usually not needed. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25media: dt-bindings: media: i2c: align filenames format with standardDavid Heidelberg
Append missing vendor and align with other sony definitions. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-25dt-bindings: arm: add MBa91xxCA Mainboard for TQMa93xxCA/LA SOMMarkus Niebel
Add MBa91xxCA starterkit base board for TQMa93xxCA/LA SOM for parallel display evaluation. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-25dt-bindings: arm: fsl: add Toradex SMARC iMX8MP SoM and carrierVitor Soares
Add DT compatible strings for Toradex SMARC iMX8MP SoM and Toradex SMARC Development carrier board. Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx-8m-plus Link: https://www.toradex.com/products/carrier-board/smarc-development-board-kit Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Vitor Soares <vitor.soares@toradex.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-25dt-bindings: arm: fsl: Add Boundary Device Nitrogen8M Plus ENC Carrier BoardMartyn Welch
Adds support for the Nitrogen8M Plus System on Module and the Nitrogen8M Plus ENC Carrier Board. Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-24dt-bindings: net: brcm,unimac-mdio: Add asp-v3.0Justin Chen
The asp-v3.0 Ethernet controller uses a brcm unimac like its predecessor. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20250422233645.1931036-7-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-24dt-bindings: net: brcm,asp-v2.0: Add asp-v3.0Justin Chen
Add asp-v3.0 support. v3.0 is a major revision that reduces the feature set for cost savings. We have a reduced amount of channels and network filters. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20250422233645.1931036-6-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-24dt-bindings: net: brcm,unimac-mdio: Remove asp-v2.0Justin Chen
Remove asp-v2.0 which was only supported on one SoC that never saw the light of day. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20250422233645.1931036-3-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-24dt-bindings: net: brcm,asp-v2.0: Remove asp-v2.0Justin Chen
Remove asp-v2.0 which was only supported on one SoC that never saw the light of day. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20250422233645.1931036-2-justin.chen@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-24dt-bindings: power: qcom,rpmpd: Add SM4450 compatibleAjit Pandey
Document compatible for RPMh power domain controller on SM4450 Platform. Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250417-sm4450_rpmhpd-v1-1-361846750d3a@quicinc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-04-24dt-bindings: pwm: vt8500-pwm: Convert to YAMLAlexey Charkov
Rewrite the textual description for the WonderMedia PWM controller as YAML schema, and switch the filename to follow the compatible string. Signed-off-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250418-via_pwm_binding-v2-1-17545f4d719e@gmail.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-04-24dt-bindings: pwm: mediatek,pwm-disp: Add compatible for MT6893AngeloGioacchino Del Regno
Add a compatible string for the Display Controller PWM IP found in the MediaTek Dimensity 1200 (MT6893) SoC, which is compatible with the one found in MT8183. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250416120253.147977-1-angelogioacchino.delregno@collabora.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-04-24dt-bindings: mfd: bd96802: Add ROHM BD96806Matti Vaittinen
The ROHM BD96806 is very similar to the BD96802. The differences visible to the drivers is different tune voltage ranges. Add compatible for the ROHM BD96805 PMIC. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/3c245cc3829dc64d977c97eae7ae8e2be6233481.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-04-24dt-bindings: mfd: bd96801: Add ROHM BD96805Matti Vaittinen
The ROHM BD96805 is very similar to the BD96801. The differences visible to the drivers is different tune voltage ranges. Add compatible for the ROHM BD96805 PMIC. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/f49addee698b683a071c12808f06a56509152f5c.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-04-24dt-bindings: mfd: Add ROHM BD96802 PMICMatti Vaittinen
BD96802Qxx-C is an automotive grade configurable Power Management Integrated Circuit supporting Functional Safety features for application processors, SoCs and FPGAs. BD96802 is controlled via I2C, provides two interrupt lines and has two controllable buck regulators. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/ed55edffca3b0a2d7e8bcd9ebd8d8abd9a9b7dfe.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-04-24dt-bindings: regulator: Add ROHM BD96802 PMICMatti Vaittinen
BD96802Qxx-C is an automotive grade configurable Power Management Integrated Circuit supporting Functional Safety features for application processors, SoCs and FPGAs. BD96802 is controlled via I2C, provides two interrupt lines and has two controllable buck regulators. The BD96802 belongs to the family of ROHM Scalable PMICs and is intended to be used as a companion PMIC for the BD96801. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/df7983e7c623041f14a4fbe409a2cff846e68a05.1744090658.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-04-24dt-bindings: power: Add Allwinner H6/H616 PRCM PPUAndre Przywara
The Allwinner H6 and some later SoCs contain some bits in the PRCM (Power Reset Clock Management) block that control some power domains. Those power domains include the one for the GPU, the PLLs and some analogue circuits. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250416224839.9840-2-andre.przywara@arm.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-04-24dt-bindings: gpu: Add 'resets' property for GPU initializationMichal Wilczynski
All IMG Rogue GPUs include a reset line that participates in the power-up sequence. On some SoCs (e.g., T-Head TH1520 and Banana Pi BPI-F3), this reset line is exposed and must be driven explicitly to ensure proper initialization. To support this, add a 'resets' property to the GPU device tree bindings. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Link: https://lore.kernel.org/r/20250418-apr_18_reset_img-v6-1-85a06757b698@samsung.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-04-24dt-bindings: soc: renesas: Document Retronix R-Car V4H Sparrow Hawk board ↵Marek Vasut
support Document Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0 (R8A779G3) SoC. This is a single-board computer with single gigabit ethernet, DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports, micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD, debug UART and JTAG. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250420173829.200553-3-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-24dt-bindings: vendor-prefixes: Add Retronix Technology Inc.Marek Vasut
Add vendor prefix for Retronix Technology Inc. https://www.retronix.com.tw/en/about.html Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://lore.kernel.org/20250420173829.200553-2-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-24dt-bindings: arm: mediatek: Add MT8186 Ponyta ChromebookJianeng Ceng
Ponyta is a custom label Chromebook based on MT8186. It is a self-developed project of Huaqin and has no fixed OEM. Signed-off-by: Jianeng Ceng <cengjianeng@huaqin.corp-partner.google.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250424010850.994288-2-cengjianeng@huaqin.corp-partner.google.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-23dt-bindings: interrupt-controller: via,vt8500-intc: Convert to YAMLAlexey Charkov
Rewrite the textual description for the VIA/WonderMedia interrupt controller as YAML schema. The original textual version did not contain information about the usage of 'interrupts' to describe the connection of a chained controller to its parent, add it here. A chained controller can trigger up to 8 different interrupts (IRQ0~7) on its parent. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250418-via_intc_binding-v2-1-b649ce737f71@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-23dt-bindings: arm/cpus: allow up to 3 interconnects entriesNeil Armstrong
Allow up to 3 entries as used on the Qualcomm SM8650 CPU nodes. This fixes the following errors: cpu@0: interconnects: [[7, 3, 3, 7, 15, 3], [8, 0, 3, 8, 1, 3], [9, 0, 9, 1]] is too long Fixes: 791a3fcd2345 ("dt-bindings: arm/cpus: Add missing properties") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250418-topic-sm8x50-upstream-cpu-icc-max3-v1-1-87d9c2713d72@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-23dt-bindings: display: Add Sitronix ST7571 LCD ControllerMarcus Folkesson
Sitronix ST7571 is a dot matrix LCD controller supporting both 4bit grayscale and monochrome LCDs. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20250423-st7571-v6-1-e9519e3c4ec4@gmail.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-04-23dt-bindings: hwmon: ti,tmp102: document optional V+ supply propertyPeter Korsgaard
TMP102 is powered by its V+ supply, document it. The property is called "vcc-supply" since the plus sign (+) is not a valid property character. Signed-off-by: Peter Korsgaard <peter@korsgaard.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250417180426.3872314-1-peter@korsgaard.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-04-23dt-bindings: hwmon: pmbus: add lt3074Cedric Encarnacion
Add Analog Devices LT3074 Ultralow Noise, High PSRR Dropout Linear Regulator. Signed-off-by: Cedric Encarnacion <cedricjustine.encarnacion@analog.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250421-upstream-lt3074-v3-1-71636322f9fe@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-04-23dt-bindings: hwmon: amc6821: add fan and PWM outputFrancesco Dolcini
Add properties to describe the fan and the PWM controller output. Link: https://www.ti.com/lit/gpn/amc6821 Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250402102146.65406-2-francesco@dolcini.it Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-04-23dt-bindings: wireless: qcom,wcnss: Use wireless-controller.yamlDavid Heidelberg
Reference wireless-controller.yaml schema, so we can use properties as local-mac-address or mac-address. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-5-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: wireless: silabs,wfx: Use wireless-controller.yamlJanne Grunau
Instead listing local-mac-address and mac-address properties, reference wireless-controller.yaml schema. The schema brings in constraints for the property checked during `make dtbs_check`. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Jérôme Pouiller <jerome.pouiller@silabs.com> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-4-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: wireless: bcm4329-fmac: Use wireless-controller.yaml schemaJanne Grunau
The wireless-controller schema specifies local-mac-address as used in the bcm4329-fmac device nodes of Apple silicon devices (arch/arm64/boot/dts/apple). Fixes `make dtbs_check` for those devices. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-3-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: net: Add generic wireless controllerDavid Heidelberg
Wireless controllers share the common properties. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-2-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: net: Add network-class schema for mac-address propertiesJanne Grunau
The ethernet-controller schema specifies "mac-address" and "local-mac-address" but other network devices such as wireless network adapters use mac addresses as well. The Devicetree Specification, Release v0.3 specifies in section 4.3.1 a generic "Network Class Binding" with "address-bits", "mac-address", "local-mac-address" and "max-frame-size". This schema specifies the "address-bits" property and moves the remaining properties over from the ethernet-controller.yaml schema. The "max-frame-size" property is used to describe the maximal payload size despite its name. Keep the description from ethernet-controller specifying this property as MTU. The contradictory description in the Devicetree Specification is ignored. Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250324-dt-bindings-network-class-v5-1-f5c3fe00e8f0@ixit.cz Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-04-23dt-bindings: dma: fsl-edma: increase maxItems of interrupts and interrupt-namesJoy Zou
The edma controller support optional error interrupt, so update interrupts and interrupt-names's maxItems. Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250407-edma_err-v2-1-9d7e5b77fcc4@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-23dt-bindings: dma: qcom,bam: Document dma-coherent propertyKaushal Kumar
Qualcomm BAM DMA controller has DMA-coherent support so define it in the properties section. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Link: https://lore.kernel.org/r/20250423063054.28795-3-quic_kaushalk@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-23dt-bindings: soc: qcom,rpmh-rsc: Limit power-domains requirementKonrad Dybcio
Certain platforms (such as Chrome SDM845 and SC7180 with a TF-A running as secure firmware) do not have a OSI-mode capable PSCI implementation. That in turn means the PSCI-associated power domain which represents the system's power state can't provide enough feedback to the RSC device. Don't require power-domains on platforms where this may be the case. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-1-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-23dt-bindings: power: rockchip: Add support for RK3562 SoCFinley Xiao
According to a description from TRM, add all the power domains. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250415032314.44997-1-kever.yang@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-04-23Add RK3576 SAI Audio Controller SupportMark Brown
Merge series from Nicolas Frattaroli <nicolas.frattaroli@collabora.com>: This series adds support for Rockchip's Serial Audio Interface (SAI) controller, found on SoCs such as the RK3576. The SAI is a flexible controller IP that allows both transmitting and receiving digital audio in the I2S, TDM and PCM formats. Instances of this controller are used both for externally exposed audio interfaces, as well as for audio on video interfaces such as HDMI.
2025-04-23dt-bindings: pinctrl: convert fsl,imx7ulp-pinctrl.txt to yaml formatFrank Li
Convert fsl,imx7ulp-pinctrl.txt to yaml format. Additional changes: - remove label in example - fsl,pin direct use hex value instead of macro because macro define in dts local directory. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250417152158.3570936-1-Frank.Li@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoCTommaso Merciai
The CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC has five interrupts: - image_conv: image_conv irq - axi_mst_err: AXI master error level irq - vd_addr_wend: Video data AXI master addr 0 write end irq - sd_addr_wend: Statistics data AXI master addr 0 write end irq - vsd_addr_wend: Video statistics data AXI master addr 0 write end irq This IP has only one input port 'port@1' similar to the RZ/G2UL CRU. Document the CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-4-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 blockTommaso Merciai
Document the CSI-2 block which is part of CRU found in Renesas RZ/G3E SoC. The CSI-2 block on the RZ/G3E SoC is identical to one found on the RZ/V2H(P) SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-3-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoCLad Prabhakar
The MIPI CSI-2 block on the Renesas RZ/V2H(P) SoC is similar to the one found on the Renesas RZ/G2L SoC, with the following differences: - A different D-PHY - Additional registers for the MIPI CSI-2 link - Only two clocks Add a new compatible string, `renesas,r9a09g057-csi2`, for the RZ/V2H(P) SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> Link: https://lore.kernel.org/r/20250411170624.472257-2-tommaso.merciai.xr@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: media: renesas,fcp: Document RZ/V2H(P) SoCLad Prabhakar
The FCPVD block on the RZ/V2H(P) SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,fcpv` will be used as a fallback compatible string on the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20250408193158.80936-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23media: dt-bindings: media: renesas,vsp1: Document RZ/V2H(P)Lad Prabhakar
The VSPD block on the RZ/V2H(P) SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,r9a07g044-vsp2` will be used as a fallback compatible string on the RZ/V2H(P) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20250408193158.80936-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-23dt-bindings: pinctrl: spacemit: add clock and reset propertyYixun Lan
SpacemiT K1 SoC's pinctrl controller requires two clocks in order to work properly, also has one reset line from hardware perspective. Signed-off-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250416-02-k1-pinctrl-clk-v2-1-2b5fcbd4183c@gentoo.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23dt-bindings: power: mediatek: Support Dimensity 1200 MT6893 MTCMOSAngeloGioacchino Del Regno
Add support for the Power Domains (MTCMOS) integrated into the MediaTek Dimensity 1200 (MT6893) SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410143944.475773-2-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-04-23dt-bindings: PCI: qcom: Add IPQ5018 SoCNitheesh Sekar
Add support for the PCIe controller on the Qualcomm IPQ5108 SoC to the bindings. Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patch.msgid.link/20250326-ipq5018-pcie-v7-3-e1828fef06c9@outlook.com
2025-04-23dt-bindings: PCI: Remove obsolete .txt docsRob Herring (Arm)
The content in these files has been moved to the schemas in dtschema. pci.txt is covered by pci-bus-common.yaml and pci-host-bridge.yaml. pci-iommu.txt is covered by pci-iommu.yaml. pci-msi.txt is covered in msi-map property in pci-host-bridge.yaml. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Cc: Frank Li <Frank.li@nxp.com> Link: https://patch.msgid.link/20250404221559.552201-1-robh@kernel.org
2025-04-23dt-bindings: PCI: Convert marvell,armada8k-pcie to schemaRob Herring (Arm)
Convert the marvell,armada8k-pcie binding to DT schema. The binding uses different names for reg, clocks, and phys which have to be added to the common Synopsys DWC binding. The "marvell,reset-gpio" property was not documented. Mark it deprecated as the "reset-gpios" property can be used instead. The "msi-parent" property was also not documented. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patch.msgid.link/20250414214135.1680076-1-robh@kernel.org
2025-04-23dt-bindings: PCI: Convert Marvell EBU to schemaRob Herring (Arm)
Convert the Marvell EBU (Kirkwood, Dove, Armada XP/370) to DT schema format. Add "error" to interrupt-names which is in use, but missing. Shorten the example from 10 child nodes to 6 as the additional ones don't add much value to the example. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patch.msgid.link/20250414214157.1680484-1-robh@kernel.org
2025-04-23dt-bindings: PCI: sifive,fu740-pcie: Fix include placement in DTS exampleKrzysztof Kozlowski
Coding style and common logic dictates that headers should not be included in device nodes. No functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250324125202.81986-2-krzysztof.kozlowski@linaro.org
generated by cgit (git 2.34.1) at 2025-07-19 04:54:54 +0000