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2025-04-23dt-bindings: PCI: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20250324125202.81986-1-krzysztof.kozlowski@linaro.org
2025-04-23dt-bindings: PCI: dwc: rockchip: Add rk3562 supportKever Yang
rk3562 is using the same dwc controller as rk3576. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250415051855.59740-2-kever.yang@rock-chips.com
2025-04-23dt-bindings: PCI: dw: rockchip: Add rk3576 supportKever Yang
rk3576 is using DWC PCIe controller, with msi interrupt directly to GIC instead of using GIC ITS, so - no ITS support is required and the 'msi-map' is not required, - a new 'msi' interrupt is needed. Co-developed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> [mani: changed 'its' to 'ITS' in the binding, spelling mistake fix] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20250414145110.11275-2-kever.yang@rock-chips.com
2025-04-22dt-bindings: net: Document support for Renesas RZ/V2H(P) GBETHLad Prabhakar
GBETH IP on the Renesas RZ/V2H(P) SoC is integrated with Synopsys DesignWare MAC (version 5.20). Document the device tree bindings for the GBETH glue layer. Generic compatible string 'renesas,rzv2h-gbeth' is added since this module is identical on both the RZ/V2H(P) and RZ/G3E SoCs. The Rx/Tx clocks supplied for GBETH on the RZ/V2H(P) SoC is depicted below: Rx / Tx -------+------------- on / off ------- | | Rx-180 / Tx-180 +---- not ---- on / off ------- Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250417084015.74154-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: net: dwmac: Increase 'maxItems' for 'interrupts' and ↵Lad Prabhakar
'interrupt-names' Increase the `maxItems` value for the `interrupts` and `interrupt-names` properties to 11 to support additional per-channel Tx/Rx completion interrupts on the Renesas RZ/V2H(P) SoC, which features the `snps,dwmac-5.20` IP. Refactor the `interrupt-names` property by replacing repeated `enum` entries with a `oneOf` list. Add support for per-channel receive and transmit completion interrupts using regex patterns. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250417084015.74154-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: net: dp83822: add constraints for mac-termination-ohmsDimitri Fedrau
Property mac-termination-ohms is defined in ethernet-phy.yaml. Add allowed values for the property. Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250416-dp83822-mac-impedance-v3-2-028ac426cddb@liebherr.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: net: ethernet-phy: add property mac-termination-ohmsDimitri Fedrau
Add property mac-termination-ohms in the device tree bindings for selecting the resistance value of the builtin series termination resistors of the PHY. Changing the resistance to an appropriate value can reduce signal reflections and therefore improve signal quality. Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250416-dp83822-mac-impedance-v3-1-028ac426cddb@liebherr.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-22dt-bindings: iio: imu: icm42600: add interrupt naming supportJean-Baptiste Maneyrol
Add interrupt-names field for specifying interrupt pin configured. Chips are supporting up to 2 interrupt pins with configurable interrupt sources. Change interrupt to support 1 or 2 entries. Signed-off-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250410-iio-imu-inv-icm42600-rework-interrupt-using-names-v4-1-19e4e2f8f7eb@tdk.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: ROHM BD79104 ADCMatti Vaittinen
The ROHM BD79104 is a 12-bit, 8-channel ADC with two power supply pins, connected to SPI. It's worth noting the IC requires SPI MODE 3, (CPHA = 1, CPOL = 1). I used an evaluation board "BD79104FV-EVK-001" from ROHM. With this board I had problems to have things working correctly with higher SPI clock frequencies. I didn't do thorough testing for maximum frequency though. First attempt was 40M, then 20M and finally 4M. With 20M it seemed as if the read values were shifted by 1 bit. With 4M it worked fine. The component data-sheet is not exact what comes to the maximum SPI frequency. It says SPI frequency is 20M - "unless othervice specified". Additionally, it says that maximum sampling rate is 1Mhz, and since reading a sample requires writing the channel (16 bits) and reading data (16 bits) - we get some upper limit from this. >From the "frequency is 20M, unless othervice specified" I picked the maximum frequency 20M - and did assumption that my problems with 20M weren't related to the BD79104 - but to the evaluation board "BD79104FV-EVK-001". Add bindings for the ROHM BD79104 ADC. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/2a4c65ee35cb79c6b29dbc59cfd9bc7d615a08ac.1744022065.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: adc: adi,ad7606: add SPI offload propertiesAngelo Dureghello
Add #trigger-source-cells property to allow the BUSY output to be used as a SPI offload trigger source to indicate when a sample is ready to be read. Macros are added to adi,ad7606.h for the cell values to help with readability since they are arbitrary values. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250403-wip-bl-spi-offload-ad7606-v1-1-1b00cb638b12@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: adc: ad7380: add AD7389-4David Lechner
Add compatible and quirks for AD7389-4. This is essentially the same as AD7380-4 but instead of having no internal reference, it has no external reference voltage supply. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-1-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: Add ROHM BD7970x variantsMatti Vaittinen
The ROHM BD79700, BD79701 and BD79702 are subsets of the BD79703 DAC. The main difference is the number of the channels. BD79703 has 6 channels. The BD79702 has 4, BD79701 3 and BD79700 2 channels. Additionally, the BD79700 and BD79701 do not have separate Vfs pin but use the Vcc also for the full-scale voltage. Add properties for the BD79700, BD79701 and BD79702. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/0a114565e4de52bf8f98c4f9d17943e5148b0112.1743576022.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: ROHM BD79124 ADC/GPOMatti Vaittinen
Add binding document for the ROHM BD79124 ADC / GPO. ROHM BD79124 is a 8-channel, 12-bit ADC. The input pins can also be used as general purpose outputs. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/e16f54b6214b0d796216729a7e29b8f7be9ae19e.1742560649.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: filter: Add lpf/hpf freq marginsSam Winchenbach
Adds two properties to add a margin when automatically finding the corner frequencies. Signed-off-by: Sam Winchenbach <swinchenbach@arka.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250328174831.227202-2-sam.winchenbach@framepointer.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: adc: amlogic,meson-saradc: Add GXLX SoC compatibleMartin Blumenstingl
Add a compatible string for the GXLX SoC. It's very similar to GXL but has three additional bits in MESON_SAR_ADC_REG12 for the three MPLL clocks. Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20250330101922.1942169-2-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: light: bh1750: Add reset-gpios propertySergio Perez
Some BH1750 sensors require a hardware reset via GPIO before they can be properly detected on the I2C bus. Add a new reset-gpios property to the binding to support this functionality. The reset-gpios property allows specifying a GPIO that will be toggled during driver initialization to reset the sensor. Signed-off-by: Sergio Perez <sergio@pereznus.es> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250324135920.6802-1-sergio@pereznus.es Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: Use unevaluatedProperties for SPI devicesKrzysztof Kozlowski
SPI devices should use unevaluatedProperties:false instead of additionalProperties:false, to allow any SPI device properties listed in spi-peripheral-props.yaml. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/20250324125313.82226-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: iio: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250324125313.82226-1-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-04-22dt-bindings: display: imx: convert fsl,tcon.txt to yaml formatFrank Li
Convert fsl,tcon.txt to yaml format. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Link: https://lore.kernel.org/r/20250417151134.3569837-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: fsl: convert m4if.txt and tigerp.txt to yaml formatFrank Li
Convert m4if.txt and tigerp.txt to yaml format. These just use reg to indicate memory region. Additional changes: - Add compatible string fsl,imx51-aipstz. - Add fsl,imx53-tigerp and fail back to fsl,imx51-tigerp - Add compatible string fsl,imx7d-pcie-phy, which is not real phy and just indicate a memory region. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250417150608.3569512-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: display: imx: convert ldb.txt to yaml formatFrank Li
Convert ldb.txt to yaml format. Additional changes - fix clock-names order to match existed dts file. - remove lvds-panel and iomuxc-gpr node in examples. - fsl,imx6q-ldb fail back to fsl,imx53-ldb. - add fsl,panel property to match existed dts. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250417145742.3568572-1-Frank.Li@nxp.com [robh: Use #/properties/port schema for port] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: powerpc: Convert fsl/pmc.txt to YAMLJ. Neuschäfer
This patch rewrites pmc.txt into YAML format. Descriptive texts are expanded or shortened in a few places to better fit today's conventions. The list of compatible strings (and combinations of them) is based on existing device trees in arch/powerpc as well as compatible strings already mentioned in the plain-text version of the binding. One thing I didn't handle are soc-clk@... nodes as seen in arch/powerpc/boot/dts/fsl/pq3-power.dtsi. They are also ignored by Linux drivers. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250417-fslpmc-yaml-v3-1-b3eccd389176@posteo.net Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: virtio: pci-iommu: Add ref to pci-device.yamlRob Herring (Arm)
The virtio pci-iommu is a PCI device, so it should have a reference to the pci-device.yaml schema. The pci-device.yaml schema defines the 'reg' format as a schema, so the text description for 'reg' can be dropped. Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20250407165341.2934499-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: backlight: add TI LP8864/LP8866 LED-backlight driversAlexander Sverdlin
Add bindings for Texas Instruments' LP8864/LP8866 LED-backlight drivers. Note that multiple channels in these models are used for load-balancing and brightness is controlled gobally, so from a user perspective it's only one LED. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://lore.kernel.org/r/20241218210829.73191-2-alexander.sverdlin@siemens.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: display: imx: convert fsl-imx-drm.txt to yaml formatFrank Li
Convert fsl-imx-drm.txt to yaml format and create 5 yaml files for differences purpose. Additional changes: - add missed include file in examples. - add clocks, clock-names for ipu. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250415212943.3400852-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: interrupt-controller: Add missed fsl tzic controllerFrank Li
Add missed fsl tzic interrupt controller binding doc. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250415154859.3381515-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: remove RZ/N1S bindingsWolfram Sang
Except for these four quite random bindings, no further upstream activity has been observed in the last 8 years. So, remove these fragments to reduce maintenance burden. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250411194849.11067-2-wsa+renesas@sang-engineering.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: Remove obsolete numa.txtRob Herring (Arm)
The NUMA binding is now covered by the dtschema numa-distance-map-v1.yaml and CPU and memory node schemas with all the relevant descriptions moved to them. Link: https://lore.kernel.org/r/20250410201325.962203-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: Remove obsolete cpu-topology.txtRob Herring (Arm)
The cpu topology binding is now covered by the dtschema cpu-map.yaml schema with all the relevant descriptions moved to it. Link: https://lore.kernel.org/r/20250410201325.962203-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: counter: Convert ftm-quaddec.txt to yaml formatFrank Li
Convert ftm-quaddec.txt to yaml format. Additional changes: - Remove "status" at example. - Remove label at example. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250410222509.3242241-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: cpufreq: Drop redundant Mediatek bindingRob Herring (Arm)
The Mediatek CPUFreq binding document just describes properties from the CPU node which the driver uses. This is redundant as all the properties are described in the arm/cpus.yaml schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-17-63d7dc9ddd0a@kernel.org
2025-04-22dt-bindings: arm/cpus: Add power-domains constraintsRob Herring (Arm)
The "power-domains" and "power-domains-names" properties are missing any constraints. Add the constraints and drop the generic descriptions. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-16-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: arm/cpus: Add missing propertiesRob Herring (Arm)
The Arm CPU schema is missing a number of properties already in use. This has gone unnoticed as extra properties have not been restricted. Add a missing reference to cpu.yaml, and add all the missing properties. As "clock-latency" and "voltage-tolerance" are related to opp-v1, add those properties to the opp-v1.yaml schema. With this, other properties can be prevented from creeping in with 'unevaluatedProperties: false'. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-15-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: Reference opp-v1 schema in CPU schemasRob Herring (Arm)
The opp-v1 binding is only used in MIPS and arm32 CPU nodes, so add a $ref to it in the CPU schemas and drop the "select". As opp-v1 has long been deprecated, mark it as such. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-14-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: arm/cpus: Re-wrap 'description' entriesRob Herring (Arm)
Some of the 'description' entries have odd line wrapping and incorrect YAML block modifiers. The 'description' entries should typically wrap at 80 chars. Reformat the entries to follow that along with using '>' modifiers as appropriate. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-13-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22dt-bindings: arm/cpus: Add schemas for "enable-method" dependenciesRob Herring (Arm)
Replace the prose for properties dependent on specific "enable-method" values with schemas defining the same requirements. Both "qcom,acc" and "qcom,saw" properties appear to be required for any of the Qualcomm enable-method values, so the schema is a bit simpler than what the text said. The properties are also needed on some Qualcomm platforms with other enable-method values. It's limited to Cortex A53 based platforms so use that to disable the properties. The references to arm/msm/qcom,saw2.txt and arm/msm/qcom,kpss-acc.txt are out of date, so just drop them. Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-12-63d7dc9ddd0a@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-22ASoC: dt-bindings: add schema for rockchip SAI controllersNicolas Frattaroli
Rockchip introduced a new audio controller called the "Serial Audio Interface", or "SAI" for short, on some of their newer SoCs. In particular, this controller is used several times on the RK3576 SoC. Add a schema for it, with only an RK3576 compatible for now. Other SoCs may follow as mainline support for them lands. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250410-rk3576-sai-v2-5-c64608346be3@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-22dt-bindings: arm: amlogic: add S7D supportXianwei Zhao
Document the new S7D SoC/board device tree bindings. Amlogic S7D is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-3-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22dt-bindings: arm: amlogic: add S7 supportXianwei Zhao
Document the new S7 SoC/board device tree bindings. Amlogic S7 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-2-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22dt-bindings: arm: amlogic: add S6 supportXianwei Zhao
Document the new S6 SoC/board device tree bindings. Amlogic S6 is an advanced application processor designed for hybrid OTT/IP Set Top Box and high-end media box applications. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250317-s6-s7-basic-v1-1-d653384e41f3@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22ASoC: dt-bindings: fsl,mqs: Document audio graph portShengjiu Wang
This device can be used in conjunction with audio-graph-card to provide an endpoint for binding with the other side of the audio link. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://patch.msgid.link/20250418053050.2755249-1-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-22dt-bindings: soc: amlogic: S4 supports clk-measureChuan Liu
S4 adds support for clk-measure. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Link: https://lore.kernel.org/r/20250415-clk-measure-v3-3-9b8551dd33b4@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22dt-bindings: soc: amlogic: C3 supports clk-measureChuan Liu
C3 adds support for clk-measure. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com> Link: https://lore.kernel.org/r/20250415-clk-measure-v3-2-9b8551dd33b4@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-04-22dt-bindings: soc: renesas: Add Renesas RZ/T2H (R9A09G077) SoCThierry Bultel
Add RZ/T2H (R9A09G077), its variants, and the RZT2H-EVK evaluation board in documentation. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250403212919.1137670-2-thierry.bultel.yh@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-21dt-bindings: display: rockchip: analogix-dp: Add support for RK3588Damon Ding
Compared with RK3288/RK3399, the HBR2 link rate support is the main improvement of RK3588 eDP TX controller, and there are also two independent eDP display interfaces on RK3588 Soc. The newly added 'apb' reset is to ensure the APB bus of eDP controller works well on the RK3588 SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://lore.kernel.org/r/20250310104114.2608063-10-damon.ding@rock-chips.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-04-21dt-bindings: display: rockchip: analogix-dp: Add support to get panel from ↵Damon Ding
the DP AUX bus According to Documentation/devicetree/bindings/display/dp-aux-bus.yaml, it is a good way to get panel through the DP AUX bus. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Link: https://lore.kernel.org/r/20250310104114.2608063-5-damon.ding@rock-chips.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-04-19dt-bindings: pci: apple,pcie: Add t6020 compatible stringAlyssa Rosenzweig
t6020 adds some register ranges compared to t8103, so requires a new compatible as well as the new PHY registers. Thanks to Mark and Rob for their helpful suggestions in updating the binding. Suggested-by: Mark Kettenis <mark.kettenis@xs4all.nl> Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> [maz: added PHY registers, constraints] Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Janne Grunau <j@jannau.net> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Link: https://patch.msgid.link/20250401091713.2765724-3-maz@kernel.org
2025-04-19dt-bindings: PCI: qcom,pcie-sc8180x: Add 'global' interruptManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-20-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom: Allow IPQ6018 to use 8 MSI and one 'global' interruptManivannan Sadhasivam
IPQ6018 has 8 MSI SPI and one 'global' interrupt. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-18-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom: Allow IPQ8074 to use 8 MSI and one 'global' interruptManivannan Sadhasivam
IPA8074 has 8 MSI SPI and one 'global' interrupt. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-16-2b70a7819d1e@linaro.org
generated by cgit (git 2.34.1) at 2025-07-19 12:04:56 +0000