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2025-04-19dt-bindings: PCI: qcom: Allow MSM8998 to use 8 MSI and one 'global' interruptManivannan Sadhasivam
MSM8998 has 8 MSI SPI and one 'global' interrupt. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-14-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom: Add 'global' interrupt for SDM845 SoCManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-11-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom,pcie-sc7280: Add 'global' interruptManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-9-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom,pcie-sa8775p: Add 'global' interruptManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-7-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom,pcie-sm8350: Add 'global' interruptManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-5-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom,pcie-sm8250: Add 'global' interruptManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-3-2b70a7819d1e@linaro.org
2025-04-19dt-bindings: PCI: qcom,pcie-sm8150: Add 'global' interruptManivannan Sadhasivam
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250227-pcie-global-irq-v1-1-2b70a7819d1e@linaro.org
2025-04-18dt-bindings: misc: Describe TI FPC202 dual port controllerRomain Gantois
The FPC202 dual port controller serves as a low speed signal aggregator for common port types, notably SFP. It provides access to I2C and low-speed GPIO signals of a downstream device through a single upstream control interface. Up to two logical I2C addresses can be accessed on each of the FPC202's ports. The port controller acts as an I2C translator (ATR). It converts addresses of incoming and outgoing I2C transactions. One use case of this is accessing two SFP modules at logical address 0x50 from the same upstream I2C controller, using two different client aliases. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-04-18dt-bindings: arm: ti: Add PocketBeagle2Robert Nelson
This board is based on ti,am625 family using the am6232 and am6254 variations. https://www.beagleboard.org/boards/pocketbeagle-2 https://openbeagle.org/pocketbeagle/pocketbeagle-2 Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250415225940.3899486-1-robertcnelson@gmail.com Signed-off-by: Nishanth Menon <nm@ti.com>
2025-04-18dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl propertyAndrew Davis
Add a pattern property for pcie-ctrl which can be part of this controller. Signed-off-by: Andrew Davis <afd@ti.com> [j-choudhary@ti.com: Change description and add example] Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250402113201.151195-2-j-choudhary@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2025-04-17spi: dt-bindings: Fix description mentioning a removed propertyWolfram Sang
'spi-cpha' was removed from this file. So, replace it in the description with an existing example. Reformat the paragraph to adhere to max line length. Fixes: 233363aba72a ("spi/panel: dt-bindings: drop CPHA and CPOL from common properties") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://patch.msgid.link/20250417111630.53084-2-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.15-rc3). No conflicts. Adjacent changes: tools/net/ynl/pyynl/ynl_gen_c.py 4d07bbf2d456 ("tools: ynl-gen: don't declare loop iterator in place") 7e8ba0c7de2b ("tools: ynl: don't use genlmsghdr in classic netlink") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-17dt-bindings: display: panel: Add Visionox G2647FB105Alexander Baransky
Add a DT binding for the Visionox G2647FB105, a 6.47 inch 1080x2340 MIPI-DSI CMD mode AMOLED panel used in: - Xiaomi Mi Note 10 / CC9 Pro (sm7150-xiaomi-tucana) - Xiaomi Mi Note 10 Lite (sm7150-xiaomi-toco) Xiaomi likes to use different panels in various revisions of the same device. A factory panel even can be replaced with another model in a service center. So, the power configuration of this panel is similar to some Samsung AMOLED panels, e.g. samsung,ams639rq08, which can be found on other sm7150 Xiaomi devices. Even though Samsung panels weren't used in sm7150-xiaomi-tucana and toco, the described voltage rails exist (confirmed by schematics of the device). Signed-off-by: Alexander Baransky <sanyapilot496@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250414172637.197792-2-sanyapilot496@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250414172637.197792-2-sanyapilot496@gmail.com
2025-04-17dt-bindings: display: panel: Add Himax HX8279/HX8279-D DDIC panelsAngeloGioacchino Del Regno
Himax HX8279 is a Display DriverIC suitable for driving LCD MIPI-DSI panels. Describe this DriverIC, the Startek KD070FHFID078 panel found on newer revisions of the MediaTek Genio 510/700/1200 Evaluation Kits (EVK), and the Aoly SL101PM1794FOG-V15 found on some i.MX8MM boards. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250410072456.387562-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250414082918.30298-3-angelogioacchino.delregno@collabora.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250414082918.30298-3-angelogioacchino.delregno@collabora.com
2025-04-17dt-bindings: vendor-prefixes: Add Shenzhen Aoly Technology Co., Ltd.AngeloGioacchino Del Regno
Aoly is a manufacturer of LCD/IPS displays based in Shenzhen, Mainland China. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410072456.387562-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250414082918.30298-2-angelogioacchino.delregno@collabora.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250414082918.30298-2-angelogioacchino.delregno@collabora.com
2025-04-17dt-bindings: display: simple: Add Tianma P0700WXF1MBAA panelLuca Ceresoli
Add the Tianma Micro-electronics P0700WXF1MBAA 7.0" LVDS LCD TFT panel. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Link: https://lore.kernel.org/r/20250411-tianma-p0700wxf1mbaa-v3-1-acbefe9ea669@bootlin.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250411-tianma-p0700wxf1mbaa-v3-1-acbefe9ea669@bootlin.com
2025-04-17dt-bindings: dma: Add Arm DMA-350Robin Murphy
Arm CoreLink DMA-350 is a pleasantly straightforward DMA controller which, although highly configurable, lends itself to a simple binding thanks to plenty of self-describing ID registers. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/15830b2a8ff9721e364f30f93ea3993139b0103b.1741780808.git.robin.murphy@arm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-17ASoC: mt8195: Add support for MT8395 Radxa NIO 12LMark Brown
Merge series from Julien Massot <julien.massot@collabora.com>: This patch series adds support for audio playback on the MT8395-based Radxa NIO 12L platform, which uses the integrated MT6359 codec via internal DAI links. Key additions: - Support for a new `mediatek,mt8195_mt6359` card configuration that does not rely on external codecs like rt5682. - Proper memory region declarations and pinctrl setup for the audio front-end (AFE) and audio DSP (ADSP). - A device tree sound node for headphone audio routing using `DL_SRC_BE` and `AIF1`. - Enhancements to the DT bindings to document the new compatible string, missing link-name, and additional audio routes (Headphone L/R).
2025-04-17dt-bindings: iommu: mediatek: Add binding for MT6893 MM IOMMUAngeloGioacchino Del Regno
Add binding for the MediaTek Dimensity 1200 (MT6893) SoC's MultiMedia (MM) IOMMU. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410144008.475888-2-angelogioacchino.delregno@collabora.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2025-04-17dt-bindings: gpio: spacemit: add support for K1 SoCYixun Lan
The GPIO controller of K1 support basic functions as input/output, all pins can be used as interrupt which route to one IRQ line, trigger type can be select between rising edge, falling edge, or both. There are four GPIO banks, each consisting of 32 pins. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250412-03-k1-gpio-v8-1-1c6862d272ec@gentoo.org Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2025-04-17ASoC: dt-bindings: mt8195: add missing audio routing and link-nameJulien Massot
Add missing DL_SRC_BE link,as well as Headphone L/R that are provided by mt6359. Signed-off-by: Julien Massot <julien.massot@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20250417-mt8395-audio-sof-v1-5-30587426e5dd@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-17ASoC: dt-bindings: mt8195: add compatible mt8195_mt6359Julien Massot
Make it also compatible for platform without external codecs. Signed-off-by: Julien Massot <julien.massot@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20250417-mt8395-audio-sof-v1-4-30587426e5dd@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-17dt-bindings: pwm: Add RZ/G2L GPT bindingBiju Das
Add device tree bindings for the General PWM Timer (GPT). Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20250226144531.176819-2-biju.das.jz@bp.renesas.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-04-17dt-bindings: pinctrl: convert fsl,vf610-pinctrl.txt to yaml formatFrank Li
Convert fsl,vf610-pinctrl.txt to yaml format. Additional changes: - subnode name force pattern to 'grp$' to align other imx chips. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/20250416150847.3422218-1-Frank.Li@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17dt-bindings: pinctrl: mediatek: Add support for mt8196Cathy Xu
Add the new binding document for pinctrl on MediaTek mt8196. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20250414090215.16091-2-ot_cathy.xu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17dt-bindings: pinctrl: mediatek: Add support for MT6893AngeloGioacchino Del Regno
Add bindings for the pin controller found in the MediaTek Dimensity 1200 (MT6983) SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250410144044.476060-2-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17dt-bindings: pinctrl: mediatek: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250324125105.81774-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17dt-bindings: pinctrl: mediatek: Drop unrelated nodes from DTS exampleKrzysztof Kozlowski
Binding example should not contain other nodes, e.g. consumers of pinctrl of, because this is completely redundant and adds unnecessary bloat. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250324125105.81774-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-16dt-bindings: display: mediatek: Add binding for MT8195 HDMI-TX v2AngeloGioacchino Del Regno
Add a binding for the HDMI TX v2 Encoder found in MediaTek MT8195 and MT8188 SoCs. This fully supports the HDMI Specification 2.0b, hence it provides support for 3D-HDMI, Polarity inversion, up to 16 bits Deep Color, color spaces including RGB444, YCBCR420/422/444 (ITU601/ITU709) and xvYCC, with output resolutions up to 3840x2160p@60Hz. Moreover, it also supports HDCP 1.4 and 2.3, Variable Refresh Rate (VRR) and Consumer Electronics Control (CEC). This IP also includes support for HDMI Audio, including IEC60958 and IEC61937 SPDIF, 8-channel PCM, DSD, and other lossless audio according to HDMI 2.0. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20250415104321.51149-3-angelogioacchino.delregno@collabora.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2025-04-16dt-bindings: display: mediatek: Add binding for HDMIv2 DDCAngeloGioacchino Del Regno
Add a binding for the Display Data Channel (DDC) IP in MediaTek SoCs with version 2 HDMI TX IP. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20250415104321.51149-2-angelogioacchino.delregno@collabora.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2025-04-17dt-bindings: clock: spacemit: Add spacemit,k1-pllHaylen Chu
Add definition for the PLL found on SpacemiT K1 SoC, which takes the external 24MHz oscillator as input and generates clocks in various frequencies for the system. Signed-off-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250416135406.16284-3-heylenay@4d2.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-04-17dt-bindings: soc: spacemit: Add spacemit,k1-sysconHaylen Chu
Document APMU, MPMU and APBC syscons found on SpacemiT K1 SoC, which are capable of generating clock and reset signals. Additionally, APMU and MPMU manage power domains. Signed-off-by: Haylen Chu <heylenay@4d2.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250416135406.16284-2-heylenay@4d2.org Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-04-15ASoC: Add codec driver for Cirrus Logic CS48L32 DSPMark Brown
Merge series from Richard Fitzgerald <rf@opensource.cirrus.com>: formance low-power audio DSP with analog and PDM digital inputs and support for low-power always-on voice-trigger functionality. This series adds the devicetree bindings and the ASoC codec driver.
2025-04-15ASoC: dt-bindings: Add Cirrus Logic CS48L32 audio DSPRichard Fitzgerald
The CS48L32 is an Audio DSP with microphone inputs and SPI control interface. It has a programmable DSP and a variety of power-efficient fixed-function audio processors, with configurable digital mixing and routing. Most properties are core properties: supply regulators, gpios, clocks, interrupt parent and SPI interface. The custom properties define the configuration of the microphone inputs to match what is physically attached to them. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://patch.msgid.link/20250415115016.505777-2-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-15dt-bindings: usb: Introduce qcom,snps-dwc3Bjorn Andersson
The Qualcomm USB glue is not separate of the Synopsys DWC3 core and several of the snps,dwc3 properties (such as clocks and reset) conflicts in expectation with the Qualcomm integration. Using the newly split out Synopsys DWC3 core properties, describe the Qualcomm USB block in a single block. The new binding is a copy of qcom,dwc3 with the needed modifications. It would have been convenient to retain the two structures with the same compatibles, but as there exist no way to select a binding based on the absence of a subnode/patternProperty, a new generic compatible is introduced to describe this binding. To avoid redefining all the platform-specific compatibles, "select" is used to tell the DeviceTree validator which binding to use solely on the generic compatible. (Otherwise if the specific compatible matches during validation, the generic one must match as well) Mark qcom,dwc3 deprecated, to favor expressing future platforms using the new combined binding. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250414-dwc3-refactor-v7-2-f015b358722d@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-15dt-bindings: usb: samsung,exynos-dwc3: add exynos2200 compatibleIvaylo Ivanov
The Exynos2200 SoC has a DWC3 compatible USB controller and can reuse the existing Exynos glue. Update the dt schema to include the samsung,exynos2200-dwusb3 compatible for it. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250412203313.738429-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-15dt-bindings: net: wireless: Add Realtek RTL8188ETV USB WiFiJ. Neuschäfer
This is an on-board USB device that requires a 3.3V supply. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250408-rtl-onboard-v2-1-0b6730b90e31@posteo.net Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-15dt-bindings: gpu: img: Add BXS-4-64 devicetree bindingsMatt Coster
Unlike AXE-1-16M, BXS-4-64 uses two power domains. Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock integration in the TI k3-j721s2. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-2-eda620c5865f@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-04-15dt-bindings: gpu: img: Future-proofing enhancementsMatt Coster
The first compatible strings added for the AXE-1-16M are not sufficient to accurately describe all the IMG Rogue GPUs. The current "img,img-axe" string refers to the entire family of Series AXE GPUs, but this is primarily a marketing term and does not denote a level of hardware similarity any greater than just "Rogue". The more specific "img,img-axe-1-16m" string refers to individual AXE-1-16M GPU. For example, unlike the rest of the Series AXE GPUs, the AXE-1-16M only uses a single power domain. The situation is actually slightly worse than described in the first paragraph, since many "series" (such as Series BXS found in the TI AM68 among others and added later in this series) contain cores with both Rogue and Volcanic architectures. Besides attempting to move away from vague groupings defined only by marketing terms, we want to draw a line between properties inherent to the IP core and choices made by the silicon vendor at integration time. For instance, the number of power domains is a property of the IP core, whereas the decision to use one or multiple clocks is a vendor one. In the original compatible strings, we must use "ti,am62-gpu" to constrain both of these properties since the number of power domains cannot be fixed for "img,img-axe". Work is currently underway to add support for volcanic-based Imagination GPUs, for which bindings will be added in "img,powervr-volcanic.yaml". As alluded to previously, the split between rogue and volcanic cores is non-obvious at times, so add a generic top-level "img,img-rogue" compatible string here to allow for simpler differentiation in devicetrees without referring back to the bindings. The currently supported GPU (AXE-1-16M) only requires a single power domain. Subsequent patches will add support for BXS-4-64 MC1, which has two power domains. Add infrastructure now to allow for this. Also allow the dma-coherent property to be added to IMG Rogue GPUs, which are DMA devices. The decision for coherency is made at integration time and this property should be applied wherever it accurately describes the vendor integration. Note that the new required properties for power domains are conditional on the new base compatible string to avoid an ABI break. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-1-eda620c5865f@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-04-15dt-bindings: interconnect: Add EPSS L3 compatible for SA8775PRaviteja Laggyshetty
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SA8775P SoCs. The L3 instance on the SA8775P SoC is similar to those on SoCs like SM8250 and SC7280. These SoCs use the PERF register instead of L3_REG for programming the performance level, which is managed in the data associated with the target-specific compatibles. Since the hardware remains the same across all EPSS-supporting SoCs, the generic compatible is retained for all SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Link: https://lore.kernel.org/r/20250415095343.32125-2-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-04-15dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for A5Xianwei Zhao
Amlogic A5 SoCs uses the same pintrl controller as A4 SoCs. There is no need for an extra compatible line in the driver, but add A5 compatible line for documentation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/20250403-a5-pinctrl-v3-1-a8c067e22295@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-15dt-bindings: media: mediatek: mdp3: Add compatibles for MT8188 MDP3AngeloGioacchino Del Regno
Add compatible strings for the FG, HDR, RSZ, STITCH, TCC, TDSHP and WROT hardware components found in MediaTek's MT8188 SoC. This hardware is compatible with MT8195. Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241218105320.38980-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-15dt-bindings: display: mediatek: Add compatibles for MT8188 MDP3AngeloGioacchino Del Regno
Add compatible strings for the AAL, COLOR, MERGE and PADDING hardware components found in MediaTek's MT8188 SoC. This hardware is compatible with MT8195. Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Acked-by: Chun-Kuang Hu <chunkuang.hu@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241218105320.38980-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-15dt-bindings: memory: mtk-smi: Add support for MT6893AngeloGioacchino Del Regno
Add support for the Smart Multimedia Interface's Common and Local Arbiter HW as found in the MediaTek Dimensity 1200 (MT6893) SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410143958.475846-2-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-14dt-bindings: net: ti: k3-am654-cpsw-nuss: evaluate fixed-link propertySiddharth Vadapalli
Since the fixed-link (phyless) mode of operation is supported by the CPSW MAC, include "fixed-link" in the set of properties to be evaluated. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/20250411060917.633769-3-s-vadapalli@ti.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-14dt-bindings: net: ethernet-controller: add 5000M speed to fixed-linkSiddharth Vadapalli
A link speed of 5000 Mbps is a valid speed for a fixed-link mode of operation. Hence, update the bindings to include the same. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250411060917.633769-2-s-vadapalli@ti.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-14dt-bindings: interrupt-controller: Add Sophgo SG2044 MSI controllerInochi Amaoto
Like SG2042, SG2044 also uses an external MSI controller to provide MSI interrupt for PCIe controllers. The difference between these two MSI controllers are: 1. SG2044 acks the interrupt by writing 0, SG2042 by setting the bit related to the interrupt. 2. SG2044 uses interrupt number modulo 32 as MSI message data, but SG2042 uses the bit related to the interrupt. Add support for the SG2044 MSI controller. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Chen Wang <wangchen20@iscas.ac.cn> # SG2042 Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/all/20250413224922.69719-2-inochiama@gmail.com
2025-04-14Add support for Loongson-1 AC97Mark Brown
Merge series from Keguang Zhang <keguang.zhang@gmail.com>: Add the driver and dt-binding document for Loongson-1 AC97. Add the dt-binding document for Realtek ALC203 Codec. Add DT support for the AC97 generic codec driver.
2025-04-14dt-bindings: soc: mediatek: dvfsrc: Add support for MT6893AngeloGioacchino Del Regno
Add a compatible for the MediaTek Dimensity 1200 (MT6893) SoC's DVFSRC hardware, introducing capability to communicate with it. Even though this SoC uses the same basic version of the DVFSRC IP as MT8195, the vcore-vdram parameters are different, hence no fallback compatibility is possible. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410144019.475930-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-14dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocolPeng Fan
Add i.MX SCMI Extension protocols bindings for: - Logic Machine Management(LMM) Protocol intended for boot, shutdown, and reset of other logical machines (LM). It is usually used to allow one LM to manager another used as an offload or accelerator engine.. - CPU Protocol. allows an agent to start or stop a CPU. It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20250408-imx-lmm-cpu-v4-2-4c5f4a456e49@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
generated by cgit (git 2.34.1) at 2025-07-19 23:53:18 +0000