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into soc/drivers
RISC-V SoC for v6.16
Sophgo:
Add support for SG2044 TOP syscon device. The SG2044 TOP
device provide PLL clock function in its area.
Add RTC support for CV1800 series SoC. The device
is called RTC, but contains control registers of other
HW blocks in its address space, most notably of
Power-on-Reset (PoR) module, DW8051 IP (MCU core),
accompanying SRAM, hence putting it in SoC subsystem.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux:
soc: sophgo: cv1800: rtcsys: New driver (handling RTC only)
dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series
soc: sophgo: sg2044: Add support for SG2044 TOP syscon device
Link: https://lore.kernel.org/r/MA0P287MB2262B041A26A0F5EAD1E296CFE91A@MA0P287MB2262.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.16
Allow list QSEECOM for EFI variable services on on the Asus Zenbook A14,
and block list TZMEM on the SM7150 platform to avoid issues with rmtfs.
Extend the last-level cache (llcc) driver to support version 6 of the
hardware and enable SM8750 support.
Also add socinfo for the SM8750 platform.
Re-enable UCSI support on SC8280XP, now that the reported crash has been
dealt with, and filter the altmode notifications to avoid spurious
hotplug events being propagated to user space.
Add SM7150 support to pd-mapper.
* tag 'qcom-drivers-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: llcc-qcom: Add support for SM8750
soc: qcom: llcc-qcom: Add support for LLCC V6
dt-bindings: cache: qcom,llcc: Document SM8750 LLCC block
soc: qcom: socinfo: add SM8750 SoC ID
dt-bindings: arm: qcom,ids: add SoC ID for SM8750
dt-bindings: soc: qcom: qcom,rpm: add missing clock/-names properties
dt-bindings: soc: qcom,rpm: add missing clock-controller node
soc: qcom: smem: Update max processor count
firmware: qcom: tzmem: disable sm7150 platform
soc: qcom: pd-mapper: Add support for SM7150
soc: qcom: pmic_glink_altmode: fix spurious DP hotplug events
soc: qcom: smp2p: Fix fallback to qcom,ipc parse
soc: qcom: pmic_glink: enable UCSI on sc8280xp
firmware: qcom: scm: Allow QSEECOM on Asus Zenbook A14
dt-bindings: soc: qcom,rpmh-rsc: Limit power-domains requirement
Link: https://lore.kernel.org/r/20250513215656.44448-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/drivers
VT8500 (and FSL) SoC drivers for v6.16
1. VT8500: Add SCC socinfo/hwinfo driver.
2. Cleanup unused function in PowerPC Freescale QE driver to have W=1
builds warnings free.
* tag 'soc-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
soc: fsl: qe: remove unused qe_ic_from_irq function
ARM: vt8500: MAINTAINERS: Include vt8500 soc driver in maintainers entry
soc: Add VIA/WonderMedia SoC identification driver
dt-bindings: hwinfo: Add VIA/WonderMedia SoC identification
Link: https://lore.kernel.org/r/20250513104216.25803-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers
Amlogic Driver for v6.16:
- Amlogic clk measure memory usage optimization
- Amlogic clk measure support for S4 & C3 Socs
- Amlogic A4/A5 reset controller bindings
* tag 'amlogic-driver-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller
soc: amlogic: clk-measure: Add support for S4
soc: amlogic: clk-measure: Add support for C3
dt-bindings: soc: amlogic: S4 supports clk-measure
dt-bindings: soc: amlogic: C3 supports clk-measure
soc: amlogic: clk-measure: Define MSR_CLK's register offset separately
soc: amlogic: clk-measure: Optimize the memory size of clk-measure
Link: https://lore.kernel.org/r/04908842-4c55-44a0-b74c-3aca82a1f204@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT for v6.16:
- Amlogic A4 Pinctrl support
- UART RX/TX pull-up pinconf properties for all SoCs
- SARADC support for the S905L SoC variant
- Drop clock-latency in CPU node
- Amlogic clk measure support for S4 & C3 Socs
- Amlogic S6/S7/S7D initial support
- I2C default pull-up bias pinconf property on Amlogic GXL based boards
- Amlogic A4 & A5 Reset Controller support
- New Boards:
- Amlogic S6 BL209 Reference Board
- Amlogic S7 BP201 Reference Board
- Amlogic S7D BM202 Reference Board
- Amlogic S805Y xiaomi-aquaman/Mi TV Stick
* tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (21 commits)
arm64: dts: amlogic: Add A5 Reset Controller
arm64: dts: amlogic: Add A4 Reset Controller
arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV Stick
dt-bindings: arm: amlogic: add S805Y and Mi TV Stick
arm64: dts: amlogic: gxl: set i2c bias to pull-up
arm64: dts: add support for S7D based Amlogic BM202
arm64: dts: add support for S7 based Amlogic BP201
arm64: dts: add support for S6 based Amlogic BL209
dt-bindings: arm: amlogic: add S7D support
dt-bindings: arm: amlogic: add S7 support
dt-bindings: arm: amlogic: add S6 support
arm64: dts: amlogic: S4: Add clk-measure controller node
arm64: dts: amlogic: C3: Add clk-measure controller node
arm64: dts: amlogic: Drop redundant CPU "clock-latency"
arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatible
arm64: dts: amlogic: a1: enable UART RX and TX pull up by default
arm64: dts: amlogic: axg: enable UART RX and TX pull up by default
arm64: dts: amlogic: g12: enable UART RX and TX pull up by default
arm64: dts: amlogic: gxl: enable UART RX and TX pull up by default
arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by default
...
Link: https://lore.kernel.org/r/5f7d3fa4-2d9d-450b-b384-abdd903284dc@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM DT for v6.16:
- UART RX/TX pull-up pinconf properties for all SoCs
- New Boards:
- Meson8 TCU Fernsehfee 3.0
* tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
ARM: dts: amlogic: meson8-fernsehfee3: Describe regulators
ARM: dts: amlogic: Add TCU Fernsehfee 3.0
dt-bindings: arm: amlogic: Add TCU Fernsehfee 3.0 board
dt-bindings: vendor-prefixes: Add TC Unterhaltungselektronik AG
ARM: dts: amlogic: meson8b: enable UART RX and TX pull up by default
ARM: dts: amlogic: meson8: enable UART RX and TX pull up by default
Link: https://lore.kernel.org/r/838c5305-5c5b-4232-b7fe-86598dc50ace@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.16
1. Tesla FSD: Add Ethernet.
2. ExynosAutov920: Add more serial nodes, clock controllers for CPU
cluster CL0, CL1 and CL2.
3. New Exynos7870 SoC with pretty decent coverage: pin controllers,
clock controllers, I2C, MMC, serial and USB. New boards using
Exynos7870: Samsung Galaxy J7 Prime, Samsung Galaxy A2 Core and
Samsung Galaxy J6.
4. Google GS101: Add pmu-intr-gen syscon node for proper CPU hotplug.
5. Switch USI (serial engines) nodes to new samsung,mode constant coming
with DT bindings v6.15-rc1.
* tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: add pmu-intr-gen syscon node
arm64: dts: exynos: add initial support for Samsung Galaxy J6
arm64: dts: exynos: add initial support for Samsung Galaxy A2 Core
arm64: dts: exynos: add initial support for Samsung Galaxy J7 Prime
arm64: dts: exynos: add initial devicetree support for exynos7870
dt-bindings: arm: samsung: add compatibles for exynos7870 devices
arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes
arm64: dts: exynosautov920: add cpucl0 clock DT nodes
arm64: dts: exynos: Add DT node for all UART ports
arm64: dts: exynos: update all samsung,mode constants
arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC
arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC
Link: https://lore.kernel.org/r/20250513101023.21552-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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soc/drivers
Reset controller updates for v6.16
* Add T-HEAD TH1520 and Renesas RZ/V2H(P) USB2PHY reset controller
drivers.
* Add devm_reset_control_array_get_exclusive_released() variant to allow
using the acquire/release hand-off mechanism for exclusive reset
controls bundled into reset control arrays.
* Add Sophgo SG2044 reset controller to device tree bindings.
* tag 'reset-for-v6.16' of git://git.pengutronix.de/pza/linux:
dt-bindings: reset: sophgo: Add SG2044 bindings.
MAINTAINERS: Add entry for Renesas RZ/V2H(P) USB2PHY Port Reset driver
reset: Add USB2PHY port reset driver for Renesas RZ/V2H(P)
dt-bindings: reset: Document RZ/V2H(P) USB2PHY reset
reset: Add devm_reset_control_array_get_exclusive_released()
reset: thead: Add TH1520 reset controller driver
dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller
Link: https://lore.kernel.org/r/20250513092516.3331585-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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On machines with multiple memory nodes, interleaving page allocations
across nodes allows for better utilization of each node's bandwidth.
Previous work by Gregory Price [1] introduced weighted interleave, which
allowed for pages to be allocated across nodes according to user-set
ratios.
Ideally, these weights should be proportional to their bandwidth, so that
under bandwidth pressure, each node uses its maximal efficient bandwidth
and prevents latency from increasing exponentially.
Previously, weighted interleave's default weights were just 1s -- which
would be equivalent to the (unweighted) interleave mempolicy, which goes
through the nodes in a round-robin fashion, ignoring bandwidth
information.
This patch has two main goals: First, it makes weighted interleave easier
to use for users who wish to relieve bandwidth pressure when using nodes
with varying bandwidth (CXL). By providing a set of "real" default
weights that just work out of the box, users who might not have the
capability (or wish to) perform experimentation to find the most optimal
weights for their system can still take advantage of bandwidth-informed
weighted interleave.
Second, it allows for weighted interleave to dynamically adjust to
hotplugged memory with new bandwidth information. Instead of manually
updating node weights every time new bandwidth information is reported or
taken off, weighted interleave adjusts and provides a new set of default
weights for weighted interleave to use when there is a change in bandwidth
information.
To meet these goals, this patch introduces an auto-configuration mode for
the interleave weights that provides a reasonable set of default weights,
calculated using bandwidth data reported by the system. In auto mode,
weights are dynamically adjusted based on whatever the current bandwidth
information reports (and responds to hotplug events).
This patch still supports users manually writing weights into the nodeN
sysfs interface by entering into manual mode. When a user enters manual
mode, the system stops dynamically updating any of the node weights, even
during hotplug events that shift the optimal weight distribution.
A new sysfs interface "auto" is introduced, which allows users to switch
between the auto (writing 1 or Y) and manual (writing 0 or N) modes. The
system also automatically enters manual mode when a nodeN interface is
manually written to.
There is one functional change that this patch makes to the existing
weighted_interleave ABI: previously, writing 0 directly to a nodeN
interface was said to reset the weight to the system default. Before this
patch, the default for all weights were 1, which meant that writing 0 and
1 were functionally equivalent. With this patch, writing 0 is invalid.
Link: https://lkml.kernel.org/r/20250520141236.2987309-1-joshua.hahnjy@gmail.com
[joshua.hahnjy@gmail.com: wordsmithing changes, simplification, fixes]
Link: https://lkml.kernel.org/r/20250511025840.2410154-1-joshua.hahnjy@gmail.com
[joshua.hahnjy@gmail.com: remove auto_kobj_attr field from struct sysfs_wi_group]
Link: https://lkml.kernel.org/r/20250512142511.3959833-1-joshua.hahnjy@gmail.com
https://lore.kernel.org/linux-mm/20240202170238.90004-1-gregory.price@memverge.com/ [1]
Link: https://lkml.kernel.org/r/20250505182328.4148265-1-joshua.hahnjy@gmail.com
Co-developed-by: Gregory Price <gourry@gourry.net>
Signed-off-by: Gregory Price <gourry@gourry.net>
Signed-off-by: Joshua Hahn <joshua.hahnjy@gmail.com>
Suggested-by: Yunjeong Mun <yunjeong.mun@sk.com>
Suggested-by: Oscar Salvador <osalvador@suse.de>
Suggested-by: Ying Huang <ying.huang@linux.alibaba.com>
Suggested-by: Harry Yoo <harry.yoo@oracle.com>
Reviewed-by: Harry Yoo <harry.yoo@oracle.com>
Reviewed-by: Huang Ying <ying.huang@linux.alibaba.com>
Reviewed-by: Honggyu Kim <honggyu.kim@sk.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Joanthan Cameron <Jonathan.Cameron@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.16
Generic Fixups/Cleanups:
* am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot
SoC Specific features and Fixes:
AM62Ax:
* C7x and R5F support added
* Bug fix for emmc clock to point to default
* CPUFreq thermal throttling on thermal alert
AM62P5:
* Add RNG Node (common to J722s)
* Bug fix for emmc clock to point to default (common to J722S)
AM625:
* Wakeup R5 node
* Bug fix for emmc clock to point to default
* PRUSS-M support
* New GPU bindings
AM64:
* Switch to 64-bit address space for PCIe0
* Add PCIe control nodes for main_conf region
* Reserve timer nodes used by MCU F/w.
AM65:
* MMC: Add missing delay timing values for SDR and legacy modes
* Add compatible for AM65x syscon and PCIe control properties
(dtbs_check fixes)
J7200:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J721E:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1.
J721S2:
* GPU node for Imagination Tech Rouge BXS GPU.
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J722s/AM67A:
* Switch serdes status to be enabled by board file than at SoC level.
* Switch to 64-bit address space for PCIe0.
J784S4/J742S2/AM69:
* Add ASPCIE0 and enable output for PCIe1
* Fix length of serdes_ln_ctrl.
* Switch to 64-bit address space for PCIe0,1.
Board Specific:
AM62Ax:
* SK: co-processors C7x, R5, PWM support added
* phycore-som: co-processors C7x, R5
AM62P5:
* Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support.
* SK: Add remote processor support, PWM
AM625:
* Add BeagleBoard.org PocketBeagle-2 support
* phycore-som: Enable R5F support
* Verdin: Add eeprom compatible fallback
* SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays
(dtbs_check fixes)
* BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes)
* phyboard-lyra: Add cooling maps for fan
* emmc bug fixes: add non-removable flag for eMMC.
AM65:
* EVM: Add missing power supply description ofr Rocktech panel
(dtbs_check fixes)
J721E:
* EVM: Enable OSPI1
* EVM/SK: Dt nodes description for mandatory power suplpies for panel and
sensors (dtbs_check fixes)
J721S2/AM68:
* Add phyBOARD-Izar-AM68x
* am68-SK: Fix regulator hierarchy
J722s/AM67A:
* EVM: Add mux controls for CSI2, power regulator nodes and add overlays for
quad IMX219 and TEVI OV5640.
* BeagleY-AI: Add bootph for main_gpio1
J784S4/J742S2/AM69:
* usxgmii expansion board: Drop un-necessary pinctrl-names
* evm: Add overlay for USB0 Type-A option
* tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits)
arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX
arm64: dts: ti: j722s-evm: Add DT nodes for power regulators
arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP
arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP
arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors
arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors
arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps
arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert
arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E
arm64: dts: ti: k3-j721s2: Add GPU node
arm64: dts: ti: k3-am62: New GPU binding details
arm64: dts: ti: k3-am62-main: Add PRUSS-M node
arm64: dts: ti: k3-am64: Reserve timers used by MCU FW
arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP
arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP
arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors
arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors
...
Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Convert the clock device tree bindings to yaml for the Altera SoCFPGA
Cyclone5, Arria5, and Arria10 chip families. Since the clock nodes are
subnodes to Altera SOCFPGA Clock Manager, the yaml was added to
socfpga-clk-manager.yaml.
Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Signed-off-by: Shashank Balaji <shashank.mahadasyam@sony.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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Add optional ngpios and gpio-reserved-ranges property.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250520-gpio-dts-v3-1-04771c6cf325@nxp.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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The yaml has "hp-det-gpios" property, but Audio-Graph-Card2 can handle
"mic-det-gpios" too. Add it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/877c2kaxn4.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add support for host wakeup on interrupt.
Signed-off-by: Neeraj Sanjay Kale <neeraj.sanjaykale@nxp.com>
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
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The ROHM BD79100G is a 12-bit ADC which can be read over SPI. Device has
no MOSI pin. ADC results can be read from MISO by clocking in 16 bits.
The 4 leading bits will be zero, last 12 containig the data.
Device has only VCC supply pin, which acts also as a VFS, determining the
voltage for full 12-bits. Specifying it is mandatory.
This seems identical to the ti,ads7866.
Support ROHM BU79100G using ti,ads7866 as a fallback.
Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/4907a096eee1f54afae834213cf721b551382d4e.1747203712.git.mazziesaccount@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add a binding specification for the Nuvoton NCT7201/NCT7202 up to 12-bit
ADCs with I2C interface.
Signed-off-by: Eason Yang <j2anfernee@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250512083156.3300006-2-j2anfernee@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add documentation for the DFRobot SEN0322 oxygen sensor.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tóth János <gomba007@gmail.com>
Link: https://patch.msgid.link/20250506-iio-chemical-sen0322-v4-1-1465ac8dc190@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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The MCP391X family provides an active low reset signal that is still not
described in the bindings.
Add reset-gpios to the bindings and the example.
Co-developed-by: Lukas Rauber <lukas.rauber@janitza.de>
Signed-off-by: Lukas Rauber <lukas.rauber@janitza.de>
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250428-mcp3911-fixes-v2-2-406e39330c3d@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Document the AD3530/AD3530R (8-channel) and AD3531/AD3531R (4-channel)
low-power, 16-bit, buffered voltage output DACs with software-
programmable gain controls. They provide full-scale output spans of 2.5V
or 5V for reference voltages of 2.5V. These devices operate on a single
2.7V to 5.5V supply and are guaranteed to be monotonic by design.
The "R" variants include a 2.5V, 5ppm/°C internal reference, which is
disabled by default.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
Link: https://patch.msgid.link/20250429-togreg-v7-2-0af9c543b545@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add a new powerdown mode for DACs with 7.7kohm and 32kohm resistor
to GND.
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
Link: https://patch.msgid.link/20250429-togreg-v7-1-0af9c543b545@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add a compatible for the Dimensity 1200 (MT6893) SoC; The AUXADC
IP in this chip is fully compatible with the one found in MT8173.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250416120235.147889-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add support for vrefin supply responsible for providing external
reference to the SAR ADC within the part.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250422085529.4407-1-antoniu.miclaus@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add device tree support for Winsen MHZ19B sensor.
Signed-off-by: Gyeyoung Baek <gye976@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250423194100.53934-3-gye976@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add Winsen to the vendor prefixes.
Signed-off-by: Gyeyoung Baek <gye976@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250423194100.53934-2-gye976@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Fix malformed table.
Fixes: ede84c455659 ("docs: iio: add documentation for ad3552r driver")
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Link: https://patch.msgid.link/20250415-wip-bl-ad3552r-fix-doc-table-v1-1-717ffd320c9d@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add bindings for the SPMI controller present on most Apple SoCs
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
Link: https://lore.kernel.org/r/20250409-spmi-v4-1-eb81ecfd1f64@gmail.com
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20250518032330.2959766-3-sboyd@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- This document provides AMD side band IOCTL description defined
for APML and its usage.
Multiple AMD custom protocols defined for side band system
management uses this IOCTL.
User space C-APIs are made available by esmi_oob_library [1],
which is provided by the E-SMS project [2].
Link: https://github.com/amd/esmi_oob_library [1]
Link: https://www.amd.com/en/developer/e-sms.html [2]
Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Link: https://lore.kernel.org/r/20250428063034.2145566-11-akshay.gupta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The present sbrmi module only support reporting power via hwmon.
However, AMD data center range of processors support various
system management functionality using custom protocols defined in
Advanced Platform Management Link (APML) specification.
Register a miscdevice, which creates a device /dev/sbrmiX with an IOCTL
interface for the user space to invoke the APML Mailbox protocol, which
is already defined in sbrmi_mailbox_xfer().
The APML protocols depend on a set of RMI registers. Having an IOCTL
as a single entry point will help in providing synchronization among
these protocols as multiple transactions on RMI register set may
create race condition.
Support for other protocols will be added in subsequent patches.
APML mailbox protocol returns additional error codes written by
SMU firmware in the out-bound register 0x37. These errors include,
invalid core, message not supported over platform and
others. This additional error codes can be used to provide more
details to user space.
Open-sourced and widely used https://github.com/amd/esmi_oob_library
will continue to provide user-space programmable API.
Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Link: https://lore.kernel.org/r/20250428063034.2145566-7-akshay.gupta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The lis3lv02d driver does not create a platform device anymore. It was
recently changed to use a faux device instead. Therefore the sysfs path
has changed from /sys/devices/platform/lis3lv02d to
/sys/devices/faux/lis3lv02d.
Fixes: 3b18ccb5472b ("misc: lis3lv02d: convert to use faux_device")
Signed-off-by: Roxana Nicolescu <nicolescu.roxana@protonmail.com>
Link: https://lore.kernel.org/r/20250506110002.36477-1-nicolescu.roxana@protonmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The last user was removed by commit e2d46f2ec332 ("netfs: Change the
read result collector to only use one work item").
Signed-off-by: Max Kellermann <max.kellermann@ionos.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Link: https://lore.kernel.org/20250519134813.2975312-10-dhowells@redhat.com
cc: Paulo Alcantara <pc@manguebit.com>
cc: netfs@lists.linux.dev
cc: linux-fsdevel@vger.kernel.org
Signed-off-by: Christian Brauner <brauner@kernel.org>
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This flag was added by commit 3d3c95046742 ("netfs: Provide readahead
and readpage netfs helpers") but its only user was removed by commit
86b374d061ee ("netfs: Remove fs/netfs/io.c").
Signed-off-by: Max Kellermann <max.kellermann@ionos.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Link: https://lore.kernel.org/20250519134813.2975312-3-dhowells@redhat.com
cc: Paulo Alcantara <pc@manguebit.com>
cc: netfs@lists.linux.dev
cc: linux-fsdevel@vger.kernel.org
Signed-off-by: Christian Brauner <brauner@kernel.org>
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Document support for the CAN-FD Interface on the RZ/G3E (R9A09G047) SoC,
which supports up to six channels.
The CAN-FD module on RZ/G3E is very similar to the one on both R-Car V4H
and RZ/G2L, but differs in some hardware parameters:
* No external clock, but instead has ram clock.
* Support up to 6 channels.
* 20 interrupts.
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20250417054320.14100-3-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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RZ/G3E SoC has 20 interrupts, 2 resets and 6 channels that need more
branching with conditional schema. Simplify the conditional schema with
if statements rather than the complex if-else statements to prepare for
supporting RZ/G3E SoC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20250417054320.14100-2-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Add bindings for exposing SPMI registers of Apple PMICs as NVMEM cells
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Srinivas Kandagatla <srini@kernel.org>
Link: https://lore.kernel.org/r/20250509122452.11827-3-srini@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Board files are deprecated by DT, and the last user of
nvmem_add_cell_table() was removed by commit 2af4fcc0d3574482 ("ARM:
davinci: remove unused board support") in v6.3. Hence remove all
support for nvmem cell tables, and update the documentation.
Device drivers can still register a single cell using
nvmem_add_one_cell() (which was not documented before).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Srinivas Kandagatla <srini@kernel.org>
Link: https://lore.kernel.org/r/20250509122452.11827-2-srini@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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I'm no longer able to perform this role since I left IBM.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/8734czh8yg.fsf@mpe.ellerman.id.au
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into char-misc-next
Krzysztof writes:
Mux drivers for v6.16
Few cleanups and fixes for the mux drivers:
1. Simplify with spi_get_device_match_data().
2. Fix -Wunused-const-variable and -Wvoid-pointer-to-enum-cast warnings.
3. GPIO mux: add optional regulator for Lenovo T14s laptop headset.
4. MMIO mux: avoid using syscon's device_node_to_regmap(), due to
changes in the syscon code.
* tag 'mux-drv-6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
mux: adgs1408: fix Wvoid-pointer-to-enum-cast warning
mux: gpio: add optional regulator support
dt-bindings: mux: add optional regulator binding to gpio mux
mux: mmio: Do not use syscon helper to build regmap
mux: adg792a: remove incorrect of_match_ptr annotation
mux: adgs1408: simplify with spi_get_device_match_data()
mux: mmio: Add missing word in error message
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next
Xu writes:
FPGA Manager changes for 6.16-rc1
- Peter hands over the maintain role of m10bmc-sec driver to Matthew.
- Qasim's change fix potential NULL pointer for fpga test.
All patches have been reviewed on the mailing list, and have been in the
last linux-next releases (as part of our for-next branch).
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
* tag 'fpga-for-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga:
fpga: fix potential null pointer deref in fpga_mgr_test_img_load_sgt()
fpga: m10bmc-sec: change contact for secure update driver
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Renesas R-Car V4H (r8a779g0) has PCIe controller, and it requires
specific firmware downloading. So, add a document about the firmware
how to get.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[kwilczynski: commit log, refactor the document content and then add
this new file to a correct index under the top-level PCI documentation]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20250507100947.608875-1-yoshihiro.shimoda.uh@renesas.com
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The binding references in-kernel serial.yaml, so there is no need to
explicitly list its properties. Note that rts-gpio is also redundant
because DTS should be simply converted to -gpios variants.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250514125127.56149-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Socionext Milbeaut UART binding to DT schema. It is a
straight-forward conversion.
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250507154924.1602842-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Microchip PIC32 UART binding to DT schema. The binding was
unclear there are 3 interrupts. The functions were determined from the
driver. The 'cts-gpios' property is covered by serial.yaml schema.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250507154937.1603190-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Arm SBSA UART binding to DT schema. It is a straight-forward
conversion.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20250506220016.2545637-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Synopsys ARC UART binding to DT schema. Drop the "aliases"
portion which is not relevant to this schema.
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250507154909.1602497-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Marvell Armada-3700 UART binding to DT schema. It is a
straight-forward conversion.
Drop the long deprecated single interrupt support.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250507154408.1595932-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Lantiq SoC ASC UART binding to DT schema. There are no such
clock identifier defines nor a user with clocks, so drop the example
with clocks.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20250506220029.2546179-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Cirrus EP7209 UART binding to DT schema. There is no user of
"cirrus,ep7312-uart" other than the example, so drop it. Drop the
"aliases" node part as it is not relevant to the schema. The modem
control GPIOs are covered by the serial.yaml schema and don't have to be
listed in the schema.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20250506220021.2545820-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the Arm MPS2 UART binding to DT schema. It is a straight-forward
conversion.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20250506220012.2545470-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Convert the NXP LPC3220 HS UART binding to DT schema. It is a
straight-forward conversion.
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Link: https://lore.kernel.org/r/20250506220048.2546915-1-robh@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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