summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/microchip
AgeCommit message (Collapse)Author
2024-10-13ARM: dts: microchip: sama7g54_curiosity: Add power monitor supportMihai Sain
Add PAC1934 support in order to monitor the board power consumption. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240923064932.5797-4-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-10-13ARM: dts: microchip: sama5d2_icp: Add power monitor supportMihai Sain
Add PAC1934 support in order to monitor the board power consumption. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240923064932.5797-3-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-10-13ARM: dts: microchip: sam9x60ek: Add power monitor supportMihai Sain
Add PAC1934 support in order to monitor the board power consumption. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240923064932.5797-2-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-10-13ARM: dts: microchip: Unify rng node namesAlexander Dahl
Using a generic name common over different platforms and matching the recent atmel rng binding now. Signed-off-by: Alexander Dahl <ada@thorsis.com> Suggested-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240917072710.125435-3-ada@thorsis.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-10-13ARM: dts: microchip: Add trng labels for all at91 SoCsAlexander Dahl
SAM9X60 and SAMA7G5 already have those labels. Add it for the other SoC families so it can be referenced in board files. Signed-off-by: Alexander Dahl <ada@thorsis.com> Link: https://lore.kernel.org/r/20240917072710.125435-2-ada@thorsis.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-10-13ARM: dts: microchip: sam9x60: Add missing property atmel,usart-modeAndrei Simion
Add the atmel,usart-mode property to the UART nodes. This ensures compliance with the atmel,at91-usart.yaml schema and resolves the errors below: serial@200: $nodename:0: 'serial@200' does not match '^spi(@.*|-([0-9]|[1-9][0-9]+))?$' serial@200: atmel,use-dma-rx: False schema does not allow True serial@200: atmel,use-dma-tx: False schema does not allow True serial@200: atmel,fifo-size: False schema does not allow [[16]] These errors indicate that the property atmel,usart-mode = <AT91_USART_MODE_SERIAL> is missing for UART nodes 0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, and 12. Fixes: 99c808335877 ("ARM: dts: at91: sam9x60: Add missing flexcom definitions") Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240912093307.40488-1-andrei.simion@microchip.com [claudiu.beznea: move the atmel,usart-mode close to vendor specific properties to cope with DTS coding style] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-31ARM: dts: microchip: sama7g5: Fix RTT clockClaudiu Beznea
According to datasheet, Chapter 34. Clock Generator, section 34.2, Embedded characteristics, source clock for RTT is the TD_SLCK, registered with ID 1 by the slow clock controller driver. Fix RTT clock. Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Link: https://lore.kernel.org/r/20240826165320.3068359-1-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-24ARM: dts: microchip: sam9x60: Fix rtc/rtt clocksAlexander Dahl
The RTC and RTT peripherals use the timing domain slow clock (TD_SLCK), sourced from the 32.768 kHz crystal oscillator or slow rc oscillator. The previously used Monitoring domain slow clock (MD_SLCK) is sourced from an internal RC oscillator which is most probably not precise enough for real time clock purposes. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Fixes: 5f6b33f46346 ("ARM: dts: sam9x60: add rtt") Signed-off-by: Alexander Dahl <ada@thorsis.com> Link: https://lore.kernel.org/r/20240821055136.6858-1-ada@thorsis.com [claudiu.beznea: removed () around the last commit description paragraph, removed " in front of "timing domain slow clock", described that TD_SLCK can also be sourced from slow rc oscillator] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-24ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO nodeManikandan Muralidharan
The driver data specific to each pinctrl GPIO bank compatible nodes are not the same and declaring additional compatible string as fallback has no specific purpose, hence, removing the "atmel,at91sam9x5-gpio" compatible from sam9x60 SoC DT. Note: The at91 pinctrl driver uses "atmel,at91rm9200-gpio" compatible string to find the number of active GPIO banks and identify the pinmux nodes.It should used as a constant across all DT for GPIO node banks that uses PIO3 based pinctrl driver Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240814061315.112564-4-manikandan.m@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-24ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodesManikandan Muralidharan
The driver data specific to each pinctrl GPIO bank compatible nodes are not the same and declaring additional compatible string as fallback has no specific purpose, hence, removing the additional compatible string from the pinctrl nodes in DT to comply with atmel,at91-pinctrl.txt documentation. Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240814061315.112564-3-manikandan.m@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-24ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux ↵Manikandan Muralidharan
controller The pinctrl subnodes that define the pin configuration of other devices under PIO3 pinmux controller are not simple memory mapped nodes.Ergo, change simple-bus to simple-mfd. Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240814061315.112564-2-manikandan.m@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: sama5d29_curiosity: Add reg_5v to supply PMIC nodesAndrei Simion
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-8-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama5d27_wlsom1: Add reg_5v to supply PMIC nodesAndrei Simion
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-7-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama5d2_icp: Add reg_5v to supply PMIC nodesAndrei Simion
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-6-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama7g54_curiosity: Add reg_5v to supply PMIC nodesAndrei Simion
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-5-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-19ARM: dts: microchip: at91-sama7g5ek: Add reg_5v to supply PMIC nodesAndrei Simion
Align with the datasheet by adding regulator-5v which supplies each node from the regulator using phandle to regulator-5v through pvin[1-4]-supply and lvin-supply. Co-developed-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Link: https://lore.kernel.org/r/20240812135231.43744-4-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-08ARM: dts: microchip: at91: align LED node name with bindingsKrzysztof Kozlowski
Bindings expect the LED node names to follow certain pattern, see dtbs_check warnings: at91sam9g15ek.dtb: leds: 'pb18', 'pd21' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alexander Dahl <ada@thorsis.com> Link: https://lore.kernel.org/r/20240701164952.577277-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-08ARM: dts: microchip: sam9x60: Move i2c address/size to dtsiAlexander Dahl
These properties are common for all i2c subnodes. Allows to add i2c device nodes (like an rtc for example) in other .dts files including sam9x60.dtsi without requiring to repeat these properties for each i2c device again and again. Found on a custom board after adding this in .dts: &flx5 { atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; status = "okay"; i2c5: i2c@600 { pinctrl-0 = <&pinctrl_flx5_default>; status = "okay"; pcf8523: rtc@68 { compatible = "nxp,pcf8523"; reg = <0x68>; }; }; }; … which created a warning like this: […]:236.4-17: Warning (reg_format): /ahb/apb/flexcom@f0004000/i2c@600/rtc@68:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) […]: Warning (pci_device_reg): Failed prerequisite 'reg_format' […]: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' […]: Warning (simple_bus_reg): Failed prerequisite 'reg_format' […]/linux-6.6.25/arch/arm/boot/dts/microchip/sam9x60.dtsi:283.19-299.7: Warning (i2c_bus_bridge): /ahb/apb/flexcom@f0004000/i2c@600: incorrect #address-cells for I2C bus also defined at […]:228.16-238.4 […]/linux-6.6.25/arch/arm/boot/dts/microchip/sam9x60.dtsi:283.19-299.7: Warning (i2c_bus_bridge): /ahb/apb/flexcom@f0004000/i2c@600: incorrect #size-cells for I2C bus also defined at […]:228.16-238.4 […]: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' […]: Warning (i2c_bus_reg): Failed prerequisite 'i2c_bus_bridge' […]: Warning (spi_bus_reg): Failed prerequisite 'reg_format' […]:234.19-237.5: Warning (avoid_default_addr_size): /ahb/apb/flexcom@f0004000/i2c@600/rtc@68: Relying on default #address-cells value […]:234.19-237.5: Warning (avoid_default_addr_size): /ahb/apb/flexcom@f0004000/i2c@600/rtc@68: Relying on default #size-cells value […]: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' […]: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size' This probably should have been done with commit 84f23f3284d5 ("ARM: dts: at91: sam9x60: move flexcom definitions") already, where those address-cells and size-cells properties were left in the board .dts files instead of moving them to the dtsi. Signed-off-by: Alexander Dahl <ada@thorsis.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240528153109.439407-1-ada@thorsis.com [claudiu.beznea: adjusted commit message as the properties are not required anymore] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-07ARM: dts: microchip: at91-sama7g5ek: add EEPROMsClaudiu Beznea
The main boot sequence for Microchip AT91 devices is one of the following: 1/ ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel 2/ ROM BOOT -> AT91Bootstrap -> Linux Kernel For case 1/ U-Boot is the stage where the Ethernet MAC addresses are set. For case 2/ where U-Boot is skipped the Ethernet MAC addresses need to be configured in Linux. For this add EEPROMs and nvmem-layout to describe EUI48 MAC address regions. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> [andrei.simion@microchip.com: Add nvmem-layout to describe eui48 mac region. Align compatible name with datasheet. Reword commit message.] Signed-off-by: Andrei Simion <andrei.simion@microchip.com> [claudiu.beznea: adjusted the new commit message] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20240703084704.197697-3-andrei.simion@microchip.com
2024-04-21ARM: dts: microchip: at91-sama7g54_curiosity: Replace ↵Andrei Simion
regulator-suspend-voltage with the valid property By checking the pmic node with microchip,mcp16502.yaml# 'regulator-suspend-voltage' does not match any of the regexes 'pinctrl-[0-9]+' from schema microchip,mcp16502.yaml# which inherits regulator.yaml#. So replace regulator-suspend-voltage with regulator-suspend-microvolt to avoid the inconsitency. Fixes: ebd6591f8ddb ("ARM: dts: microchip: sama7g54_curiosity: Add initial device tree of the board") Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240404123824.19182-3-andrei.simion@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-04-21ARM: dts: microchip: at91-sama7g5ek: Replace regulator-suspend-voltage with ↵Andrei Simion
the valid property By checking the pmic node with microchip,mcp16502.yaml# 'regulator-suspend-voltage' does not match any of the regexes 'pinctrl-[0-9]+' from schema microchip,mcp16502.yaml# which inherits regulator.yaml#. So replace regulator-suspend-voltage with regulator-suspend-microvolt to avoid the inconsitency. Fixes: 85b1304b9daa ("ARM: dts: at91: sama7g5ek: set regulator voltages for standby state") Signed-off-by: Andrei Simion <andrei.simion@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240404123824.19182-2-andrei.simion@microchip.com [claudiu.beznea: added a dot before starting the last sentence in commit description] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-23ARM: dts: microchip: sama7g5: add sama7g5 compatibleBalakrishnan Sambath
Add sama7g5 flexcom specific compatible in DT with fallbacks. Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com> Link: https://lore.kernel.org/r/20240223-b4-sama5d2-flexcom-yaml-v2-1-7e96c60c7701@microchip.com [claudiu.beznea: adapt for flexcom10] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-23ARM: dts: microchip: sam9x60: align dmas to the opening '<'Claudiu Beznea
Align dmas to the opening '<' to comply with the dts coding style, indentation section, point 3: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Link: https://lore.kernel.org/r/20240218151353.3612621-3-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-23ARM: dts: microchip: sama7g5: align dmas to the opening '<'Claudiu Beznea
Align dmas to the opening '<' to comply with the dts coding style, indentation section, point 3: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Link: https://lore.kernel.org/r/20240218151353.3612621-2-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-23ARM: dts: microchip: sama7g54_curiosity: Add initial device tree of the boardMihai Sain
Add initial device tree of the SAMA7G54 Curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240215091524.14732-4-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-23ARM: dts: microchip: sama7g5: Add flexcom 10 nodeMihai Sain
Add flexcom 10 node for usage on the SAMA7G54 Curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20240215091524.14732-3-mihai.sain@microchip.com [claudiu.beznea: align dmas to the opening '<'] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-03ARM: dts: microchip: gardena-smart-gateway: Use DMA for USART3Ezra Buehler
The AT91SAM9G25-based GARDENA smart Gateway uses USART3 (ttyS1) to communicate (over PPP, at 115200 baud) with the radio module. We have been experiencing packet loss and seeing errors on the ppp0 interface. Enabling DMA for the serial interface resolves the issues. Co-developed-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240102161839.702625-3-ezra.buehler@husqvarna.com [claudiu.beznea: s/Co-Developed-by/Co-developed-by to make checkpatch.pl happy, s/at91/microchip in commit title] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-02-03ARM: dts: microchip: at91sam9x5ek: Use DMA for DBGU serial portEzra Buehler
The UART controller does not seem to be fast enough to receive data (at 115200 baud) without dropping bytes when DMA is disabled. This has often been noticed when pasting SSH keys into the serial console (ttyS0). Only after multiple tries, the long strings would be successfully transferred without missing characters. Co-developed-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Michael Zimmermann <michael.zimmermann@grandcentrix.net> Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20240102161839.702625-2-ezra.buehler@husqvarna.com [claudiu.beznea: s/Co-Developed-by/Co-developed-by to make checkpatch.pl happy, s/at91/microchip in commit title] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-12-12ARM: dts: microchip: sama5d27_som1_ek: Remove mmc-ddr-3_3v property from ↵Mihai Sain
sdmmc0 node On board the sdmmc0 interface is wired to a SD Card socket. According with mmc-controller bindings, the mmc-ddr-3_3v property is used for eMMC devices to enable high-speed DDR mode (3.3V I/O). Remove the mmc-ddr-3_3v property from sdmmc0 node. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20231211070345.2792-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-12-08ARM: dts: microchip: sama5d27_wlsom1_ek: Remove mmc-ddr-3_3v property from ↵Mihai Sain
sdmmc0 node On board the sdmmc0 interface is wired to a SD Card socket. According with mmc-controller bindings, the mmc-ddr-3_3v property is used for eMMC devices to enable high-speed DDR mode (3.3V I/O). Remove the mmc-ddr-3_3v property from sdmmc0 node. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20231204072537.2991-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-11-19ARM: dts: microchip: sam9x60ek: Add IRQ support for ethernet PHYMihai Sain
Add interrupt support for ethernet phy subnode. Add PB8 definition to macb0 pinctrl. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20231109131149.46397-3-mihai.sain@microchip.com [claudiu.beznea: s/at91/microchip in commit title to match dts directory] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-11-19ARM: dts: microchip: sam9x60_curiosity: Add IRQ support for ethernet PHYMihai Sain
Add interrupt support for ethernet phy subnode. Add PB8 definition to macb0 pinctrl. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20231109131149.46397-2-mihai.sain@microchip.com [claudiu.beznea: s/at91/microchip in commit title to match dts directory] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-09-29ARM: dts: at91: sam9x60_curiosity: Add mandatory dt property for RTTTudor Ambarus
atmel,rtt-rtc-time-reg is a mandatory property and encodes the GPBR register used to store the time base when the RTT is used as an RTC. Align the RTT with what's currently done for sam9x60ek and sama7g5ek, and enable it by default even if RTC is also enabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> [nicolas.ferre@microchip.com: adapt to newer kernel] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230928143644.208515-1-nicolas.ferre@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-09-29ARM: dts: at91: sama5d29_curiosity: Add device tree for sama5d29_curiosity boardMihai Sain
Add initial device tree file for sama5d29_curiosity board. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Link: https://lore.kernel.org/r/20230919124606.26898-3-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-09-18ARM: dts: at91/trivial: fix typo in crypto DT namingNicolas Ferre
Fix typo in DT name for TDES node. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230906135838.59247-1-nicolas.ferre@microchip.com [claudiu.beznea: removed fixes tag as tdes node is not referenced anywhere by its node name] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-08-30Merge tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM devicetree updates from Arnd Bergmann: "These are the devicetree updates for Arm and RISC-V based SoCs, mainly from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and Starfive. Only a few new SoC got added: - TI AM62P5, a variant of the existing Sitara AM62x family - Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55 SoC. - Qualcomm ipq5018 is used in wireless access points - Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone platform. In total, 29 machines get added, which is low because of the summer break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST, Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of these are development and reference boards. Despite not adding a lot of new machines, there are over 700 patches in total, most of which are cleanups and minor fixes" * tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits) arm64: dts: use capital "OR" for multiple licenses in SPDX ARM: dts: use capital "OR" for multiple licenses in SPDX arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved ARM: dts: qcom: apq8064: add support to gsbi4 uart riscv: dts: change TH1520 files to dual license riscv: dts: thead: add BeagleV Ahead board device tree dt-bindings: riscv: Add BeagleV Ahead board compatibles ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs ARM: dts: stm32: support display on stm32f746-disco board ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: add ltdc support on stm32f746 MCU arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM arm64: dts: qcom: sdm670: Add PDC riscv: dts: starfive: fix jh7110 qspi sort order ...
2023-08-04ARM: dts: at91: remove duplicated entriesClaudiu Beznea
Remove duplicated DTC_FLAGS_<board> := -@ entries which intends to enable the building of device tree overlays. Commit 724ba6751532 ("ARM: dts: Move .dts files to vendor sub-directories") added those entries at the beginning of file w/o removing the already available entries spread though file. Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230721053918.33944-1-claudiu.beznea@tuxon.dev Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-08-02ARM: dts: microchip: split interrupts per cellsKrzysztof Kozlowski
Each interrupt should be in its own cell. This is much more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730111542.98238-1-krzysztof.kozlowski@linaro.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31ARM: dts: at91: ksz9477_evb: Add tx-internal-delay-ps property for port5Lukasz Majewski
Without this change the KSZ9477 Evaluation board's Linux (v6.5-rc1) shows following device warning: 'ksz-switch spi1.0: Port 5 interpreting RGMII delay settings based on "phy-mode" property, please update device tree to specify "rx-internal-delay-ps" and "tx-internal-delay-ps"' This is not critical, as KSZ driver by itself assigns default value of tx delay to 2000 ps (as 'rgmii-txid' is set as PHY mode). However, to avoid extra warnings in logs - the missing 'tx-internal-delay-ps' has been specified with the default value of 2000 ps. Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20230727080656.3828397-1-lukma@denx.de Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31ARM: dts: at91: ksz9477_evb: Add missing timer nodesLukasz Majewski
Without this change the KSZ9477-EVB board hangs just after passing execution flow from u-boot to Linux kernel. This code has been copied from at91-sama5d3_xplained.dts. Test setup: Linux 6.5-rc1 Config: arch/arm/configs/sama5_defconfig Toolchain: gcc-linaro-7.3.1-2018.05-x86_64_arm-linux-gnueabi Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20230712152111.3756211-1-lukma@denx.de Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-31ARM: dts: at91-vinco: Fix "status" valuesRob Herring
The defined value for "status" is "disabled", not "disable". Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230626221010.3946263-1-robh@kernel.org Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-29ARM: dts: microchip: add missing space before {Krzysztof Kozlowski
Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230705150058.293942-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-29ARM: dts: microchip: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230702185108.43959-1-krzysztof.kozlowski@linaro.org [claudiu.beznea: added link] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-07-21ARM: dts: at91: sam9x60: fix the SOC detectionDurai Manickam KR
Remove the dbgu compatible strings in the UART submodule of the flexcom for the proper SOC detection. Fixes: 99c808335877 (ARM: dts: at91: sam9x60: Add missing flexcom definitions) Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Link: https://lore.kernel.org/r/20230712100042.317856-1-durai.manickamkr@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-29Merge tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC devicetree updates from Arnd Bergmann: "The biggest change this time is for the 32-bit devicetree files, which are all moved to a new location, using separate subdirectories for each SoC vendor, following the same scheme that is used on arm64, mips and riscv. This has been discussed for many years, but so far we never did this as there was a plan to move the files out of the kernel entirely, which has never happened. The impact of this will be that all external patches no longer apply, and anything depending on the location of the dtb files in the build directory will have to change. The installed files after 'make dtbs_install' keep the current location. There are six added SoCs here that are largely variants of previously added chips. Two other chips are added in a separate branch along with their device drivers. - The Samsung Exynos 4212 makes its return after the Samsung Galaxy Express phone is addded at last. The SoC support was originally added in 2012 but removed again in 2017 as it was unused at the time. - Amlogic C3 is a Cortex-A35 based smart IP camera chip - Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of the still common MSM8916 (Snapdragon 410) phone chip that has been supported for a long time. - Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end laptop chips, used in the Lenovo Flex 5G, which is added along with the reference board. - Qualcomm SDX75 is the latest generation modem chip that is used as a peripherial in phones but can also run a standalone Linux. Unlike the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55. - Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the Xuantie C910 core, a step up from all previously added rv64 chips. All of the above come with reference board implementations, those included there are 39 new board files, but only five more 32-bit this time, probably a new low: - Marantec Maveo board based on dhcor imx6ull module - Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip - Epson Moverio BT-200 AR glasses based on TI OMAP4 - PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM - ICnova ADB4006 board based on Allwinner A20 On the 64-bit side, there are also fewer addded machines than we had in the recent releases: - Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device. - NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234 - Qualcomm gains support for 6 reference boards on various members of their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top of the various reference platforms for their new chips. - Rockchips support for several newer boards: Indiedroid Nova (rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn Fastrhino R66S/R68S (rk3568) - TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex Verdin family with AM62 COM, carrier and dev boards Other changes to existing boards contain the usual minor improvements along with - continued updates to clean up dts files based on dtc warnings and binding checks, in particular cache properties and node names - support for devicetree overlays on at91, bcm283x - significant additions to existing SoC support on mediatek, qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST STM32MP1 As usual, a lot more detail is available in the individual merge commits" * tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits) ARM: mvebu: fix unit address on armada-390-db flash ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include ARM: dts: lan966x: kontron-d10: add PHY interrupts ARM: dts: lan966x: kontron-d10: fix SPI CS ARM: dts: lan966x: kontron-d10: fix board reset ARM: dts: at91: Enable device-tree overlay support for AT91 boards arm: dts: Enable device-tree overlay support for AT91 boards arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller ARM: dts: at91: use generic name for shutdown controller ARM: dts: BCM5301X: Add cells sizes to PCIe nodes dt-bindings: firmware: brcm,kona-smc: convert to YAML riscv: dts: sort makefile entries by directory riscv: defconfig: enable T-HEAD SoC MAINTAINERS: add entry for T-HEAD RISC-V SoC riscv: dts: thead: add sipeed Lichee Pi 4A board device tree riscv: dts: add initial T-HEAD TH1520 SoC device tree riscv: Add the T-HEAD SoC family Kconfig option ...
2023-06-21Merge tag 'arm-dts-mv-for-6.5' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into soc/dt ARM: dts: Move .dts files to vendor sub-directories The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. * tag 'arm-dts-mv-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: ARM: dts: Move .dts files to vendor sub-directories kbuild: Support flat DTBs install ARM: dts: Add .dts files missing from the build ARM: dts: allwinner: Use quoted #include Link: https://lore.kernel.org/r/20230621185025.GA3197738-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
generated by cgit (git 2.34.1) at 2025-07-16 00:28:31 +0000