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2025-05-20arm64: dts: mediatek: mt7988a-bpi-r4: enable xsphyFrank Wunderlich
Enable XS-Phy on Bananapi R4 for pcie2. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250422132438.15735-9-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2Frank Wunderlich
First usb and third pcie controller on mt7988 need a xs-phy to work properly. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250422132438.15735-8-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988a-bpi-r4: allow hw variants of bpi-r4Frank Wunderlich
Sinovoip has released other variants of Bananapi-R4 board. The known changes affecting only the LAN SFP+ slot which is replaced by a 2.5G phy with optional PoE. Just move the common parts to a new dtsi and keep differences (only i2c for lan-sfp) in dts. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250422132438.15735-3-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groupsThuan Nguyen
White Hawk ARD audio uses a clock generated by the TPU, but commit 3d144ef10a44 ("pinctrl: renesas: r8a779g0: Fix TPU suffixes") renamed pin group "tpu_to0_a" to "tpu_to0_b". Update DTS accordingly otherwise the sound driver does not receive a clock signal. Fixes: 3d144ef10a448f89 ("pinctrl: renesas: r8a779g0: Fix TPU suffixes") Signed-off-by: Thuan Nguyen <thuan.nguyen-hong@banvien.com.vn> Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/TYCPR01MB8740608B675365215ADB0374B49CA@TYCPR01MB8740.jpnprd01.prod.outlook.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-19arm64: dts: qcom: sm4450: Add RPMh power domains supportAjit Pandey
Add device node for RPMh power domains on Qualcomm SM4450 platform. Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250417-sm4450_rpmhpd-v1-3-361846750d3a@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: add retimers, dp altmode supportJens Glathe
comparing with CRD and other dts for a more complete support of the 7X only retimers, gpios, regulators, dp outputs Tested-by: Rob Clark <robdclark@gmail.com> Tested-by: Jos Dehaes <jos.dehaes@gmail.com> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250417-slim7x-retimer-v2-1-dbe2dd511137@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: ipq5424: Enable PCIe PHYs and controllersManikanta Mylavarapu
Enable the PCIe controller and PHY nodes corresponding to RDP466. The IPQ5424 RDP466 does not have a wake gpio because it does not support low power mode. It only supports a perst gpio. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250416122538.2953658-3-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodesManikanta Mylavarapu
Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices found on IPQ5424 platform. The PCIe0 & PCIe1 are 1-lane Gen3 host whereas PCIe2 & PCIe3 are 2-lane Gen3 host. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250416122538.2953658-2-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sc7280: Mark FastRPC context banks as dma-coherentXilin Wu
The FastRPC context banks are DMA-coherent on sc7280 platform. Mark them as such. This allows LLM inferencing on the CDSP using Qualcomm AI Engine Direct SDK on the qcs6490 platform. Signed-off-by: Xilin Wu <sophon@radxa.com> Link: https://lore.kernel.org/r/20250416-sc7280-fastrpc-dma-v1-1-60ca91116b1e@radxa.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdx75-idp: Enable QPIC BAM & QPIC NAND supportKaushal Kumar
Enable QPIC BAM and QPIC NAND devicetree nodes for Qualcomm SDX75-IDP board. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415072756.20046-6-quic_kaushalk@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdx75: Add QPIC NAND supportKaushal Kumar
Add devicetree node to enable support for QPIC NAND controller on Qualcomm SDX75 platform. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415072756.20046-5-quic_kaushalk@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdx75: Add QPIC BAM supportKaushal Kumar
Add devicetree node to enable support for QPIC BAM DMA controller on Qualcomm SDX75 platform. Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com> Link: https://lore.kernel.org/r/20250415072756.20046-4-quic_kaushalk@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: qcm2290: Add crypto engineLoic Poulain
Add Qualcomm Crypto Engine (QCE) and BAM related nodes for this SoC. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250331123641.1590573-1-loic.poulain@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: x1e80100-vivobook-s15: Add bluetoothMaud Spierings
Add bluetooth for the asus vivobook s15 Describe wlan configuration Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Maud Spierings <maud_spierings@hotmail.com> Link: https://lore.kernel.org/r/20250328-asus_qcom_display-v7-1-322d2bff937d@hotmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset propertiesKrishna Chaitanya Chundru
Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data rates used in lane equalization procedure. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250328-preset_v6-v9-1-22cfa0490518@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: qcs615: Fix up UFS clocksKonrad Dybcio
The clocks are out of order with the bindings' expectations. Reorder them to resolve the errors. Fixes: a6a9d10e7969 ("arm64: dts: qcom: qcs615: add UFS node") Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-12-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sa8775p: Clean up the PSCI PDsKonrad Dybcio
Because SA8775P comes with two disjoint CPU clusters, we have to follow a similar topology description like the one in sm8750.dtsi, so: system_pd cluster0_pd cpu_pd0 ... cluster1_pd cpu_pd4 ... Do that & wire it up to APPS RSC to make the bindings checker happy. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-11-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: msm8996-oneplus: Add SLPI VDD_PXKonrad Dybcio
The PX line powers some hardware related to sensors. Assume the board doesn't reinvent what MTP has established and hook up LVS2 @ 1.8V as such. This fixes the 'is required' type of bindings validator errors. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-10-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sm6350-pdx213: Wire up USB regulatorsKonrad Dybcio
Wire up the regulators based on the downstream release to appease the devicetree checker. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-9-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: msm8998-yoshino: Add QUSB2PHY VDD supplyKonrad Dybcio
Set the supply as required by bindings, to silence the warning: 'vdd-supply' is a required property The value is inferred from MTP schematics, but it shouldn't change between boards due to specific electrical characteristics. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-8-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: msm8998-mtp: Add QUSB2PHY VDD supplyKonrad Dybcio
Set the supply as required by bindings, to silence the warning: 'vdd-supply' is a required property Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-7-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: msm8998-fxtec: Add QUSB2PHY VDD supplyKonrad Dybcio
Set the supply as required by bindings, to silence the warning: 'vdd-supply' is a required property The value is inferred from MTP schematics, but it shouldn't change between boards due to specific electrical characteristics. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-6-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: qcs615: Remove disallowed property from AOSS_QMP nodeKonrad Dybcio
AOSS_QMP is not allowed to be a power domain provider, remove the associated -cells property. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-5-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: msm8998: Remove mdss_hdmi_phy phandle argumentKonrad Dybcio
The node has #clock-cells = <0>, as it only provides a single clock output. This leads to a turbo sneaky bug, where the dt checker shows that we have additional clocks in the array: clock-controller@c8c0000: clocks: [[3, 0], [39, 178], [156, 1], [156, 0], [157, 1], [157, 0], [158], [0], [0], [0], [39, 184]] is too long ..which happens due to dtc interpreting <&mdss_hdmi_phy 0> as <&mdss_hdmi_phy>, <0> after taking cells into account. Remove the superfluous argument to both silence the warning and fix the index-based lookup of subsequent entries in "clocks". Fixes: 2150c87db80c ("arm64: dts: qcom: msm8998: add HDMI nodes") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-4-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdm845: Add specific APPS RSC compatibleKonrad Dybcio
SDM845 comes in a couple firmware flavors, some of which don't support PSCI in OSI mode. That prevents the power domain exepcted by the RSC node from providing useful information on system power collapse. Use the platform-specific compatible to allow not passing one. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-3-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sc7180: Add specific APPS RSC compatibleKonrad Dybcio
SC7180 comes in a couple firmware flavors, some of which don't support PSCI in OSI mode. That prevents the power domain exepcted by the RSC node from providing useful information on system power collapse. Use the platform-specific compatible to allow not passing one. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-topic-more_dt_bindings_fixes-v2-2-b763d958545f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllersPraveenkumar I
Enable the PCIe controller and PHY nodes for RDP 441. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20250317100029.881286-5-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: ipq5332: Add PCIe related nodesPraveenkumar I
Add phy and controller nodes for pcie0_x1 and pcie1_x2. Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250317100029.881286-4-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: ipq9574: Add MHI to pcie nodesVaradarajan Narayanan
Append the MHI range to the pcie nodes. Append the MHI register range to IPQ9574. This is an optional range used by the dwc controller driver to print debug stats via the debugfs file 'link_transition_count'. Convert reg-names to vertical list. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250317100029.881286-3-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sar2130p: add display nodesDmitry Baryshkov
Add display controller, two DSI hosts, two DSI PHYs and a single DP controller. Link DP to the QMP Combo PHY. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250308-sar2130p-display-v1-10-1d4c30f43822@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdm845-starqltechn: add modem supportDzmitry Sankouski
Add support for modem and ipa(IP Accelerator). Add spss reserved memory node. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Link: https://lore.kernel.org/r/20250225-starqltechn_integration_upstream-v9-12-a5d80375cb66@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdm845-starqltechn: add graphics supportDzmitry Sankouski
Add support for gpu and panel. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Link: https://lore.kernel.org/r/20250225-starqltechn_integration_upstream-v9-11-a5d80375cb66@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: sdm845-starqltechn: add initial sound supportDzmitry Sankouski
Add support for sound (headphones and mics only) Also redefine slpi reserved memory, because adsp_mem overlaps with slpi_mem inherited from sdm845.dtsi. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Link: https://lore.kernel.org/r/20250225-starqltechn_integration_upstream-v9-10-a5d80375cb66@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19arm64: dts: qcom: qrb2210-rb1: add Bluetooth supportDmitry Baryshkov
Add support for the onboard WCN3950 BT/WiFi chip. Corresponding firmware has been merged to linux-firmware and should be available in the next release. Bluetooth: hci0: setting up wcn399x Bluetooth: hci0: QCA Product ID :0x0000000f Bluetooth: hci0: QCA SOC Version :0x40070120 Bluetooth: hci0: QCA ROM Version :0x00000102 Bluetooth: hci0: QCA Patch Version:0x00000001 Bluetooth: hci0: QCA controller version 0x01200102 Bluetooth: hci0: QCA Downloading qca/cmbtfw12.tlv Bluetooth: hci0: QCA Downloading qca/cmnv12.bin Bluetooth: hci0: QCA setup on UART is completed Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250207-rb1-bt-v4-6-d810fc8c94a9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-17arm64: dts: qcom: qcm2290: fix (some) of QUP interconnectsDmitry Baryshkov
While adding interconnect support for the QCM2290 platform some of them got the c&p error, rogue MASTER_APPSS_PROC for the config_noc interconnect. Turn that into SLAVE_QUP_0 as expected. Fixes: 5b970ff0193d ("arm64: dts: qcom: qcm2290: Hook up interconnects") Reported-by: Konrad Dybcio <konradybcio@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250207-rb1-bt-v4-4-d810fc8c94a9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-17arm64: dts: qcom: sc8280xp-crd: Enable SLPIKonrad Dybcio
Enable the SLPI remoteproc and declare the firmware path. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250517-topic-8280_slpi-v2-5-1f96f86ac3ae@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-17arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: enable sensors DSPDmitry Baryshkov
Enable SLPI / Sensors DSP present on the SC8280XP platforms / Lenovo X13s laptop. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250517-topic-8280_slpi-v2-4-1f96f86ac3ae@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-17arm64: dts: qcom: sc8280xp: Add SLPIKonrad Dybcio
SC8280XP features a SLPI (Sensor Low Power Island) core. Describe it. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250517-topic-8280_slpi-v2-3-1f96f86ac3ae@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-17arm64: dts: qcom: sc8280xp: Fix node orderKonrad Dybcio
Certain /soc@0 subnodes are very out of order. Reshuffle them. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250517-topic-8280_slpi-v2-2-1f96f86ac3ae@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-16arm64: dts: qcom: x1e80100: Enable cpufreqSibi Sankar
Enable cpufreq on X1E80100 SoCs through the SCMI perf protocol node. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Link: https://lore.kernel.org/r/20241030130840.2890904-3-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-16arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodesSibi Sankar
Add the cpucp mailbox and sram nodes required by SCMI perf protocol on X1E80100 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Link: https://lore.kernel.org/r/20241030130840.2890904-2-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-16arm64: dts: qcom: x1e80100-hp-x14: drop bogus USB retimerJohan Hovold
Jens reported that the sanity checks added to the new ps883x USB retimer driver breaks USB and display on the HP X14. Turns out the X14 only has a retimer on one of the ports, but this initially went unnoticed due to the missing sanity check (and error handling) in the retimer driver. Drop the non-existing retimer from the devicetree to enable the second USB port and the display subsystem. Note that this also matches the ACPI tables. Fixes: 6f18b8d4142c ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14") Cc: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Tested-by: Juerg Haefliger <juerg.haefliger@canonical.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20250328084154.16759-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-16arm64: dts: qcom: x1e78100-t14s: Enable audio headset supportSrinivas Kandagatla
On Lenovo ThinkPad T14s, the headset is connected via a HiFi mux to support CTIA and OMTP headsets. This switch is used to minimise pop and click during headset type switching. Enable the mux controls required to power this switch along with wiring up gpio that control the headset switching. Without this, headset audio will be very noisy and might see headset detection errors. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250327100633.11530-7-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-16arm64: dts: qcom: x1e78100-t14s: enable SDX62 modemJohan Hovold
Enable PCIe5 and the SDX62 modem present on some T14s. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250327081427.19693-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-15arm64: dts: rockchip: Improve LED config for NanoPi R5SDiederik de Haas
The NanoPi R5S has 4 GPIO LEDs, a RED one for SYStem power and 3 green LEDs meant to indicate that a cable is connected to either of the 2.5GbE LAN ports or the 1GbE WAN port. In the NanoPi R5S schematic (2204; page 19) as well as on the PCB and on the case, SYS is used and not POWER. So replace 'power' with 'sys'. But keep the 'power_led' label/phandle even though the kernel doesn't use it, but it may be used outside of it. The SYStem LED already had "heartbeat" as its default-trigger. Set the default-trigger to "netdev" for the NICs so they will show when LAN1/LAN2/WAN is connected and set their default-state to "off". Also assign labels as close as possible to the labels on the case, while still being descriptive enough in their own right. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250513170056.96259-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: add px30-pp1516 base dtsi and board variantsHeiko Stuebner
PP1516 are Touchscreen devices built around the PX30 SoC and companion devices to PX30-Cobra, again with multiple display options. The devices feature an EMMC, OTG port and a 720x1280 display with a touchscreen and camera Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-7-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: add px30-cobra base dtsi and board variantsHeiko Stuebner
Cobra are Touchscreen devices built around the PX30 SoC using a variety of display options. The devices feature an EMMC, network port, usb host + OTG ports and a 720x1280 display with a touchscreen. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-5-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneckHeiko Stuebner
Using snps,reset-* properties to handle the ethernet-phy resets is deprecated and instead a real phy node should be used. Move the Ringneck phy-reset properties to such a node Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Tested-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: add basic mdio node to px30Heiko Stuebner
Using snps,reset-* properties for handling the phy-reset is deprecated and instead a real phy node should be defined that then contains the reset-gpios handling. To facilitate this, add the core mdio node under the px30's gmac, similar to how the other Rockchip socs already do this. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 ↵Quentin Schulz
Puma with Haikou The u2phy0_host port is the part of the USB PHY0 (namely the HOST0_DP/DM lanes) which routes directly to the USB2.0 HOST controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG controller (dwc3), which we do use. The HOST0_DP/DM lanes aren't routed on RK3399 Puma so let's simply disable the USB2.0 controllers. USB3 OTG has been known to be unstable on RK3399 Puma Haikou for a while, one of the recurring issues being that only USB2 is detected and not USB3 in host mode. Reading the justification above and seeing that we are keeping u2phy0_host in the Haikou carrierboard DTS probably may have bothered you since it should be changed to u2phy0_otg. The issue is that if it's switched to that, USB OTG on Haikou is entirely broken. I have checked the routing in the Gerber file, the lanes are going to the expected ball pins (that is, NOT HOST0_DP/DM). u2phy0_host is for sure the wrong part of the PHY to use, but it's the only one that works at the moment for that board so keep it until we figure out what exactly is broken. No intended functional change. [1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf Chapter 2 USB2.0 PHY Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-5-4a76a474a010@thaumatec.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit (git 2.34.1) at 2025-07-15 23:08:48 +0000