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2025-05-21Merge tag 'sunxi-fixes-for-6.15' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes Allwinner fixes for 6.15 Only one fix: Switch back to I2C for PMICs on Allwinner H6 devices. Apparently using Allwinner's proprietary bus ended up causing issues when the PMIC was sharing the bus with other devices. * tag 'sunxi-fixes-for-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: Revert "arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection" Link: https://lore.kernel.org/r/aCaeLgjZllV7bauX@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21arm64: defconfig: Ensure CRYPTO_CHACHA20_NEON is selectedFabio Estevam
Since commit 17ec3e71ba79 ("crypto: lib/Kconfig - Hide arch options from user"), the CRYPTO_CHACHA20_NEON option is no longer selected by default due to changes in how crypto library options are exposed and selected. To restore the previous behavior and ensure CRYPTO_CHACHA20_NEON is enabled, explicitly select CONFIG_CRYPTO_CHACHA20 in the defconfig. This pulls in CRYPTO_LIB_CHACHA_INTERNAL and allows CRYPTO_CHACHA20_NEON to be selected automatically as before. Fixes: 17ec3e71ba79 ("crypto: lib/Kconfig - Hide arch options from user") Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21arm64: dts: nuvoton: Add pinctrlWilliam A. Kennington III
This is critical to support multifunction pins shared between devices as well as generic GPIOs. Signed-off-by: William A. Kennington III <william@wkennington.com> Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21mailmap: update and consolidate Casey Connolly's name and emailCasey Connolly
I've used several email addresses and a previous name to contribute. Consolidate all of these to my primary email and update my name. Link: https://lkml.kernel.org/r/20250517223237.15647-2-casey.connolly@linaro.org Signed-off-by: Casey Connolly <casey.connolly@linaro.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-05-21arm64: defconfig: enable ACPM protocol and Exynos mailboxTudor Ambarus
Enable the Samsung Exynos ACPM protocol and its transport layer, the Exynos mailbox driver. Samsung Exynos platforms implement ACPM to provide support for PMIC, clock frequency scaling, clock configuration and temperature sensors. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20250207-gs101-acpm-dt-v4-4-230ba8663a2d@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250513101754.23158-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'dt64-cleanup-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM64 DTS for v6.16 Two cleanups which were missed on mailing lists - align GPIO node names with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894. * tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred style arm64: dts: mediatek: mt7622: Align GPIO hog name with bindings Link: https://lore.kernel.org/r/20250513104216.25803-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'amlogic-arm64-dt-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT for v6.16: - Amlogic A4 Pinctrl support - UART RX/TX pull-up pinconf properties for all SoCs - SARADC support for the S905L SoC variant - Drop clock-latency in CPU node - Amlogic clk measure support for S4 & C3 Socs - Amlogic S6/S7/S7D initial support - I2C default pull-up bias pinconf property on Amlogic GXL based boards - Amlogic A4 & A5 Reset Controller support - New Boards: - Amlogic S6 BL209 Reference Board - Amlogic S7 BP201 Reference Board - Amlogic S7D BM202 Reference Board - Amlogic S805Y xiaomi-aquaman/Mi TV Stick * tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (21 commits) arm64: dts: amlogic: Add A5 Reset Controller arm64: dts: amlogic: Add A4 Reset Controller arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV Stick dt-bindings: arm: amlogic: add S805Y and Mi TV Stick arm64: dts: amlogic: gxl: set i2c bias to pull-up arm64: dts: add support for S7D based Amlogic BM202 arm64: dts: add support for S7 based Amlogic BP201 arm64: dts: add support for S6 based Amlogic BL209 dt-bindings: arm: amlogic: add S7D support dt-bindings: arm: amlogic: add S7 support dt-bindings: arm: amlogic: add S6 support arm64: dts: amlogic: S4: Add clk-measure controller node arm64: dts: amlogic: C3: Add clk-measure controller node arm64: dts: amlogic: Drop redundant CPU "clock-latency" arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatible arm64: dts: amlogic: a1: enable UART RX and TX pull up by default arm64: dts: amlogic: axg: enable UART RX and TX pull up by default arm64: dts: amlogic: g12: enable UART RX and TX pull up by default arm64: dts: amlogic: gxl: enable UART RX and TX pull up by default arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by default ... Link: https://lore.kernel.org/r/5f7d3fa4-2d9d-450b-b384-abdd903284dc@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'samsung-dt64-6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.16 1. Tesla FSD: Add Ethernet. 2. ExynosAutov920: Add more serial nodes, clock controllers for CPU cluster CL0, CL1 and CL2. 3. New Exynos7870 SoC with pretty decent coverage: pin controllers, clock controllers, I2C, MMC, serial and USB. New boards using Exynos7870: Samsung Galaxy J7 Prime, Samsung Galaxy A2 Core and Samsung Galaxy J6. 4. Google GS101: Add pmu-intr-gen syscon node for proper CPU hotplug. 5. Switch USI (serial engines) nodes to new samsung,mode constant coming with DT bindings v6.15-rc1. * tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: gs101: add pmu-intr-gen syscon node arm64: dts: exynos: add initial support for Samsung Galaxy J6 arm64: dts: exynos: add initial support for Samsung Galaxy A2 Core arm64: dts: exynos: add initial support for Samsung Galaxy J7 Prime arm64: dts: exynos: add initial devicetree support for exynos7870 dt-bindings: arm: samsung: add compatibles for exynos7870 devices arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes arm64: dts: exynosautov920: add cpucl0 clock DT nodes arm64: dts: exynos: Add DT node for all UART ports arm64: dts: exynos: update all samsung,mode constants arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC Link: https://lore.kernel.org/r/20250513101023.21552-6-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'ti-k3-config-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/defconfig TI K3 defconfig updates for v6.16 - Enable Cadence DSI and PHY driver support for DSI support on BeagleBone-AI64, BeaglePlay, BeagleY-AI, All TI EVMs etc. - Enable hardware spinlock and Quadrature Encoder Pulse (QEP) support for AM64-SK and other boards. - Enable TMP102 driver to support Phytec phyCORE-AM68x/TDA4x and the phyGATE-Tauri-L-iMX8MM - Enable TPIC2810 for AM64-SK LED GPIO control. * tag 'ti-k3-config-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: defconfig: Enable TPIC2810 GPIO expander arm64: defconfig: Enable TMP102 as module arm64: defconfig: Enable hwspinlock and eQEP for K3 arm64: defconfig: Add CDNS_DSI and CDNS_PHY config Link: https://lore.kernel.org/r/20250512144738.dv63fd4fyuly3s44@diocese Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21Merge tag 'ti-k3-dt-for-v6.16' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.16 Generic Fixups/Cleanups: * am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot SoC Specific features and Fixes: AM62Ax: * C7x and R5F support added * Bug fix for emmc clock to point to default * CPUFreq thermal throttling on thermal alert AM62P5: * Add RNG Node (common to J722s) * Bug fix for emmc clock to point to default (common to J722S) AM625: * Wakeup R5 node * Bug fix for emmc clock to point to default * PRUSS-M support * New GPU bindings AM64: * Switch to 64-bit address space for PCIe0 * Add PCIe control nodes for main_conf region * Reserve timer nodes used by MCU F/w. AM65: * MMC: Add missing delay timing values for SDR and legacy modes * Add compatible for AM65x syscon and PCIe control properties (dtbs_check fixes) J7200: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J721E: * PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1. J721S2: * GPU node for Imagination Tech Rouge BXS GPU. * PCIe control node to scm_conf, switch to 64-bit address space for PCIe1. J722s/AM67A: * Switch serdes status to be enabled by board file than at SoC level. * Switch to 64-bit address space for PCIe0. J784S4/J742S2/AM69: * Add ASPCIE0 and enable output for PCIe1 * Fix length of serdes_ln_ctrl. * Switch to 64-bit address space for PCIe0,1. Board Specific: AM62Ax: * SK: co-processors C7x, R5, PWM support added * phycore-som: co-processors C7x, R5 AM62P5: * Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support. * SK: Add remote processor support, PWM AM625: * Add BeagleBoard.org PocketBeagle-2 support * phycore-som: Enable R5F support * Verdin: Add eeprom compatible fallback * SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays (dtbs_check fixes) * BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes) * phyboard-lyra: Add cooling maps for fan * emmc bug fixes: add non-removable flag for eMMC. AM65: * EVM: Add missing power supply description ofr Rocktech panel (dtbs_check fixes) J721E: * EVM: Enable OSPI1 * EVM/SK: Dt nodes description for mandatory power suplpies for panel and sensors (dtbs_check fixes) J721S2/AM68: * Add phyBOARD-Izar-AM68x * am68-SK: Fix regulator hierarchy J722s/AM67A: * EVM: Add mux controls for CSI2, power regulator nodes and add overlays for quad IMX219 and TEVI OV5640. * BeagleY-AI: Add bootph for main_gpio1 J784S4/J742S2/AM69: * usxgmii expansion board: Drop un-necessary pinctrl-names * evm: Add overlay for USB0 Type-A option * tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits) arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX arm64: dts: ti: j722s-evm: Add DT nodes for power regulators arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E arm64: dts: ti: k3-j721s2: Add GPU node arm64: dts: ti: k3-am62: New GPU binding details arm64: dts: ti: k3-am62-main: Add PRUSS-M node arm64: dts: ti: k3-am64: Reserve timers used by MCU FW arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors ... Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21arm64: dts: blaize-blzp1600: Enable GPIO supportNikolaos Pasaloukos
Blaize BLZP1600 uses the custom silicon provided from VeriSilicon to add GPIO support. This interface is used to control signals on many other peripherals, such as Ethernet, USB, SD and eMMC. Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com> Link: https://lore.kernel.org/r/20250512133302.151621-1-nikolaos.pasaloukos@blaize.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21include: pe.h: Fix PE definitionsPali Rohár
* Rename constants to their standard PE names: - MZ_MAGIC -> IMAGE_DOS_SIGNATURE - PE_MAGIC -> IMAGE_NT_SIGNATURE - PE_OPT_MAGIC_PE32_ROM -> IMAGE_ROM_OPTIONAL_HDR_MAGIC - PE_OPT_MAGIC_PE32 -> IMAGE_NT_OPTIONAL_HDR32_MAGIC - PE_OPT_MAGIC_PE32PLUS -> IMAGE_NT_OPTIONAL_HDR64_MAGIC - IMAGE_DLL_CHARACTERISTICS_NX_COMPAT -> IMAGE_DLLCHARACTERISTICS_NX_COMPAT * Import constants and their description from readpe and file projects which contains current up-to-date information: - IMAGE_FILE_MACHINE_* - IMAGE_FILE_* - IMAGE_SUBSYSTEM_* - IMAGE_DLLCHARACTERISTICS_* - IMAGE_DLLCHARACTERISTICS_EX_* - IMAGE_DEBUG_TYPE_* * Add missing IMAGE_SCN_* constants and update their incorrect description * Fix incorrect value of IMAGE_SCN_MEM_PURGEABLE constant * Add description for win32_version and loader_flags PE fields Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2025-05-21KVM: arm64: np-guest CMOs with PMD_SIZE fixmapVincent Donnefort
With the introduction of stage-2 huge mappings in the pKVM hypervisor, guest pages CMO is needed for PMD_SIZE size. Fixmap only supports PAGE_SIZE and iterating over the huge-page is time consuming (mostly due to TLBI on hyp_fixmap_unmap) which is a problem for EL2 latency. Introduce a shared PMD_SIZE fixmap (hyp_fixblock_map/hyp_fixblock_unmap) to improve guest page CMOs when stage-2 huge mappings are installed. On a Pixel6, the iterative solution resulted in a latency of ~700us, while the PMD_SIZE fixmap reduces it to ~100us. Because of the horrendous private range allocation that would be necessary, this is disabled for 64KiB pages systems. Suggested-by: Quentin Perret <qperret@google.com> Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-11-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Stage-2 huge mappings for np-guestsVincent Donnefort
Now np-guests hypercalls with range are supported, we can let the hypervisor to install block mappings whenever the Stage-1 allows it, that is when backed by either Hugetlbfs or THPs. The size of those block mappings is limited to PMD_SIZE. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-10-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Add a range to pkvm_mappingsQuentin Perret
In preparation for supporting stage-2 huge mappings for np-guest, add a nr_pages member for pkvm_mappings to allow EL1 to track the size of the stage-2 mapping. Signed-off-by: Quentin Perret <qperret@google.com> Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-9-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Convert pkvm_mappings to interval treeQuentin Perret
In preparation for supporting stage-2 huge mappings for np-guest, let's convert pgt.pkvm_mappings to an interval tree. No functional change intended. Suggested-by: Vincent Donnefort <vdonnefort@google.com> Signed-off-by: Quentin Perret <qperret@google.com> Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-8-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Add a range to __pkvm_host_test_clear_young_guest()Vincent Donnefort
In preparation for supporting stage-2 huge mappings for np-guest. Add a nr_pages argument to the __pkvm_host_test_clear_young_guest hypercall. This range supports only two values: 1 or PMD_SIZE / PAGE_SIZE (that is 512 on a 4K-pages system). Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-7-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Add a range to __pkvm_host_wrprotect_guest()Vincent Donnefort
In preparation for supporting stage-2 huge mappings for np-guest. Add a nr_pages argument to the __pkvm_host_wrprotect_guest hypercall. This range supports only two values: 1 or PMD_SIZE / PAGE_SIZE (that is 512 on a 4K-pages system). Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-6-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Add a range to __pkvm_host_unshare_guest()Vincent Donnefort
In preparation for supporting stage-2 huge mappings for np-guest. Add a nr_pages argument to the __pkvm_host_unshare_guest hypercall. This range supports only two values: 1 or PMD_SIZE / PAGE_SIZE (that is 512 on a 4K-pages system). Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-5-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Add a range to __pkvm_host_share_guest()Vincent Donnefort
In preparation for supporting stage-2 huge mappings for np-guest. Add a nr_pages argument to the __pkvm_host_share_guest hypercall. This range supports only two values: 1 or PMD_SIZE / PAGE_SIZE (that is 512 on a 4K-pages system). Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-4-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Introduce for_each_hyp_pageVincent Donnefort
Add a helper to iterate over the hypervisor vmemmap. This will be particularly handy with the introduction of huge mapping support for the np-guest stage-2. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-3-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: Handle huge mappings for np-guest CMOsVincent Donnefort
clean_dcache_guest_page() and invalidate_icache_guest_page() accept a size as an argument. But they also rely on fixmap, which can only map a single PAGE_SIZE page. With the upcoming stage-2 huge mappings for pKVM np-guests, those callbacks will get size > PAGE_SIZE. Loop the CMOs on a PAGE_SIZE basis until the whole range is done. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://lore.kernel.org/r/20250521124834.1070650-2-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21Merge branch kvm-arm64/pkvm-selftest-6.16 into kvm-arm64/pkvm-np-thp-6.16Marc Zyngier
* kvm-arm64/pkvm-selftest-6.16: : . : pKVM selftests covering the memory ownership transitions by : Quentin Perret. From the initial cover letter: : : "We have recently found a bug [1] in the pKVM memory ownership : transitions by code inspection, but it could have been caught with a : test. : : Introduce a boot-time selftest exercising all the known pKVM memory : transitions and importantly checks the rejection of illegal transitions. : : The new test is hidden behind a new Kconfig option separate from : CONFIG_EL2_NVHE_DEBUG on purpose as that has side effects on the : transition checks ([1] doesn't reproduce with EL2 debug enabled). : : [1] https://lore.kernel.org/kvmarm/20241128154406.602875-1-qperret@google.com/" : . KVM: arm64: Extend pKVM selftest for np-guests KVM: arm64: Selftest for pKVM transitions KVM: arm64: Don't WARN from __pkvm_host_share_guest() KVM: arm64: Add .hyp.data section Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: nv: Release faulted-in VNCR page from mmu_lock critical sectionMarc Zyngier
The conversion to kvm_release_faultin_page() missed the requirement for this to be called within a critical section with mmu_lock held for write. Move this call up to satisfy this requirement. Fixes: 069a05e535496 ("KVM: arm64: nv: Handle VNCR_EL2-triggered faults") Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: nv: Handle TLBI S1E2 for VNCR invalidation with mmu_lock heldMarc Zyngier
Calling invalidate_vncr_va() without the mmu_lock held for write is a bad idea, and lockdep tells you about that. Fixes: 4ffa72ad8f37e ("KVM: arm64: nv: Add S1 TLB invalidation primitive for VNCR_EL2") Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-21KVM: arm64: nv: Hold mmu_lock when invalidating VNCR SW-TLB before translatingMarc Zyngier
When translating a VNCR translation fault, we start by marking the current SW-managed TLB as invalid, so that we can populate it in place. This is, however, done without the mmu_lock held. A consequence of this is that another CPU dealing with TLBI emulation can observe a translation still flagged as valid, but with invalid walk results (such as pgshift being 0). Bad things can result from this, such as a BUG() in pgshift_level_to_ttl(). Fix it by taking the mmu_lock for write to perform this local invalidation, and use invalidate_vncr() instead of open-coding the write to the 'valid' flag. Fixes: 069a05e535496 ("KVM: arm64: nv: Handle VNCR_EL2-triggered faults") Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Link: https://lore.kernel.org/r/20250520144116.3667978-1-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-20arm64: dts: rockchip: move rk3562 pinctrl node outside the soc nodeHeiko Stuebner
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus as dtc points out: ../arch/arm64/boot/dts/rockchip/rk3562.dtsi:1115.20-1181.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property Move the pinctrl node outside and adapt the indentation. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250518220449.2722673-7-heiko@sntech.de
2025-05-20arm64: dts: rockchip: fix rk3562 pcie unit addressesHeiko Stuebner
The rk3562 pcie node currently uses the apb register as its unit address which is the second reg area defined in the binding. As can be seen by the dtc warnings like ../arch/arm64/boot/dts/rockchip/rk3562.dtsi:624.26-675.5: Warning (simple_bus_reg): /soc/pcie@ff500000: simple-bus unit address format error, expected "fe000000" using the first reg area as the unit address seems to be preferred. This is the dbi area per the binding, so adapt the unit address accordingly and move the nodes to their new position. With the move also move the reg + reg-names below the compatible, as is the preferred position. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250518220449.2722673-6-heiko@sntech.de
2025-05-20arm64: dts: rockchip: move rk3528 pinctrl node outside the soc nodeHeiko Stuebner
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus as dtc points out: ../arch/arm64/boot/dts/rockchip/rk3528.dtsi:870.20-936.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property Move the pinctrl node outside and adapt the indentation. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250518220449.2722673-5-heiko@sntech.de
2025-05-20arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsiHeiko Stuebner
Two empty lines between nodes, is one too many. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250518220449.2722673-4-heiko@sntech.de
2025-05-20arm64: dts: rockchip: move rk3576 pinctrl node outside the soc nodeHeiko Stuebner
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus as dtc points out: ../arch/arm64/boot/dts/rockchip/rk3576.dtsi:2351.20-2417.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property Move the pinctrl node outside and adapt the indentation. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202505150745.PQT9TLYX-lkp@intel.com/ Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250518220449.2722673-3-heiko@sntech.de
2025-05-20arm64: dts: rockchip: fix rk3576 pcie unit addressesHeiko Stuebner
The rk3576 pcie nodes currently use the apb register as their unit address which is the second reg area defined in the binding. As can be seen by the dtc warnings like ../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1346.24-1398.5: Warning (simple_bus_reg): /soc/pcie@2a200000: simple-bus unit address format error, expected "22000000" ../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1400.24-1452.5: Warning (simple_bus_reg): /soc/pcie@2a210000: simple-bus unit address format error, expected "22400000" using the first reg area as the unit address seems to be preferred. This is the dbi area per the binding, so adapt the unit address accordingly and move the nodes to their new position. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202505150745.PQT9TLYX-lkp@intel.com/ Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250518220449.2722673-2-heiko@sntech.de
2025-05-20arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588Diederik de Haas
The assigned-clocks and assigned-clock-rates properties were moved from the scmi_clk node onto cpu nodes in commit 87810bda8a84 ("arm64: dts: rockchip: Fix SCMI assigned clocks on rk3588s") During review of v1 of that patch set, the following comment was made: why aren't you using OPP tables to define CPU frequencies. Assigned-clocks looks like a temporary hack because you haven't done proper OPP tables. Some time later, proper OPP tables for rk3588 were added in commit 276856db91b4 ("arm64: dts: rockchip: Add OPP data for CPU cores on RK3588") So this 'temporary hack' is no longer needed. Dropping it fixes the following dtb validation issues: cpu@0: Unevaluated properties are not allowed ('assigned-clock-rates', 'assigned-clocks' were unexpected) cpu@400: Unevaluated properties are not allowed ('assigned-clock-rates', 'assigned-clocks' were unexpected) cpu@600: Unevaluated properties are not allowed ('assigned-clock-rates', 'assigned-clocks' were unexpected) Link: https://lore.kernel.org/linux-rockchip/CAL_JsqL_EogoKOQ1xwU75=rJSC4o7yV3Jej4vadtacX2Pt3-hw@mail.gmail.com/ Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250519101909.62754-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-20arm64: dts: rockchip: Add missing SFC power-domains to rk3576Sebastian Reichel
Add the power-domains for the RK3576 SFC nodes according to the TRM part 1. This fixes potential SErrors when accessing the SFC registers without other peripherals (e.g. eMMC) doing a prior power-domain enable. For example this is easy to trigger on the Rock 4D, which enables the SFC0 interface, but does not enable the eMMC interface at the moment. Cc: stable@vger.kernel.org Fixes: 36299757129c8 ("arm64: dts: rockchip: Add SFC nodes for rk3576") Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20250520-rk3576-fix-fspi-pmdomain-v1-1-f07c6e62dadd@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-20Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"AngeloGioacchino Del Regno
As clearly seen on other non-MediaTek platforms, this is known to eventually produce regressions in the future, as drivers may break ABI and stop working with older firmware versions. Although the firmware-name property was used in multiple MediaTek devicetrees for the System Companion Processor (SCP) node, avoid doing the same on MT8390 to lessen eventual ABI breakages that may happen with a driver update to change the firmware retrieval logic for the SCP. This reverts commit 2f0066dae66f30386ecd6408410e27a4d6818c15. Link: https://lore.kernel.org/r/20250520111002.282841-1-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodesAngeloGioacchino Del Regno
Address various dt-binding warnings for most of the MDP3 nodes by adding and removing interrupts and power domains where required. Also, remove the mediatek,mt8195-mdp3-rdma fallback compatible from the main MDP3 RDMA node as the two have never really been fully compatible. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250520104024.3706723-1-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mt6359: Rename RTC node to match binding expectationsJulien Massot
Rename the node 'mt6359rtc' to 'rtc', as required by the binding. Fix the following dtb-check error: mediatek/mt8395-radxa-nio-12l.dtb: pmic: 'mt6359rtc' do not match any of the regexes: 'pinctrl-[0-9]+' Fixes: 3b7d143be4b7 ("arm64: dts: mt6359: add PMIC MT6359 related nodes") Signed-off-by: Julien Massot <julien.massot@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250514-mt8395-dtb-errors-v2-3-d67b9077c59a@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mt8365-evk: Add goodix touchscreen supportLouis-Alexis Eyraud
The Mediatek Genio 350-EVK board has on the DSI0 connector a StarTek KD070FHFID015 display panel that uses a Goodix GT9271 I2C capacitive touch controller. The mt8365-evk devicetree already have the display panel support but lacks the touchscreen support, so add it. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Link: https://lore.kernel.org/r/20250515-mt8365-evk-enable-touchscreen-v1-1-7ba3c87b2a71@collabora.com [Angelo: Reordered regulator nodes and interurpts-extended property] Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt8188: Add missing #reset-cells propertyJulien Massot
The binding now require the '#reset-cells' property but the devicetree has not been updated which trigger dtb-check errors. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Julien Massot <julien.massot@collabora.com> Link: https://lore.kernel.org/r/20250516-dtb-check-mt8188-v2-2-fb60bef1b8e1@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation boardLorenzo Bianconi
Introduce PCIe controller nodes to EN7581 SoC and EN7581 evaluation board. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/20250517-en7581-evb-pcie-v1-2-97297eb063bb@kernel.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: airoha: en7581: Add gpio-ranges property for gpio controllerLorenzo Bianconi
Introduce missing gpio-ranges property for Airoha EN7581 gpio controller Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/20250517-en7581-evb-pcie-v1-1-97297eb063bb@kernel.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988a-bpi-r4: configure spi-nodesFrank Wunderlich
Configure and enable SPI nodes on Bananapi R4 board. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20250516180147.10416-13-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988a-bpi-r4: Add fan and coolingmapsFrank Wunderlich
Add Fan and cooling maps for Bananapi-R4 board. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20250516180147.10416-12-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988: add phy calibration efuse subnodesFrank Wunderlich
MT7988 contains buildin mt753x switch which needs calibration data from efuse. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20250516180147.10416-9-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988: move uart0 and spi1 pins to soc dtsiFrank Wunderlich
In order to use uart0 or spi1 there is only 1 possible pin definition so move them to soc dtsi to reuse them in other boards and avoiding conflict if defined twice. Suggested-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20250516180147.10416-7-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988: add spi controllersFrank Wunderlich
Add SPI controllers for mt7988. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20250516180147.10416-6-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988a-bpi-r4: enable xsphyFrank Wunderlich
Enable XS-Phy on Bananapi R4 for pcie2. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250422132438.15735-9-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2Frank Wunderlich
First usb and third pcie controller on mt7988 need a xs-phy to work properly. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250422132438.15735-8-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: mediatek: mt7988a-bpi-r4: allow hw variants of bpi-r4Frank Wunderlich
Sinovoip has released other variants of Bananapi-R4 board. The known changes affecting only the LAN SFP+ slot which is replaced by a 2.5G phy with optional PoE. Just move the common parts to a new dtsi and keep differences (only i2c for lan-sfp) in dts. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20250422132438.15735-3-linux@fw-web.de Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-20arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groupsThuan Nguyen
White Hawk ARD audio uses a clock generated by the TPU, but commit 3d144ef10a44 ("pinctrl: renesas: r8a779g0: Fix TPU suffixes") renamed pin group "tpu_to0_a" to "tpu_to0_b". Update DTS accordingly otherwise the sound driver does not receive a clock signal. Fixes: 3d144ef10a448f89 ("pinctrl: renesas: r8a779g0: Fix TPU suffixes") Signed-off-by: Thuan Nguyen <thuan.nguyen-hong@banvien.com.vn> Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/TYCPR01MB8740608B675365215ADB0374B49CA@TYCPR01MB8740.jpnprd01.prod.outlook.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>