summaryrefslogtreecommitdiff
path: root/arch/arm64
AgeCommit message (Collapse)Author
2025-05-06KVM: arm64: Selftest for pKVM transitionsQuentin Perret
We have recently found a bug [1] in the pKVM memory ownership transitions by code inspection, but it could have been caught with a test. Introduce a boot-time selftest exercising all the known pKVM memory transitions and importantly checks the rejection of illegal transitions. The new test is hidden behind a new Kconfig option separate from CONFIG_EL2_NVHE_DEBUG on purpose as that has side effects on the transition checks ([1] doesn't reproduce with EL2 debug enabled). [1] https://lore.kernel.org/kvmarm/20241128154406.602875-1-qperret@google.com/ Suggested-by: Will Deacon <will@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416160900.3078417-4-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-06KVM: arm64: Don't WARN from __pkvm_host_share_guest()Quentin Perret
We currently WARN() if the host attempts to share a page that is not in an acceptable state with a guest. This isn't strictly necessary and makes testing much harder, so drop the WARN and make sure to propage the error code instead. Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416160900.3078417-3-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-06KVM: arm64: Add .hyp.data sectionDavid Brazdil
The hypervisor has not needed its own .data section because all globals were either .rodata or .bss. To avoid having to initialize future data-structures at run-time, let's introduce add a .data section to the hypervisor. Signed-off-by: David Brazdil <dbrazdil@google.com> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416160900.3078417-2-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-06KVM: arm64: Force HCR_EL2.xMO to 1 at all times in VHE modeMarc Zyngier
We keep setting and clearing these bits depending on the role of the host kernel, mimicking what we do for nVHE. But that's actually pretty pointless, as we always want physical interrupts to make it to the host, at EL2. This has also two problems: - it prevents IRQs from being taken when these bits are cleared if the implementation has chosen to implement these bits as masks when HCR_EL2.{TGE,xMO}=={0,0} - it triggers a bad erratum on the AmpereOne HW, which catches fire on clearing these bits while an interrupt is being taken (AC03_CPU_36). Let's kill these two birds with a single stone, and permanently set the xMO bits when running VHE. This involves a bit of surgery on code paths that rely on flipping these bits on and off for other purposes. Note that the earliest setting of hcr_el2 (in the init_hcr_el2 macro) is left untouched as is runs extremely early, with interrupts disabled, and soon enough overwritten with the final value containing the xMO bits. Reported-by: D Scott Phillips <scott@os.amperecomputing.com> Link: https://lore.kernel.org/r/20250429114326.3618875-1-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-06KVM: arm64: Replace ternary flags with str_on_off() helperSeongsu Park
Replace repetitive ternary expressions with the str_on_off() helper function. This change improves code readability and ensures consistency in tracepoint string formatting Signed-off-by: Seongsu Park <sgsu.park@samsung.com> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/1891546521.01744691102904.JavaMail.epsvc@epcpadp1new Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-05-06arm64: dts: mt6359: Add missing 'compatible' property to regulators nodeJulien Massot
The 'compatible' property is required by the 'mfd/mediatek,mt6397.yaml' binding. Add it to fix the following dtb-check error: mediatek/mt8395-radxa-nio-12l.dtb: pmic: regulators: 'compatible' is a required property Fixes: 3b7d143be4b7 ("arm64: dts: mt6359: add PMIC MT6359 related nodes") Signed-off-by: Julien Massot <julien.massot@collabora.com> Link: https://lore.kernel.org/r/20250505-mt8395-dtb-errors-v1-3-9c4714dcdcdb@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-06arm/arm64: dts: mediatek: Add missing "#sound-dai-cells" to linux,bt-scoRob Herring (Arm)
Add missing "#sound-dai-cells" which is required by the linux,bt-sco binding. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250409205001.1522009-1-robh@kernel.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-06arm64: dts: mediatek: mt8390-genio-common: Set ssusb2 default dual role mode ↵Louis-Alexis Eyraud
to host On the Mediatek Genio 510-EVK and 700-EVK boards, ssusb2 controller is one but has two ports: one is routed to the M.2 slot, the other is on the RPi header who does support full OTG. Since Mediatek Genio 700-EVK USB support was added, dual role mode property is set to otg for ssusb2. This config prevents the M.2 Wifi/Bluetooth module, present on those boards and exposing Bluetooth as an USB device to be properly detected at startup as the default role is device. To keep the OTG functionality and make the M.2 module be detected at the same time, add role-switch-default-mode property set to host and also fix the polarity of GPIO associated to the USB connector, so the ssusb2 controller role is properly set to host when the other port is unused. Fixes: 1afaeca17238 ("arm64: dts: mediatek: mt8390-genio-700: Add USB, TypeC Controller, MUX") Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Link: https://lore.kernel.org/r/20250502-mtk-genio-510-700-fix-bt-detection-v2-1-870aa2145480@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-06arm64: dts: mediatek: mt8395-genio-1200-evk: Disable unused backlightNícolas F. R. A. Prado
The builtin panel on the Genio 1200 EVK board uses the backlight_lcm0 node for its backlight. Though the backlight_lcd1 is currently left enabled, it is unused, and its pwm input, disp_pwm1, is disabled, so it fails probe. Disable this unused node. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20250502-genio-1200-disable-backlight-lcd1-v1-1-c021d2c9e48e@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-06arm64: dts: mediatek: mt6357: Drop regulator-fixed compatiblesNícolas F. R. A. Prado
Some of the regulators in the MT6357 PMIC dtsi have compatible set to regulator-fixed, even though they don't serve any purpose: all those regulators are handled as a whole by the mt6357-regulator driver. In fact this is the only dtsi in this family of chips where this is the case: mt6359 and mt6358 don't have any such compatibles. A side-effect caused by this is that the DT kselftest, which is supposed to identify nodes with compatibles that can be probed, but haven't, shows these nodes as failures. Remove the useless compatibles to move the dtsi in line with the others in its family and fix the DT kselftest failures. Fixes: 55749bb478f8 ("arm64: dts: mediatek: add mt6357 device-tree") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20250502-mt6357-regulator-fixed-compatibles-removal-v1-1-a582c16743fe@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-05-06arm64: dts: rockchip: Enable regulators for Radxa E20CChukun Pan
Enable pwm and fixed regulators for Radxa E20C. The pwm regulator is used to power the CPU and GPU. Note that the LPDDR4 voltage is 1.1V. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250401120020.976343-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-06arm64: dts: rockchip: Add pwm nodes for RK3528Chukun Pan
Add pwm nodes for RK3528. The PWM core on RK3528 is the same as RK3328, but the driver does not support interrupts yet. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250401120020.976343-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05arm64: dts: rockchip: Add onboard EEPROM for Radxa E20CYao Zi
Radxa E20C ships an onboard I2C EEPROM for storing production information. Enable it in devicetree. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250417120118.17610-6-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05arm64: dts: rockchip: Add I2C controllers for RK3528Yao Zi
Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2, I2C-4 and I2C-7 which come with only a set of possible pins, a default pin configuration is included. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250417120118.17610-5-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred styleKrzysztof Kozlowski
GPIO hogs device node names can use 'hog' prefix or suffix, but the suffix is preferred. The pattern in DT schema might narrow in the future, so adjust the DTS now. Link: https://lore.kernel.org/r/20250115204603.136997-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-05KVM: arm64: Prevent userspace from disabling AArch64 support at any ↵Marc Zyngier
virtualisable EL A sorry excuse for a selftest is trying to disable AArch64 support. And yes, this goes as well as you can imagine. Let's forbid this sort of things. Normal userspace shouldn't get caught doing that. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com> Link: https://lore.kernel.org/r/20250429114117.3618800-2-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-05-05KVM: arm64: Force HCR_EL2.xMO to 1 at all times in VHE modeMarc Zyngier
We keep setting and clearing these bits depending on the role of the host kernel, mimicking what we do for nVHE. But that's actually pretty pointless, as we always want physical interrupts to make it to the host, at EL2. This has also two problems: - it prevents IRQs from being taken when these bits are cleared if the implementation has chosen to implement these bits as masks when HCR_EL2.{TGE,xMO}=={0,0} - it triggers a bad erratum on the AmpereOne HW, which catches fire on clearing these bits while an interrupt is being taken (AC03_CPU_36). Let's kill these two birds with a single stone, and permanently set the xMO bits when running VHE. This involves a bit of surgery on code paths that rely on flipping these bits on and off for other purposes. Note that the earliest setting of hcr_el2 (in the init_hcr_el2 macro) is left untouched as is runs extremely early, with interrupts disabled, and soon enough overwritten with the final value containing the xMO bits. Reported-by: D Scott Phillips <scott@os.amperecomputing.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250429114326.3618875-1-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-05-05KVM: arm64: Fix uninitialized memcache pointer in user_mem_abort()Sebastian Ott
Commit fce886a60207 ("KVM: arm64: Plumb the pKVM MMU in KVM") made the initialization of the local memcache variable in user_mem_abort() conditional, leaving a codepath where it is used uninitialized via kvm_pgtable_stage2_map(). This can fail on any path that requires a stage-2 allocation without transition via a permission fault or dirty logging. Fix this by making sure that memcache is always valid. Fixes: fce886a60207 ("KVM: arm64: Plumb the pKVM MMU in KVM") Signed-off-by: Sebastian Ott <sebott@redhat.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/kvmarm/3f5db4c7-ccce-fb95-595c-692fa7aad227@redhat.com/ Link: https://lore.kernel.org/r/20250505173148.33900-1-sebott@redhat.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-05-05arm64: dts: bcm: Add reference to RPi 2 (2nd rev)Stefan Wahren
This adds a reference to the dts of the Raspberry Pi 2 (2nd rev), so we don't need to maintain the content in arm64. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250418143307.59235-4-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-05-05Merge tag 'soc-fixes-6.15' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "The main changes are once more for the NXP i.MX platform, addressing multiple regressions in recent devicetree updates for the i.MX8MM and i.MX6ULL SoCs, a PCIe fix for i.MX9 and a MAINTAINERS file update to disambiguate NXP i.MX SoCs from Sony IMX image sensors. The stm32 platform devicetree files get some compatibility fixes for the interrupt controller node. Another compatibility fix is done for the Arm Morello platform's cache controller node. The code changes are all for firmware drivers, fixing kernel-side bugs on the Arm FF-A and SCMI drivers" * tag 'soc-fixes-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp23 SoCs arm64: dts: st: Adjust interrupt-controller for stm32mp23 SoCs arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp21 SoCs arm64: dts: st: Adjust interrupt-controller for stm32mp21 SoCs arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp25 SoCs arm64: dts: st: Adjust interrupt-controller for stm32mp25 SoCs arm64: dts: imx8mm-verdin: Link reg_usdhc2_vqmmc to usdhc2 MAINTAINERS: add exclude for dt-bindings to imx entry ARM: dts: opos6ul: add ksz8081 phy properties arm64: dts: imx95: Correct the range of PCIe app-reg region arm64: dts: imx8mp: configure GPU and NPU clocks in nominal DTSI arm64: dts: morello: Fix-up cache nodes firmware: arm_ffa: Skip Rx buffer ownership release if not acquired firmware: arm_scmi: Fix timeout checks on polling path firmware: arm_scmi: Balance device refcount when destroying devices
2025-05-05arm64: dts: rockchip: add RK3576 RNG nodeNicolas Frattaroli
The RK3576 has a hardware random number generator IP built into the SoC. Add it to the SoC's .dtsi, now that there's a binding and driver for it. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250430-rk3576-hwrng-v1-3-480c15b5843e@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05arm64: dts: amlogic: Add A5 Reset ControllerZelong Dong
Add the device node and related header file for Amlogic A5 reset controller. Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> Link: https://lore.kernel.org/r/20240918074211.8067-4-zelong.dong@amlogic.com Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com> Link: https://lore.kernel.org/r/20250411-a4-a5-reset-v6-3-89963278c686@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-05-05arm64: dts: amlogic: Add A4 Reset ControllerZelong Dong
Add the device node and related header file for Amlogic A4 reset controller. Signed-off-by: Zelong Dong <zelong.dong@amlogic.com> Link: https://lore.kernel.org/r/20240918074211.8067-3-zelong.dong@amlogic.com Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Kelvin Zhang <kelvin.zhang@amlogic.com> Link: https://lore.kernel.org/r/20250411-a4-a5-reset-v6-2-89963278c686@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-05-05arm64: dts: amlogic: dreambox: fix missing clkc_audio nodeChristian Hewitt
Add the clkc_audio node to fix audio support on Dreambox One/Two. Fixes: 83a6f4c62cb1 ("arm64: dts: meson: add initial support for Dreambox One/Two") CC: stable@vger.kernel.org Suggested-by: Emanuel Strobel <emanuel.strobel@yahoo.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20250503084443.3704866-1-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-05-05arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV StickFerass El Hafidi
Xiaomi Mi TV Stick is a small Amlogic-based Android TV stick released in 2020. It is known as `xiaomi-aquaman` internally. Specifications: * Amlogic S805Y SoC * Android TV 9, upgradable to Android TV 10 * 8 GB eMMC * 1 GB of RAM * Wi-Fi + Bluetooth The devicetree is based on p241's DT, with some changes to better match the Mi TV Stick: * there is no Ethernet port, no IR, no CVBS connector on the stick * a white LED is present * adjust memory to have 1 GB of RAM available Signed-off-by: Ferass El Hafidi <funderscore@postmarketos.org> Link: https://lore.kernel.org/r/20250502-aquaman-v6-2-f1af347d9709@postmarketos.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-05-05arm64: dts: amlogic: gxl: set i2c bias to pull-upDa Xue
GXL I2C pins need internal pull-up enabled to operate if there is no external resistor. The pull-up is 60kohms per the datasheet. We should set the bias when i2c pinmux is enabled. Signed-off-by: Da Xue <da@libre.computer> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250425203118.1444481-1-da@libre.computer Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-05-05crypto: arm64/sha256 - Add simd block functionHerbert Xu
Add CRYPTO_ARCH_HAVE_LIB_SHA256_SIMD and a SIMD block function so that the caller can decide whether to use SIMD. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05crypto: arch/sha256 - Export block functions as GPL onlyHerbert Xu
Export the block functions as GPL only, there is no reason to let arbitrary modules use these internal functions. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05Revert "crypto: run initcalls for generic implementations earlier"Herbert Xu
This reverts commit c4741b23059794bd99beef0f700103b0d983b3fd. Crypto API self-tests no longer run at registration time and now occur either at late_initcall or upon the first use. Therefore the premise of the above commit no longer exists. Revert it and subsequent additions of subsys_initcall and arch_initcall. Note that lib/crypto calls will stay at subsys_initcall (or rather downgraded from arch_initcall) because they may need to occur before Crypto API registration. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05crypto: arm64/sha256 - implement library instead of shashEric Biggers
Instead of providing crypto_shash algorithms for the arch-optimized SHA-256 code, instead implement the SHA-256 library. This is much simpler, it makes the SHA-256 library functions be arch-optimized, and it fixes the longstanding issue where the arch-optimized SHA-256 was disabled by default. SHA-256 still remains available through crypto_shash, but individual architectures no longer need to handle it. Remove support for SHA-256 finalization from the ARMv8 CE assembly code, since the library does not yet support architecture-specific overrides of the finalization. (Support for that has been omitted for now, for simplicity and because usually it isn't performance-critical.) To match sha256_blocks_arch(), change the type of the nblocks parameter of the assembly functions from int or 'unsigned int' to size_t. Update the ARMv8 CE assembly function accordingly. The scalar and NEON assembly functions actually already treated it as size_t. While renaming the assembly files, also fix the naming quirks where "sha2" meant sha256, and "sha512" meant both sha256 and sha512. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05crypto: arm64/sha256 - remove obsolete chunking logicEric Biggers
Since kernel-mode NEON sections are now preemptible on arm64, there is no longer any need to limit the length of them. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05arm64: defconfig: Add Renesas MSIOF sound supportKuninori Morimoto
Renesas V4H Sparrow Hawk board needs MSIOF Sound driver. Support it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/87o6wu2wzm.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-05arm64: defconfig: Enable Renesas RZ/G2L GPT configBiju Das
Enable PWM config for Renesas RZ/G2L GPT as it is populated on the RZ/G2L and RZ/V2L SMARC EVKs. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250424054050.28310-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-05arm64: dts: renesas: r9a09g047e57-smarc: Enable CAN TransceiverBiju Das
Enable TCAN1046V-Q1 CAN Transceiver populated on RZ/G3E SMARC EVK by modelling it as two instances of tcan1042. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250320164121.193857-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-05arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFDBiju Das
Enable CANFD on the RZ/G3E SMARC EVK platform. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250320164121.193857-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-05arm64: dts: renesas: r9a09g047: Add CANFD nodeBiju Das
Add CANFD node to RZ/G3E ("R9A09G047") SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250320164121.193857-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-05-05arm64: dts: rockchip: Switch to undeprecated qcom,calibration-variant on RK3399Krzysztof Kozlowski
The property qcom,ath10k-calibration-variant was deprecated in favor of recently introduced generic qcom,calibration-variant, common to all Qualcomm Atheros WiFi bindings. Change will affect out of tree users, like other projects, of this DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250501160208.96451-2-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-quartz64-bDiederik de Haas
The Quartz64 Model B has a Winbound 25Q64DWZPIG SPI flash chip, identified as 'U13' on the component placement schematic. In the Quartz 64 Model-B Schematic from 20220124 on page 17, we can see that the VCC connector is connected to VCCIO_FLASH and page 4 shows that that in turn is connected to the VCCIO2 domain. That domain uses vcc_1v8 as its power source. This fixes the following warning: spi-nor spi4.0: supply vcc not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250503152917.138648-3-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05arm64: dts: rockchip: Add phy-supply to gmac0 on NanoPi R5SDiederik de Haas
According to paragraph "7.16. Power" of the RTL8211F-CG datasheet, gmac0 needs to have a 3.3V power supply. On page 22 of the NanoPi R5S version 2204, that is identified as VCC_GEPHY_3V3 which is connected to the VCC_3V3 power source. This fixes the following warning: rk_gmac-dwmac fe2a0000.ethernet: supply phy not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250503152917.138648-2-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-05crypto: lib/poly1305 - Use block-only interfaceHerbert Xu
Now that every architecture provides a block function, use that to implement the lib/poly1305 and remove the old per-arch code. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05crypto: arm64/poly1305 - Add block-only interfaceHerbert Xu
Add block-only interface. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-05-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux v6.15-rc5Herbert Xu
Merge mainline to pick up bcachefs poly1305 patch 4bf4b5046de0 ("bcachefs: use library APIs for ChaCha20 and Poly1305"). This is a prerequisite for removing the poly1305 shash algorithm.
2025-05-03Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fix from Catalin Marinas: "Add missing sentinels to the arm64 Spectre-BHB MIDR arrays, otherwise is_midr_in_range_list() reads beyond the end of these arrays" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: errata: Add missing sentinels to Spectre-BHB MIDR arrays
2025-05-02arm64: vdso: Work around invalid absolute relocations from GCCThomas Weißschuh
All vDSO code needs to be completely position independent. Symbol references are marked as hidden so the compiler emits PC-relative relocations. However GCC emits absolute relocations for symbol-relative references with an offset >= 64KiB. After recent refactorings in the vDSO code this is the case in __arch_get_vdso_u_timens_data() with a page size of 64KiB. Work around the issue by preventing the optimizer from seeing the offsets. Fixes: 83a2a6b8cfc5 ("vdso/gettimeofday: Prepare do_hres_timens() for introduction of struct vdso_clock") Reported-by: Jan Stancek <jstancek@redhat.com> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/all/20250430-vdso-absolute-reloc-v2-1-5efcc3bc4b26@linutronix.de Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120002 Closes: https://lore.kernel.org/lkml/aApGPAoctq_eoE2g@t14ultra/
2025-05-03arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 boardYixun Lan
On Avaota A1 board, the EMAC0 connect to an external RTL8211F-CG PHY, which features a 25MHz crystal, and using PH8 pin as PHY reset. Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-5-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-03arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E boardYixun Lan
On Radxa A5E board, the EMAC0 connect to external Maxio MAE0621A PHY, which features a 25MHz crystal, and using PH8 pin as PHY reset. Tested on A5E board with schematic V1.20. Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-4-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-03arm64: dts: allwinner: a523: Add EMAC0 ethernet MACYixun Lan
Add EMAC0 ethernet MAC support which found on A523 variant SoCs, including the A527/T527 chips. MAC0 is compatible to the A64 chip which requires an external PHY. This patch only add RGMII pins for now. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-3-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-02arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0Judith Mendez
For am65x, add missing ITAPDLYSEL values for Default Speed and High Speed SDR modes to sdhci0 node according to the device datasheet [0]. [0] https://www.ti.com/lit/gpn/am6548 Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Moteen Shah <m-shah@ti.com> Link: https://lore.kernel.org/r/20250429173009.33994-1-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-02arm64: dts: ti: k3-am62p-j722s-common-main: Set eMMC clock parent to defaultJudith Mendez
Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT for eMMC. This change is necessary since DM is not implementing the correct procedure to switch PLL clock source for eMMC and MMC CLK mux is not glich-free. As a preventative action, lets switch back to the defaults. Fixes: b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez <jm@ti.com> Acked-by: Udit Kumar <u-kumar1@ti.com> Acked-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250429163337.15634-4-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-02arm64: dts: ti: k3-am62a-main: Set eMMC clock parent to defaultJudith Mendez
Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT for eMMC. This change is necessary since DM is not implementing the correct procedure to switch PLL clock source for eMMC and MMC CLK mux is not glich-free. As a preventative action, lets switch back to the defaults. Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance") Cc: stable@vger.kernel.org Signed-off-by: Judith Mendez <jm@ti.com> Acked-by: Udit Kumar <u-kumar1@ti.com> Acked-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250429163337.15634-3-jm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
generated by cgit (git 2.34.1) at 2025-07-19 05:48:25 +0000