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2025-04-29arm64/mm: Remove randomization of the linear mapArd Biesheuvel
Since commit 97d6786e0669 ("arm64: mm: account for hotplug memory when randomizing the linear region") the decision whether or not to randomize the placement of the system's DRAM inside the linear map is based on the capabilities of the CPU rather than how much memory is present at boot time. This change was necessary because memory hotplug may result in DRAM appearing in places that are not covered by the linear region at all (and therefore unusable) if the decision is solely based on the memory map at boot. In the Android GKI kernel, which requires support for memory hotplug, and is built with a reduced virtual address space of only 39 bits wide, randomization of the linear map never happens in practice as a result. And even on arm64 kernels built with support for 48 bit virtual addressing, the wider PArange of recent CPUs means that linear map randomization is slowly becoming a feature that only works on systems that will soon be obsolete. So let's just remove this feature. We can always bring it back in an improved form if there is a real need for it. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Kees Cook <kees@kernel.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20250318134949.3194334-2-ardb+git@google.com Signed-off-by: Will Deacon <will@kernel.org>
2025-04-29arm64/fpsimd: Avoid unnecessary per-CPU buffers for EFI runtime callsArd Biesheuvel
The EFI specification has some elaborate rules about which runtime services may be called while another runtime service call is already in progress. In Linux, however, for simplicity, all EFI runtime service invocations are serialized via the efi_runtime_lock semaphore. This implies that calls to the helper pair arch_efi_call_virt_setup() and arch_efi_call_virt_teardown() are serialized too, and are guaranteed not to nest. Furthermore, the arm64 arch code has its own spinlock to serialize use of the EFI runtime stack, of which only a single instance exists. This all means that the FP/SIMD and SVE state preserve/restore logic in __efi_fpsimd_begin() and __efi_fpsimd_end() are also serialized, and only a single instance of the associated per-CPU variables can ever be in use at the same time. There is therefore no need at all for per-CPU variables here, and they can all be replaced with singleton instances. This saves a non-trivial amount of memory on systems with many CPUs. To be more robust against potential future changes in the core EFI code that may invalidate the reasoning above, move the invocations of __efi_fpsimd_begin() and __efi_fpsimd_end() into the critical section covered by the efi_rt_lock spinlock. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250318132421.3155799-2-ardb+git@google.com Signed-off-by: Will Deacon <will@kernel.org>
2025-04-28arm64/fpsimd: signal: Clear TPIDR2 when delivering signalsMark Rutland
Linux is intended to be compatible with userspace written to Arm's AAPCS64 procedure call standard [1,2]. For the Scalable Matrix Extension (SME), AAPCS64 was extended with a "ZA lazy saving scheme", where SME's ZA tile is lazily callee-saved and caller-restored. In this scheme, TPIDR2_EL0 indicates whether the ZA tile is live or has been saved by pointing to a "TPIDR2 block" in memory, which has a "za_save_buffer" pointer. This scheme has been implemented in GCC and LLVM, with necessary runtime support implemented in glibc. AAPCS64 does not specify how the ZA lazy saving scheme is expected to interact with signal handling, and the behaviour that AAPCS64 currently recommends for (sig)setjmp() and (sig)longjmp() does not always compose safely with signal handling, as explained below. When Linux delivers a signal, it creates signal frames which contain the original values of PSTATE.ZA, the ZA tile, and TPIDR_EL2. Between saving the original state and entering the signal handler, Linux clears PSTATE.ZA, but leaves TPIDR2_EL0 unchanged. Consequently a signal handler can be entered with PSTATE.ZA=0 (meaning accesses to ZA will trap), while TPIDR_EL0 is non-null (which may indicate that ZA needs to be lazily saved, depending on the contents of the TPIDR2 block). While in this state, libc and/or compiler runtime code, such as longjmp(), may attempt to save ZA. As PSTATE.ZA=0, these accesses will trap, causing the kernel to inject a SIGILL. Note that by virtue of lazy saving occurring in libc and/or C runtime code, this can be triggered by application/library code which is unaware of SME. To avoid the problem above, the kernel must ensure that signal handlers are entered with PSTATE.ZA and TPIDR2_EL0 configured in a manner which complies with the ZA lazy saving scheme. Practically speaking, the only choice is to enter signal handlers with PSTATE.ZA=0 and TPIDR2_EL0=NULL. This change should not impact SME code which does not follow the ZA lazy saving scheme (and hence does not use TPIDR2_EL0). An alternative approach that was considered is to have the signal handler inherit the original values of both PSTATE.ZA and TPIDR2_EL0, relying on lazy save/restore sequences being idempotent and capable of racing safely. This is not safe as signal handlers must be assumed to have a "private ZA" interface, and therefore cannot be entered with PSTATE.ZA=1 and TPIDR2_EL0=NULL, but it is legitimate for signals to be taken from this state. With the kernel fixed to clear TPIDR2_EL0, there are a couple of remaining issues (largely masked by the first issue) that must be fixed in userspace: (1) When a (sig)setjmp() + (sig)longjmp() pair cross a signal boundary, ZA state may be discarded when it needs to be preserved. Currently, the ZA lazy saving scheme recommends that setjmp() does not save ZA, and recommends that longjmp() is responsible for saving ZA. A call to longjmp() in a signal handler will not have visibility of ZA state that existed prior to entry to the signal, and when a longjmp() is used to bypass a usual signal return, unsaved ZA state will be discarded erroneously. To fix this, it is necessary for setjmp() to eagerly save ZA state, and for longjmp() to configure PSTATE.ZA=0 and TPIDR2_EL0=NULL. This works regardless of whether a signal boundary is crossed. (2) When a C++ exception is thrown and crosses a signal boundary before it is caught, ZA state may be discarded when it needs to be preserved. AAPCS64 requires that exception handlers are entered with PSTATE.{SM,ZA}={0,0} and TPIDR2_EL0=NULL, with exception unwind code expected to perform any necessary save of ZA state. Where it is necessary to perform an exception unwind across an exception boundary, the unwind code must recover any necessary ZA state (along with TPIDR2) from signal frames. Fix the kernel as described above, with setup_return() clearing TPIDR2_EL0 when delivering a signal. Folk on CC are working on fixes for the remaining userspace issues, including updates/fixes to the AAPCS64 specification and glibc. [1] https://github.com/ARM-software/abi-aa/releases/download/2025Q1/aapcs64.pdf [2] https://github.com/ARM-software/abi-aa/blob/c51addc3dc03e73a016a1e4edf25440bcac76431/aapcs64/aapcs64.rst Fixes: 39782210eb7e ("arm64/sme: Implement ZA signal handling") Fixes: 39e54499280f ("arm64/signal: Include TPIDR2 in the signal context") Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Daniel Kiss <daniel.kiss@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Richard Sandiford <richard.sandiford@arm.com> Cc: Sander De Smalen <sander.desmalen@arm.com> Cc: Tamas Petz <tamas.petz@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Yury Khrustalev <yury.khrustalev@arm.com> Link: https://lore.kernel.org/r/20250417190113.3778111-1-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-04-28arm64/crc: drop "glue" from filenamesEric Biggers
The use of the term "glue" in filenames is a Crypto API-ism that rarely shows up elsewhere in lib/ or arch/*/lib/. I think adopting it there was a mistake. The library just uses standard functions, so the amount of code that could be considered "glue" is quite small. And while often the C functions just wrap the assembly functions, there are also cases like crc32c_arch() in arch/x86/lib/crc32-glue.c that blur the line by in-lining the actual implementation into the C function. That's not "glue code", but rather the actual code. Therefore, let's drop "glue" from the filenames and instead use e.g. crc32.c instead of crc32-glue.c. Reviewed-by: "Martin K. Petersen" <martin.petersen@oracle.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20250424002038.179114-3-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@google.com>
2025-04-28lib/crc: make the CPU feature static keys __ro_after_initEric Biggers
All of the CRC library's CPU feature static_keys are initialized by initcalls and never change afterwards, so there's no need for them to be in the regular .data section. Put them in .data..ro_after_init instead. Reviewed-by: "Martin K. Petersen" <martin.petersen@oracle.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Heiko Carstens <hca@linux.ibm.com> # s390 Link: https://lore.kernel.org/r/20250413154350.10819-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@google.com>
2025-04-28arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3588-rock-5bDiederik de Haas
The Radxa Rock 5B component placement document identifies the SPI Nor Flash chip as 'U4300' which is described on page 25 of the Schematic v1.45. There we can see that the VCC connector is connected to the VCC_3V3_S3 power source. This fixes the following warning: spi-nor spi5.0: supply vcc not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250425092601.56549-5-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-pinetab2Diederik de Haas
As described on page 37 of PineTab2 Schematic-20230417, the SPI Flash's VCC connector is connected to VCCIO_FLASH and according to page 6 of that same schematic, that belongs to the VCC_1V8 power source. This fixes the following warning: spi-nor spi4.0: supply vcc not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250425092601.56549-4-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3399-rockpro64Diederik de Haas
As described on page 16 of the RockPro64 schematics for both v2.0 and v2.1, the SPI Flash's VCC connector is connected to the VCC_3V0 power source. This fixes the following warning: spi-nor spi1.0: supply vcc not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250425092601.56549-3-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3328-rock64Diederik de Haas
As described on page 6 of the Rock64 schematics for both v2.0 and v3.0 the SPI Flash's VCC connector is connected to the VCC_IO power source. This fixes the following warning: spi-nor spi0.0: supply vcc not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250425092601.56549-2-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add vcc supply to spi flash on rk3399-roc-pcMarkus Reichl
Add vcc supply to the spi-nor flash chip on rk3399-roc-pc boards according to the board schematics ROC-3399-PC-V10-A-20180804 to avoid warnings in dmesg output. Signed-off-by: Markus Reichl <m.reichl@fivetechno.de> Link: https://lore.kernel.org/r/20250411140223.1069-1-m.reichl@fivetechno.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: enable pcie on Sige5Nicolas Frattaroli
The ArmSoM Sige5 board exposes PCIe controller 0 on its M.2 slot on the bottom of the board. Enable the necessary nodes for it, and also add the correct pins for both the power enable GPIO and the PCIe reset GPIO. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250414-rk3576-sige5-pcie-v1-1-0e950a96f392@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add HDMI support for roc-rk3576-pcHeiko Stuebner
Enable HDMI and VOP nodes for the roc-rk3576-pc board. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250414183745.1352470-1-heiko@sntech.de
2025-04-28arm64: dts: rockchip: Enable HDMI0 audio output for Indiedroid NovaChris Morgan
Make available HDMI audio for the HDMI0 port. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20250415174711.72891-1-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add rk3588 evb2 boardChaoyi Chen
General features for rk3588 evb2 board: - Rockchip RK3588 - LPDDR4/4X - eMMC5.1 - RK806-2x2pcs + DiscretePower - 1x HDMI2.1 TX / HDMI2.0 RX - 1x full size DisplayPort - 3x USB3.0 Host - 1x USB2.0 Host - WIFI/BT Tested with HDMI/GPU/USB2.0/USB3.0/WIFI module. Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com> Link: https://lore.kernel.org/r/20250418014757.336-3-kernel@airkyi.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add pcie1 slot for rk3576 evb1 boardShawn Lin
PCIe1 and usb_drd1_dwc3 is sharing the same PHY on RK3576 platform. For pcie1 slot and USB interface, there is a swich IC labelled as Dial_Switch_1 on evb1 board. If we need to make pcie1 slot work for this board, we should first disable usb_drd1_dwc3 and then set Dial_Switch_1 to low state. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1745371359-30443-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Enable eDP display for Cool Pi GenBookAndy Yan
Cool Pi CM5 GenBook equipped with a 1080P eDP panel, the panel connected on board with 30/40 pin connector. There is no hpd hooked up on the board, so we need to set hpd-absent-delay-ms in dts. Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20250426071554.1305042-2-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add eDP1 dt node for rk3588Andy Yan
Add eDP1 dt node for RK3588 SoC Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20250426071554.1305042-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: enable HDMI out audio on Khadas Edge2Jacobe Zang
Enable HDMI out audio on the Khadas Edge2. Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com> Link: https://lore.kernel.org/r/20250424-edge-v1-3-314aad01d9ab@wesion.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add HDMI & VOP2 to Khadas Edge2Jacobe Zang
Enable HDMI display output on Khadas Edge2. Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com> Link: https://lore.kernel.org/r/20250424-edge-v1-2-314aad01d9ab@wesion.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: Add bluetooth support to Khadas Edge2Jacobe Zang
This commit adds the RTS signal, specifies the compatible Broadcom chip, its clock source, interrupts, GPIOs for wakeup and shutdown, maximum speed, pinctrl settings, and power supplies. Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> Signed-off-by: Jacobe Zang <jacobe.zang@wesion.com> Link: https://lore.kernel.org/r/20250424-edge-v1-1-314aad01d9ab@wesion.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28arm64: dts: rockchip: add overlay for tiger-haikou video-demo adapterHeiko Stuebner
This adds support for the video-demo-adapter DEVKIT ADDON CAM-TS-A01 (https://embedded.cherry.de/product/development-kit/) for the Haikou devkit with Tiger RK3588 SoM. The Video Demo adapter is an adapter connected to the fake PCIe slot labeled "Video Connector" on the Haikou devkit. It's main feature is a Leadtek DSI-display with touchscreen and a camera (that is not supported yet). To drive these components a number of additional regulators are grouped on the adapter as well as a PCA9670 gpio-expander to provide the needed additional gpio-lines. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> # Makefile Tested-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250226140942.3825223-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-28crypto: arm64/polyval - Use API partial block handlingHerbert Xu
Use the Crypto API partial block handling. Also remove the unnecessary SIMD fallback path. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-28crypto: lib/poly1305 - remove INTERNAL symbol and selection of CRYPTOEric Biggers
Now that the architecture-optimized Poly1305 kconfig symbols are defined regardless of CRYPTO, there is no need for CRYPTO_LIB_POLY1305 to select CRYPTO. So, remove that. This makes the indirection through the CRYPTO_LIB_POLY1305_INTERNAL symbol unnecessary, so get rid of that and just use CRYPTO_LIB_POLY1305 directly. Finally, make the fallback to the generic implementation use a default value instead of a select; this makes it consistent with how the arch-optimized code gets enabled and also with how CRYPTO_LIB_BLAKE2S_GENERIC gets enabled. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-28crypto: lib/chacha - remove INTERNAL symbol and selection of CRYPTOEric Biggers
Now that the architecture-optimized ChaCha kconfig symbols are defined regardless of CRYPTO, there is no need for CRYPTO_LIB_CHACHA to select CRYPTO. So, remove that. This makes the indirection through the CRYPTO_LIB_CHACHA_INTERNAL symbol unnecessary, so get rid of that and just use CRYPTO_LIB_CHACHA directly. Finally, make the fallback to the generic implementation use a default value instead of a select; this makes it consistent with how the arch-optimized code gets enabled and also with how CRYPTO_LIB_BLAKE2S_GENERIC gets enabled. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-28crypto: arm64 - move library functions to arch/arm64/lib/crypto/Eric Biggers
Continue disentangling the crypto library functions from the generic crypto infrastructure by moving the arm64 ChaCha and Poly1305 library functions into a new directory arch/arm64/lib/crypto/ that does not depend on CRYPTO. This mirrors the distinction between crypto/ and lib/crypto/. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-28crypto: arm64 - drop redundant dependencies on ARM64Eric Biggers
arch/arm64/crypto/Kconfig is sourced only when CONFIG_ARM64=y, so there is no need for the symbols defined inside it to depend on ARM64. Acked-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-04-28KVM: arm64: Unconditionally cross check hyp stateQuentin Perret
Now that the hypervisor's state is stored in the hyp_vmemmap, we no longer need an expensive page-table walk to read it. This means we can now afford to cross check the hyp-state during all memory ownership transitions where the hyp is involved unconditionally, hence avoiding problems such as [1]. [1] https://lore.kernel.org/kvmarm/20241128154406.602875-1-qperret@google.com/ Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-8-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28KVM: arm64: Defer EL2 stage-1 mapping on shareQuentin Perret
We currently blindly map into EL2 stage-1 *any* page passed to the __pkvm_host_share_hyp() HVC. This is less than ideal from a security perspective as it makes exploitation of potential hypervisor gadgets easier than it should be. But interestingly, pKVM should never need to access SHARED_BORROWED pages that it hasn't previously pinned, so there is no need to map the page before that. Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-7-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28KVM: arm64: Move hyp state to hyp_vmemmapQuentin Perret
Tracking the hypervisor's ownership state into struct hyp_page has several benefits, including allowing far more efficient lookups (no page-table walk needed) and de-corelating the state from the presence of a mapping. This will later allow to map pages into EL2 stage-1 less proactively which is generally a good thing for security. And in the future this will help with tracking the state of pages mapped into the hypervisor's private range without requiring an alias into the 'linear map' range. Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-6-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28KVM: arm64: Introduce {get,set}_host_state() helpersQuentin Perret
Instead of directly accessing the host_state member in struct hyp_page, introduce static inline accessors to do it. The future hyp_state member will follow the same pattern as it will need some logic in the accessors. Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-5-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28KVM: arm64: Use 0b11 for encoding PKVM_NOPAGEQuentin Perret
The page ownership state encoded as 0b11 is currently considered reserved for future use, and PKVM_NOPAGE uses bit 2. In order to simplify the relocation of the hyp ownership state into the vmemmap in later patches, let's use the 'reserved' encoding for the PKVM_NOPAGE state. The struct hyp_page layout isn't guaranteed stable at all, so there is no real reason to have 'reserved' encodings. No functional changes intended. Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-4-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28KVM: arm64: Fix pKVM page-tracking commentsQuentin Perret
Most of the comments relating to pKVM page-tracking in nvhe/memory.h are now either slightly outdated or outright wrong. Fix the comments. Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-3-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28KVM: arm64: Track SVE state in the hypervisor vcpu structureFuad Tabba
When dealing with a guest with SVE enabled, make sure the host SVE state is pinned at EL2 S1, and that the hypervisor vCPU state is correctly initialised (and then unpinned on teardown). Co-authored-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Fuad Tabba <tabba@google.com> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20250416152648.2982950-2-qperret@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-04-28arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE BaseboardPeter Robinson
This adds all the pin mappings on the WiFi/BT header on the SOPINE Baseboard/A64-LTS. They're disabled by default as the modules don't ship by default. This includes, where they haven't been already, UART1 for BT and mmc1 for WiFi. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://patch.msgid.link/20250420094823.954073-3-pbrobinson@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64Peter Robinson
This adds all the pin mappings on the WiFi/BT header on the original Pine64. They're disabled by default as the modules don't ship by default. This includes, where they haven't been already, UART1 for BT and mmc1 for WiFi. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://patch.msgid.link/20250420094823.954073-2-pbrobinson@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: correct the model name for Radxa Cubie A5EChukun Pan
According to https://radxa.com/products/cubie/a5e, the name of this board should be "Radxa Cubie A5E". This is also consistent with the dt-bindings. Fixes: 80e0fb4e491b ("arm64: dts: allwinner: a523: add Radxa A5E support") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250416100006.82920-1-amadeus@jmu.edu.cn Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: Align wifi node name with bindingsKrzysztof Kozlowski
Since commit 3c3606793f7e ("dt-bindings: wireless: bcm4329-fmac: Use wireless-controller.yaml schema"), bindings expect 'wifi' as node name: sun50i-h6-orangepi-3.dtb: sdio-wifi@1: $nodename:0: 'sdio-wifi@1' does not match '^wifi(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250424084737.105215-1-krzysztof.kozlowski@linaro.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: h616: enable Mali GPU for all boardsAndre Przywara
All Allwinner H616/H618 SoCs contain a Mali G31 MP2 GPU. Enable the DT nodes for that GPU, and specify the regulator providing power to the VDD_GPU pins of the package. The rest of the DT node is set by the SoC, so is not board specific. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250416224839.9840-5-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: h616: Add Mali GPU nodeAndre Przywara
The Allwinner H616 SoC contains a Mali-G31 MP2 GPU, which is of the Mali Bifrost family. There is a power domain specifically for that GPU, which needs to be enabled to make use of the it. Add the DT nodes for those two devices, and link them together through the "power-domains" property. Any board wishing to use the GPU would need to enable the GPU node and specify the "mali-supply" regulator. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250416224839.9840-4-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XXChris Morgan
Add support for headphone insertion detection via GPIO for the RG35XX series, and add the corresponding routing to the codec node. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Ryan Walklin <ryan@testtoast.com> Tested-by: Philippe Simons <simons.philippe@gmail.com> -- Changelog v1..v2: - Remove vendor prefix from GPIO description. - Whitespace fix Changelog v2..v3: - Add Tested-by tag Link: https://patch.msgid.link/20250214220247.10810-5-ryan@testtoast.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' propertiesRob Herring (Arm)
'clock-latency-ns' is not a valid property for CPU nodes. It belongs in OPP table (which has it). Drop them from the CPU nodes. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250410-dt-cpu-schema-v2-1-63d7dc9ddd0a@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm/arm64: dts: allwinner: Use preferred node names for cooling mapsRob Herring (Arm)
The preferred node name for cooling map nodes is a 'map' prefix. Use 'map0' like most other platforms. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250409203613.1506047-1-robh@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: h616: add YuzukiHD Chameleon supportAndre Przywara
The Chameleon board is an OpenHardware devboard made by YuzukiTsuru. The form factor resembles the Raspberry Pi Model A boards, though it differs significantly in its features: - Allwinner H618 SoC (4 * Arm Cortex-A53 cores, 1MB L2 cache, 1.4 GHz) - between 512MiB and 2GiB DDR3 DRAM - up to 128 GiB eMMC flash - AXP313a PMIC - 100 Mbit/s Ethernet pins on a header - XR829 WIFI+Bluetooth chip - 4 * USB 2.0 USB-C ports - microSD card slot - 3.5mm A/V port Add the devicetree describing the board's peripherals and their connections. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250307005712.16828-16-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-28arm64: dts: allwinner: a523: add Radxa A5E supportAndre Przywara
The Radxa A5E is a development board using the Allwinner A527 SoC, which is using the same die as the A523 SoC, just exposing the pins of more peripherals (like HDMI or the 2nd MAC). The board features: - Allwinner A527/T527 SoC: 8 ARM Cortex-A55 cores, Mali-G57 MC1 GPU - 1GiB/2GiB/4GiB LPDDR4 DRAM - AXP717 + AXP323 PMICs - Raspberry-Pi-2 compatible 40pin GPIO header - 1 USB 2.0 type C port (OTG), also power supply - 1 USB 3.0 type A host port (multiplexed with M.2 slot) - 1 M.2 M-key 2230 slot, with 1 PCIe2.1 lane connected (multiplexed with USB 3.0 port) - MicroSD slot - optional eMMC, 8, 16 or 32GB available - optional on-board 16MiB bootable SPI NOR flash - two 1Gbps Ethernet ports (via MAXIO MAE0621A PHYs) - PoE header for optional supply circuit on one Ethernet port - WiFi 802.11 a/b/g/n/ac/ax (LB-Link BL-M8800DS2 module using AIC8800) - HDMI port - camera and LCD connectors - power supply via USB-C connector (but no PD) or GPIO header pins This .dts describes the devices as far as we support them at the moment. The PMIC rails have been assigned as per the schematics. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250307005712.16828-14-andre.przywara@arm.com [wens@csie.org: Squash in SD card detect pull resistor fix] Link: https://patch.msgid.link/20250425003422.3465-1-andre.przywara@arm.com [wens@csie.org: Rename dts file to sun55i-a527-cubie-a5e.dts] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-27arm64: dts: exynosautov920: add cpucl0 clock DT nodesShin Son
Add cmu_cpucl0 clocks for switch, cluster, and dbg domains respectively. Signed-off-by: Shin Son <shin.son@samsung.com> Link: https://lore.kernel.org/r/20250423044153.1288077-4-shin.son@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-27arm64: dts: imx8mm-verdin: Link reg_usdhc2_vqmmc to usdhc2Wojciech Dubowik
Define vqmmc regulator-gpio for usdhc2 with vin-supply coming from LDO5. Without this definition LDO5 will be powered down, disabling SD card after bootup. This has been introduced in commit f5aab0438ef1 ("regulator: pca9450: Fix enable register for LDO5"). Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini") Fixes: f5aab0438ef1 ("regulator: pca9450: Fix enable register for LDO5") Tested-by: Manuel Traut <manuel.traut@mt.com> Reviewed-by: Philippe Schenker <philippe.schenker@impulsing.ch> Tested-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Cc: stable@vger.kernel.org Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@mt.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-04-27Revert "arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection"Jernej Skrabec
This reverts commit 531fdbeedeb89bd32018a35c6e137765c9cc9e97. Hardware that uses I2C wasn't designed with high speeds in mind, so communication with PMIC via RSB can intermittently fail. Go back to I2C as higher speed and efficiency isn't worth the trouble. Fixes: 531fdbeedeb8 ("arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection") Link: https://github.com/LibreELEC/LibreELEC.tv/issues/7731 Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250413135848.67283-1-jernej.skrabec@gmail.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-27arm64: dts: allwinner: a523: add X96Q-Pro+ supportAndre Przywara
The X96QPro+ is a TV box using the Allwinner H728 SoC. That SoC seems to be a package variant of the A523 family, at least it uses the same SoC ID and is compatible as far as we can assess. It comes with the following specs: - Allwinner H728 SoC: 8 Arm Cortex-A55 cores, Mali-G57 MC1 GPU - 2 or 4GiB DDR3L DRAM - 32, 64, or 128 GiB eMMC flash - AXP717 + AXP323 PMICs - Gigabit Ethernet (using MAXIO PHY) - HDMI port - 2 * USB 2.0 ports - 1 * USB 3.0 port - microSD card slot - TOSLINK digital audio output - 3.5mm A/V port - infrared sensor - 7-segment display - 5V barrel plug power supply - power button The PCB provides holes for soldering a UART header or cable, this is connected to the debug UART0. There is another set of UART pins available. The board also features a FEL button (accessible through the 3.5mm socket) and a reset button (only accessible when case is open). This .dts just describes the basic peripherals as far as we support them at the moment. The PMIC rail assignments are reverse engineered as far as possible, by dumping them from a running Android system, and correlating them to other boards using the same SoC. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250307005712.16828-13-andre.przywara@arm.com [wens@csie.org: Squash in SD card detect pull resistor fix] Link: https://patch.msgid.link/20250425003422.3465-1-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-27arm64: dts: allwinner: a523: add Avaota-A1 router supportAndre Przywara
The Avaota A1 router board is an Open Source hardware board, designed by YuzukiHD. Pine64 produces some boards and sells them. It uses the Allwinner A527 or T527 SoC, and comes with the following features: - Eight ARM Cortex-A55 cores, Mali-G57 MC1 GPU - 1GiB/2GiB/4GiB LPDDR4 DRAM - AXP717 + AXP323 PMIC - Raspberry-Pi-2 compatible GPIO header - 1 USB 2.0 type A host port, 1 USB 3.0 type A host post - 1 USB 2.0 type C port (OTG + serial debug) - MicroSD slot - eMMC between 16 and 128 GiB - on-board 16MiB bootable SPI NOR flash - two 1Gbps Ethernet ports (via RTL8211F PHYs) - HDMI port - DP port - camera and LCD connectors - 3.5mm headphone jack - (yet) unsupported WiFi/BT chip - 1.3" LC display, connected via SPI - 12 V barrel plug for power supply Add the devicetree file describing the currently supported features. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250307005712.16828-12-andre.przywara@arm.com [wens@csie.org: Squash in SD card detect pull resistor fix] Link: https://patch.msgid.link/20250425003422.3465-1-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-04-26arm64: dts: rockchip: Assign RT5616 MCLK rate on rk3588-friendlyelec-cm3588Tom Vincent
The Realtek RT5616 audio codec on the FriendlyElec CM3588 module fails to probe correctly due to the missing clock properties. This results in distorted analogue audio output. Assign MCLK to 12.288 MHz, which allows the codec to advertise most of the standard sample rates per other RK3588 devices. Fixes: e23819cf273c ("arm64: dts: rockchip: Add FriendlyElec CM3588 NAS board") Signed-off-by: Tom Vincent <linux@tlvince.com> Link: https://lore.kernel.org/r/20250417081753.644950-1-linux@tlvince.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>