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2012-07-17s390/idle: fix sequence handling vs cpu hotplugHeiko Carstens
The s390 idle accounting code uses a sequence counter which gets used when the per cpu idle statistics get updated and read. One assumption on read access is that only when the sequence counter is even and did not change while reading all values the result is valid. On cpu hotplug however the per cpu data structure gets initialized via a cpu hotplug notifier on CPU_ONLINE. CPU_ONLINE however is too late, since the onlined cpu is already running and might access the per cpu data. Worst case is that the data structure gets initialized while an idle thread is updating its idle statistics. This will result in an uneven sequence counter after an update. As a result user space tools like top, which access /proc/stat in order to get idle stats, will busy loop waiting for the sequence counter to become even again, which will never happen until the queried cpu will update its idle statistics again. And even then the sequence counter will only have an even value for a couple of cpu cycles. Fix this by moving the initialization of the per cpu idle statistics to cpu_init(). I prefer that solution in favor of changing the notifier to CPU_UP_PREPARE, which would be a different solution to the problem. Cc: stable@vger.kernel.org Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-07-17m68k: allow PCI bus to be enabled for ColdFire m54xx CPUsGreg Ungerer
All support code for the PCI bus hardware on the ColdFire 547x and 548x CPUs is now in. Allow enabling of CONFIG_PCI for them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-17m68k: add PCI bus code support for the ColdFire M54xx SoC familyGreg Ungerer
The ColdFire M54xx SoC family have a traditional PCI bus interface. Add the core support code to access and use this bus on these parts. This code provides all the config space access functions and IO access functions. It also carries out the PCI bus initialization and hooks into the kernel PCI subsystem. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-17m68k: add IO access definitions to support PCI on ColdFire platformsGreg Ungerer
Define the usual memory access functions (readb/writeb/...) and I/O space functions (inb/outb/...) for PCI bus support on ColdFire CPU based platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2012-07-17m68k: add PCI bus support definitions for the ColdFire M54xx SoC familyGreg Ungerer
Add all the required definitoins to support the ColdFire M54xx SoC PCI hardware unit. These are strait out of the MCF5475 Reference Manual. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-17m68k: common PCI support definitions and codeGreg Ungerer
Basic set of definitions and support code required to turn on CONFIG_PCI for the m68k architecture. Nothing specific to any PCI implementation in any m68k class CPU hardware yet. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2012-07-17m68k: add support for DMA_BIDIRECTIONAL in dma support functionsGreg Ungerer
The dma cache support functions do not currently support the direction flag DMA_BIDIRECTIONAL. If a driver passes this direction to dma_map_single or friends you will get console output like this: dma_sync_single_for_device: unsupported dir 0 For example when using the Intel e100 ethernet driver on a ColdFire platform with PCI bus. You will get a stream of these messages coming out. Modify the dma cache support code adding support for DMA_BIDIRECTIONAL. It is actioned by doing a cache push operation. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-17m68k: fix ColdFire clear cache operationGreg Ungerer
The code for clearing (invalidating) the ColdFire cache is actually performing a push operation. Add functions to clear the cache, and fix cache_clear() to call the appropriate clear cache function. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16arch: Use eth_random_addrJoe Perches
Convert the existing uses of random_ether_addr to the new eth_random_addr. Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-07-17ARM: EXYNOS: Add G2D related clock entries for SMDK4X12Sachin Kamat
Adds G2D related clock entries for SMDK4X12 boards. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-17ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c fileSachin Kamat
G2D clock registers are different in EXYNOS4210 and EXYNOS4X12 SoCs. Hence moving the SoC specific G2D clock entries from common clock file (clock-exynos4.c) to EXYNOS4210 specific clock file (clock-exynos4210.c). Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-16ARM: imx: clk-imx31: Fix clock id for rnga driverFabio Estevam
Fix clock id for rnga driver. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-16ARM: imx: add missing item to the list of clock event modesUwe Kleine-König
This prevents an out-of-bounds access to the clock_event_mode_label when debugging. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-16ARM: i.MX5x CSPI: Fixed clock name for CSPIAlexander Shiyan
This patch also includes fix CSPI ID for i.MX53. ID should be 2, because IDs 0 and 1 are occupied by eCSPI. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-16ARM: i.MX5x clocks: Fix GPT clocksAlexander Shiyan
This patch fix incorrect defined bits for GPT clocks according to datasheet. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-16ARM: i.MX5x clocks: Fix parent for PWM clocksAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-16ARM: i.MX5x clocks: Add EPIT supportAlexander Shiyan
This patch adds support for Enhanced Periodic Interrupt Timer (EPIT) to clock subsystem. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-16Merge 3.5-rc7 into usb-nextGreg Kroah-Hartman
This resolves the merge issue with the drivers/usb/host/ehci-omap.c file. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-16Revert "apic: fix kvm build on UP without IOAPIC"Michael S. Tsirkin
This reverts commit f9808b7fd422b965cea52e05ba470e0a473c53d3. After commit 'kvm: switch to apic_set_eoi_write, apic_write' the stubs are no longer needed as kvm does not look at apicdrivers anymore. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-16KVM guest: switch to apic_set_eoi_write, apic_writeMichael S. Tsirkin
Use apic_set_eoi_write, apic_write to avoid meedling in core apic driver data structures directly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-16apic: add apic_set_eoi_write for PV useMichael S. Tsirkin
KVM PV EOI optimization overrides eoi_write apic op with its own version. Add an API for this to avoid meddling with core x86 apic driver data structures directly. For KVM use, we don't need any guarantees about when the switch to the new op will take place, so it could in theory use this API after SMP init, but it currently doesn't, and restricting callers to early init makes it clear that it's safe as it won't race with actual APIC driver use. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-16s390/hypfs: Add missing get_next_ino()Michael Holzheu
With git commit 85fe4025c616a7c0ed07bc2fc8c5371b07f3888c ("fs: do not assign default i_ino in new_inode") the get_next_ino() function was moved from the new_inode() to the different file system implementations. Unfortunately hypfs has been overlooked by the author. With this patch the get_next_ino() is added also to hypfs. Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
2012-07-16ARM: dma-mapping: modify condition check while freeing pagesPrathyush K
WARNING: at mm/vmalloc.c:1471 __iommu_free_buffer+0xcc/0xd0() Trying to vfree() nonexistent vm area (ef095000) Modules linked in: [<c0015a18>] (unwind_backtrace+0x0/0xfc) from [<c0025a94>] (warn_slowpath_common+0x54/0x64) [<c0025a94>] (warn_slowpath_common+0x54/0x64) from [<c0025b38>] (warn_slowpath_fmt+0x30/0x40) [<c0025b38>] (warn_slowpath_fmt+0x30/0x40) from [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) from [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) from [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) from [<c0211230>] (drm_gem_object_free+0x28/0x34) [<c0211230>] (drm_gem_object_free+0x28/0x34) from [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) from [<c01abe10>] (idr_for_each+0x74/0xb8) [<c01abe10>] (idr_for_each+0x74/0xb8) from [<c02114e4>] (drm_gem_release+0x1c/0x30) [<c02114e4>] (drm_gem_release+0x1c/0x30) from [<c0210ae8>] (drm_release+0x608/0x694) [<c0210ae8>] (drm_release+0x608/0x694) from [<c00b75a0>] (fput+0xb8/0x228) [<c00b75a0>] (fput+0xb8/0x228) from [<c00b40c4>] (filp_close+0x64/0x84) [<c00b40c4>] (filp_close+0x64/0x84) from [<c0029d54>] (put_files_struct+0xe8/0x104) [<c0029d54>] (put_files_struct+0xe8/0x104) from [<c002b930>] (do_exit+0x608/0x774) [<c002b930>] (do_exit+0x608/0x774) from [<c002bae4>] (do_group_exit+0x48/0xb4) [<c002bae4>] (do_group_exit+0x48/0xb4) from [<c002bb60>] (sys_exit_group+0x10/0x18) [<c002bb60>] (sys_exit_group+0x10/0x18) from [<c000ee80>] (ret_fast_syscall+0x0/0x30) This patch modifies the condition while freeing to match the condition used while allocation. This fixes the above warning which arises when array size is equal to PAGE_SIZE where allocation is done using kzalloc but free is done using vfree. Signed-off-by: Prathyush K <prathyush.k@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-07-16m68k: use simpler dma_alloc_coherent() for ColdFire CPUsGreg Ungerer
On all ColdFire platforms (whether MMU enabled or not) we want to use the simple page based dma_alloc_coherent. We don't want the virtual mapping version that is used on classic m68k setups. So modify the conditionals to use the existing simpler dma_alloc_coherent on all ColdFire and non-MMU builds. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: platform support for 8390 based ethernet used on some boardsGreg Ungerer
Quite a few of Freescale's older ColdFire development boards used an NS8390 based ethernet interface. Add a platform definition for the resources used by these devices so we can use it on these boards. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: Add clk definitions for m532x.Steven King
The 532x has individually controllable clocks for it peripherals. Add clk definitions for these and add default initialization of either enabled or disabled. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: Add clk definitions for m520x.Steven King
The 520x has individually controllable clocks for its peripherals. Add clk definitions for these and add default initialization of either enabled or disabled for all of the clocks. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: Add rtc device for m5441x.Steven King
Add definitions for the m5441x rtc device and an init_BSP function to the m5441x device code. Signed-off-by: Steven King <sfking@fdwdc.com>
2012-07-16m68knommu: add definitions for the third interrupt controller on devices ↵Steven King
that don't have a third interrupt controller. Extending the interrupt controller code in intc-simr.c to support the third interrupt controller on the m5441x means we need to add defines (as 0) for the third interrupt controller on devices that don't have a third interrupt controller. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: Add support for the Coldfire m5441x.Steven King
Add support for the Coldfire 5441x (54410/54415/54416/54417/54418). Currently we only support noMMU mode. It requires the PIT patch posted previously as it uses the PIT instead of the dma timer as a clock source so we can get all that GENERIC_CLOCKEVENTS goodness. It also adds some simple clk definitions and very simple minded power management. The gpio code is tweeked and some additional devices are added to devices.c. The Makefile uses -mv4e as apparently, the only difference a v4m (m5441x) and a v4e is the later has a FPU, which I don't think should matter to us in the kernel. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1Steven King
use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 so we can support those parts that have the pit1 interrupt on other than the first interrupt controller. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: Add support for the Coldfire 5251/5253Steven King
Basic support for the Coldfire 5251/5253. Signed-off-by: Steven king <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate ↵Steven King
mcf_gpio_chips. If we're not connecting external GPIO extenders via i2c or spi or whatever, we probably don't need GPIOLIB. If we provide an alternate implementation of the GPIOLIB functions to use when only on-chip GPIO is needed, we can change ARCH_REQUIRE_GPIOLIB to ARCH_WANTS_OPTIONAL_GPIOLIB so that GPIOLIB becomes optional. The downside is that in the GPIOLIB=n case, we lose all error checking done by gpiolib, ie multiply allocating the gpio, free'ing gpio etc., so that the only checking that can be done is if we reference a gpio on an external part. Targets that need the extra error checking can still select GPIOLIB=y. For the case where GPIOLIB=y, we can simplify the table of gpio chips to use a single chip, eliminating the tables of chips in the 5xxx.c files. The original motivation for the definition of multiple chips was to match the way many of the Coldfire variants defined their gpio as a spare array in memory. However, all this really gains us is some error checking when we request a gpio, gpiolib can check that it doesn't fall in one of the holes. If thats important, I think we can still come up with a better way of accomplishing that. Also in this patch is some general cleanup and reorganizing of the gpio header files (I'm sure I must have had a reason why I sometimes used a prefix of mcf_gpio and other times mcfgpio but for the life of me I can't think of it now). Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
2012-07-16m68k: merge the MMU and non-MMU versions of the entry.S codeGreg Ungerer
Some of the entry.S code is common to both MMU and non-MMU builds. So merge the entry_no.S and entry_mm.S files back into a single file. With a little code movement we only need a single #ifdef. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2012-07-16m68k: use jbsr to call functions instead of bsrlGreg Ungerer
There is a few places that the m68k entry code uses the bsrl instruction to call other functions. That instruction is only supported on 68020 and higher CPU types. If we use jbsr instead the code will be clean for all 68k and ColdFire CPU types. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2012-07-16m68k: use some direct calls to ret_from_exception in entry codeGreg Ungerer
The ret_from_excption code is referenced by its function name, or by a label set at the start of its code. The non-MMU code can share some of this code if we make direct calls to ret_from_exception instead of the associated label. The effected function paths are: buserr, trap and ret_from_fork. So change these to branch directly to ret_from_exception. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2012-07-15Merge tag 'v3.5-rc7' into regulator-driversMark Brown
Linux 3.5-rc7
2012-07-15Merge branch 'for-upstream' of git://github.com/agraf/linux-2.6 into nextAvi Kivity
ppc queue from Alex Graf: * Prepare some of the booke code for 64 bit support * BookE: Fix ESR flag in DSI * BookE: Add rfci emulation * 'for-upstream' of git://github.com/agraf/linux-2.6: KVM: PPC: Critical interrupt emulation support KVM: PPC: e500mc: Fix tlbilx emulation for 64-bit guests KVM: PPC64: booke: Set interrupt computation mode for 64-bit host KVM: PPC: bookehv: Add ESR flag to Data Storage Interrupt KVM: PPC: bookehv64: Add support for std/ld emulation. booke: Added crit/mc exception handler for e500v2 booke/bookehv: Add host crit-watchdog exception support Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-14vsyscall_64: add missing ifdef CONFIG_SECCOMPWill Drewry
vsyscall_seccomp introduced a dependency on __secure_computing. On configurations with CONFIG_SECCOMP disabled, compilation will fail. Reported-by: feng xiangjun <fengxj325@gmail.com> Signed-off-by: Will Drewry <wad@chromium.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-14Merge tag 'fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM Samsung SoC fixes from Arnd Bergmann. * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: S3C24XX: Correct CAMIF interrupt definitions ARM: S3C24XX: Correct AC97 clock control bit for S3C2440 ARM: SAMSUNG: fix race in s3c_adc_start for ADC ARM: SAMSUNG: Update default rate for xusbxti clock ARM: EXYNOS: register devices in 'need_restore' state for pm_domains ARM: EXYNOS: read initial state of power domain from hw registers
2012-07-14Merge branches 'core-urgent-for-linus', 'perf-urgent-for-linus' and ↵Linus Torvalds
'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull RCU, perf, and scheduler fixes from Ingo Molnar. The RCU fix is a revert for an optimization that could cause deadlocks. One of the scheduler commits (164c33c6adee "sched: Fix fork() error path to not crash") is correct but not complete (some architectures like Tile are not covered yet) - the resulting additional fixes are still WIP and Ingo did not want to delay these pending fixes. See this thread on lkml: [PATCH] fork: fix error handling in dup_task() The perf fixes are just trivial oneliners. * 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Revert "rcu: Move PREEMPT_RCU preemption to switch_to() invocation" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf kvm: Fix segfault with report and mixed guestmount use perf kvm: Fix regression with guest machine creation perf script: Fix format regression due to libtraceevent merge ring-buffer: Fix accounting of entries when removing pages ring-buffer: Fix crash due to uninitialized new_pages list head * 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: MAINTAINERS/sched: Update scheduler file pattern sched/nohz: Rewrite and fix load-avg computation -- again sched: Fix fork() error path to not crash
2012-07-14ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS5 platformsThomas Abraham
Add device nodes for the three instances of spi controllers in EXYNOS5 platforms and enable instance SPI 1 for SMDK5250 board. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-14ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOS5Thomas Abraham
Add the platform bits which are required to support SPI controllers. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-14ARM: EXYNOS: Add spi clock support for EXYNOS5Thomas Abraham
Add support for clock instances for each spi controller. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org> [kgene.kim@samsung.com: changed the name of clk for consensus] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-14ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platformsThomas Abraham
Add device nodes for the three instances of spi controllers in EXYNOS4 platforms. Enable instance SPI 2 for SMDKV310 board and disable all spi instances for Origen board. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-14ARM: EXYNOS: Enable platform support for SPI controllers for EXYNOX4Thomas Abraham
Add the platform bits which are required to support SPI controllers. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-14ARM: EXYNOS: Fix the incorrect hierarchy of spi controller bus clockThomas Abraham
The sclk_spi clock is derived currently from the first level divider (MMCx_RATIO) which is incorrect. The output of the first level clock is divided by a second level divider (MMCx_PRE_RATIO), the output of which is used as the spi bus clock (sclk_spi). Fix the clock hierarchy issues for the sclk_spi clock. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org> [kgene.kim@samsung.com: changed the name of clk for consensus] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-07-13x86/vsyscall: allow seccomp filter in vsyscall=emulateWill Drewry
If a seccomp filter program is installed, older static binaries and distributions with older libc implementations (glibc 2.13 and earlier) that rely on vsyscall use will be terminated regardless of the filter program policy when executing time, gettimeofday, or getcpu. This is only the case when vsyscall emulation is in use (vsyscall=emulate is the default). This patch emulates system call entry inside a vsyscall=emulate by populating regs->ax and regs->orig_ax with the system call number prior to calling into seccomp such that all seccomp-dependencies function normally. Additionally, system call return behavior is emulated in line with other vsyscall entrypoints for the trace/trap cases. [ v2: fixed ip and sp on SECCOMP_RET_TRAP/TRACE (thanks to luto@mit.edu) ] Reported-and-tested-by: Owen Kibel <qmewlo@gmail.com> Signed-off-by: Will Drewry <wad@chromium.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-13Merge branch 'vexpress-v3.5-rc6' of ↵Arnd Bergmann
git://git.linaro.org/people/pawelmoll/linux into next/soc From Pawel Moll <pawel.moll@arm.com>: Versatile Express updates for v3.6 * 'vexpress-v3.5-rc6' of git://git.linaro.org/people/pawelmoll/linux: ARM: vexpress: Config option for early printk console ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses ARM: vexpress: Add fixed regulator for SMSC ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files ARM: vexpress: Initial common clock support ARM: versatile: Make plat-versatile clock optional ARM: vexpress: Check master site in daughterboard's sysctl operations ARM: vexpress: remove automatic errata workaround selection Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-13Merge tag 'davinci-v3.6-dt' of ↵Arnd Bergmann
git://gitorious.org/linux-davinci/linux-davinci into next/dt From Sekhar Nori <nsekhar@ti.com>: DaVinci DT support Add DT support for DaVinci cp_intc interrupt controller * tag 'davinci-v3.6-dt' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: cp_intc: Add OF support for TI interrupt controller ARM: davinci: add runtime PM support for clock management ARM: davinci: cp_intc: Add irq domain support Signed-off-by: Arnd Bergmann <arnd@arndb.de>