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path: root/drivers/gpu/drm/amd/powerplay
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2020-07-01drm/amd/powerplay: enable VR0HOT for sienna_cichlidLikun Gao
Enable the feature of Voltage Regulator (VR) Hot for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable PPT and TDC for sienna_cichlidLikun Gao
Enable PPT and TDC for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: support to get power index for sienna_cichlidLikun Gao
Add function to get smu power index for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable Fan control for sienna_cichlidLikun Gao
Support for Advanced Fan Control (AFC+) for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable GFX SS for sienna_cichlidLikun Gao
Enable Graphics Clock (GFXCLK) Spread Spectrum for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable LCLK DPM for sienna_cichlidLikun Gao
Enable LCLK DPM for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: support to print pcie levels for sienna_cichlidLikun Gao
Support to print PCIE clk levels for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: support pcie value set and update for sienna_cichlidLikun Gao
Add support to set default pcie parameters for sienna_cichlid. Add support to update pcie parameters for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable DCEFCLK DPM and DS for sienna_cichlidLikun Gao
Enable Display Clocks Dynamic Power Management (DPM) for sienna_cichlid. Enable Display Controller Engine Fabric Clock Deep Sleep for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: Enable SOCCLK ULV for sienna_cichlidLikun Gao
Enable FW DSTATE for sienna_cichlid. Enable DF CSTATE for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: make gfx ds can be configure for sienna_cichlidLikun Gao
Make GFX deep sleep can be configure for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amdgpu/powerplay: set UCLK DPM for sienna_cichlidLikun Gao
Enable uclk dpm for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amdgpu/powerplay: set Thermal control for sienna_cichlidLikun Gao
Enable Auto Thermal Throttling for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable SOC Clock Deep Sleep for sienna_cichlidLikun Gao
Enable System On Chip Clock Deep Sleep for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable Graphics Clock Deep Sleep for sienna_cichlidLikun Gao
Enable Graphics Clock Deep Sleep for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: enable Ultra Low Voltage for sienna_cichlidLikun Gao
Support Ultra Low Voltage for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: set FCLK DPM for sienna_cichlidLikun Gao
Support for FCLK DPM for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: set SOCCLK DPM for sienna_cichlidLikun Gao
Support for SOCCLK DPM for sienna_cichlid. Use feature mask to control DPM for sienna_cichlid. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amd/powerplay: add support to set performance level for sienna_cichlidLikun Gao
Support for performance level set for sienna_cichlid. Set standard performance level not fully support, will set to auto performance level. Set peak performance level not fully support, will do nothing with it. Force clk level only support for 2 level for fine grained DPM. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2)Likun Gao
SMU11 based similar to navi1x. v2: squash in SMU IF updates Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-02drm/amdgpu: Add unique_id and serial_number for Arcturus v3Kent Russell
Add support for unique_id and serial_number, as these are now the same value, and will be for future ASICs as well. v2: Explicitly create unique_id only for VG10/20/ARC v3: Change set_unique_id to get_unique_id for clarity Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-02drm/amdgpu: Add ReadSerial defines for ArcturusKent Russell
Add the ReadSerial definitions for Arcturus to the arcturus_ppsmc.h header for use with unique_id Unrevert: Supported in SMU 54.23, update values to match SMU spec Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: give better names for the thermal IRQ related APIsEvan Quan
Thermal control is performed by PMFW. What handled in driver is just whether or not to enable the alert(to driver). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: use the common APIs for IRQ disablement/enablementEvan Quan
Also the new logics for MP1 SW IRQs disablement/enablement are added. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: stop thermal IRQs on suspendEvan Quan
Added missing thermal IRQs disablement on suspend. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amdgpu: added a sysfs interface for thermal throttling related V4Evan Quan
User can check and set the enablement of throttling logging and the interval between each logging. V2: simplify the sysfs interface(no string parsing) V3: add proper lock protection on updating throttling_logging_rs.interval V4: documentation cosmetic per Luben's suggestion Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: enable thermal throttling logging support V2Evan Quan
Currently this feature is supported on Arcturus only. PMFW will interrupt driver the first time when thermal throttling happened and every one second afterwards if the throttling continuing. On receiving the 1st interrupt, driver logs it the first time. However, if the throttling continues, the logging will be performed every minute to avoid log flooding. V2: simplify the implemention by ratelimited printk Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: implement ASIC specific thermal throttling loggingEvan Quan
Enable this for Arcturus only for now. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: update Arcturus smu-driver headersEvan Quan
To fit the latest 54.24.0 PMFW. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-29drm/amd/powerplay: ack the SMUToHost interrupt on receive V2Evan Quan
There will be no further interrupt without proper ack for current one. V2: fix typo to really set ACK bit only Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: add check before i2c_add_adapterWenhui Sheng
smu_i2c_eeprom_init may be invoked twice or more under sroiv mode, while we don't want to add check if (!amdgpu_sriov_vf) before we invoke smu_i2c_eeprom_init/fini each time, so we check if i2c adapter is already added before we invoke i2c_add_adapter Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: remove SRIOV check in SMU11 (v2)Wenhui Sheng
We don't need SRIOV check after we enable SMC msg filter in SMU11 v2: squash in unused variable fix, unused ids Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: enable SMC message filterWenhui Sheng
1. enable SMC message filter in SRIOV situation 2. return -EACCESS if msg is blocked from smu_msg_get_index 3. if msg is block, always return 0 from smu_v11_0_send_msg_with_param Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: add SMC message filter for SMU11Wenhui Sheng
1. add smu_11_0_msg_mapping definition 2. add valid info for each SMC message in SRIOV Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: check whether SMU IP is enabled before accessEvan Quan
Since on early phase of bringup, the SMU IP may be not enabled or supported. Without this, we may hit null pointer dereference on accessing smu->adev. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Tested-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: skip smu_i2c_eeprom_init/fini under sriov modeHua Zhang
When smu_i2c_eeprom_init is called on the smu resuming process under sroiv mode, there will be a call trace: [ 436.377690] dump_stack+0x63/0x85 [ 436.377695] kobject_init+0x77/0x90 [ 436.377704] device_initialize+0x28/0x110 [ 436.377708] device_register+0x12/0x20 [ 436.377756] i2c_register_adapter+0xeb/0x400 [ 436.377763] i2c_add_adapter+0x5a/0x80 [ 436.377951] arcturus_i2c_eeprom_control_init+0x60/0x80 [amdgpu] [ 436.378123] smu_resume+0xcc/0x110 [amdgpu] [ 436.378247] amdgpu_device_gpu_recover+0xfb1/0xfc0 [amdgpu] [ 436.378401] amdgpu_job_timedout+0xf2/0x150 [amdgpu] [ 436.378414] drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378420] ? drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378430] process_one_work+0x1fd/0x3f0 [ 436.378438] worker_thread+0x34/0x410 [ 436.378444] kthread+0x121/0x140 [ 436.378451] ? process_one_work+0x3f0/0x3f0 [ 436.378456] ? kthread_create_worker_on_cpu+0x70/0x70 [ 436.378464] ret_from_fork+0x35/0x40 This is because smu_i2c_eeprom is not released on gpu recovering. Actually, smu_i2c_eeprom_init/fini are only needed under bare mental mode. Signed-off-by: Hua Zhang <hua.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: remove the support of vega20 from swsmuKevin Wang
by default, vega20 will use legacy powerplay driver. in order to maintain the code conveniently in the future, remove the support of vega20 from swsmu. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-28drm/amd/powerplay: remove the support of xgmi pstate on vega20 from swsmuKevin Wang
the vega20 asic uses legacy powerplay driver by default. 1. cleanup is_support_sw_smu_xgmi() function. (only use for vega20 xgmi pstate check) 2. by default, the vega20 set xgmi pstate by legacy powerplay routine. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-22drm/amdgpu: add apu flags (v2)Alex Deucher
Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21drm/amdgpu/smu10: Replace one-element array and use struct_size() helperGustavo A. R. Silva
The current codebase makes use of one-element arrays in the following form: struct something { int length; u8 data[1]; }; struct something *instance; instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL); instance->length = size; memcpy(instance->data, source, size); but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. So, replace the one-element array with a flexible-array member. Also, make use of the new struct_size() helper to properly calculate the size of struct smu10_voltage_dependency_table. This issue was found with the help of Coccinelle and, audited and fixed _manually_. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21drm/amd/powerplay: unify the prompts on thermal interruptsEvan Quan
The prompts will contain pci address(segment/bus/port/function), severity(warn or error) and some keywords(GPU, amdgpu). Also this address the issue that pci bus retrieved by PCI_BUS_NUM(adev->pdev->devfn) is wrong. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21drm/amdgpu: resolve ras recovery vs smi race conditionJohn Clements
during ras recovery block smu access via smi Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-14drm/amdgpu: Updated XGMI power down control support checkJohn Clements
Updated SMC FW version check to determine if XGMI power down control is supported Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-14drm/amdgpu: Add cmd to control XGMI link sleepJohn Clements
Added host to SMU FW cmd to enable/disable XGMI link power down Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-14drm/amd/powerplay: report correct AC/DC event based on ctxid V2Evan Quan
'ctxid' is used to distinguish different events raised from SMC. 0x3 and 0x4 are for AC and DC power mode. V2: update the way to retrieve the ctxid and change the log level to debug Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-14drm/amd/powerplay: shutdown on HW CTFEvan Quan
To prevent further damage. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-14drm/amd/powerplay: try to do a graceful shutdown on SW CTFEvan Quan
Normally this(SW CTF) should not happen. And by doing graceful shutdown we can prevent further damage. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-14Merge tag 'amd-drm-next-5.8-2020-05-12' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.8-2020-05-12: amdgpu: - Misc cleanups - RAS fixes - Expose FP16 for modesetting - DP 1.4 compliance test fixes - Clockgating fixes - MAINTAINERS update - Soft recovery for gfx10 - Runtime PM cleanups - PSP code cleanups amdkfd: - Track GPU memory utilization per process - Report PCI domain in topology Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200512213703.4039-1-alexander.deucher@amd.com
2020-05-11drm/amd/powerplay: skip judging if baco support for Arcturus sriovJane Jian
since for sriov, baco happens on host side, no need and meaning to judge is baco. also, since kiq reads strap0 in here, if kiq is not ready or gpu reset(kiq resume) happens after this read, would fail to read and wrongly set baco as true(1). Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Jane Jian <Jane.Jian@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-08drm/amdgpu: enable hibernate support on Navi1XEvan Quan
BACO is needed to support hibernate on Navi1X. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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