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Use devm_platform_ioremap_resource_byname() to simplify the code
since it contains platform_get_resource_byname() and
devm_ioremap_resource() respectively.
Link: https://lore.kernel.org/r/20200708164013.5076-1-zhengdejin5@gmail.com
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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According to the Armada XP datasheet, section 10.2.6: "in order for
the device to do a write to the MSI doorbell address, it needs to write
to a register in the internal registers space".
As a result of the requirement above, without this patch, MSI won't
function and therefore some devices won't operate properly without
pci=nomsi.
This requirement was not present at the time of writing this driver
since the vendor u-boot always initializes all PCIe controllers
(incl. BAR0 initialization) and for some time, the vendor u-boot was
the only available bootloader for this driver's SoCs (e.g. A38x,A37x,
etc).
Tested on an Armada 385 board on mainline u-boot (2020.4), without
u-boot PCI initialization and the following PCIe devices:
- Wilocity Wil6200 rev 2 (wil6210)
- Qualcomm Atheros QCA6174 (ath10k_pci)
Both failed to get a response from the device after loading the
firmware and seem to operate properly with this patch.
Link: https://lore.kernel.org/r/20200623060334.108444-1-sh@tkos.co.il
Signed-off-by: Shmuel Hazan <sh@tkos.co.il>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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Use devm_platform_ioremap_resource() to simplify the code, since t
contains platform_get_resource() and devm_ioremap_resource() calls
respectively.
Link: https://lore.kernel.org/r/20200708155614.308-1-zhengdejin5@gmail.com
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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Use devm_platform_ioremap_resource_byname() to simplify the code,
since it calls respectively platform_get_resource_byname() and
devm_ioremap_resource().
Link: https://lore.kernel.org/r/20200602171601.17630-1-zhengdejin5@gmail.com
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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The xilinx host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
The only difference is pci_assign_unassigned_bus_resources() was called
instead of pci_bus_size_bridges() and pci_bus_assign_resources(). This
should be the same.
Link: https://lore.kernel.org/r/20200522234832.954484-16-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>
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The xilinx-nwl host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
The only difference is pci_assign_unassigned_bus_resources() was called
instead of pci_bus_size_bridges() and pci_bus_assign_resources(). This
should be the same.
Link: https://lore.kernel.org/r/20200522234832.954484-15-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>
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The rockchip host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-14-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
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The rcar host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-13-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: linux-renesas-soc@vger.kernel.org
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The iproc host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
The only difference is pci_assign_unassigned_bus_resources() was called
instead of pci_bus_size_bridges() and pci_bus_assign_resources(). This
should be the same.
Link: https://lore.kernel.org/r/20200522234832.954484-12-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
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The altera host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
The only difference is pci_assign_unassigned_bus_resources() was called
instead of pci_bus_size_bridges() and pci_bus_assign_resources(). This
should be the same.
Link: https://lore.kernel.org/r/20200522234832.954484-11-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: rfi@lists.rocketboards.org
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The xgene host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-10-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Toan Le <toan@os.amperecomputing.com>
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The versatile host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-9-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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The v3 host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-8-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
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The tegra host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-7-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
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The mobiveil host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-6-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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The brcmstb host driver does the same host registration and bus scanning
calls as pci_host_probe, so let's use it instead.
Link: https://lore.kernel.org/r/20200522234832.954484-5-robh@kernel.org
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-rpi-kernel@lists.infradead.org
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There's no need to create a temporary resource list and then splice it to
struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
directly. The necessary clean-up is already handled by the PCI core.
Link: https://lore.kernel.org/r/20200522234832.954484-4-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will@kernel.org>
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Lots of define are actually already defined in pci_regs.h, directly use
the standard defines.
Link: https://lore.kernel.org/r/20200615210608.21469-13-ansuelsmth@gmail.com
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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Some SoC based on ipq8064/5 needs to be limited to pci GEN1 speed due to
some hardware limitations. Add support for speed setting defined by the
max-link-speed binding. If not defined the max speed is set to GEN2 by
default.
Link: https://lore.kernel.org/r/20200615210608.21469-12-ansuelsmth@gmail.com
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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Ipq8064-v2 have tx term offset set to 0. Introduce this variant to permit
different offset based on the revision.
Link: https://lore.kernel.org/r/20200615210608.21469-10-ansuelsmth@gmail.com
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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Add tx term offset support to pcie qcom driver need in some revision of
the ipq806x SoC. Ipq8064 needs tx term offset set to 7.
Link: https://lore.kernel.org/r/20200615210608.21469-9-ansuelsmth@gmail.com
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
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Set some specific value for Tx De-Emphasis, Tx Swing and Rx equalization
needed on some ipq8064 based device (Netgear R7800 for example). Without
this the system locks on kernel load.
Link: https://lore.kernel.org/r/20200615210608.21469-8-ansuelsmth@gmail.com
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
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Rework 2.1.0 revision to use bulk clk api and fix missing assert on
reset_control_deassert error.
Link: https://lore.kernel.org/r/20200615210608.21469-7-ansuelsmth@gmail.com
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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Add missing ext reset used by ipq8064 SoC in PCIe qcom driver.
Link: https://lore.kernel.org/r/20200615210608.21469-5-ansuelsmth@gmail.com
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: stable@vger.kernel.org # v4.5+
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The deinit issues reset_control_assert for PCI twice and does not contain
phy reset.
Link: https://lore.kernel.org/r/20200615210608.21469-4-ansuelsmth@gmail.com
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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Aux and Ref clk are missing in PCIe qcom driver. Add support for this
optional clks for ipq8064/apq8064 SoC.
Link: https://lore.kernel.org/r/20200615210608.21469-2-ansuelsmth@gmail.com
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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Most callers of config read do not check for return value. But most of the
ones that do, checks for error indication in 'val' variable.
This patch updates error handling in advk_pcie_rd_conf() function. If PIO
transfer fails then 'val' variable is set to 0xffffffff which indicates
failture.
Link: https://lore.kernel.org/r/20200528162604.GA323482@bjorn-Precision-5520
Link: https://lore.kernel.org/r/20200601130315.18895-1-pali@kernel.org
Reported-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code, thus a matching decrement is needed on
the error handling path to keep the counter balanced.
Link: https://lore.kernel.org/r/20200707055000.9453-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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pm_runtime_get_sync() increments the runtime PM usage counter even
it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.
Link: https://lore.kernel.org/r/20200520090253.2761-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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pm_runtime_get_sync() increments the runtime PM usage counter even
it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.
Link: https://lore.kernel.org/r/20200520084756.31620-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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VMD device 28C0 natively assists guest passthrough of the VMD endpoint
through the use of shadow registers that provide Host Physical Addresses
to correctly assign bridge windows. These shadow registers are only
available if VMD config space register 0x70, bit 1 is set.
In order to support this mode in existing VMD devices which don't
natively support the shadow register, it was decided that the hypervisor
could offer the shadow registers in a vendor-specific PCI capability.
QEMU has been modified to create this vendor-specific capability and
supply the shadow membar registers for VMDs which don't natively support
this feature. This patch adds this mode and updates the supported device
list to allow this feature to be used on these VMDs.
Link: https://lore.kernel.org/r/20200528030240.16024-4-jonathan.derrick@intel.com
Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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There's no need to create a temporary resource list and then splice it to
struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
directly. The necessary clean-up is already handled by the PCI core.
Link: https://lore.kernel.org/r/20200522234832.954484-3-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Jason Cooper <jason@lakedaemon.net>
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There's no need to create a temporary resource list and then splice it to
struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
directly. The necessary clean-up is already handled by the PCI core.
Link: https://lore.kernel.org/r/20200522234832.954484-2-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Tom Joseph <tjoseph@cadence.com>
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Replace http:// links with https:// links. This reduces the likelihood of
man-in-the-middle attacks when developers open these links.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
[bhelgaas: also update samsung.com links, drop sourceforge link]
Link: https://lore.kernel.org/r/20200627103050.71712-1-grandmaster@al2klimov.de
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over
'---help---'"), the number of '---help---' has been gradually
decreasing, but there are still more than 2400 instances.
This commit finishes the conversion. While I touched the lines,
I also fixed the indentation.
There are a variety of indentation styles found.
a) 4 spaces + '---help---'
b) 7 spaces + '---help---'
c) 8 spaces + '---help---'
d) 1 space + 1 tab + '---help---'
e) 1 tab + '---help---' (correct indentation)
f) 1 tab + 1 space + '---help---'
g) 1 tab + 2 spaces + '---help---'
In order to convert all of them to 1 tab + 'help', I ran the
following commend:
$ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Enumeration:
- Program MPS for RCiEP devices (Ashok Raj)
- Fix pci_register_host_bridge() device_register() error handling
(Rob Herring)
- Fix pci_host_bridge struct device release/free handling (Rob
Herring)
Resource management:
- Allow resizing BARs for devices on root bus (Ard Biesheuvel)
Power management:
- Reduce Thunderbolt resume time by working around devices that don't
support DLL Link Active reporting (Mika Westerberg)
- Work around a Pericom USB controller OHCI/EHCI PME# defect
(Kai-Heng Feng)
Virtualization:
- Add ACS quirk for Intel Root Complex Integrated Endpoints (Ashok
Raj)
- Avoid FLR for AMD Starship USB 3.0 (Kevin Buettner)
- Avoid FLR for AMD Matisse HD Audio & USB 3.0 (Marcos Scriven)
Error handling:
- Use only _OSC (not HEST FIRMWARE_FIRST) to determine AER ownership
(Alexandru Gagniuc, Kuppuswamy Sathyanarayanan)
- Reduce verbosity by logging only ACPI_NOTIFY_DISCONNECT_RECOVER
events (Kuppuswamy Sathyanarayanan)
- Don't enable AER by default in Kconfig (Bjorn Helgaas)
Peer-to-peer DMA:
- Add AMD Zen Raven and Renoir Root Ports to whitelist (Alex Deucher)
ASPM:
- Allow ASPM on links to PCIe-to-PCI/PCI-X Bridges (Kai-Heng Feng)
Endpoint framework:
- Fix DMA channel release in test (Kunihiko Hayashi)
- Add page size as argument to pci_epc_mem_init() (Lad Prabhakar)
- Add support to handle multiple base for mapping outbound memory
(Lad Prabhakar)
Generic host bridge driver:
- Support building as module (Rob Herring)
- Eliminate pci_host_common_probe wrappers (Rob Herring)
Amlogic Meson PCIe controller driver:
- Don't use FAST_LINK_MODE to set up link (Marc Zyngier)
Broadcom STB PCIe controller driver:
- Disable ASPM L0s if 'aspm-no-l0s' in DT (Jim Quinlan)
- Fix clk_put() error (Jim Quinlan)
- Fix window register offset (Jim Quinlan)
- Assert fundamental reset on initialization (Nicolas Saenz Julienne)
- Add notify xHCI reset property (Nicolas Saenz Julienne)
- Add init routine for Raspberry Pi 4 VL805 USB controller (Nicolas
Saenz Julienne)
- Sync with Raspberry Pi 4 firmware for VL805 initialization (Nicolas
Saenz Julienne)
Cadence PCIe controller driver:
- Remove "cdns,max-outbound-regions" DT property (replaced by
"ranges") (Kishon Vijay Abraham I)
- Read 32-bit (not 16-bit) Vendor ID/Device ID property from DT
(Kishon Vijay Abraham I)
Marvell Aardvark PCIe controller driver:
- Improve link training (Marek Behún)
- Add PHY support (Marek Behún)
- Add "phys", "max-link-speed", "reset-gpios" to dt-binding (Marek
Behún)
- Train link immediately after enabling training to work around
detection issues with some cards (Pali Rohár)
- Issue PERST via GPIO to work around detection issues (Pali Rohár)
- Don't blindly enable ASPM L0s (Pali Rohár)
- Replace custom macros by standard linux/pci_regs.h macros (Pali
Rohár)
Microsoft Hyper-V host bridge driver:
- Fix probe failure path to release resource (Wei Hu)
- Retry PCI bus D0 entry on invalid device state for kdump (Wei Hu)
Renesas R-Car PCIe controller driver:
- Fix incorrect programming of OB windows (Andrew Murray)
- Add suspend/resume (Kazufumi Ikeda)
- Rename pcie-rcar.c to pcie-rcar-host.c (Lad Prabhakar)
- Add endpoint controller driver (Lad Prabhakar)
- Fix PCIEPAMR mask calculation (Lad Prabhakar)
- Add r8a77961 to DT binding (Yoshihiro Shimoda)
Socionext UniPhier Pro5 controller driver:
- Add endpoint controller driver (Kunihiko Hayashi)
Synopsys DesignWare PCIe controller driver:
- Program outbound ATU upper limit register (Alan Mikhak)
- Fix inner MSI IRQ domain registration (Marc Zyngier)
Miscellaneous:
- Check for platform_get_irq() failure consistently (negative return
means failure) (Aman Sharma)
- Fix several runtime PM get/put imbalances (Dinghao Liu)
- Use flexible-array and struct_size() helpers for code cleanup
(Gustavo A. R. Silva)
- Update & fix issues in bridge emulation of PCIe registers (Jon
Derrick)
- Add macros for bridge window names (PCI_BRIDGE_IO_WINDOW, etc)
(Krzysztof Wilczyński)
- Work around Intel PCH MROMs that have invalid BARs (Xiaochun Lee)"
* tag 'pci-v5.8-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (100 commits)
PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver
PCI: Add ACS quirk for Intel Root Complex Integrated Endpoints
PCI/DPC: Print IRQ number used by port
PCI/AER: Use "aer" variable for capability offset
PCI/AER: Remove redundant dev->aer_cap checks
PCI/AER: Remove redundant pci_is_pcie() checks
PCI/AER: Remove HEST/FIRMWARE_FIRST parsing for AER ownership
PCI: tegra: Fix runtime PM imbalance on error
PCI: vmd: Filter resource type bits from shadow register
PCI: tegra194: Fix runtime PM imbalance on error
dt-bindings: PCI: Add UniPhier PCIe endpoint controller description
PCI: hv: Use struct_size() helper
PCI: Rename _DSM constants to align with spec
PCI: Avoid FLR for AMD Starship USB 3.0
PCI: Avoid FLR for AMD Matisse HD Audio & USB 3.0
x86/PCI: Drop unused xen_register_pirq() gsi_override parameter
PCI: dwc: Use private data pointer of "struct irq_domain" to get pcie_port
PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
PCI: dwc: Fix inner MSI IRQ domain registration
PCI: dwc: pci-dra7xx: Use devm_platform_ioremap_resource_byname()
...
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- Fix vmd resource address calculation using Host Physical Address shadow
register (Jon Derrick)
* remotes/lorenzo/pci/vmd:
PCI: vmd: Filter resource type bits from shadow register
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- Fix memory leak in probe error paths (Christophe JAILLET)
* remotes/lorenzo/pci/v3-semi:
PCI: v3-semi: Fix a memory leak in v3_pci_probe() error handling paths
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- Fix error message for failure to get reset GPIO from DT (Pali Rohár)
- Fix runtime PM imbalance on error path (both tegra and tegra194)
(Dinghao Liu)
* remotes/lorenzo/pci/tegra:
PCI: tegra: Fix runtime PM imbalance on error
PCI: tegra194: Fix runtime PM imbalance on error
PCI: tegra: Fix reporting GPIO error value
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- Fix rcar OB window programming (Andrew Murray)
- Add rcar suspend/resume support (Kazufumi Ikeda)
- Add r8a77961 to DT binding (Yoshihiro Shimoda)
- Rename pcie-rcar.c to pcie-rcar-host.c to make room for endpoint mode
(Lad Prabhakar)
- Move shareable code to pcie-rcar.c (Lad Prabhakar)
- Correct PCIEPAMR mask calculation for "size < 128" (Lad Prabhakar)
- Add endpoint support for multiple outbound memory windows (Lad
Prabhakar)
- Add R-Car PCIe endpoint driver and DT bindings (Lad Prabhakar)
* remotes/lorenzo/pci/rcar:
MAINTAINERS: Add file patterns for rcar PCI device tree bindings
PCI: rcar: Add endpoint mode support
dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller
PCI: endpoint: Add support to handle multiple base for mapping outbound memory
PCI: endpoint: Pass page size as argument to pci_epc_mem_init()
PCI: rcar: Fix calculating mask for PCIEPAMR register
PCI: rcar: Move shareable code to a common file
PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c
dt-bindings: pci: rcar: add r8a77961 support
PCI: rcar: Add suspend/resume
PCI: rcar: Fix incorrect programming of OB windows
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- Release resource in probe failure path (Wei Hu)
- Retry PCI bus D0 entry if device state is invalid (Wei Hu)
- Use struct_size() to help avoid type mistakes (Gustavo A. R. Silva)
* remotes/lorenzo/pci/hv:
PCI: hv: Use struct_size() helper
PCI: hv: Retry PCI bus D0 entry on invalid device state
PCI: hv: Fix the PCI HyperV probe failure path to release resource properly
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- Constify struct pci_ecam_ops (Rob Herring)
- Support building as modules (Rob Herring)
- Eliminate wrappers for pci_host_common_probe() by using DT match table
data (Rob Herring)
* remotes/lorenzo/pci/host-generic:
PCI: host-generic: Eliminate pci_host_common_probe wrappers
PCI: host-generic: Support building as modules
PCI: Constify struct pci_ecam_ops
# Conflicts:
# drivers/pci/controller/dwc/pcie-hisi.c
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- Simplify computation of msix_tbl (Jiri Slaby)
- Make hisi_pcie_platform_ops static (Zou Wei)
- Warn about resources above 4G (Alan Mikhak)
- Make intel_pcie_cpu_addr() static (Jason Yan)
- Use devm_platform_ioremap_resource_byname() to simplify code and
improve error checking (Wei Yongjun)
- Fix inner MSI IRQ domain registration so it doesn't confuse debugfs
(Marc Zyngier)
- Don't use FAST_LINK_MODE on meson (Marc Zyngier)
- Add Socionext UniPhier Pro5 PCIe endpoint controller driver and DT
description (Kunihiko Hayashi)
* remotes/lorenzo/pci/dwc:
PCI: uniphier: Add Socionext UniPhier Pro5 PCIe endpoint controller driver
dt-bindings: PCI: Add UniPhier PCIe endpoint controller description
PCI: dwc: Use private data pointer of "struct irq_domain" to get pcie_port
PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link
PCI: dwc: Fix inner MSI IRQ domain registration
PCI: dwc: pci-dra7xx: Use devm_platform_ioremap_resource_byname()
PCI: dwc: intel: Make intel_pcie_cpu_addr() static
PCI: dwc: Program outbound ATU upper limit register
PCI: dwc: Make hisi_pcie_platform_ops static
PCI: dwc: Clean up computing of msix_tbl
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- Deprecate 'cdns,max-outbound-regions' and 'cdns,no-bar-match-nbits'
bindings in favor of deriving them from 'ranges' and 'dma-ranges'
(Kishon Vijay Abraham I)
- Read Vendor and Device ID as 32 bits (not 16) from DT (Kishon Vijay
Abraham I)
* remotes/lorenzo/pci/cadence:
PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT
PCI: cadence: Remove "cdns,max-outbound-regions" DT property
dt-bindings: PCI: cadence: Deprecate inbound/outbound specific bindings
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- Assert fundamental reset on initialization (Nicolas Saenz Julienne)
- Remove unnecessary clk_put(); devm_clk_get() handles this automatically
(Jim Quinlan)
- Fix outbound memory window register stride offset (Jim Quinlan)
- Add "aspm-no-l0s" property for brcmstb and disable ASPM L0s when
present (Jim Quinlan)
- Add property to notify Raspberry Pi firmware of xHCI reset (Nicolas
Saenz Julienne)
- Add Raspberry Pi VL805 xHCI init function to trigger VL805 firmware
load (Nicolas Saenz Julienne)
- Wait in brcmstb probe for Raspberry Pi VL805 firmware initialization
(Nicolas Saenz Julienne)
- Load Raspberry Pi VL805 firmware in USB early handoff quirk (Nicolas
Saenz Julienne)
* remotes/lorenzo/pci/brcmstb:
USB: pci-quirks: Add Raspberry Pi 4 quirk
PCI: brcmstb: Wait for Raspberry Pi's firmware when present
firmware: raspberrypi: Introduce vl805 init routine
soc: bcm2835: Add notify xHCI reset property
PCI: brcmstb: Disable L0s component of ASPM if requested
dt-bindings: PCI: brcmstb: New prop 'aspm-no-l0s'
PCI: brcmstb: Fix window register offset from 4 to 8
PCI: brcmstb: Don't clk_put() a managed clock
PCI: brcmstb: Assert fundamental reset on initialization
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- Fix altera whitespace (Colin Ian King)
* remotes/lorenzo/pci/altera:
PCI: altera: Clean up indentation issue on a return statement
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- Train link immediately after enabling link training to avoid issues
with Compex WLE900VX and Turris MOX devices (Pali Rohár)
- Remove ASPM config and let the PCI core do it (Pali Rohár)
- Interpret zero 'max-link-speed' value as invalid (Pali Rohár)
- Respect the 'max-link-speed' property and improve link training (Marek
Behún)
- Issue PERST via GPIO (Pali Rohár)
- Add PHY support (Marek Behún)
- Use standard PCIe capability macros (Pali Rohár)
- Document new 'max-link-speed', 'phys', and 'reset-gpios' properties
(Marek Behún)
* remotes/lorenzo/pci/aardvark:
dt-bindings: PCI: aardvark: Describe new properties
PCI: aardvark: Replace custom macros by standard linux/pci_regs.h macros
PCI: aardvark: Add PHY support
PCI: aardvark: Add FIXME comment for PCIE_CORE_CMD_STATUS_REG access
PCI: aardvark: Issue PERST via GPIO
PCI: aardvark: Improve link training
PCI: of: Zero max-link-speed value is invalid
PCI: aardvark: Don't blindly enable ASPM L0s and don't write to read-only register
PCI: aardvark: Train link immediately after enabling training
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- Clarify that platform_get_irq() should never return 0 (Bjorn Helgaas)
- Check for platform_get_irq() failure consistently (Bjorn Helgaas)
- Replace zero-length array with flexible-array (Gustavo A. R. Silva)
- Unify pcie_find_root_port() and pci_find_pcie_root_port() (Yicong Yang)
- Quirk Intel C620 MROMs, which have non-BARs in BAR locations (Xiaochun
Lee)
- Fix pcie_pme_resume() and pcie_pme_remove() kernel-doc (Jay Fang)
- Rename _DSM constants to align with spec (Krzysztof Wilczyński)
* pci/misc:
PCI: Rename _DSM constants to align with spec
PCI/PME: Fix kernel-doc of pcie_pme_resume() and pcie_pme_remove()
x86/PCI: Mark Intel C620 MROMs as having non-compliant BARs
PCI: Unify pcie_find_root_port() and pci_find_pcie_root_port()
PCI: Replace zero-length array with flexible-array
PCI: Check for platform_get_irq() failure consistently
driver core: platform: Clarify that IRQ 0 is invalid
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Add driver for the Socionext UniPhier Pro5 SoC endpoint controller.
This controller is based on the DesignWare PCIe core.
And add "host" to existing controller descriontions for the host controller
in Kconfig.
Link: https://lore.kernel.org/r/1589457801-12796-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux
Pull hyper-v updates from Wei Liu:
- a series from Andrea to support channel reassignment
- a series from Vitaly to clean up Vmbus message handling
- a series from Michael to clean up and augment hyperv-tlfs.h
- patches from Andy to clean up GUID usage in Hyper-V code
- a few other misc patches
* tag 'hyperv-next-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: (29 commits)
Drivers: hv: vmbus: Resolve more races involving init_vp_index()
Drivers: hv: vmbus: Resolve race between init_vp_index() and CPU hotplug
vmbus: Replace zero-length array with flexible-array
Driver: hv: vmbus: drop a no long applicable comment
hyper-v: Switch to use UUID types directly
hyper-v: Replace open-coded variant of %*phN specifier
hyper-v: Supply GUID pointer to printf() like functions
hyper-v: Use UUID API for exporting the GUID (part 2)
asm-generic/hyperv: Add definitions for Get/SetVpRegister hypercalls
x86/hyperv: Split hyperv-tlfs.h into arch dependent and independent files
x86/hyperv: Remove HV_PROCESSOR_POWER_STATE #defines
KVM: x86: hyperv: Remove duplicate definitions of Reference TSC Page
drivers: hv: remove redundant assignment to pointer primary_channel
scsi: storvsc: Re-init stor_chns when a channel interrupt is re-assigned
Drivers: hv: vmbus: Introduce the CHANNELMSG_MODIFYCHANNEL message type
Drivers: hv: vmbus: Synchronize init_vp_index() vs. CPU hotplug
Drivers: hv: vmbus: Remove the unused HV_LOCALIZED channel affinity logic
PCI: hv: Prepare hv_compose_msi_msg() for the VMBus-channel-interrupt-to-vCPU reassignment functionality
Drivers: hv: vmbus: Use a spin lock for synchronizing channel scheduling vs. channel removal
hv_utils: Always execute the fcopy and vss callbacks in a tasklet
...
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