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path: root/drivers/pinctrl/intel
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2023-08-15pinctrl: lynxpoint: reuse common functions from pinctrl-intelRaag Jadav
Reuse common functions from pinctrl-intel driver. While at it, select pinctrl-intel for Intel Lynxpoint driver. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-5-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: cherryview: reuse common functions from pinctrl-intelRaag Jadav
Reuse common functions from pinctrl-intel driver. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: baytrail: reuse common functions from pinctrl-intelRaag Jadav
Reuse common functions from pinctrl-intel driver. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-3-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: intel: export common pinctrl functionsRaag Jadav
Export common pinctrl functions that are used across Intel specific platform drivers, so that they can be reused. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15Merge patch series "Introduce Intel Tangier pinctrl driver"Andy Shevchenko
Raag Jadav <raag.jadav@intel.com> says: Merrifield and Moorefield pinctrl driver implementations are similar in terms of how they access the hardware. We can consolidate their pinctrl functionalities into a common library driver. This patch set introduces: 1. Intel Tangier driver that supports the common pinctrl functionalities for Merrifield and Moorefield platforms. 2. Intel Tangier adaptation for Merrifield pinctrl driver. 3. Intel Tangier adaptation for Moorefield pinctrl driver. Tested on Intel Edison platform. No deviation observed in the contents of below entries before and after this patchset. - /proc/interrupts - /sys/kernel/debug/gpio - /sys/kernel/debug/pinctrl/*/pins Link: https://lore.kernel.org/r/20230814054033.12004-1-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: moorefield: Adapt to Intel Tangier driverRaag Jadav
Make use of Intel Tangier as a library driver for Moorefield. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: merrifield: Adapt to Intel Tangier driverRaag Jadav
Make use of Intel Tangier as a library driver for Merrifield. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-3-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: tangier: Introduce Intel Tangier driverRaag Jadav
Intel Tangier implements the common pinctrl functionalities for Merrifield and Moorefield platforms. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-08-15pinctrl: baytrail: consolidate common mask operationRaag Jadav
Consolidate common mask operation outside of switch cases and limit IO operations to positive cases. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19pinctrl: cherryview: Drop goto labelAndy Shevchenko
We do not use goto labels in the Intel pin control drivers, so drop the only one in the entire folder. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19pinctrl: baytrail: invert if conditionRaag Jadav
Invert if condition and get rid of redundant else. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230616203356.27343-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failureRaag Jadav
Add warning for BYT_VAL_REG retrieval failure and continue such case to avoid unintended reads/writes in pm_ops. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230616203356.27343-3-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-19pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hookRaag Jadav
Reduce scope of spinlock to IO operations in ->dbg_show() hook and save a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-12 (-12) Function old new delta byt_gpio_dbg_show 890 878 -12 Total: Before=17029, After=17017, chg -0.07% Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230616203356.27343-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-15pinctrl: intel: refine ->irq_set_type() hookRaag Jadav
Refine ->irq_set_type() hook and improve its readability by: - Reducing scope of spinlock by moving unneeded operations out of it. - Dropping redundant PADCFG0_RXEVCFG_SHIFT and including it directly into PADCFG0_RXEVCFG_* definitions. - Utilizing temporary variables for common operations. - Simplifying if-else-if chain. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-14pinctrl: intel: refine ->set_mux() hookRaag Jadav
Utilize a temporary variable for common shift operation in ->set_mux() hook and improve readability while saving a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-3 (-3) Function old new delta intel_pinmux_set_mux 245 242 -3 Total: Before=10472, After=10469, chg -0.03% Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230613085054.10976-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-12pinctrl: baytrail: Use str_hi_lo() helperAndy Shevchenko
Use str_hi_lo() helper instead of open coding the same. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-07pinctrl: intel: Add Intel Meteor Lake-S pin controller supportAndy Shevchenko
This driver adds pinctrl/GPIO support for Intel Meteor Lake-S. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel pinctrl and GPIO core driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06pinctrl: moorefield: Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()Andy Shevchenko
Use explicit comparison to BUFCFG_PINMODE_GPIO instead of implying it. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06pinctrl: moorefield: Fix open-drain pin mode configurationAndy Shevchenko
Currently the pin may not be configured as open-drain in some cases because the argument may be 0 for the boolean types of the pin configurations. Fix this by ignoring the argument. With that, allow to actually restore pin to the push-pull mode. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06pinctrl: merrifield: Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()Andy Shevchenko
Use explicit comparison to BUFCFG_PINMODE_GPIO instead of implying it. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06pinctrl: merrifield: Fix open-drain pin mode configurationAndy Shevchenko
Currently the pin may not be configured as open-drain in some cases because the argument may be 0 for the boolean types of the pin configurations. Fix this by ignoring the argument. With that, allow to actually restore pin to the push-pull mode. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-06pinctrl: cherryview: Return correct value if pin in push-pull modeAndy Shevchenko
Currently the getter returns ENOTSUPP on pin configured in the push-pull mode. Fix this by adding the missed switch case. Fixes: ccdf81d08dbe ("pinctrl: cherryview: add option to set open-drain pin config") Fixes: 6e08d6bbebeb ("pinctrl: Add Intel Cherryview/Braswell pin controller support") Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-02pinctrl: cherryview: Don't use IRQ core constanst for invalid IRQAndy Shevchenko
The semantics of INVALID_HWIRQ is rather localized to IPI usage. Let's keep it that way. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-02pinctrl: baytrail: Use BIT() in BYT_PULL_ASSIGN_* definitionsAndy Shevchenko
The bias setting (pull-up or pull-down) are bit fields and we never enable them both, hence use BIT() macro to define them. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-06-02pinctrl: baytrail: Unify style of error and debug messagesAndy Shevchenko
Use same formatting strings where it makes sense, so linker will utilize only a single copy of it, otherwise make the style similar to the rest of the messages of the close enough semantics. add/remove: 1/0 grow/shrink: 2/2 up/down: 91/-110 (-19) Total: Before=17562, After=17543, chg -0.11% Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-02-22Merge tag 'pinctrl-v6.3-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ...
2023-02-07pinctrl: intel: Restore the pins that used to be in Direct IRQ modeAndy Shevchenko
If the firmware mangled the register contents too much, check the saved value for the Direct IRQ mode. If it matches, we will restore the pin state. Reported-by: Jim Minter <jimminter@microsoft.com> Fixes: 6989ea4881c8 ("pinctrl: intel: Save and restore pins in "direct IRQ" mode") Tested-by: Jim Minter <jimminter@microsoft.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230206141558.20916-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-12-30pinctrl: intel: Get rid of unused members in struct intel_functionAndy Shevchenko
The driver has been converted to a generic data type and macro for the pin function definition, hence get rid of not used members in the struct intel_function. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30pinctrl: moorefield: Convert to use new memeber in struct intel_functionAndy Shevchenko
Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30pinctrl: merrifield: Convert to use new memeber in struct intel_functionAndy Shevchenko
Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30pinctrl: lynxpoint: Convert to use new memeber in struct intel_functionAndy Shevchenko
Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30pinctrl: cherryview: Convert to use new memeber in struct intel_functionAndy Shevchenko
Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30pinctrl: baytrail: Convert to use new memeber in struct intel_functionAndy Shevchenko
Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-30pinctrl: intel: Make use of struct pinfunction and PINCTRL_PINFUNCTION()Andy Shevchenko
Since pin control provides a generic data type and a macro for the pin function definition, use them in the Intel driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-28pinctrl: intel: Define maximum pad number in the groupAndy Shevchenko
Instead of using hard coded magic number here and there, define maximum pad number in the group in newly added INTEL_PINCTRL_MAX_GPP_SIZE. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-28pinctrl: intel: Use same order of bit fields for PADCFG2Andy Shevchenko
PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same for PADCFG2 bit fields. No functional changes intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-28pinctrl: intel: Add ~4k bias supportAndy Shevchenko
All versions that have 20k and 5k resistance, i.e. all that the driver supports, may support ~4k when the above mentioned are connected in parallel. Add such a support. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-28pinctrl: intel: Add definitions to all possible biasesAndy Shevchenko
Add definitions to all possible biases, i.e. add ~800 Ohms, ~952 Ohms, ~4 kOhms. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-28pinctrl: intel: Deduplicate some code in intel_config_set_pull()Andy Shevchenko
First part is to assign default argument for all cases, since bias disablement doesn't use it anyway. Second part is to clear all bits in the bias setting and depending on the argument and parameter set them as asked. While at it, add break statement to the default cases. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: intel: Add default case to intel_config_set_pull()Andy Shevchenko
For the sake of symmetry with intel_config_get_pull(), add a default case to the outer switch. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: intel: Convert to generic_handle_domain_irq()Andy Shevchenko
Replace construct that matches generic_handle_irq(irq_find_mapping()) to a single call to generic_handle_domain_irq(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: intel: Always use gpp_num_padown_regs in the main driverAndy Shevchenko
For the size-based communities, always use gpp_num_padown_regs, which is now provided explicitly via INTEL_COMMUNITY_SIZE() macro. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: sunrisepoint: Replace SPT_COMMUNITY() by INTEL_COMMUNITY_*()Andy Shevchenko
Use INTEL_COMMUNITY_*() common macro instead custom SPT_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: tigerlake: Replace TGL_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko
Use INTEL_COMMUNITY_GPPS() common macro instead custom TGL_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: meteorlake: Replace MTL_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko
Use INTEL_COMMUNITY_GPPS() common macro instead custom MTL_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: lewisburg: Replace LBG_COMMUNITY() by INTEL_COMMUNITY_SIZE()Andy Shevchenko
Use INTEL_COMMUNITY_SIZE() common macro instead custom LBG_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: lakefield: Replace LKF_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko
Use INTEL_COMMUNITY_GPPS() common macro instead custom LKF_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: jasperlake: Replace JSL_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko
Use INTEL_COMMUNITY_GPPS() common macro instead custom JSL_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: icelake: Replace ICL_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko
Use INTEL_COMMUNITY_GPPS() common macro instead custom ICL_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-12-27pinctrl: geminilake: Replace GLK_COMMUNITY() by INTEL_COMMUNITY_SIZE()Andy Shevchenko
Use INTEL_COMMUNITY_SIZE() common macro instead custom GLK_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
generated by cgit (git 2.34.1) at 2025-07-16 07:24:24 +0000