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path: root/drivers/spi
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2024-03-28spi: au1550: t->{tx,rx}_dma checksDavid Lechner
There are no more peripheral drivers that set t->tx_dma or t->rx_dma so these will always == 0. Therefore, we can remove these checks since they are always true. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240328-spi-more-tx-rx-buf-cleanup-v1-1-9ec1ceedf08c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Skip SSP initialization if it's done elsewhereAndy Shevchenko
If SSP has been enumerated elsewhere, skip its initialization in pxa2xx_spi_init_pdata(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Extract pxa2xx_spi_init_ssp() helperAndy Shevchenko
Refactor pxa2xx_spi_init_pdata() by extracting a new pxa2xx_spi_init_ssp() helper which makes code less twisted. It will be easier to continue refactoring for a new coming modification. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Drop ACPI_PTR() and of_match_ptr()Andy Shevchenko
Drop rather useless use of ACPI_PTR() and of_match_ptr(). It also removes the necessity to be dependent of.h inclusion. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: pxa2xx: Narrow the Kconfig option visibilityAndy Shevchenko
The PCI || ACPI dependency is the historical part of the x86 support. Narrow the Kconfig option visibility by limiting this dependency to x86. The drop of x86 for PCI case had happened in the commit 2b49ebda39d6 ("spi/pxa2xx: allow building on a 64-bit kernel"), while the ACPI was specifically added for Intel Lynx Point in the commit a3496855d9f1 ("spi/pxa2xx: add support for Lynxpoint SPI controllers"). Note that X86 covers both 32- and 64-bit variants. Suggested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240327193138.2385910-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: omap2-mcpsi: Enable MULTI-mode in more situationsLouis Chauvet
Enable multimode when a transfer of multiple small words can be transformed in a transfer with a single bigger word. This is allowed as long as the result on the cable is the same, so word_delay must be zero. Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20240327-spi-omap2-mcspi-multi-mode-v3-3-c4ac329dd5a2@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: omap2-mcspi: Add support for MULTI-modeLouis Chauvet
Introduce support for MULTI-mode in the OMAP2 MCSPI driver. Currently, the driver always uses SINGLE mode to handle the chip select (CS). With this enhancement, MULTI-mode is enabled for specific messages, allowing for a shorter delay between CS enable and the message (some FPGA devices are sensitive to this delay). The OMAP2 MCSPI device can use two different mode to send messages, SINGLE and MULTI: In SINGLE mode, the controller only leverages one single FIFO, and the host system has to manually select the CS it wants to enable. In MULTI mode, each CS is bound to a FIFO, the host system then writes the data to the relevant FIFO, as the hardware will take care of the CS The drawback of multi-mode is that it's not possible to keep the CS enabled between each words. Therefore, this patch enables multi-mode only for specific messages: the spi_message must contain only spi_transfer of 1 word (of any size) with cs_change enabled. A new member is introduced in the omap2_mcspi structure to keep track of the current used mode. Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20240327-spi-omap2-mcspi-multi-mode-v3-2-c4ac329dd5a2@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: spi-omap2-mcspi.c: revert "Toggle CS after each word"Louis Chauvet
Commit 5cbc7ca987fb ("spi: spi-omap2-mcspi.c: Toggle CS after each word") introduced the toggling of CS after each word for the omap2-mcspi controller. The implementation is not respectful of the actual spi_message content, so the CS can be raised after each word even if the transfer structure asks to keep the CS active for the whole operation. As it is not used anyway in the current Linux tree, it can be safely removed. Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com> Link: https://msgid.link/r/20240327-spi-omap2-mcspi-multi-mode-v3-1-c4ac329dd5a2@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: fsl-dspi: drop driver owner assignmentKrzysztof Kozlowski
Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://msgid.link/r/20240327174737.519637-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: coldfire-qspi: drop driver owner assignmentKrzysztof Kozlowski
Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://msgid.link/r/20240327174737.519637-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-28spi: loopback-test: drop driver owner assignmentKrzysztof Kozlowski
Core in spi_register_driver() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://msgid.link/r/20240327174737.519637-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-26spi: pxa2xx: Switch to use dev_err_probe()Andy Shevchenko
Switch to use dev_err_probe() to simplify the error path and unify a message template. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240326181027.1418989-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: remove struct spi_message::is_dma_mappedDavid Lechner
There are no more users of the deprecated is_dma_mapped in struct spi_message so it can be removed. References in documentation and comments are also removed. A few similar checks if xfer->tx_dma or xfer->rx_dma are not NULL are also removed since these are now guaranteed to be NULL because they were previously set only if is_dma_mapped was true. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://msgid.link/r/20240325-spi-remove-is_dma_mapped-v2-1-d08d62b61f1c@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: spi_amd: Add support for SPI MEM frameworkRaju Rangoju
Add support to the SPI controller driver to use SPI MEM framework. SPI subsystem utilizing the SPI memory operations allows to re-use SPI controller drivers for both SPI NOR devices, regular SPI devices as well as SPI NAND devices. Add below functions of spi_mem_ops to support SPI MEM framework - exec-op(): to execute the memory operations. - supports_op(): to check if the memory operation is supported. - adjust_op_size(): to split data transfers so that they don’t exceed the max transfer size supported by the controller. Suggested-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com> Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com> Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com> Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> Link: https://msgid.link/r/20240229134544.3461757-1-Raju.Rangoju@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: rspi: Get rid of unused struct rspi_plat_dataAndy Shevchenko
No in-kernel users of struct rspi_plat_data. If required, the software nodes should be used for such users. For now just get rid of it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240325142118.3210915-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: spi-mt65xx: Rename a variable in interrupt handlerFei Shao
All the spi_transfer variables in this file use the name "xfer" except the one in mtk_spi_interrupt(). Align the naming for consistency and easier searching. While at it, reformat one memcpy() usage since the coding style allows 100 column lines today. This commit has no functional change. Signed-off-by: Fei Shao <fshao@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://msgid.link/r/20240321070942.1587146-3-fshao@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-25spi: mt7621: allow GPIO chip select linesJustin Swartz
Extract a magic number, from mt7621_spi_probe(), used to declare the number of chip select lines (which co-incides with the native chip select count of 2) to a macro. Use the newly defined MT7621_NATIVE_CS_COUNT macro to instead populate both the spi_controller's max_native_cs and num_chipselect members. Declare that the spi_controller should use_gpio_descriptors if present in the device properties (such as those declared in the cs-gpio property of a "ralink,mt7621-spi" compatible device-tree node) so that the SPI core will recalculcate num_chipselect to account for the GPIO descriptors that it should have populated in the cs_gpiod array member. Remove the assignment of mt7621_spi_transfer_one_message() to the spi_controller's transfer_one_message hook. Refactor the mt7621_spi_transfer_one_message() logic into mt7621_spi_prepare_message() and mt7621_spi_transfer_one() and assign both to the spi_controller's prepare_message and transfer_one hooks respectively. Migrate the call mt7621_spi_transfer_one_message() made to mt7621_spi_flush() just before chip select deactivation, to the end of mt7621_spi_write_half_duplex() to ensure that any pending data is shifted out of MOSI before the SPI core deactivates the chip select line. As chip select activation is now taken care of by the SPI core, due to the use of the transfer_one hook instead of transfer_one_message, the calls to mt7621_spi_set_cs() from mt7621_spi_transfer_one_message() have fallen away. And although the SPI core will handle activation for GPIO chip select lines behind the scenes, it requires a callback to allow the driver to perform controller-specific operations to control its native chip select lines. Rename mt7621_spi_set_cs() to mt7621_spi_set_native_cs() and make sure that it takes into account the activation polarity of the chip select line it's acting upon, as the passed enable parameter represents the desired line level and not the desired activation state, and then assign mt7621_set_cs() to the spi_controller's set_cs hook. Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za> Link: https://msgid.link/r/20240316010302.20776-1-justin.swartz@risingedge.co.za Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-22Merge tag 'spi-fix-v6.9-merge-window' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A small collection of fixes that came in since the merge window. Most of it is relatively minor driver specific fixes, there's also fixes for error handling with SPI flash devices and a fix restoring delay control functionality for non-GPIO chip selects managed by the core" * tag 'spi-fix-v6.9-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spi-mt65xx: Fix NULL pointer access in interrupt handler spi: docs: spidev: fix echo command format spi: spi-imx: fix off-by-one in mx51 CPU mode burst length spi: lm70llp: fix links in doc and comments spi: Fix error code checking in spi_mem_exec_op() spi: Restore delays for non-GPIO chip select spi: lpspi: Avoid potential use-after-free in probe()
2024-03-21spi: spi-mt65xx: Fix NULL pointer access in interrupt handlerFei Shao
The TX buffer in spi_transfer can be a NULL pointer, so the interrupt handler may end up writing to the invalid memory and cause crashes. Add a check to trans->tx_buf before using it. Fixes: 1ce24864bff4 ("spi: mediatek: Only do dma for 4-byte aligned buffers") Signed-off-by: Fei Shao <fshao@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://msgid.link/r/20240321070942.1587146-2-fshao@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-18spi: spi-imx: fix off-by-one in mx51 CPU mode burst lengthAdam Butcher
c712c05e46c8 ("spi: imx: fix the burst length at DMA mode and CPU mode") corrects three cases of setting the ECSPI burst length but erroneously leaves the in-range CPU case one bit to big (in that field a value of 0 means 1 bit). The effect was that transmissions that should have been 8-bit bytes appeared as 9-bit causing failed communication with SPI devices. Link: https://lore.kernel.org/all/20240201105451.507005-1-carlos.song@nxp.com/ Link: https://lore.kernel.org/all/20240204091912.36488-1-carlos.song@nxp.com/ Fixes: c712c05e46c8 ("spi: imx: fix the burst length at DMA mode and CPU mode") Signed-off-by: Adam Butcher <adam@jessamine.co.uk> Link: https://msgid.link/r/20240318175119.3334-1-adam@jessamine.co.uk Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-18spi: Merge up v6.8 releaseMark Brown
An i.MX fix depends on other fixes that were sent to v6.8.
2024-03-18spi: lm70llp: fix links in doc and commentsKousik Sanagavarapu
Update links in the documentation and in-code comments which point to the datasheet and schematic. The current links don't work because National Semiconductor (which is the manufacturer of this board and lm70) has been a part of Texas Instruments since 2011 and hence http://www.national.com/ doesn't work anymore. Fixes: 78961a574037 ("spi_lm70llp parport adapter driver") Fixes: 2b7300513b98 ("hwmon: (lm70) Code streamlining and cleanup") Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com> Link: https://msgid.link/r/20240318154540.90613-2-five231003@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-14Merge tag 'mfd-next-6.9' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Device Support: - Add support for Watchdog to ChromeOS Embedded Controller - Add support for GPIOs to ChromeOS Embedded Controller - Add supprt for Sound to MediaTek MT6357 CODEC New Functionality: - Add power-off functionality to Texas Instruments TWL series CODECs Fix-ups: - Device Tree binding adaptions/conversions/creation - Use/convert to new/better APIs/helpers/MACROs instead of hand-rolling implementations - Trivial; spelling, whitespace, clean-ups, etc - Remove superfluous code and simplify overall - Fix include lists; alphabetise, remove unused, explicitly add used - Use dev_err_probe() to clean-up error paths - Convert used cache type over to the Maple Tree in many instances - Constify a bunch of static structs - Refrain from over-riding resources provided via the firmware Bug Fixes: - Fix a clock related firmware bug on Dell XPS 9530 et al. - Repair incorrect IRQ designations - Increase buffer sizes to omit various snprintf compiler errors - Ensure errors are handled properly - Balance references and prevent resource leaks - Rectify Power Key interrupt processing - Fix Kconfig related build errors - Correct a bunch of register start-up default values" * tag 'mfd-next-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits) mfd: cs42l43: Fix wrong GPIO_FN_SEL and SPI_CLK_CONFIG1 defaults mfd: cs42l43: Fix wrong register defaults mfd: mt6397-core: Register mt6357 sound codec dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible dt-bindings: mfd: dlg,da9063: Make #interrupt-cells required dt-bindings: mfd: Convert atmel-flexcom to json-schema mfd: kempld-core: Don't replace resources provided by ACPI mfd: cros_ec_dev: Add GPIO device if feature present on EC dt-bindings: mfd: cros-ec: Add properties for GPIO controller mfd: twl: Select MFD_CORE mfd: core: Constify the struct device_type usage mfd: rk8xx-core: Fix interrupt processing order for power key button mfd: twl4030-power: Accept standard property for power controller mfd: twl-core: Add power off implementation for twl603x dt-bindings: mfd: ti,twl: Document system-power-controller mfd: altera-sysmgr: Call of_node_put() only when of_parse_phandle() takes a ref mfd: syscon: Remove extern from function prototypes mfd: syscon: Call of_node_put() only when of_parse_phandle() takes a ref mfd: mc13xxx: Use bitfield helpers mfd: rc5t583: Convert to use maple tree register cache ...
2024-03-14spi: Fix error code checking in spi_mem_exec_op()Florian Fainelli
After commit cff49d58f57e ("spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPP"), our SPI NOR flashes would stop probing with the following visible in the kernel log: [ 2.196300] brcmstb_qspi f0440920.qspi: using bspi-mspi mode [ 2.210295] spi-nor: probe of spi1.0 failed with error -95 It turns out that the check in spi_mem_exec_op() was changed to check for -ENOTSUPP (old error code) or -EOPNOTSUPP (new error code), but this means that for drivers that were converted, the second condition is now true, and we stop falling through like we used to. Fix the error to check for neither error being neither -ENOTSUPP *nor* -EOPNOTSUPP. Fixes: cff49d58f57e ("spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPP") Reviewed-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240313194530.3150446-1-florian.fainelli@broadcom.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-13Merge tag 'spi-v6.9' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "This release sees some exciting changes from David Lechner which implements some optimisations that have been talked about for a long time which allows client drivers to pre-prepare SPI messages for repeated or low latency use. This lets us move work out of latency sensitive paths and avoid repeating work for frequently performed operations. As well as being useful in itself this will also be used in future to allow controllers to directly trigger SPI operations (eg, from interrupts). Otherwise this release has mostly been focused on cleanups, plus a couple of new devices: - Support for pre-optimising messages - A big set of updates from Uwe Kleine-König moving drivers to use APIs with more modern terminology for controllers - Major overhaul of the s3c64xx driver - Support for Google GS101 and Samsung Exynos850" * tag 'spi-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (122 commits) spi: Introduce SPI_INVALID_CS and is_valid_cs() spi: Fix types of the last chip select storage variables spi: Consistently use BIT for cs_index_mask spi: Exctract spi_dev_check_cs() helper spi: Exctract spi_set_all_cs_unused() helper spi: s3c64xx: switch exynos850 to new port config data spi: s3c64xx: switch gs101 to new port config data spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id spi: s3c64xx: get rid of the OF alias ID dependency spi: s3c64xx: introduce s3c64xx_spi_set_port_id() spi: s3c64xx: let the SPI core determine the bus number spi: s3c64xx: allow FIFO depth to be determined from the compatible spi: s3c64xx: retrieve the FIFO depth from the device tree spi: s3c64xx: determine the fifo depth only once spi: s3c64xx: allow full FIFO masks spi: s3c64xx: define a magic value spi: dt-bindings: introduce FIFO depth properties spi: axi-spi-engine: use struct_size() macro spi: axi-spi-engine: use __counted_by() attribute spi: axi-spi-engine: remove p from struct spi_engine_message_state ...
2024-03-12spi: Restore delays for non-GPIO chip selectJanne Grunau
SPI controller with integrated chip select handling still need to adhere to SPI device's CS setup, hold and inactive delays. For controller without set_cs_timing spi core shall handle the delays to avoid duplicated delay handling in each controller driver. Fixes a regression for the out of tree SPI controller and SPI HID transport on Apple M1/M1 Pro/Max notebooks. Fixes: 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") Signed-off-by: Janne Grunau <j@jannau.net> Link: https://msgid.link/r/20240311-spi-cs-delays-regression-v1-1-0075020a90b2@jannau.net Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-12spi: lpspi: Avoid potential use-after-free in probe()Alexander Sverdlin
fsl_lpspi_probe() is allocating/disposing memory manually with spi_alloc_host()/spi_alloc_target(), but uses devm_spi_register_controller(). In case of error after the latter call the memory will be explicitly freed in the probe function by spi_controller_put() call, but used afterwards by "devm" management outside probe() (spi_unregister_controller() <- devm_spi_unregister() below). Unable to handle kernel NULL pointer dereference at virtual address 0000000000000070 ... Call trace: kernfs_find_ns kernfs_find_and_get_ns sysfs_remove_group sysfs_remove_groups device_remove_attrs device_del spi_unregister_controller devm_spi_unregister release_nodes devres_release_all really_probe driver_probe_device __device_attach_driver bus_for_each_drv __device_attach device_initial_probe bus_probe_device deferred_probe_work_func process_one_work worker_thread kthread ret_from_fork Fixes: 5314987de5e5 ("spi: imx: add lpspi bus driver") Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://msgid.link/r/20240312112050.2503643-1-alexander.sverdlin@siemens.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-07spi: Introduce SPI_INVALID_CS and is_valid_cs()Andy Shevchenko
The SPI core inconsistently uses the marker value for unused chip select pin. Define a constant (with appropriate type) and introduce is_valid_cs() helper function to avoid spreading this inconsistency in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240307150256.3789138-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-07spi: Consistently use BIT for cs_index_maskAndy Shevchenko
Some of the parts related to the chip select are using BIT() macro the rest are using plain numbers. Unify all of them to use BIT(). While at it, make the (repetitive) comment clearer when assigning cs_index_mask during SPI target device enumeration. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240307150256.3789138-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-06spi: Exctract spi_dev_check_cs() helperAndy Shevchenko
It seems a few functions implement the similar for-loop to validate chip select pins for uniqueness. Let's deduplicate that code in order to have a single place of that for better maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240306160114.3471398-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-06spi: Exctract spi_set_all_cs_unused() helperAndy Shevchenko
It seems a few functions implement the similar for-loop to mark all chip select pins unused. Let's deduplicate that code in order to have a single place of that for better maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240306160114.3471398-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-06spi: cs42l43: Don't limit native CS to the first chip selectCharles Keepax
As the chip selects can be configured through ACPI/OF/swnode, and the set_cs() callback will only be called when a native chip select is being used, there is no reason for the driver to only support the native chip select as the first chip select. Remove the check that introduces this limitation. Fixes: ef75e767167a ("spi: cs42l43: Add SPI controller support") Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://msgid.link/r/20240306161004.2205113-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: switch exynos850 to new port config dataTudor Ambarus
Exynos850 has the same version of USI SPI (v2.1) as GS101. Drop the fifo_lvl_mask and rx_lvl_offset and switch to the new port config data. Backward compatibility with DT is not broken because when alises are set: - the SPI core will set the bus number according to the alias ID - the FIFO depth is always the same size for exynos850 (64 bytes) no matter the alias ID number. Advantages of the change: - drop dependency on the OF alias ID. - FIFO depth is inferred from the compatible. Exynos850 integrates 3 SPI IPs, all with 64 bytes FIFO depths. - use full mask for SPI_STATUS.{RX, TX}_FIFO_LVL fields. Using partial masks is misleading and can hide problems of the driver logic. Just compiled tested. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-13-tudor.ambarus@linaro.org Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: switch gs101 to new port config dataTudor Ambarus
Drop the fifo_lvl_mask and rx_lvl_offset and switch to the new port config data. Advantages of the change: - drop dependency on the OF alias ID. - FIFO depth is inferred from the compatible. GS101 integrates 16 SPI IPs, all with 64 bytes FIFO depths. - use full mask for SPI_STATUS.{RX, TX}_FIFO_LVL fields. Using partial masks is misleading and can hide problems of the driver logic. S3C64XX_SPI_ST_TX_FIFO_RDY_V2 was defined based on the USI's SPI_VERSION.USI_IP_VERSION register field, which has value 2 at reset. MAX_SPI_PORTS is updated to reflect the maximum number of ports for the rest of the compatibles. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-12-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_idTudor Ambarus
Deprecate fifo_lvl_mask, rx_lvl_offset and port_id. One shall use {rx, tx}_fifomask instead. Add messages to each port configuration. Suggested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-11-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: get rid of the OF alias ID dependencyTudor Ambarus
Compatibles that set ``port_conf->{rx, tx}_fifomask`` are now safe to get rid of the OF alias ID dependency. Let the driver probe even without the alias for these. With this we also protect the FIFO_LVL_MASK calls from s3c64xx_spi_set_fifomask(). Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-10-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: introduce s3c64xx_spi_set_port_id()Tudor Ambarus
Prepare driver to get rid of the of alias ID dependency. Split the port_id logic into a dedicated method. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-9-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: let the SPI core determine the bus numberTudor Ambarus
Let the core determine the bus number, either by getting the alias ID (as the driver forces now), or by allocating a dynamic bus number when the alias is absent. Prepare the driver to allow dt aliases to be absent. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-8-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: allow FIFO depth to be determined from the compatibleTudor Ambarus
There are SoCs that use the same FIFO depth for all the instances of the SPI IP. See the fifo_lvl_mask defined for gs101 for example: .fifo_lvl_mask = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f}, Instead of specifying the FIFO depth with the same value for all 16 nodes in this case, allow such SoCs to infer the FIFO depth from the compatible. There are other SoCs than can benefit of this, see: {gs101, fsd, exynos850, s3c641, s3c2443}_spi_port_config. The FIFO depth inferred from the compatible has a higher precedence than the one that might be specified via device tree, the driver shall know better. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-7-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: retrieve the FIFO depth from the device treeTudor Ambarus
There are SoCs that configure different FIFO depths for their instances of the SPI IP. See the fifo_lvl_mask defined for exynos4_spi_port_config for example: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, The first instance of the IP is configured with 256 bytes FIFOs, whereas the last two are configured with 64 bytes FIFOs. Instead of mangling with the .fifo_lvl_mask and its dependency of the DT alias ID, allow such SoCs to determine the FIFO depth via the ``fifo-depth`` DT property. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-6-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: determine the fifo depth only onceTudor Ambarus
Determine the FIFO depth only once, at probe time. ``sdd->fifo_depth`` can be set later on with the FIFO depth specified in the device tree. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-5-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: allow full FIFO masksTudor Ambarus
The driver is wrong because is using partial register field masks for the SPI_STATUS.{RX, TX}_FIFO_LVL register fields. We see s3c64xx_spi_port_config.fifo_lvl_mask with different values for different instances of the same IP. Take s5pv210_spi_port_config for example, it defines: .fifo_lvl_mask = { 0x1ff, 0x7F }, fifo_lvl_mask is used to determine the FIFO depth of the instance of the IP. In this case, the integrator uses a 256 bytes FIFO for the first SPI instance of the IP, and a 64 bytes FIFO for the second instance. While the first mask reflects the SPI_STATUS.{RX, TX}_FIFO_LVL register fields, the second one is two bits short. Using partial field masks is misleading and can hide problems of the driver's logic. Allow platforms to specify the full FIFO mask, regardless of the FIFO depth. Introduce {rx, tx}_fifomask to represent the SPI_STATUS.{RX, TX}_FIFO_LVL register fields. It's a shifted mask defining the field's length and position. We'll be able to deprecate the use of @rx_lvl_offset, as the shift value can be determined from the mask. The existing compatibles shall start using {rx, tx}_fifomask so that they use the full field mask and to avoid shifting the mask to position, and then shifting it back to zero in the {TX, RX}_FIFO_LVL macros. @rx_lvl_offset will be deprecated in a further patch, after we have the infrastructure to deprecate @fifo_lvl_mask as well. No functional change intended. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-4-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-05spi: s3c64xx: define a magic valueTudor Ambarus
Define a magic value, it will be used in the next patch as well. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-3-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-04spi: axi-spi-engine: use struct_size() macroDavid Lechner
This makes use of the struct_size() macro to calculate the size of the struct axi_spi_engine when allocating it. Suggested-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://msgid.link/r/20240304-mainline-axi-spi-engine-small-cleanups-v2-3-5b14ed729a31@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-04spi: axi-spi-engine: use __counted_by() attributeDavid Lechner
This adds the __counted_by() attribute to the flex array at the end of struct spi_engine_program in the AXI SPI Engine controller driver. The assignment of the length field has to be reordered to be before the access to the flex array in order to avoid potential compiler warnings/errors due to adding the __counted_by() attribute. Suggested-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://msgid.link/r/20240304-mainline-axi-spi-engine-small-cleanups-v2-2-5b14ed729a31@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-03-04spi: axi-spi-engine: remove p from struct spi_engine_message_stateDavid Lechner
The program pointer p in struct spi_engine_message_state in the AXI SPI Engine controller driver was assigned but never read so it can be removed. Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://msgid.link/r/20240304-mainline-axi-spi-engine-small-cleanups-v2-1-5b14ed729a31@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-29spi: stm32-qspi: Replace of_gpio.h by proper oneAndy Shevchenko
of_gpio.h is deprecated and subject to remove. The driver doesn't use it directly, replace it with what is really being used. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240228194632.3606563-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-29spi: pic32: Replace of_gpio.h by proper oneAndy Shevchenko
of_gpio.h is deprecated and subject to remove. The driver doesn't use it directly, replace it with what is really being used. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://msgid.link/r/20240228194818.3606841-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-27spi: ppc4xx: Fix fallout from rename in struct spi_bitbangUwe Kleine-König
I failed to adapt this driver because it's not enabled in a powerpc allmodconfig build and also wasn't hit by my grep expertise. Fix accordingly. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202402100815.XQXw9XCF-lkp@intel.com/ Fixes: 2259233110d9 ("spi: bitbang: Follow renaming of SPI "master" to "controller"") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://msgid.link/r/20240210164006.208149-7-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-27spi: Drop mismerged fixMark Brown
One patch of a series of three that was sent fixing issues with the ppc4xx driver was targeted at -next, unfortunately it being sandwiched between two others that targeted mainline tripped up my workflow and caused it to get merged along with the others. The ppc4xx driver is only buildable in very limited configurations so none of the CI catches issues with it. Fixes: de4af897ddf2 ("spi: ppc4xx: Fix fallout from rename in struct spi_bitbang") Signed-off-by: Mark Brown <broonie@kernel.org>