From 9d4f219807d5ac11fb1d596e4ddb09336b040067 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 16 Oct 2025 10:38:13 -0400 Subject: i3c: fix refcount inconsistency in i3c_master_register In `i3c_master_register`, a possible refcount inconsistency has been identified, causing possible resource leak. Function `of_node_get` increases the refcount of `parent->of_node`. If function `i3c_bus_init` fails, the function returns immediately without a corresponding decrease, resulting in an inconsistent refcounter. Move call i3c_bus_init() after device_initialize() to let callback i3c_masterdev_release() release of_node. Reported-by: Shuhao Fu Closes: https://lore.kernel.org/linux-i3c/aO2tjp_FsV_WohPG@osx.local/T/#m2c05a982beeb14e7bf039c1d8db856734bf234c7 Fixes: 3a379bbcea0a ("i3c: Add core I3C infrastructure") Signed-off-by: Frank Li Link: https://patch.msgid.link/20251016143814.2551256-1-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index d946db75df70..66513a27e6e7 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -2883,10 +2883,6 @@ int i3c_master_register(struct i3c_master_controller *master, INIT_LIST_HEAD(&master->boardinfo.i2c); INIT_LIST_HEAD(&master->boardinfo.i3c); - ret = i3c_bus_init(i3cbus, master->dev.of_node); - if (ret) - return ret; - device_initialize(&master->dev); dev_set_name(&master->dev, "i3c-%d", i3cbus->id); @@ -2894,6 +2890,10 @@ int i3c_master_register(struct i3c_master_controller *master, master->dev.coherent_dma_mask = parent->coherent_dma_mask; master->dev.dma_parms = parent->dma_parms; + ret = i3c_bus_init(i3cbus, master->dev.of_node); + if (ret) + goto err_put_dev; + ret = of_populate_i3c_bus(master); if (ret) goto err_put_dev; -- cgit From 3a36273e5a07dda0ccec193800f3b78c3c0380af Mon Sep 17 00:00:00 2001 From: Stanley Chu Date: Mon, 27 Oct 2025 11:47:15 +0800 Subject: i3c: master: svc: Prevent incomplete IBI transaction If no free IBI slot is available, svc_i3c_master_handle_ibi returns immediately. This causes the STOP condition to be missed because the EmitStop request is sent when the transfer is not complete. To resolve this, svc_i3c_master_handle_ibi must wait for the transfer to complete before returning. Fixes: dd3c52846d59 ("i3c: master: svc: Add Silvaco I3C master driver") Signed-off-by: Stanley Chu Reviewed-by: Frank Li Reviewed-by: Miquel Raynal Link: https://patch.msgid.link/20251027034715.708243-1-yschu@nuvoton.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/svc-i3c-master.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 9641e66a4e5f..e70a64f2a32f 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -406,21 +406,27 @@ static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master, int ret, val; u8 *buf; - slot = i3c_generic_ibi_get_free_slot(data->ibi_pool); - if (!slot) - return -ENOSPC; - - slot->len = 0; - buf = slot->data; - + /* + * Wait for transfer to complete before returning. Otherwise, the EmitStop + * request might be sent when the transfer is not complete. + */ ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val, SVC_I3C_MSTATUS_COMPLETE(val), 0, 1000); if (ret) { dev_err(master->dev, "Timeout when polling for COMPLETE\n"); - i3c_generic_ibi_recycle_slot(data->ibi_pool, slot); return ret; } + slot = i3c_generic_ibi_get_free_slot(data->ibi_pool); + if (!slot) { + dev_dbg(master->dev, "No free ibi slot, drop the data\n"); + writel(SVC_I3C_MDATACTRL_FLUSHRB, master->regs + SVC_I3C_MDATACTRL); + return -ENOSPC; + } + + slot->len = 0; + buf = slot->data; + while (SVC_I3C_MSTATUS_RXPEND(readl(master->regs + SVC_I3C_MSTATUS)) && slot->len < SVC_I3C_FIFO_SIZE) { mdatactrl = readl(master->regs + SVC_I3C_MDATACTRL); -- cgit From 8d1d2c408cc05021970df5dd7d41133d220cf851 Mon Sep 17 00:00:00 2001 From: Adrian Ng Ho Yin Date: Tue, 4 Nov 2025 15:29:06 +0800 Subject: dt-bindings: i3c: snps: Add Altera SoCFPGA compatible Add the "altr,agilex5-dw-i3c-master" compatible string to the Synopsys DesignWare I3C master binding. This allow Agilex5 to use the generic DW I3C master controller while applying any required platform-specific quirks. Signed-off-by: Adrian Ng Ho Yin Reviewed-by: Krzysztof Kozlowski Reviewed-by: Frank Li Link: https://patch.msgid.link/4ef059b129e9457eaadcfa6b996b9b6b000c7dba.1762237922.git.adrianhoyin.ng@altera.com Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml index 5f6467375811..e803457d3f55 100644 --- a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml +++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml @@ -14,7 +14,11 @@ allOf: properties: compatible: - const: snps,dw-i3c-master-1.00a + oneOf: + - const: snps,dw-i3c-master-1.00a + - items: + - const: altr,agilex5-dw-i3c-master + - const: snps,dw-i3c-master-1.00a reg: maxItems: 1 -- cgit From fba0e56ee7524995b1fc9d1e90602496fc09d80f Mon Sep 17 00:00:00 2001 From: Adrian Ng Ho Yin Date: Tue, 4 Nov 2025 15:29:08 +0800 Subject: i3c: dw: Disable runtime PM on Agilex5 to avoid bus hang on IBI When running compliance tests on the Altera Agilex5 SoCFPGA platform, the I3C bus can hang when a slave issues an IBI after the DAA process completes. The DesignWare I3C master enters runtime suspend once DAA finishes and stops driving SCL, preventing the IBI transfer from completing and leaving SDA stuck low. Add a new compatible string, "altr,agilex5-dw-i3c-master" and apply a quirk that keep runtime PM always active on this platform by calling pm_runtime_get_noresume() during probe. Prevent bus hangs triggered by IBIs on Agilex5 while maintaining keep the same behavior on other platforms. Signed-off-by: Adrian Ng Ho Yin Reviewed-by: Frank Li Link: https://patch.msgid.link/482d540722a98c2809d8275445aaa544b565bf85.1762237922.git.adrianhoyin.ng@altera.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/dw-i3c-master.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c index 9ceedf09c3b6..276592a8222e 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -228,6 +228,7 @@ /* List of quirks */ #define AMD_I3C_OD_PP_TIMING BIT(1) +#define DW_I3C_DISABLE_RUNTIME_PM_QUIRK BIT(2) struct dw_i3c_cmd { u32 cmd_lo; @@ -252,6 +253,10 @@ struct dw_i3c_i2c_dev_data { struct i3c_generic_ibi_pool *ibi_pool; }; +struct dw_i3c_drvdata { + u32 flags; +}; + static bool dw_i3c_master_supports_ccc_cmd(struct i3c_master_controller *m, const struct i3c_ccc_cmd *cmd) { @@ -1535,6 +1540,8 @@ int dw_i3c_common_probe(struct dw_i3c_master *master, struct platform_device *pdev) { int ret, irq; + const struct dw_i3c_drvdata *drvdata; + unsigned long quirks = 0; if (!master->platform_ops) master->platform_ops = &dw_i3c_platform_ops_default; @@ -1590,7 +1597,18 @@ int dw_i3c_common_probe(struct dw_i3c_master *master, master->maxdevs = ret >> 16; master->free_pos = GENMASK(master->maxdevs - 1, 0); - master->quirks = (unsigned long)device_get_match_data(&pdev->dev); + if (has_acpi_companion(&pdev->dev)) { + quirks = (unsigned long)device_get_match_data(&pdev->dev); + } else if (pdev->dev.of_node) { + drvdata = device_get_match_data(&pdev->dev); + if (drvdata) + quirks = drvdata->flags; + } + master->quirks = quirks; + + /* Keep controller enabled by preventing runtime suspend */ + if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK) + pm_runtime_get_noresume(&pdev->dev); INIT_WORK(&master->hj_work, dw_i3c_hj_work); ret = i3c_master_register(&master->base, &pdev->dev, @@ -1617,6 +1635,10 @@ void dw_i3c_common_remove(struct dw_i3c_master *master) cancel_work_sync(&master->hj_work); i3c_master_unregister(&master->base); + /* Balance pm_runtime_get_noresume() from probe() */ + if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK) + pm_runtime_put_noidle(master->dev); + pm_runtime_disable(master->dev); pm_runtime_set_suspended(master->dev); pm_runtime_dont_use_autosuspend(master->dev); @@ -1759,8 +1781,15 @@ static void dw_i3c_shutdown(struct platform_device *pdev) pm_runtime_put_autosuspend(master->dev); } +static const struct dw_i3c_drvdata altr_agilex5_drvdata = { + .flags = DW_I3C_DISABLE_RUNTIME_PM_QUIRK, +}; + static const struct of_device_id dw_i3c_master_of_match[] = { { .compatible = "snps,dw-i3c-master-1.00a", }, + { .compatible = "altr,agilex5-dw-i3c-master", + .data = &altr_agilex5_drvdata, + }, {}, }; MODULE_DEVICE_TABLE(of, dw_i3c_master_of_match); -- cgit From ddb37d5b130e173090c861b4d1c20a632fb49d7a Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 7 Nov 2025 08:07:50 +0200 Subject: i3c: mipi-i3c-hci-pci: Add support for Intel Nova Lake-S I3C Add I3C controller PCI IDs for Intel Nova Lake-S. Signed-off-by: Jarkko Nikula Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251107060750.7995-1-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 08e6cbdf89ce..dd4484eff2f0 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -133,6 +133,9 @@ static const struct pci_device_id mipi_i3c_hci_pci_devices[] = { /* Panther Lake-P */ { PCI_VDEVICE(INTEL, 0xe47c), (kernel_ulong_t)&intel_info}, { PCI_VDEVICE(INTEL, 0xe46f), (kernel_ulong_t)&intel_info}, + /* Nova Lake-S */ + { PCI_VDEVICE(INTEL, 0x6e2c), (kernel_ulong_t)&intel_info}, + { PCI_VDEVICE(INTEL, 0x6e2d), (kernel_ulong_t)&intel_info}, { }, }; MODULE_DEVICE_TABLE(pci, mipi_i3c_hci_pci_devices); -- cgit From 8c0522993925b8843e3d3e3769d8ea09454a611a Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:27 +0200 Subject: i3c: mipi-i3c-hci-pci: Set 64-bit DMA mask for Intel controllers All Intel controllers support 64-bit DMA. Set the DMA mask accordingly. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-2-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index dd4484eff2f0..3cd15ca7d391 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -36,6 +36,8 @@ static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci) if (!priv) return -ENOMEM; + dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64)); + /* Assert reset, wait for completion and release reset */ writel(0, priv + INTEL_PRIV_RESETS); timeout = jiffies + msecs_to_jiffies(10); -- cgit From f4fe6e7084952b919d3401745850a229cba0c8cf Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:28 +0200 Subject: i3c: mipi-i3c-hci-pci: Move all Intel-related definitions together Move all Intel-related definitions together, to tidy the code slightly. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-3-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 3cd15ca7d391..3d854cee05df 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -17,14 +17,14 @@ struct mipi_i3c_hci_pci_info { int (*init)(struct pci_dev *pci); }; +static DEFINE_IDA(mipi_i3c_hci_pci_ida); + #define INTEL_PRIV_OFFSET 0x2b0 #define INTEL_PRIV_SIZE 0x28 #define INTEL_PRIV_RESETS 0x04 #define INTEL_PRIV_RESETS_RESET BIT(0) #define INTEL_PRIV_RESETS_RESET_DONE BIT(1) -static DEFINE_IDA(mipi_i3c_hci_pci_ida); - static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci) { unsigned long timeout; -- cgit From 58a9ae637112a66d385cf93e7125a2cb7ea8f143 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:29 +0200 Subject: i3c: mipi-i3c-hci-pci: Rename some Intel-related identifiers Rename some Intel-related identifiers to ensure Intel-related identifiers begin "intel_" or INTEL_, and for brevity removing purposeless "PRIV" in preparation to add more register definitions. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-4-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 3d854cee05df..d434e2962740 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -21,11 +21,11 @@ static DEFINE_IDA(mipi_i3c_hci_pci_ida); #define INTEL_PRIV_OFFSET 0x2b0 #define INTEL_PRIV_SIZE 0x28 -#define INTEL_PRIV_RESETS 0x04 -#define INTEL_PRIV_RESETS_RESET BIT(0) -#define INTEL_PRIV_RESETS_RESET_DONE BIT(1) +#define INTEL_RESETS 0x04 +#define INTEL_RESETS_RESET BIT(0) +#define INTEL_RESETS_RESET_DONE BIT(1) -static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci) +static int intel_i3c_init(struct pci_dev *pci) { unsigned long timeout; void __iomem *priv; @@ -39,21 +39,21 @@ static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci) dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64)); /* Assert reset, wait for completion and release reset */ - writel(0, priv + INTEL_PRIV_RESETS); + writel(0, priv + INTEL_RESETS); timeout = jiffies + msecs_to_jiffies(10); - while (!(readl(priv + INTEL_PRIV_RESETS) & - INTEL_PRIV_RESETS_RESET_DONE)) { + while (!(readl(priv + INTEL_RESETS) & + INTEL_RESETS_RESET_DONE)) { if (time_after(jiffies, timeout)) break; cpu_relax(); } - writel(INTEL_PRIV_RESETS_RESET, priv + INTEL_PRIV_RESETS); + writel(INTEL_RESETS_RESET, priv + INTEL_RESETS); return 0; } static struct mipi_i3c_hci_pci_info intel_info = { - .init = mipi_i3c_hci_pci_intel_init, + .init = intel_i3c_init, }; static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, -- cgit From 36f18ae15cfd1babf8b10c91468d084802d64a4c Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:30 +0200 Subject: i3c: mipi-i3c-hci-pci: Use readl_poll_timeout() Use readl_poll_timeout() instead of open-coding the polling loop. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-5-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index d434e2962740..30915d78045e 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -8,6 +8,7 @@ */ #include #include +#include #include #include #include @@ -24,11 +25,12 @@ static DEFINE_IDA(mipi_i3c_hci_pci_ida); #define INTEL_RESETS 0x04 #define INTEL_RESETS_RESET BIT(0) #define INTEL_RESETS_RESET_DONE BIT(1) +#define INTEL_RESETS_TIMEOUT_US (10 * USEC_PER_MSEC) static int intel_i3c_init(struct pci_dev *pci) { - unsigned long timeout; void __iomem *priv; + u32 reg; priv = devm_ioremap(&pci->dev, pci_resource_start(pci, 0) + INTEL_PRIV_OFFSET, @@ -40,13 +42,9 @@ static int intel_i3c_init(struct pci_dev *pci) /* Assert reset, wait for completion and release reset */ writel(0, priv + INTEL_RESETS); - timeout = jiffies + msecs_to_jiffies(10); - while (!(readl(priv + INTEL_RESETS) & - INTEL_RESETS_RESET_DONE)) { - if (time_after(jiffies, timeout)) - break; - cpu_relax(); - } + readl_poll_timeout(priv + INTEL_RESETS, reg, + reg & INTEL_RESETS_RESET_DONE, 0, + INTEL_RESETS_TIMEOUT_US); writel(INTEL_RESETS_RESET, priv + INTEL_RESETS); return 0; -- cgit From fc6152dc777d16db61c5f3b279007ed9944a130f Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:31 +0200 Subject: i3c: mipi-i3c-hci-pci: Constify driver data Add const qualifier to driver data because it is constant. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-6-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 30915d78045e..abc7bad5e069 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -50,14 +50,14 @@ static int intel_i3c_init(struct pci_dev *pci) return 0; } -static struct mipi_i3c_hci_pci_info intel_info = { +static const struct mipi_i3c_hci_pci_info intel_info = { .init = intel_i3c_init, }; static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) { - struct mipi_i3c_hci_pci_info *info; + const struct mipi_i3c_hci_pci_info *info; struct platform_device *pdev; struct resource res[2]; int dev_id, ret; @@ -93,7 +93,7 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, if (ret) goto err; - info = (struct mipi_i3c_hci_pci_info *)id->driver_data; + info = (const struct mipi_i3c_hci_pci_info *)id->driver_data; if (info && info->init) { ret = info->init(pci); if (ret) -- cgit From 9dfa23c41510570a6d7f405ab6bacdb215bf9d8f Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:32 +0200 Subject: i3c: mipi-i3c-hci-pci: Factor out private registers ioremapping For neatness, factor out private registers ioremapping. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-7-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index abc7bad5e069..1e1f2c42bd74 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -27,14 +27,18 @@ static DEFINE_IDA(mipi_i3c_hci_pci_ida); #define INTEL_RESETS_RESET_DONE BIT(1) #define INTEL_RESETS_TIMEOUT_US (10 * USEC_PER_MSEC) +static void __iomem *intel_priv(struct pci_dev *pci) +{ + resource_size_t base = pci_resource_start(pci, 0); + + return devm_ioremap(&pci->dev, base + INTEL_PRIV_OFFSET, INTEL_PRIV_SIZE); +} + static int intel_i3c_init(struct pci_dev *pci) { - void __iomem *priv; + void __iomem *priv = intel_priv(pci); u32 reg; - priv = devm_ioremap(&pci->dev, - pci_resource_start(pci, 0) + INTEL_PRIV_OFFSET, - INTEL_PRIV_SIZE); if (!priv) return -ENOMEM; -- cgit From 6f6efdd15c67bd262a6e9c795fd54d47e4cb6857 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:33 +0200 Subject: i3c: mipi-i3c-hci-pci: Factor out intel_reset() For neatness, factor out intel_reset(). Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-8-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 1e1f2c42bd74..b9794212b2fb 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -27,6 +27,18 @@ static DEFINE_IDA(mipi_i3c_hci_pci_ida); #define INTEL_RESETS_RESET_DONE BIT(1) #define INTEL_RESETS_TIMEOUT_US (10 * USEC_PER_MSEC) +static void intel_reset(void __iomem *priv) +{ + u32 reg; + + /* Assert reset, wait for completion and release reset */ + writel(0, priv + INTEL_RESETS); + readl_poll_timeout(priv + INTEL_RESETS, reg, + reg & INTEL_RESETS_RESET_DONE, 0, + INTEL_RESETS_TIMEOUT_US); + writel(INTEL_RESETS_RESET, priv + INTEL_RESETS); +} + static void __iomem *intel_priv(struct pci_dev *pci) { resource_size_t base = pci_resource_start(pci, 0); @@ -37,19 +49,13 @@ static void __iomem *intel_priv(struct pci_dev *pci) static int intel_i3c_init(struct pci_dev *pci) { void __iomem *priv = intel_priv(pci); - u32 reg; if (!priv) return -ENOMEM; dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64)); - /* Assert reset, wait for completion and release reset */ - writel(0, priv + INTEL_RESETS); - readl_poll_timeout(priv + INTEL_RESETS, reg, - reg & INTEL_RESETS_RESET_DONE, 0, - INTEL_RESETS_TIMEOUT_US); - writel(INTEL_RESETS_RESET, priv + INTEL_RESETS); + intel_reset(priv); return 0; } -- cgit From da8116a9be9bdc0412ac3aa7931b16ab7335261e Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:34 +0200 Subject: i3c: mipi-i3c-hci-pci: Allocate a structure for mipi_i3c_hci_pci device information Allocate a structure for mipi_i3c_hci_pci device information, in preparation for additional changes that need to store mipi_i3c_hci_pci device-specific information. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-9-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 29 ++++++++++++++-------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index b9794212b2fb..8936e50eddf7 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -14,6 +14,10 @@ #include #include +struct mipi_i3c_hci_pci { + struct platform_device *pdev; +}; + struct mipi_i3c_hci_pci_info { int (*init)(struct pci_dev *pci); }; @@ -68,10 +72,14 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) { const struct mipi_i3c_hci_pci_info *info; - struct platform_device *pdev; + struct mipi_i3c_hci_pci *hci; struct resource res[2]; int dev_id, ret; + hci = devm_kzalloc(&pci->dev, sizeof(*hci), GFP_KERNEL); + if (!hci) + return -ENOMEM; + ret = pcim_enable_device(pci); if (ret) return ret; @@ -92,14 +100,14 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, if (dev_id < 0) return dev_id; - pdev = platform_device_alloc("mipi-i3c-hci", dev_id); - if (!pdev) + hci->pdev = platform_device_alloc("mipi-i3c-hci", dev_id); + if (!hci->pdev) return -ENOMEM; - pdev->dev.parent = &pci->dev; - device_set_node(&pdev->dev, dev_fwnode(&pci->dev)); + hci->pdev->dev.parent = &pci->dev; + device_set_node(&hci->pdev->dev, dev_fwnode(&pci->dev)); - ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + ret = platform_device_add_resources(hci->pdev, res, ARRAY_SIZE(res)); if (ret) goto err; @@ -110,23 +118,24 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, goto err; } - ret = platform_device_add(pdev); + ret = platform_device_add(hci->pdev); if (ret) goto err; - pci_set_drvdata(pci, pdev); + pci_set_drvdata(pci, hci); return 0; err: - platform_device_put(pdev); + platform_device_put(hci->pdev); ida_free(&mipi_i3c_hci_pci_ida, dev_id); return ret; } static void mipi_i3c_hci_pci_remove(struct pci_dev *pci) { - struct platform_device *pdev = pci_get_drvdata(pci); + struct mipi_i3c_hci_pci *hci = pci_get_drvdata(pci); + struct platform_device *pdev = hci->pdev; int dev_id = pdev->id; platform_device_unregister(pdev); -- cgit From 0f9ef14b3fb853815aa88f264f7924e1e0ee80c7 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:35 +0200 Subject: i3c: mipi-i3c-hci-pci: Change callback parameter Prepare to add more callbacks in mipi_i3c_hci_pci_info. Change ->init() callback parameter from PCI device pointer to mipi_i3c_hci_pci_info device pointer. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-10-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 8936e50eddf7..7bfb9fe337b6 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -15,11 +15,12 @@ #include struct mipi_i3c_hci_pci { + struct pci_dev *pci; struct platform_device *pdev; }; struct mipi_i3c_hci_pci_info { - int (*init)(struct pci_dev *pci); + int (*init)(struct mipi_i3c_hci_pci *hci); }; static DEFINE_IDA(mipi_i3c_hci_pci_ida); @@ -50,14 +51,14 @@ static void __iomem *intel_priv(struct pci_dev *pci) return devm_ioremap(&pci->dev, base + INTEL_PRIV_OFFSET, INTEL_PRIV_SIZE); } -static int intel_i3c_init(struct pci_dev *pci) +static int intel_i3c_init(struct mipi_i3c_hci_pci *hci) { - void __iomem *priv = intel_priv(pci); + void __iomem *priv = intel_priv(hci->pci); if (!priv) return -ENOMEM; - dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64)); + dma_set_mask_and_coherent(&hci->pci->dev, DMA_BIT_MASK(64)); intel_reset(priv); @@ -80,6 +81,8 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, if (!hci) return -ENOMEM; + hci->pci = pci; + ret = pcim_enable_device(pci); if (ret) return ret; @@ -113,7 +116,7 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, info = (const struct mipi_i3c_hci_pci_info *)id->driver_data; if (info && info->init) { - ret = info->init(pci); + ret = info->init(hci); if (ret) goto err; } -- cgit From 040dcd762d60ddc5307e5a9f0cf5d269a0af0814 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:36 +0200 Subject: i3c: mipi-i3c-hci-pci: Add exit callback Prepare to add device-specific features that require cleanup upon driver removal. Add ->exit() callback as a counterpart to ->init(). Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-11-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 7bfb9fe337b6..7a91efbd3e54 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -17,10 +17,12 @@ struct mipi_i3c_hci_pci { struct pci_dev *pci; struct platform_device *pdev; + const struct mipi_i3c_hci_pci_info *info; }; struct mipi_i3c_hci_pci_info { int (*init)(struct mipi_i3c_hci_pci *hci); + void (*exit)(struct mipi_i3c_hci_pci *hci); }; static DEFINE_IDA(mipi_i3c_hci_pci_ida); @@ -72,7 +74,6 @@ static const struct mipi_i3c_hci_pci_info intel_info = { static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) { - const struct mipi_i3c_hci_pci_info *info; struct mipi_i3c_hci_pci *hci; struct resource res[2]; int dev_id, ret; @@ -114,21 +115,24 @@ static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, if (ret) goto err; - info = (const struct mipi_i3c_hci_pci_info *)id->driver_data; - if (info && info->init) { - ret = info->init(hci); + hci->info = (const struct mipi_i3c_hci_pci_info *)id->driver_data; + if (hci->info && hci->info->init) { + ret = hci->info->init(hci); if (ret) goto err; } ret = platform_device_add(hci->pdev); if (ret) - goto err; + goto err_exit; pci_set_drvdata(pci, hci); return 0; +err_exit: + if (hci->info && hci->info->exit) + hci->info->exit(hci); err: platform_device_put(hci->pdev); ida_free(&mipi_i3c_hci_pci_ida, dev_id); @@ -141,6 +145,9 @@ static void mipi_i3c_hci_pci_remove(struct pci_dev *pci) struct platform_device *pdev = hci->pdev; int dev_id = pdev->id; + if (hci->info && hci->info->exit) + hci->info->exit(hci); + platform_device_unregister(pdev); ida_free(&mipi_i3c_hci_pci_ida, dev_id); } -- cgit From 884a33131f2a7c398daadcffae92384ed7f84b15 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:37 +0200 Subject: i3c: mipi-i3c-hci-pci: Add LTR support for Intel controllers Add support for Latency Tolerance Reporting (LTR) for Intel controllers. Implement PM ->set_latency_tolerance() callback to set LTR register values. Also expose LTR register values via debugfs. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-12-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 113 ++++++++++++++++++++- 1 file changed, 112 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 7a91efbd3e54..25c129a856d6 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -7,17 +7,21 @@ * Author: Jarkko Nikula */ #include +#include +#include #include #include #include #include #include #include +#include struct mipi_i3c_hci_pci { struct pci_dev *pci; struct platform_device *pdev; const struct mipi_i3c_hci_pci_info *info; + void *private; }; struct mipi_i3c_hci_pci_info { @@ -34,6 +38,99 @@ static DEFINE_IDA(mipi_i3c_hci_pci_ida); #define INTEL_RESETS_RESET_DONE BIT(1) #define INTEL_RESETS_TIMEOUT_US (10 * USEC_PER_MSEC) +#define INTEL_ACTIVELTR 0x0c +#define INTEL_IDLELTR 0x10 + +#define INTEL_LTR_REQ BIT(15) +#define INTEL_LTR_SCALE_MASK GENMASK(11, 10) +#define INTEL_LTR_SCALE_1US FIELD_PREP(INTEL_LTR_SCALE_MASK, 2) +#define INTEL_LTR_SCALE_32US FIELD_PREP(INTEL_LTR_SCALE_MASK, 3) +#define INTEL_LTR_VALUE_MASK GENMASK(9, 0) + +struct intel_host { + void __iomem *priv; + u32 active_ltr; + u32 idle_ltr; + struct dentry *debugfs_root; +}; + +static void intel_cache_ltr(struct intel_host *host) +{ + host->active_ltr = readl(host->priv + INTEL_ACTIVELTR); + host->idle_ltr = readl(host->priv + INTEL_IDLELTR); +} + +static void intel_ltr_set(struct device *dev, s32 val) +{ + struct mipi_i3c_hci_pci *hci = dev_get_drvdata(dev); + struct intel_host *host = hci->private; + u32 ltr; + + /* + * Program latency tolerance (LTR) accordingly what has been asked + * by the PM QoS layer or disable it in case we were passed + * negative value or PM_QOS_LATENCY_ANY. + */ + ltr = readl(host->priv + INTEL_ACTIVELTR); + + if (val == PM_QOS_LATENCY_ANY || val < 0) { + ltr &= ~INTEL_LTR_REQ; + } else { + ltr |= INTEL_LTR_REQ; + ltr &= ~INTEL_LTR_SCALE_MASK; + ltr &= ~INTEL_LTR_VALUE_MASK; + + if (val > INTEL_LTR_VALUE_MASK) { + val >>= 5; + if (val > INTEL_LTR_VALUE_MASK) + val = INTEL_LTR_VALUE_MASK; + ltr |= INTEL_LTR_SCALE_32US | val; + } else { + ltr |= INTEL_LTR_SCALE_1US | val; + } + } + + if (ltr == host->active_ltr) + return; + + writel(ltr, host->priv + INTEL_ACTIVELTR); + writel(ltr, host->priv + INTEL_IDLELTR); + + /* Cache the values into intel_host structure */ + intel_cache_ltr(host); +} + +static void intel_ltr_expose(struct device *dev) +{ + dev->power.set_latency_tolerance = intel_ltr_set; + dev_pm_qos_expose_latency_tolerance(dev); +} + +static void intel_ltr_hide(struct device *dev) +{ + dev_pm_qos_hide_latency_tolerance(dev); + dev->power.set_latency_tolerance = NULL; +} + +static void intel_add_debugfs(struct mipi_i3c_hci_pci *hci) +{ + struct dentry *dir = debugfs_create_dir(dev_name(&hci->pci->dev), NULL); + struct intel_host *host = hci->private; + + intel_cache_ltr(host); + + host->debugfs_root = dir; + debugfs_create_x32("active_ltr", 0444, dir, &host->active_ltr); + debugfs_create_x32("idle_ltr", 0444, dir, &host->idle_ltr); +} + +static void intel_remove_debugfs(struct mipi_i3c_hci_pci *hci) +{ + struct intel_host *host = hci->private; + + debugfs_remove_recursive(host->debugfs_root); +} + static void intel_reset(void __iomem *priv) { u32 reg; @@ -55,20 +152,34 @@ static void __iomem *intel_priv(struct pci_dev *pci) static int intel_i3c_init(struct mipi_i3c_hci_pci *hci) { + struct intel_host *host = devm_kzalloc(&hci->pci->dev, sizeof(*host), GFP_KERNEL); void __iomem *priv = intel_priv(hci->pci); - if (!priv) + if (!host || !priv) return -ENOMEM; dma_set_mask_and_coherent(&hci->pci->dev, DMA_BIT_MASK(64)); + hci->private = host; + host->priv = priv; + intel_reset(priv); + intel_ltr_expose(&hci->pci->dev); + intel_add_debugfs(hci); + return 0; } +static void intel_i3c_exit(struct mipi_i3c_hci_pci *hci) +{ + intel_remove_debugfs(hci); + intel_ltr_hide(&hci->pci->dev); +} + static const struct mipi_i3c_hci_pci_info intel_info = { .init = intel_i3c_init, + .exit = intel_i3c_exit, }; static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, -- cgit From a54b1aeb61de63250ee608040a89bed8d1aa1e20 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 28 Nov 2025 08:40:38 +0200 Subject: i3c: mipi-i3c-hci-pci: Set d3cold_delay to 0 for Intel controllers Set d3cold_delay to 0 for Intel controllers because a delay is not needed. Signed-off-by: Adrian Hunter Reviewed-by: Frank Li Link: https://patch.msgid.link/20251128064038.55158-13-adrian.hunter@intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c index 25c129a856d6..dc8ede0f8ad8 100644 --- a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -160,6 +160,8 @@ static int intel_i3c_init(struct mipi_i3c_hci_pci *hci) dma_set_mask_and_coherent(&hci->pci->dev, DMA_BIT_MASK(64)); + hci->pci->d3cold_delay = 0; + hci->private = host; host->priv = priv; -- cgit From 5b9481a4157198b93cd6a5e7ad2603682202149d Mon Sep 17 00:00:00 2001 From: Jorge Marques Date: Wed, 12 Nov 2025 22:30:00 +0100 Subject: i3c: master: Remove i3c_device_free_ibi from i3c_device_remove i3c_device_disable_ibi should be called before i3c_device_free_ibi, however, a driver using devm actions cannot yield the call before the bus_type.remove(), requiring to use a .remove method that is usually discouraged for drivers that uses resources already manage. Since the only consumer mctp-i3c.c of this method calls both i3c_device_disable_ibi then i3c_device_free_ibi, remove the call from the i3c_device_remove (bus_type.remove()). Signed-off-by: Jorge Marques Link: https://patch.msgid.link/20251112-ibi-unsafe-v1-1-d8454db22613@analog.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 66513a27e6e7..a0fe00e2487c 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -334,8 +334,6 @@ static void i3c_device_remove(struct device *dev) if (driver->remove) driver->remove(i3cdev); - - i3c_device_free_ibi(i3cdev); } const struct bus_type i3c_bus_type = { -- cgit From de53ad6ca49e5d73bba72d24b49ec5d40f33ee01 Mon Sep 17 00:00:00 2001 From: Marco Crivellari Date: Fri, 7 Nov 2025 14:29:49 +0100 Subject: i3c: master: add WQ_PERCPU to alloc_workqueue users MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently if a user enqueues a work item using schedule_delayed_work() the used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to schedule_work() that is using system_wq and queue_work(), that makes use again of WORK_CPU_UNBOUND. This lack of consistency cannot be addressed without refactoring the API. alloc_workqueue() treats all queues as per-CPU by default, while unbound workqueues must opt-in via WQ_UNBOUND. This default is suboptimal: most workloads benefit from unbound queues, allowing the scheduler to place worker threads where they’re needed and reducing noise when CPUs are isolated. This continues the effort to refactor workqueue APIs, which began with the introduction of new workqueues and a new alloc_workqueue flag in: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") This change adds a new WQ_PERCPU flag to explicitly request alloc_workqueue() to be per-cpu when WQ_UNBOUND has not been specified. With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND), any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND must now use WQ_PERCPU. Once migration is complete, WQ_UNBOUND can be removed and unbound will become the implicit default. Suggested-by: Tejun Heo Signed-off-by: Marco Crivellari Link: https://patch.msgid.link/20251107132949.184944-1-marco.crivellari@suse.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index a0fe00e2487c..823661a81f5e 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -2923,7 +2923,7 @@ int i3c_master_register(struct i3c_master_controller *master, if (ret) goto err_put_dev; - master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); + master->wq = alloc_workqueue("%s", WQ_PERCPU, 0, dev_name(parent)); if (!master->wq) { ret = -ENOMEM; goto err_put_dev; -- cgit From 256a21743d911f94ce92fe28f793cd586f3860b2 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 6 Nov 2025 12:36:00 -0500 Subject: i3c: Add HDR API support Rename struct i3c_priv_xfer to struct i3c_xfer, since private xfer in the I3C spec refers only to SDR transfers. Ref: i3c spec ver1.2, section 3, Technical Overview. i3c_xfer will be used for both SDR and HDR. Rename enum i3c_hdr_mode to i3c_xfer_mode. Previous definition need match CCC GET_CAP1 bit position. Use 31 as SDR transfer mode. Add i3c_device_do_xfers() with an xfer mode argument, while keeping i3c_device_do_priv_xfers() as a wrapper that calls i3c_device_do_xfers() with I3C_SDR for backward compatibility. Introduce a 'cmd' field in struct i3c_xfer as an anonymous union with 'rnw', since HDR mode uses read/write commands instead of the SDR address bit. Add .i3c_xfers() callback for master controllers. If not implemented, fall back to SDR with .priv_xfers(). The .priv_xfers() API can be removed once all controllers switch to .i3c_xfers(). Add 'mode_mask' bitmask to advertise controller capability. Signed-off-by: Frank Li Link: https://patch.msgid.link/20251106-i3c_ddr-v11-1-33a6a66ed095@nxp.com Signed-off-by: Alexandre Belloni --- drivers/i3c/device.c | 27 ++++++++++++++++++++------- drivers/i3c/internals.h | 6 +++--- drivers/i3c/master.c | 19 ++++++++++++++----- include/linux/i3c/device.h | 40 +++++++++++++++++++++++++++++----------- include/linux/i3c/master.h | 4 ++++ 5 files changed, 70 insertions(+), 26 deletions(-) diff --git a/drivers/i3c/device.c b/drivers/i3c/device.c index 2396545763ff..8a156f5ad692 100644 --- a/drivers/i3c/device.c +++ b/drivers/i3c/device.c @@ -15,12 +15,12 @@ #include "internals.h" /** - * i3c_device_do_priv_xfers() - do I3C SDR private transfers directed to a - * specific device + * i3c_device_do_xfers() - do I3C transfers directed to a specific device * * @dev: device with which the transfers should be done * @xfers: array of transfers * @nxfers: number of transfers + * @mode: transfer mode * * Initiate one or several private SDR transfers with @dev. * @@ -33,9 +33,8 @@ * 'xfers' some time later. See I3C spec ver 1.1.1 09-Jun-2021. Section: * 5.1.2.2.3. */ -int i3c_device_do_priv_xfers(struct i3c_device *dev, - struct i3c_priv_xfer *xfers, - int nxfers) +int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode) { int ret, i; @@ -48,12 +47,12 @@ int i3c_device_do_priv_xfers(struct i3c_device *dev, } i3c_bus_normaluse_lock(dev->bus); - ret = i3c_dev_do_priv_xfers_locked(dev->desc, xfers, nxfers); + ret = i3c_dev_do_xfers_locked(dev->desc, xfers, nxfers, mode); i3c_bus_normaluse_unlock(dev->bus); return ret; } -EXPORT_SYMBOL_GPL(i3c_device_do_priv_xfers); +EXPORT_SYMBOL_GPL(i3c_device_do_xfers); /** * i3c_device_do_setdasa() - do I3C dynamic address assignement with @@ -260,6 +259,20 @@ i3c_device_match_id(struct i3c_device *i3cdev, } EXPORT_SYMBOL_GPL(i3c_device_match_id); +/** + * i3c_device_get_supported_xfer_mode - Returns the supported transfer mode by + * connected master controller. + * @dev: I3C device + * + * Return: a bit mask, which supported transfer mode, bit position is defined at + * enum i3c_hdr_mode + */ +u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev) +{ + return i3c_dev_get_master(dev->desc)->this->info.hdr_cap | BIT(I3C_SDR); +} +EXPORT_SYMBOL_GPL(i3c_device_get_supported_xfer_mode); + /** * i3c_driver_register_with_owner() - register an I3C device driver * diff --git a/drivers/i3c/internals.h b/drivers/i3c/internals.h index 79ceaa5f5afd..f609e5098137 100644 --- a/drivers/i3c/internals.h +++ b/drivers/i3c/internals.h @@ -15,9 +15,9 @@ void i3c_bus_normaluse_lock(struct i3c_bus *bus); void i3c_bus_normaluse_unlock(struct i3c_bus *bus); int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev); -int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, - struct i3c_priv_xfer *xfers, - int nxfers); +int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, + struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode); int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev); int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev); int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 823661a81f5e..f88f7e19203a 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -2819,10 +2819,14 @@ EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) { - if (!ops || !ops->bus_init || !ops->priv_xfers || + if (!ops || !ops->bus_init || !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) return -EINVAL; + /* Must provide one of priv_xfers (SDR only) or i3c_xfers (all modes) */ + if (!ops->priv_xfers && !ops->i3c_xfers) + return -EINVAL; + if (ops->request_ibi && (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || !ops->recycle_ibi_slot)) @@ -3012,9 +3016,8 @@ int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) dev->boardinfo->init_dyn_addr); } -int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, - struct i3c_priv_xfer *xfers, - int nxfers) +int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode) { struct i3c_master_controller *master; @@ -3025,9 +3028,15 @@ int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, if (!master || !xfers) return -EINVAL; - if (!master->ops->priv_xfers) + if (mode != I3C_SDR && !(master->this->info.hdr_cap & BIT(mode))) return -EOPNOTSUPP; + if (master->ops->i3c_xfers) + return master->ops->i3c_xfers(dev, xfers, nxfers, mode); + + if (mode != I3C_SDR) + return -EINVAL; + return master->ops->priv_xfers(dev, xfers, nxfers); } diff --git a/include/linux/i3c/device.h b/include/linux/i3c/device.h index 7f136de4b73e..7f7738041f38 100644 --- a/include/linux/i3c/device.h +++ b/include/linux/i3c/device.h @@ -39,20 +39,25 @@ enum i3c_error_code { }; /** - * enum i3c_hdr_mode - HDR mode ids + * enum i3c_xfer_mode - I3C xfer mode ids * @I3C_HDR_DDR: DDR mode * @I3C_HDR_TSP: TSP mode * @I3C_HDR_TSL: TSL mode + * @I3C_SDR: SDR mode (NOT HDR mode) */ -enum i3c_hdr_mode { - I3C_HDR_DDR, - I3C_HDR_TSP, - I3C_HDR_TSL, +enum i3c_xfer_mode { + /* The below 3 value (I3C_HDR*) must match GETCAP1 Byte bit position */ + I3C_HDR_DDR = 0, + I3C_HDR_TSP = 1, + I3C_HDR_TSL = 2, + /* Use for default SDR transfer mode */ + I3C_SDR = 0x31, }; /** - * struct i3c_priv_xfer - I3C SDR private transfer + * struct i3c_xfer - I3C data transfer * @rnw: encodes the transfer direction. true for a read, false for a write + * @cmd: Read/Write command in HDR mode, read: 0x80 - 0xff, write: 0x00 - 0x7f * @len: transfer length in bytes of the transfer * @actual_len: actual length in bytes are transferred by the controller * @data: input/output buffer @@ -60,8 +65,11 @@ enum i3c_hdr_mode { * @data.out: output buffer. Must point to a DMA-able buffer * @err: I3C error code */ -struct i3c_priv_xfer { - u8 rnw; +struct i3c_xfer { + union { + u8 rnw; + u8 cmd; + }; u16 len; u16 actual_len; union { @@ -71,6 +79,9 @@ struct i3c_priv_xfer { enum i3c_error_code err; }; +/* keep back compatible */ +#define i3c_priv_xfer i3c_xfer + /** * enum i3c_dcr - I3C DCR values * @I3C_DCR_GENERIC_DEVICE: generic I3C device @@ -297,9 +308,15 @@ static __always_inline void i3c_i2c_driver_unregister(struct i3c_driver *i3cdrv, i3c_i2c_driver_unregister, \ __i2cdrv) -int i3c_device_do_priv_xfers(struct i3c_device *dev, - struct i3c_priv_xfer *xfers, - int nxfers); +int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode); + +static inline int i3c_device_do_priv_xfers(struct i3c_device *dev, + struct i3c_priv_xfer *xfers, + int nxfers) +{ + return i3c_device_do_xfers(dev, xfers, nxfers, I3C_SDR); +} int i3c_device_do_setdasa(struct i3c_device *dev); @@ -341,5 +358,6 @@ int i3c_device_request_ibi(struct i3c_device *dev, void i3c_device_free_ibi(struct i3c_device *dev); int i3c_device_enable_ibi(struct i3c_device *dev); int i3c_device_disable_ibi(struct i3c_device *dev); +u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev); #endif /* I3C_DEV_H */ diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index c52a82dd79a6..d0d5b3a9049f 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -474,9 +474,13 @@ struct i3c_master_controller_ops { const struct i3c_ccc_cmd *cmd); int (*send_ccc_cmd)(struct i3c_master_controller *master, struct i3c_ccc_cmd *cmd); + /* Deprecated, please use i3c_xfers() */ int (*priv_xfers)(struct i3c_dev_desc *dev, struct i3c_priv_xfer *xfers, int nxfers); + int (*i3c_xfers)(struct i3c_dev_desc *dev, + struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode); int (*attach_i2c_dev)(struct i2c_dev_desc *dev); void (*detach_i2c_dev)(struct i2c_dev_desc *dev); int (*i2c_xfers)(struct i2c_dev_desc *dev, -- cgit From 9280b6ebbf08e53734d34f3bb325c37cddc1422d Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 6 Nov 2025 12:36:01 -0500 Subject: i3c: Switch to use new i3c_xfer from i3c_priv_xfer Switch to use i3c_xfer instead of i3c_priv_xfer because framework update to support HDR mode. i3c_priv_xfer is now an alias of i3c_xfer. Signed-off-by: Frank Li Link: https://patch.msgid.link/20251106-i3c_ddr-v11-2-33a6a66ed095@nxp.com Signed-off-by: Alexandre Belloni --- include/linux/i3c/device.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/i3c/device.h b/include/linux/i3c/device.h index 7f7738041f38..ae0662d9d77e 100644 --- a/include/linux/i3c/device.h +++ b/include/linux/i3c/device.h @@ -27,7 +27,7 @@ * These are the standard error codes as defined by the I3C specification. * When -EIO is returned by the i3c_device_do_priv_xfers() or * i3c_device_send_hdr_cmds() one can check the error code in - * &struct_i3c_priv_xfer.err or &struct i3c_hdr_cmd.err to get a better idea of + * &struct_i3c_xfer.err or &struct i3c_hdr_cmd.err to get a better idea of * what went wrong. * */ @@ -312,7 +312,7 @@ int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers, int nxfers, enum i3c_xfer_mode mode); static inline int i3c_device_do_priv_xfers(struct i3c_device *dev, - struct i3c_priv_xfer *xfers, + struct i3c_xfer *xfers, int nxfers) { return i3c_device_do_xfers(dev, xfers, nxfers, I3C_SDR); -- cgit From 108420fe2100b0c9cfb2d3598681eab3724247b9 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 6 Nov 2025 12:36:02 -0500 Subject: i3c: master: svc: Replace bool rnw with union for HDR support Replace the bool rnw field with a union in preparation for adding HDR support. HDR uses a cmd field instead of the rnw bit to indicate read or write direction. Add helper function svc_cmd_is_read() to check transfer direction. Add a local variable 'rnw' in svc_i3c_master_priv_xfers() to avoid repeatedly accessing xfers[i].rnw. No functional change. Signed-off-by: Frank Li Link: https://patch.msgid.link/20251106-i3c_ddr-v11-3-33a6a66ed095@nxp.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/svc-i3c-master.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index e70a64f2a32f..0543f06b9fba 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -165,7 +165,11 @@ struct svc_i3c_cmd { u8 addr; - bool rnw; + union { + bool rnw; + u8 cmd; + u32 rnw_cmd; + }; u8 *in; const void *out; unsigned int len; @@ -383,6 +387,11 @@ svc_i3c_master_dev_from_addr(struct svc_i3c_master *master, return master->descs[i]; } +static bool svc_cmd_is_read(u32 rnw_cmd, u32 type) +{ + return rnw_cmd; +} + static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) { writel(SVC_I3C_MCTRL_REQUEST_STOP, master->regs + SVC_I3C_MCTRL); @@ -1299,10 +1308,11 @@ static int svc_i3c_master_write(struct svc_i3c_master *master, } static int svc_i3c_master_xfer(struct svc_i3c_master *master, - bool rnw, unsigned int xfer_type, u8 addr, + u32 rnw_cmd, unsigned int xfer_type, u8 addr, u8 *in, const u8 *out, unsigned int xfer_len, unsigned int *actual_len, bool continued, bool repeat_start) { + bool rnw = svc_cmd_is_read(rnw_cmd, xfer_type); int retry = repeat_start ? 1 : 2; u32 reg; int ret; @@ -1490,7 +1500,7 @@ static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) for (i = 0; i < xfer->ncmds; i++) { struct svc_i3c_cmd *cmd = &xfer->cmds[i]; - ret = svc_i3c_master_xfer(master, cmd->rnw, xfer->type, + ret = svc_i3c_master_xfer(master, cmd->rnw_cmd, xfer->type, cmd->addr, cmd->in, cmd->out, cmd->len, &cmd->actual_len, cmd->continued, i > 0); @@ -1683,14 +1693,15 @@ static int svc_i3c_master_priv_xfers(struct i3c_dev_desc *dev, for (i = 0; i < nxfers; i++) { struct svc_i3c_cmd *cmd = &xfer->cmds[i]; + bool rnw = xfers[i].rnw; cmd->xfer = &xfers[i]; cmd->addr = master->addrs[data->index]; - cmd->rnw = xfers[i].rnw; - cmd->in = xfers[i].rnw ? xfers[i].data.in : NULL; - cmd->out = xfers[i].rnw ? NULL : xfers[i].data.out; + cmd->rnw = rnw; + cmd->in = rnw ? xfers[i].data.in : NULL; + cmd->out = rnw ? NULL : xfers[i].data.out; cmd->len = xfers[i].len; - cmd->actual_len = xfers[i].rnw ? xfers[i].len : 0; + cmd->actual_len = rnw ? xfers[i].len : 0; cmd->continued = (i + 1) < nxfers; } -- cgit From 4e7263b87ca362825beeac669dcbe24aae2c6257 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 6 Nov 2025 12:36:03 -0500 Subject: i3c: master: svc: Add basic HDR mode support Add basic HDR mode support for the svs I3C master driver. Only support for private transfers and does not support sending CCC commands in HDR mode. Key differences: - HDR uses commands (0x00-0x7F for write, 0x80-0xFF for read) to distinguish transfer direction. - HDR read/write commands must be written to FIFO before issuing the I3C address command. The hardware automatically sends the standard CCC command to enter HDR mode. - HDR exit pattern must be sent instead of send a stop after transfer completion. - Read/write data size must be an even number. Co-developed-by: Carlos Song Signed-off-by: Carlos Song Signed-off-by: Frank Li Link: https://patch.msgid.link/20251106-i3c_ddr-v11-4-33a6a66ed095@nxp.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/svc-i3c-master.c | 96 ++++++++++++++++++++++++++++++++----- 1 file changed, 83 insertions(+), 13 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 0543f06b9fba..a62f22ff8b57 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -40,11 +40,13 @@ #define SVC_I3C_MCTRL_REQUEST_NONE 0 #define SVC_I3C_MCTRL_REQUEST_START_ADDR 1 #define SVC_I3C_MCTRL_REQUEST_STOP 2 +#define SVC_I3C_MCTRL_REQUEST_FORCE_EXIT 6 #define SVC_I3C_MCTRL_REQUEST_IBI_ACKNACK 3 #define SVC_I3C_MCTRL_REQUEST_PROC_DAA 4 #define SVC_I3C_MCTRL_REQUEST_AUTO_IBI 7 #define SVC_I3C_MCTRL_TYPE_I3C 0 #define SVC_I3C_MCTRL_TYPE_I2C BIT(4) +#define SVC_I3C_MCTRL_TYPE_DDR BIT(5) #define SVC_I3C_MCTRL_IBIRESP_AUTO 0 #define SVC_I3C_MCTRL_IBIRESP_ACK_WITHOUT_BYTE 0 #define SVC_I3C_MCTRL_IBIRESP_ACK_WITH_BYTE BIT(7) @@ -95,6 +97,7 @@ #define SVC_I3C_MINTMASKED 0x098 #define SVC_I3C_MERRWARN 0x09C #define SVC_I3C_MERRWARN_NACK BIT(2) +#define SVC_I3C_MERRWARN_CRC BIT(10) #define SVC_I3C_MERRWARN_TIMEOUT BIT(20) #define SVC_I3C_MDMACTRL 0x0A0 #define SVC_I3C_MDATACTRL 0x0AC @@ -174,7 +177,7 @@ struct svc_i3c_cmd { const void *out; unsigned int len; unsigned int actual_len; - struct i3c_priv_xfer *xfer; + struct i3c_xfer *xfer; bool continued; }; @@ -389,7 +392,32 @@ svc_i3c_master_dev_from_addr(struct svc_i3c_master *master, static bool svc_cmd_is_read(u32 rnw_cmd, u32 type) { - return rnw_cmd; + return (type == SVC_I3C_MCTRL_TYPE_DDR) ? (rnw_cmd & 0x80) : rnw_cmd; +} + +static void svc_i3c_master_emit_force_exit(struct svc_i3c_master *master) +{ + u32 reg; + + writel(SVC_I3C_MCTRL_REQUEST_FORCE_EXIT, master->regs + SVC_I3C_MCTRL); + + /* + * Not need check error here because it is never happen at hardware. + * IP just wait for few fclk cycle to complete DDR exit pattern. Even + * though fclk stop, timeout happen here, the whole data actually + * already finish transfer. The next command will be timeout because + * wrong hardware state. + */ + readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, reg, + SVC_I3C_MSTATUS_MCTRLDONE(reg), 0, 1000); + + /* + * This delay is necessary after the emission of a stop, otherwise eg. + * repeating IBIs do not get detected. There is a note in the manual + * about it, stating that the stop condition might not be settled + * correctly if a start condition follows too rapidly. + */ + udelay(1); } static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) @@ -527,7 +555,7 @@ static void svc_i3c_master_ibi_isr(struct svc_i3c_master *master) * cycle, leading to missed client IBI handlers. * * A typical scenario is when IBIWON occurs and bus arbitration is lost - * at svc_i3c_master_priv_xfers(). + * at svc_i3c_master_i3c_xfers(). * * Clear SVC_I3C_MINT_IBIWON before sending SVC_I3C_MCTRL_REQUEST_AUTO_IBI. */ @@ -807,6 +835,8 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) info.dyn_addr = ret; + info.hdr_cap = I3C_CCC_HDR_MODE(I3C_HDR_DDR); + writel(SVC_MDYNADDR_VALID | SVC_MDYNADDR_ADDR(info.dyn_addr), master->regs + SVC_I3C_MDYNADDR); @@ -1320,6 +1350,16 @@ static int svc_i3c_master_xfer(struct svc_i3c_master *master, /* clean SVC_I3C_MINT_IBIWON w1c bits */ writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS); + if (xfer_type == SVC_I3C_MCTRL_TYPE_DDR) { + /* DDR command need prefill into FIFO */ + writel(rnw_cmd, master->regs + SVC_I3C_MWDATAB); + if (!rnw) { + /* write data also need prefill into FIFO */ + ret = svc_i3c_master_write(master, out, xfer_len); + if (ret) + goto emit_stop; + } + } while (retry--) { writel(SVC_I3C_MCTRL_REQUEST_START_ADDR | @@ -1413,7 +1453,7 @@ static int svc_i3c_master_xfer(struct svc_i3c_master *master, if (rnw) ret = svc_i3c_master_read(master, in, xfer_len); - else + else if (xfer_type != SVC_I3C_MCTRL_TYPE_DDR) ret = svc_i3c_master_write(master, out, xfer_len); if (ret < 0) goto emit_stop; @@ -1426,10 +1466,19 @@ static int svc_i3c_master_xfer(struct svc_i3c_master *master, if (ret) goto emit_stop; + if (xfer_type == SVC_I3C_MCTRL_TYPE_DDR && + (readl(master->regs + SVC_I3C_MERRWARN) & SVC_I3C_MERRWARN_CRC)) { + ret = -ENXIO; + goto emit_stop; + } + writel(SVC_I3C_MINT_COMPLETE, master->regs + SVC_I3C_MSTATUS); if (!continued) { - svc_i3c_master_emit_stop(master); + if (xfer_type != SVC_I3C_MCTRL_TYPE_DDR) + svc_i3c_master_emit_stop(master); + else + svc_i3c_master_emit_force_exit(master); /* Wait idle if stop is sent. */ readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, @@ -1439,7 +1488,11 @@ static int svc_i3c_master_xfer(struct svc_i3c_master *master, return 0; emit_stop: - svc_i3c_master_emit_stop(master); + if (xfer_type != SVC_I3C_MCTRL_TYPE_DDR) + svc_i3c_master_emit_stop(master); + else + svc_i3c_master_emit_force_exit(master); + svc_i3c_master_clear_merrwarn(master); svc_i3c_master_flush_fifo(master); @@ -1486,6 +1539,11 @@ static void svc_i3c_master_dequeue_xfer(struct svc_i3c_master *master, spin_unlock_irqrestore(&master->xferqueue.lock, flags); } +static int i3c_mode_to_svc_type(enum i3c_xfer_mode mode) +{ + return (mode == I3C_SDR) ? SVC_I3C_MCTRL_TYPE_I3C : SVC_I3C_MCTRL_TYPE_DDR; +} + static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) { struct svc_i3c_xfer *xfer = master->xferqueue.cur; @@ -1675,9 +1733,8 @@ static int svc_i3c_master_send_ccc_cmd(struct i3c_master_controller *m, return ret; } -static int svc_i3c_master_priv_xfers(struct i3c_dev_desc *dev, - struct i3c_priv_xfer *xfers, - int nxfers) +static int svc_i3c_master_i3c_xfers(struct i3c_dev_desc *dev, struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode) { struct i3c_master_controller *m = i3c_dev_get_master(dev); struct svc_i3c_master *master = to_svc_i3c_master(m); @@ -1685,19 +1742,32 @@ static int svc_i3c_master_priv_xfers(struct i3c_dev_desc *dev, struct svc_i3c_xfer *xfer; int ret, i; + if (mode != I3C_SDR) { + /* + * Only support data size less than FIFO SIZE when using DDR + * mode. First entry is cmd in FIFO, so actual available FIFO + * for data is SVC_I3C_FIFO_SIZE - 2 since DDR only supports + * even length. + */ + for (i = 0; i < nxfers; i++) + if (xfers[i].len > SVC_I3C_FIFO_SIZE - 2) + return -EINVAL; + } + xfer = svc_i3c_master_alloc_xfer(master, nxfers); if (!xfer) return -ENOMEM; - xfer->type = SVC_I3C_MCTRL_TYPE_I3C; + xfer->type = i3c_mode_to_svc_type(mode); for (i = 0; i < nxfers; i++) { + u32 rnw_cmd = (mode == I3C_SDR) ? xfers[i].rnw : xfers[i].cmd; + bool rnw = svc_cmd_is_read(rnw_cmd, xfer->type); struct svc_i3c_cmd *cmd = &xfer->cmds[i]; - bool rnw = xfers[i].rnw; cmd->xfer = &xfers[i]; cmd->addr = master->addrs[data->index]; - cmd->rnw = rnw; + cmd->rnw_cmd = rnw_cmd; cmd->in = rnw ? xfers[i].data.in : NULL; cmd->out = rnw ? NULL : xfers[i].data.out; cmd->len = xfers[i].len; @@ -1896,7 +1966,7 @@ static const struct i3c_master_controller_ops svc_i3c_master_ops = { .do_daa = svc_i3c_master_do_daa, .supports_ccc_cmd = svc_i3c_master_supports_ccc_cmd, .send_ccc_cmd = svc_i3c_master_send_ccc_cmd, - .priv_xfers = svc_i3c_master_priv_xfers, + .i3c_xfers = svc_i3c_master_i3c_xfers, .i2c_xfers = svc_i3c_master_i2c_xfers, .request_ibi = svc_i3c_master_request_ibi, .free_ibi = svc_i3c_master_free_ibi, -- cgit From 4b011b538f2b90d07580ff778e28954a4a6520eb Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 2 Dec 2025 16:38:02 +0100 Subject: i3c: fix I3C_SDR bit number 0x31 is decimal 49 and doesn't fit in a 32 bit integer, switch to the intended decimal 31. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202512020956.Dnz8A2H0-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202512021613.97jVprvJ-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202512021644.lp8ZMSx5-lkp@intel.com/ Link: https://patch.msgid.link/20251202153804.2640623-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- include/linux/i3c/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/i3c/device.h b/include/linux/i3c/device.h index ae0662d9d77e..9fcb6410a584 100644 --- a/include/linux/i3c/device.h +++ b/include/linux/i3c/device.h @@ -51,7 +51,7 @@ enum i3c_xfer_mode { I3C_HDR_TSP = 1, I3C_HDR_TSL = 2, /* Use for default SDR transfer mode */ - I3C_SDR = 0x31, + I3C_SDR = 31, }; /** -- cgit From e01a8baf60af43f6f87a5850dee29cf31377ec25 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 2 Dec 2025 16:38:03 +0100 Subject: i3c: document i3c_xfers i3c_xfers was left undocumented, document it. Reported-by: Stephen Rothwell Link: https://patch.msgid.link/20251202153804.2640623-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- include/linux/i3c/master.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index d0d5b3a9049f..2fd850f4678b 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -418,7 +418,11 @@ struct i3c_bus { * @send_ccc_cmd: send a CCC command * This method is mandatory. * @priv_xfers: do one or several private I3C SDR transfers - * This method is mandatory. + * This method is mandatory when i3c_xfers is not implemented. It + * is deprecated. + * @i3c_xfers: do one or several I3C SDR or HDR transfers + * This method is mandatory when priv_xfers is not implemented but + * should be implemented instead of priv_xfers. * @attach_i2c_dev: called every time an I2C device is attached to the bus. * This is a good place to attach master controller specific * data to I2C devices. -- cgit From 1f08a91cec5f405ee121c920933fbcf90487c9de Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 28 Oct 2025 10:57:52 -0400 Subject: hwmon: (lm75): switch to use i3c_xfer from i3c_priv_xfer Switch to use i3c_xfer instead of i3c_priv_xfer because framework will update to support HDR mode. i3c_priv_xfer is now an alias of i3c_xfer. Replace i3c_device_do_priv_xfers() with i3c_device_do_xfers(..., I3C_SDR) to align with the new API. Prepare for removal of i3c_priv_xfer and i3c_device_do_priv_xfers(). Signed-off-by: Frank Li Acked-by: Guenter Roeck Link: https://patch.msgid.link/20251028-lm75-v1-1-9bf88989c49c@nxp.com Signed-off-by: Alexandre Belloni --- drivers/hwmon/lm75.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c index 3c23b6e8e1bf..eda93a8c23c9 100644 --- a/drivers/hwmon/lm75.c +++ b/drivers/hwmon/lm75.c @@ -621,7 +621,7 @@ static int lm75_i3c_reg_read(void *context, unsigned int reg, unsigned int *val) { struct i3c_device *i3cdev = context; struct lm75_data *data = i3cdev_get_drvdata(i3cdev); - struct i3c_priv_xfer xfers[] = { + struct i3c_xfer xfers[] = { { .rnw = false, .len = 1, @@ -640,7 +640,7 @@ static int lm75_i3c_reg_read(void *context, unsigned int reg, unsigned int *val) if (reg == LM75_REG_CONF && !data->params->config_reg_16bits) xfers[1].len--; - ret = i3c_device_do_priv_xfers(i3cdev, xfers, 2); + ret = i3c_device_do_xfers(i3cdev, xfers, 2, I3C_SDR); if (ret < 0) return ret; @@ -658,7 +658,7 @@ static int lm75_i3c_reg_write(void *context, unsigned int reg, unsigned int val) { struct i3c_device *i3cdev = context; struct lm75_data *data = i3cdev_get_drvdata(i3cdev); - struct i3c_priv_xfer xfers[] = { + struct i3c_xfer xfers[] = { { .rnw = false, .len = 3, @@ -680,7 +680,7 @@ static int lm75_i3c_reg_write(void *context, unsigned int reg, unsigned int val) data->val_buf[2] = val & 0xff; } - return i3c_device_do_priv_xfers(i3cdev, xfers, 1); + return i3c_device_do_xfers(i3cdev, xfers, 1, I3C_SDR); } static const struct regmap_bus lm75_i3c_regmap_bus = { -- cgit From 57c4011d36374568b24d9e8cba892e81697ed9f4 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 28 Oct 2025 10:57:53 -0400 Subject: net: mctp i3c: switch to use i3c_xfer from i3c_priv_xfer Switch to use i3c_xfer instead of i3c_priv_xfer because framework will update to support HDR mode. i3c_priv_xfer is now an alias of i3c_xfer. Replace i3c_device_do_priv_xfers() with i3c_device_do_xfers(..., I3C_SDR) to align with the new API. Prepare for removal of i3c_priv_xfer and i3c_device_do_priv_xfers(). Signed-off-by: Frank Li Acked-by: Matt Johnston Link: https://patch.msgid.link/20251028-lm75-v1-2-9bf88989c49c@nxp.com Signed-off-by: Alexandre Belloni --- drivers/net/mctp/mctp-i3c.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/mctp/mctp-i3c.c b/drivers/net/mctp/mctp-i3c.c index c678f79aa356..36c2405677c2 100644 --- a/drivers/net/mctp/mctp-i3c.c +++ b/drivers/net/mctp/mctp-i3c.c @@ -99,7 +99,7 @@ struct mctp_i3c_internal_hdr { static int mctp_i3c_read(struct mctp_i3c_device *mi) { - struct i3c_priv_xfer xfer = { .rnw = 1, .len = mi->mrl }; + struct i3c_xfer xfer = { .rnw = 1, .len = mi->mrl }; struct net_device_stats *stats = &mi->mbus->ndev->stats; struct mctp_i3c_internal_hdr *ihdr = NULL; struct sk_buff *skb = NULL; @@ -127,7 +127,7 @@ static int mctp_i3c_read(struct mctp_i3c_device *mi) /* Make sure netif_rx() is read in the same order as i3c. */ mutex_lock(&mi->lock); - rc = i3c_device_do_priv_xfers(mi->i3c, &xfer, 1); + rc = i3c_device_do_xfers(mi->i3c, &xfer, 1, I3C_SDR); if (rc < 0) goto err; @@ -360,7 +360,7 @@ mctp_i3c_lookup(struct mctp_i3c_bus *mbus, u64 pid) static void mctp_i3c_xmit(struct mctp_i3c_bus *mbus, struct sk_buff *skb) { struct net_device_stats *stats = &mbus->ndev->stats; - struct i3c_priv_xfer xfer = { .rnw = false }; + struct i3c_xfer xfer = { .rnw = false }; struct mctp_i3c_internal_hdr *ihdr = NULL; struct mctp_i3c_device *mi = NULL; unsigned int data_len; @@ -409,7 +409,7 @@ static void mctp_i3c_xmit(struct mctp_i3c_bus *mbus, struct sk_buff *skb) data[data_len] = pec; xfer.data.out = data; - rc = i3c_device_do_priv_xfers(mi->i3c, &xfer, 1); + rc = i3c_device_do_xfers(mi->i3c, &xfer, 1, I3C_SDR); if (rc == 0) { stats->tx_bytes += data_len; stats->tx_packets++; -- cgit From 79c3ae7ada0548d5097bdb65dde5d24a7d660fae Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 28 Oct 2025 10:57:54 -0400 Subject: regmap: i3c: switch to use i3c_xfer from i3c_priv_xfer Switch to use i3c_xfer instead of i3c_priv_xfer because framework will update to support HDR mode. i3c_priv_xfer is now an alias of i3c_xfer. Replace i3c_device_do_priv_xfers() with i3c_device_do_xfers(..., I3C_SDR) to align with the new API. Prepare for removal of i3c_priv_xfer and i3c_device_do_priv_xfers(). Signed-off-by: Frank Li Acked-by: Mark Brown Link: https://patch.msgid.link/20251028-lm75-v1-3-9bf88989c49c@nxp.com Signed-off-by: Alexandre Belloni --- drivers/base/regmap/regmap-i3c.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/base/regmap/regmap-i3c.c b/drivers/base/regmap/regmap-i3c.c index b5300b7c477e..4482e64f26eb 100644 --- a/drivers/base/regmap/regmap-i3c.c +++ b/drivers/base/regmap/regmap-i3c.c @@ -10,7 +10,7 @@ static int regmap_i3c_write(void *context, const void *data, size_t count) { struct device *dev = context; struct i3c_device *i3c = dev_to_i3cdev(dev); - struct i3c_priv_xfer xfers[] = { + struct i3c_xfer xfers[] = { { .rnw = false, .len = count, @@ -18,7 +18,7 @@ static int regmap_i3c_write(void *context, const void *data, size_t count) }, }; - return i3c_device_do_priv_xfers(i3c, xfers, 1); + return i3c_device_do_xfers(i3c, xfers, 1, I3C_SDR); } static int regmap_i3c_read(void *context, @@ -27,7 +27,7 @@ static int regmap_i3c_read(void *context, { struct device *dev = context; struct i3c_device *i3c = dev_to_i3cdev(dev); - struct i3c_priv_xfer xfers[2]; + struct i3c_xfer xfers[2]; xfers[0].rnw = false; xfers[0].len = reg_size; @@ -37,7 +37,7 @@ static int regmap_i3c_read(void *context, xfers[1].len = val_size; xfers[1].data.in = val; - return i3c_device_do_priv_xfers(i3c, xfers, 2); + return i3c_device_do_xfers(i3c, xfers, 2, I3C_SDR); } static const struct regmap_bus regmap_i3c = { -- cgit