From 8425c41d1ef762cc15d9501d7117f009a79f3fe9 Mon Sep 17 00:00:00 2001 From: Esben Haabendal Date: Tue, 30 Apr 2019 09:17:49 +0200 Subject: net: ll_temac: Extend support to non-device-tree platforms Support initialization with platdata, so the driver can be used on non-device-tree platforms. For currently supported device-tree platforms, the driver should behave as before. Signed-off-by: Esben Haabendal Signed-off-by: David S. Miller --- include/linux/platform_data/xilinx-ll-temac.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/linux/platform_data/xilinx-ll-temac.h (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/xilinx-ll-temac.h b/include/linux/platform_data/xilinx-ll-temac.h new file mode 100644 index 000000000000..82e2f80648b0 --- /dev/null +++ b/include/linux/platform_data/xilinx-ll-temac.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_XILINX_LL_TEMAC_H +#define __LINUX_XILINX_LL_TEMAC_H + +#include +#include + +struct ll_temac_platform_data { + bool txcsum; /* Enable/disable TX checksum */ + bool rxcsum; /* Enable/disable RX checksum */ + u8 mac_addr[ETH_ALEN]; /* MAC address (6 bytes) */ + /* Clock frequency for input to MDIO clock generator */ + u32 mdio_clk_freq; + unsigned long long mdio_bus_id; /* Unique id for MDIO bus */ + int phy_addr; /* Address of the PHY to connect to */ + phy_interface_t phy_interface; /* PHY interface mode */ +}; + +#endif /* __LINUX_XILINX_LL_TEMAC_H */ -- cgit From a3246dc41aa3c9d799478ccc8dac5d19c509a923 Mon Sep 17 00:00:00 2001 From: Esben Haabendal Date: Tue, 30 Apr 2019 09:17:51 +0200 Subject: net: ll_temac: Add support for non-native register endianness Replace the powerpc specific MMIO register access functions with the generic big-endian mmio access functions, and add support for little-endian access depending on configuration. Big-endian access is maintained as the default, but little-endian can be configured in device-tree binding or in platform data. The temac_ior()/temac_iow() functions are replaced with macro wrappers to avoid modifying existing code more than necessary. Signed-off-by: Esben Haabendal Signed-off-by: David S. Miller --- include/linux/platform_data/xilinx-ll-temac.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/xilinx-ll-temac.h b/include/linux/platform_data/xilinx-ll-temac.h index 82e2f80648b0..af87927abab3 100644 --- a/include/linux/platform_data/xilinx-ll-temac.h +++ b/include/linux/platform_data/xilinx-ll-temac.h @@ -14,6 +14,8 @@ struct ll_temac_platform_data { unsigned long long mdio_bus_id; /* Unique id for MDIO bus */ int phy_addr; /* Address of the PHY to connect to */ phy_interface_t phy_interface; /* PHY interface mode */ + bool reg_little_endian; /* Little endian TEMAC register access */ + bool dma_little_endian; /* Little endian DMA register access */ }; #endif /* __LINUX_XILINX_LL_TEMAC_H */ -- cgit From f14f5c11f051ca4a41e65017d94408e5e702ba9d Mon Sep 17 00:00:00 2001 From: Esben Haabendal Date: Tue, 30 Apr 2019 09:17:54 +0200 Subject: net: ll_temac: Support indirect_mutex share within TEMAC IP Indirect register access goes through a DCR bus bridge, which allows only one outstanding transaction. And to make matters worse, each TEMAC IP block contains two Ethernet interfaces, and although they seem to have separate registers for indirect access, they actually share the registers. Or to be more specific, MSW, LSW and CTL registers are physically shared between Ethernet interfaces in same TEMAC IP, with RDY register being (almost) specificic to the Ethernet interface. The 0x10000 bit in RDY reflects combined bus ready state though. So we need to take care to synchronize not only within a single device, but also between devices in same TEMAC IP. This commit allows to do that with legacy platform devices. For OF devices, the xlnx,compound parent of the temac node should be used to find siblings, and setup a shared indirect_mutex between them. I will leave this work to somebody else, as I don't have hardware to test that. No regression is introduced by that, as before this commit using two Ethernet interfaces in same TEMAC block is simply broken. Signed-off-by: Esben Haabendal Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller --- include/linux/platform_data/xilinx-ll-temac.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/xilinx-ll-temac.h b/include/linux/platform_data/xilinx-ll-temac.h index af87927abab3..b0b8238a9b7d 100644 --- a/include/linux/platform_data/xilinx-ll-temac.h +++ b/include/linux/platform_data/xilinx-ll-temac.h @@ -16,6 +16,12 @@ struct ll_temac_platform_data { phy_interface_t phy_interface; /* PHY interface mode */ bool reg_little_endian; /* Little endian TEMAC register access */ bool dma_little_endian; /* Little endian DMA register access */ + /* Pre-initialized mutex to use for synchronizing indirect + * register access. When using both interfaces of a single + * TEMAC IP block, the same mutex should be passed here, as + * they share the same DCR bus bridge. + */ + struct mutex *indirect_mutex; }; #endif /* __LINUX_XILINX_LL_TEMAC_H */ -- cgit From 7e97a194aca03c6ff86f84e46e196f5c9ed5c32c Mon Sep 17 00:00:00 2001 From: Esben Haabendal Date: Tue, 30 Apr 2019 09:17:58 +0200 Subject: net: ll_temac: Allow configuration of IRQ coalescing This allows custom setup of IRQ coalescing for platforms using legacy platform_device. The irq timeout and count parameters can be used for tuning cpu load vs. latency. I have maintained the 0x00000400 bit in TX_CHNL_CTRL. It is specified as unused in the documentation I have available. It does not make any difference in the hardware I have available, so it is left in to not risk breaking other platforms where it might be used. Signed-off-by: Esben Haabendal Signed-off-by: David S. Miller --- include/linux/platform_data/xilinx-ll-temac.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/xilinx-ll-temac.h b/include/linux/platform_data/xilinx-ll-temac.h index b0b8238a9b7d..368530f98176 100644 --- a/include/linux/platform_data/xilinx-ll-temac.h +++ b/include/linux/platform_data/xilinx-ll-temac.h @@ -22,6 +22,11 @@ struct ll_temac_platform_data { * they share the same DCR bus bridge. */ struct mutex *indirect_mutex; + /* DMA channel control setup */ + u8 tx_irq_timeout; /* TX Interrupt Delay Time-out */ + u8 tx_irq_count; /* TX Interrupt Coalescing Threshold Count */ + u8 rx_irq_timeout; /* RX Interrupt Delay Time-out */ + u8 rx_irq_count; /* RX Interrupt Coalescing Threshold Count */ }; #endif /* __LINUX_XILINX_LL_TEMAC_H */ -- cgit From 8b952747844526cef50fa2e0ae903f586e3cb2e4 Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Fri, 3 May 2019 12:36:58 +0200 Subject: net: macb: shrink macb_platform_data structure This structure was used intensively for machine specific values when DT was not used. Since the removal of AVR32 from the kernel, this structure is only used for passing clocks from PCI macb wrapper, all other fields being 0. All other known platforms use DT. Remove the leftovers but make sure that PCI macb still works as expected by using default values: - phydev->irq is set to PHY_POLL by mdiobus_alloc() - mii_bus->phy_mask is cleared while allocating it - bp->phy_interface is set to PHY_INTERFACE_MODE_MII if mode not found in DT. This simplifies driver probe path and particularly phy handling. Signed-off-by: Nicolas Ferre Signed-off-by: David S. Miller --- include/linux/platform_data/macb.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h index 7815d50c26ff..2bc51b822956 100644 --- a/include/linux/platform_data/macb.h +++ b/include/linux/platform_data/macb.h @@ -12,19 +12,10 @@ /** * struct macb_platform_data - platform data for MACB Ethernet - * @phy_mask: phy mask passed when register the MDIO bus - * within the driver - * @phy_irq_pin: PHY IRQ - * @is_rmii: using RMII interface? - * @rev_eth_addr: reverse Ethernet address byte order * @pclk: platform clock * @hclk: AHB clock */ struct macb_platform_data { - u32 phy_mask; - int phy_irq_pin; - u8 is_rmii; - u8 rev_eth_addr; struct clk *pclk; struct clk *hclk; }; -- cgit From a27415decd84dac124c6185f1184b6c779d0a5ab Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Wed, 1 May 2019 00:10:50 +0200 Subject: net: dsa: mv88e6xxx: Pass interrupt number in platform data Allow an interrupt number to be passed in the platform data. The driver will then use it if not zero, otherwise it will poll for interrupts. Signed-off-by: Andrew Lunn Signed-off-by: David S. Miller --- include/linux/platform_data/mv88e6xxx.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/mv88e6xxx.h b/include/linux/platform_data/mv88e6xxx.h index 963730b44aea..21452a9365e1 100644 --- a/include/linux/platform_data/mv88e6xxx.h +++ b/include/linux/platform_data/mv88e6xxx.h @@ -13,6 +13,7 @@ struct dsa_mv88e6xxx_pdata { unsigned int enabled_ports; struct net_device *netdev; u32 eeprom_len; + int irq; }; #endif -- cgit