From 849a9366cba92cb5dc9dc1161ef49416a290aae9 Mon Sep 17 00:00:00 2001 From: Ricky Wu Date: Mon, 6 Jul 2020 15:02:59 +0800 Subject: misc: rtsx: Add support new chip rts5228 mmc: rtsx: Add support MMC_CAP2_NO_MMC In order to support new chip rts5228, the definitions of some internal registers and workflow have to be modified. Added rts5228.c rts5228.h for independent functions of the new chip rts5228 Signed-off-by: Ricky Wu Link: https://lore.kernel.org/r/20200706070259.32565-1-ricky_wu@realtek.com Signed-off-by: Greg Kroah-Hartman --- include/linux/rtsx_pci.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include/linux/rtsx_pci.h') diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index e8780d4e4636..27a6ea82aeea 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -305,6 +305,8 @@ #define SD30_CLK_STOP_CFG0 0x01 #define REG_PRE_RW_MODE 0xFD70 #define EN_INFINITE_MODE 0x01 +#define REG_CRC_DUMMY_0 0xFD71 +#define CFG_SD_POW_AUTO_PD (1<<0) #define SRCTL 0xFC13 @@ -599,6 +601,7 @@ #define ASPM_FORCE_CTL 0xFE57 #define FORCE_ASPM_CTL0 0x10 +#define FORCE_ASPM_CTL1 0x20 #define FORCE_ASPM_VAL_MASK 0x03 #define FORCE_ASPM_L1_EN 0x02 #define FORCE_ASPM_L0_EN 0x01 @@ -667,6 +670,11 @@ #define PM_WAKE_EN 0x01 #define PM_CTRL4 0xFF47 +#define REG_CFG_OOBS_OFF_TIMER 0xFEA6 +#define REG_CFG_OOBS_ON_TIMER 0xFEA7 +#define REG_CFG_VCM_ON_TIMER 0xFEA8 +#define REG_CFG_OOBS_POLLING 0xFEA9 + /* Memory mapping */ #define SRAM_BASE 0xE600 #define RBUF_BASE 0xF400 @@ -1204,6 +1212,7 @@ struct rtsx_pcr { #define EXTRA_CAPS_MMC_HSDDR (1 << 3) #define EXTRA_CAPS_MMC_HS200 (1 << 4) #define EXTRA_CAPS_MMC_8BIT (1 << 5) +#define EXTRA_CAPS_NO_MMC (1 << 7) u32 extra_caps; #define IC_VER_A 0 @@ -1242,6 +1251,7 @@ struct rtsx_pcr { u8 dma_error_count; u8 ocp_stat; u8 ocp_stat2; + u8 rtd3_en; }; #define PID_524A 0x524A @@ -1250,6 +1260,7 @@ struct rtsx_pcr { #define PID_525A 0x525A #define PID_5260 0x5260 #define PID_5261 0x5261 +#define PID_5228 0x5228 #define CHK_PCI_PID(pcr, pid) ((pcr)->pci->device == (pid)) #define PCI_VID(pcr) ((pcr)->pci->vendor) -- cgit From df746b3f079c31db7350b282c86e9004fa1a88df Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Tue, 21 Jul 2020 16:23:33 -0500 Subject: misc: rtsx: Remove unused pcie_cap There are no more uses of struct rtsx_pcr.pcie_cap. Remove it. Signed-off-by: Bjorn Helgaas Acked-by: Arnd Bergmann Link: https://lore.kernel.org/r/20200721212336.1159079-3-helgaas@kernel.org Signed-off-by: Greg Kroah-Hartman --- include/linux/rtsx_pci.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/linux/rtsx_pci.h') diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index 27a6ea82aeea..4ff7b221f36e 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -1166,7 +1166,6 @@ struct rtsx_hw_param { struct rtsx_pcr { struct pci_dev *pci; unsigned int id; - int pcie_cap; struct rtsx_cr_option option; struct rtsx_hw_param hw_param; -- cgit From 22bf3251d7b7da0339f41ec27f2c3d4e0ec02255 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Tue, 21 Jul 2020 16:23:34 -0500 Subject: misc: rtsx: Remove rtsx_pci_read/write_config() wrappers rtsx_pci_read_config_dword() and similar wrappers around the PCI config accessors add very little value, and they obscure the fact that often we are accessing standard PCI registers that should be coordinated with the PCI core. Remove the wrappers and use the PCI config accessors directly. No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Arnd Bergmann Link: https://lore.kernel.org/r/20200721212336.1159079-4-helgaas@kernel.org [ fixed up some other instances as original patch was based on old tree - gregkh Signed-off-by: Greg Kroah-Hartman --- include/linux/rtsx_pci.h | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'include/linux/rtsx_pci.h') diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index 4ff7b221f36e..b93573c3c5fc 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -99,18 +99,6 @@ #define rtsx_pci_readb(pcr, reg) \ ioread8((pcr)->remap_addr + reg) -#define rtsx_pci_read_config_byte(pcr, where, val) \ - pci_read_config_byte((pcr)->pci, where, val) - -#define rtsx_pci_write_config_byte(pcr, where, val) \ - pci_write_config_byte((pcr)->pci, where, val) - -#define rtsx_pci_read_config_dword(pcr, where, val) \ - pci_read_config_dword((pcr)->pci, where, val) - -#define rtsx_pci_write_config_dword(pcr, where, val) \ - pci_write_config_dword((pcr)->pci, where, val) - #define STATE_TRANS_NONE 0 #define STATE_TRANS_CMD 1 #define STATE_TRANS_BUF 2 -- cgit From ed86a9877d05b99088a409a7603828b818a433dc Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Tue, 21 Jul 2020 16:23:35 -0500 Subject: misc: rtsx: Find L1 PM Substates capability instead of hard-coding Instead of hard-coding the location of the L1 PM Substates capability based on the Device ID, search for it in the extended capabilities list. This works for any device, as long as it implements the L1 PM Substates capability correctly, so it doesn't require maintenance as new devices are added. No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Arnd Bergmann Link: https://lore.kernel.org/r/20200721212336.1159079-5-helgaas@kernel.org [ minor addition due to differences in my tree - gregkh] Signed-off-by: Greg Kroah-Hartman --- include/linux/rtsx_pci.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/linux/rtsx_pci.h') diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index b93573c3c5fc..f146ca413f38 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -1037,10 +1037,6 @@ #define PHY_DIG1E_RX_EN_KEEP 0x0001 #define PHY_DUM_REG 0x1F -#define PCR_ASPM_SETTING_REG1 0x160 -#define PCR_ASPM_SETTING_REG2 0x168 -#define PCR_ASPM_SETTING_5260 0x178 - #define PCR_SETTING_REG1 0x724 #define PCR_SETTING_REG2 0x814 #define PCR_SETTING_REG3 0x747 -- cgit From 7a4462a96777b64b22412f782de226c90290bf75 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Tue, 21 Jul 2020 16:23:36 -0500 Subject: misc: rtsx: Use standard PCI definitions When reading registers defined by the PCIe spec, use the names already defined by the PCI core. This makes maintenance of the PCI core and drivers easier. No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Arnd Bergmann Link: https://lore.kernel.org/r/20200721212336.1159079-6-helgaas@kernel.org [ additional replacements due to changes in my tree - gregkh ] Signed-off-by: Greg Kroah-Hartman --- include/linux/rtsx_pci.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include/linux/rtsx_pci.h') diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index f146ca413f38..745f5e73f99a 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -1083,11 +1083,6 @@ struct pcr_ops { enum PDEV_STAT {PDEV_STAT_IDLE, PDEV_STAT_RUN}; -#define ASPM_L1_1_EN_MASK BIT(3) -#define ASPM_L1_2_EN_MASK BIT(2) -#define PM_L1_1_EN_MASK BIT(1) -#define PM_L1_2_EN_MASK BIT(0) - #define ASPM_L1_1_EN BIT(0) #define ASPM_L1_2_EN BIT(1) #define PM_L1_1_EN BIT(2) -- cgit