diff --git a/drivers/accel/Kconfig b/drivers/accel/Kconfig
index 64065fb8922b..5b9490367a39 100644
--- a/drivers/accel/Kconfig
+++ b/drivers/accel/Kconfig

diff --git a/drivers/accel/Makefile b/drivers/accel/Makefile
index ab3df932937f..a301fb6089d4 100644
--- a/drivers/accel/Makefile
+++ b/drivers/accel/Makefile

diff --git a/drivers/accel/amdxdna/Kconfig b/drivers/accel/amdxdna/Kconfig
new file mode 100644
index 000000000000..f39d7a87296c
--- /dev/null
+++ b/drivers/accel/amdxdna/Kconfig

diff --git a/drivers/accel/amdxdna/Makefile b/drivers/accel/amdxdna/Makefile
new file mode 100644
index 000000000000..0e9adf6890a0
--- /dev/null
+++ b/drivers/accel/amdxdna/Makefile

diff --git a/drivers/accel/amdxdna/TODO b/drivers/accel/amdxdna/TODO
new file mode 100644
index 000000000000..5119bccd1917
--- /dev/null
+++ b/drivers/accel/amdxdna/TODO

diff --git a/drivers/accel/amdxdna/aie2_ctx.c b/drivers/accel/amdxdna/aie2_ctx.c
new file mode 100644
index 000000000000..5f43db02b240
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_ctx.c

diff --git a/drivers/accel/amdxdna/aie2_error.c b/drivers/accel/amdxdna/aie2_error.c
new file mode 100644
index 000000000000..b1defaa8513b
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_error.c

diff --git a/drivers/accel/amdxdna/aie2_message.c b/drivers/accel/amdxdna/aie2_message.c
new file mode 100644
index 000000000000..9e2c9a44f76a
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_message.c

diff --git a/drivers/accel/amdxdna/aie2_msg_priv.h b/drivers/accel/amdxdna/aie2_msg_priv.h
new file mode 100644
index 000000000000..4e02e744b470
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_msg_priv.h

diff --git a/drivers/accel/amdxdna/aie2_pci.c b/drivers/accel/amdxdna/aie2_pci.c
new file mode 100644
index 000000000000..5a058e565b01
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_pci.c

diff --git a/drivers/accel/amdxdna/aie2_pci.h b/drivers/accel/amdxdna/aie2_pci.h
new file mode 100644
index 000000000000..f2d95531ddc2
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_pci.h

diff --git a/drivers/accel/amdxdna/aie2_pm.c b/drivers/accel/amdxdna/aie2_pm.c
new file mode 100644
index 000000000000..426c38fce848
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_pm.c

diff --git a/drivers/accel/amdxdna/aie2_psp.c b/drivers/accel/amdxdna/aie2_psp.c
new file mode 100644
index 000000000000..dc3a072ce3b6
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_psp.c

diff --git a/drivers/accel/amdxdna/aie2_smu.c b/drivers/accel/amdxdna/aie2_smu.c
new file mode 100644
index 000000000000..73388443c676
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_smu.c

diff --git a/drivers/accel/amdxdna/aie2_solver.c b/drivers/accel/amdxdna/aie2_solver.c
new file mode 100644
index 000000000000..2013d1f13aae
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_solver.c

diff --git a/drivers/accel/amdxdna/aie2_solver.h b/drivers/accel/amdxdna/aie2_solver.h
new file mode 100644
index 000000000000..a2e3c52229e9
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_solver.h

diff --git a/drivers/accel/amdxdna/amdxdna_ctx.c b/drivers/accel/amdxdna/amdxdna_ctx.c
new file mode 100644
index 000000000000..d11b1c83d9c3
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_ctx.c

diff --git a/drivers/accel/amdxdna/amdxdna_ctx.h b/drivers/accel/amdxdna/amdxdna_ctx.h
new file mode 100644
index 000000000000..80b0304193ec
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_ctx.h

diff --git a/drivers/accel/amdxdna/amdxdna_gem.c b/drivers/accel/amdxdna/amdxdna_gem.c
new file mode 100644
index 000000000000..606433d73236
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_gem.c

diff --git a/drivers/accel/amdxdna/amdxdna_gem.h b/drivers/accel/amdxdna/amdxdna_gem.h
new file mode 100644
index 000000000000..8ccc0375dd9d
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_gem.h

diff --git a/drivers/accel/amdxdna/amdxdna_mailbox.c b/drivers/accel/amdxdna/amdxdna_mailbox.c
new file mode 100644
index 000000000000..814b16bb1953
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_mailbox.c

diff --git a/drivers/accel/amdxdna/amdxdna_mailbox.h b/drivers/accel/amdxdna/amdxdna_mailbox.h
new file mode 100644
index 000000000000..57954c303bdd
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_mailbox.h

diff --git a/drivers/accel/amdxdna/amdxdna_mailbox_helper.c b/drivers/accel/amdxdna/amdxdna_mailbox_helper.c
new file mode 100644
index 000000000000..5139a9c96a91
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_mailbox_helper.c

diff --git a/drivers/accel/amdxdna/amdxdna_mailbox_helper.h b/drivers/accel/amdxdna/amdxdna_mailbox_helper.h
new file mode 100644
index 000000000000..23e1317b79fe
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_mailbox_helper.h

diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.c b/drivers/accel/amdxdna/amdxdna_pci_drv.c
new file mode 100644
index 000000000000..f5b8497cf5ad
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_pci_drv.c

diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.h b/drivers/accel/amdxdna/amdxdna_pci_drv.h
new file mode 100644
index 000000000000..37848a8d8031
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_pci_drv.h

diff --git a/drivers/accel/amdxdna/amdxdna_sysfs.c b/drivers/accel/amdxdna/amdxdna_sysfs.c
new file mode 100644
index 000000000000..f27e4ee960a0
--- /dev/null
+++ b/drivers/accel/amdxdna/amdxdna_sysfs.c

diff --git a/drivers/accel/amdxdna/npu1_regs.c b/drivers/accel/amdxdna/npu1_regs.c
new file mode 100644
index 000000000000..e4f6dac7d00f
--- /dev/null
+++ b/drivers/accel/amdxdna/npu1_regs.c

diff --git a/drivers/accel/amdxdna/npu2_regs.c b/drivers/accel/amdxdna/npu2_regs.c
new file mode 100644
index 000000000000..a081cac75ee0
--- /dev/null
+++ b/drivers/accel/amdxdna/npu2_regs.c

diff --git a/drivers/accel/amdxdna/npu4_regs.c b/drivers/accel/amdxdna/npu4_regs.c
new file mode 100644
index 000000000000..9f2e33182ec6
--- /dev/null
+++ b/drivers/accel/amdxdna/npu4_regs.c

diff --git a/drivers/accel/amdxdna/npu5_regs.c b/drivers/accel/amdxdna/npu5_regs.c
new file mode 100644
index 000000000000..5f1cf83461c4
--- /dev/null
+++ b/drivers/accel/amdxdna/npu5_regs.c

diff --git a/drivers/accel/amdxdna/npu6_regs.c b/drivers/accel/amdxdna/npu6_regs.c
new file mode 100644
index 000000000000..94a7005685a7
--- /dev/null
+++ b/drivers/accel/amdxdna/npu6_regs.c

diff --git a/drivers/accel/habanalabs/common/context.c b/drivers/accel/habanalabs/common/context.c
index b83141f58319..9f212b17611a 100644
--- a/drivers/accel/habanalabs/common/context.c
+++ b/drivers/accel/habanalabs/common/context.c

- char task_comm[TASK_COMM_LEN];

- get_task_comm(task_comm, current), ctx->asid);

diff --git a/drivers/accel/habanalabs/common/device.c b/drivers/accel/habanalabs/common/device.c
index e0cf3b4343bb..30277ae410d4 100644
--- a/drivers/accel/habanalabs/common/device.c
+++ b/drivers/accel/habanalabs/common/device.c

- msecs_to_jiffies(HL_PENDING_RESET_PER_SEC * 1000));

diff --git a/drivers/accel/habanalabs/common/habanalabs_drv.c b/drivers/accel/habanalabs/common/habanalabs_drv.c
index 708dfd10f39c..596c52e8aa26 100644
--- a/drivers/accel/habanalabs/common/habanalabs_drv.c
+++ b/drivers/accel/habanalabs/common/habanalabs_drv.c

- .date = "20190505",

- hdev->timeout_jiffies = msecs_to_jiffies(GAUDI_DEFAULT_TIMEOUT_LOCKED *

diff --git a/drivers/accel/habanalabs/common/habanalabs_ioctl.c b/drivers/accel/habanalabs/common/habanalabs_ioctl.c
index 1dd6e23172ca..8729a0c57d78 100644
--- a/drivers/accel/habanalabs/common/habanalabs_ioctl.c
+++ b/drivers/accel/habanalabs/common/habanalabs_ioctl.c

@@ -1279,13 +1279,10 @@ static long _hl_ioctl(struct hl_fpriv *hpriv, unsigned int cmd, unsigned long ar

- char task_comm[TASK_COMM_LEN];

- task_pid_nr(current), get_task_comm(task_comm, current), cmd, nr);

- char task_comm[TASK_COMM_LEN];

- task_pid_nr(current), get_task_comm(task_comm, current), cmd, nr);

diff --git a/drivers/accel/habanalabs/common/memory.c b/drivers/accel/habanalabs/common/memory.c
index 3348ad12c237..601fdbe70179 100644
--- a/drivers/accel/habanalabs/common/memory.c
+++ b/drivers/accel/habanalabs/common/memory.c

-MODULE_IMPORT_NS(DMA_BUF);

diff --git a/drivers/accel/ivpu/Kconfig b/drivers/accel/ivpu/Kconfig
index 682c53245286..9e055b5ce03d 100644
--- a/drivers/accel/ivpu/Kconfig
+++ b/drivers/accel/ivpu/Kconfig

diff --git a/drivers/accel/ivpu/Makefile b/drivers/accel/ivpu/Makefile
index ebd682a42eb1..1029e0bab061 100644
--- a/drivers/accel/ivpu/Makefile
+++ b/drivers/accel/ivpu/Makefile

diff --git a/drivers/accel/ivpu/ivpu_coredump.c b/drivers/accel/ivpu/ivpu_coredump.c
new file mode 100644
index 000000000000..16ad0c30818c
--- /dev/null
+++ b/drivers/accel/ivpu/ivpu_coredump.c

diff --git a/drivers/accel/ivpu/ivpu_coredump.h b/drivers/accel/ivpu/ivpu_coredump.h
new file mode 100644
index 000000000000..8efb09d02441
--- /dev/null
+++ b/drivers/accel/ivpu/ivpu_coredump.h

diff --git a/drivers/accel/ivpu/ivpu_debugfs.c b/drivers/accel/ivpu/ivpu_debugfs.c
index 6f86f8df30db..8180b95ed69d 100644
--- a/drivers/accel/ivpu/ivpu_debugfs.c
+++ b/drivers/accel/ivpu/ivpu_debugfs.c

-dvfs_mode_fops_write(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)

- struct ivpu_device *vdev = file->private_data;

- struct ivpu_fw_info *fw = vdev->fw;

- ret = kstrtou32_from_user(user_buf, size, 0, &dvfs_mode);

- fw->dvfs_mode = dvfs_mode;

- ret = pci_try_reset_function(to_pci_dev(vdev->drm.dev));

-static const struct file_operations dvfs_mode_fops = {

- .owner = THIS_MODULE,

- .open = simple_open,

- .write = dvfs_mode_fops_write,

- ivpu_fw_log_clear(vdev);

-ivpu_reset_engine_fn(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)

- struct ivpu_device *vdev = file->private_data;

- if (ivpu_jsm_reset_engine(vdev, DRM_IVPU_ENGINE_COMPUTE))

- if (ivpu_jsm_reset_engine(vdev, DRM_IVPU_ENGINE_COPY))

-static const struct file_operations ivpu_reset_engine_fops = {

- .owner = THIS_MODULE,

- .open = simple_open,

- .write = ivpu_reset_engine_fn,

-ivpu_resume_engine_fn(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)

- struct ivpu_device *vdev = file->private_data;

- if (ivpu_jsm_hws_resume_engine(vdev, DRM_IVPU_ENGINE_COMPUTE))

- if (ivpu_jsm_hws_resume_engine(vdev, DRM_IVPU_ENGINE_COPY))

-static const struct file_operations ivpu_resume_engine_fops = {

- .owner = THIS_MODULE,

- .open = simple_open,

- .write = ivpu_resume_engine_fn,

- debugfs_create_file("dvfs_mode", 0200, debugfs_root, vdev,

diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
index c91400ecf926..38cf1c342c72 100644
--- a/drivers/accel/ivpu/ivpu_drv.c
+++ b/drivers/accel/ivpu/ivpu_drv.c

-#include "vpu_boot_api.h"

-#define DRIVER_VERSION_STR __stringify(DRM_IVPU_DRIVER_MAJOR) "." \

- __stringify(DRM_IVPU_DRIVER_MINOR) "."

-int ivpu_sched_mode;

-MODULE_PARM_DESC(sched_mode, "Scheduler mode: 0 - Default scheduler, 1 - Force HW scheduler");

+MODULE_PARM_DESC(sched_mode, "Scheduler mode: -1 - Use default scheduler, 0 - Use OS scheduler, 1 - Use HW scheduler");

- ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);

- drm_WARN_ON(&vdev->drm, !file_priv);

- ret = ivpu_mmu_user_context_init(vdev, &file_priv->ctx, ctx_id);

- goto err_xa_erase;

- xa_erase_irq(&vdev->context_xa, ctx_id);

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_HW) {

- ivpu_hw_diagnose_failure(vdev);

- ivpu_mmu_evtq_dump(vdev);

- ivpu_fw_log_dump(vdev);

- return ivpu_hw_sched_init(vdev);

- .date = DRIVER_DATE,

- .major = DRM_IVPU_DRIVER_MAJOR,

- .minor = DRM_IVPU_DRIVER_MINOR,

- ret = ivpu_mmu_global_context_init(vdev);

- goto err_shutdown;

diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
index 63f13b697eed..3fdff3f6cffd 100644
--- a/drivers/accel/ivpu/ivpu_drv.h
+++ b/drivers/accel/ivpu/ivpu_drv.h

-#define DRIVER_DATE "20230117"

-#define PCI_DEVICE_ID_MTL 0x7d1d

-#define PCI_DEVICE_ID_ARL 0xad1d

-#define PCI_DEVICE_ID_LNL 0x643e

-#define IVPU_NUM_ENGINES 2

-#define IVPU_NUM_CMDQS_PER_CTX (IVPU_NUM_ENGINES * IVPU_NUM_PRIORITIES)

-#define IVPU_CMDQ_INDEX(engine, priority) ((engine) * IVPU_NUM_PRIORITIES + (priority))

- struct ivpu_cmdq *cmdq[IVPU_NUM_CMDQS_PER_CTX];

-#define IVPU_TEST_MODE_PREEMPTION_DISABLE BIT(6)

-#define IVPU_TEST_MODE_HWS_EXTRA_EVENTS BIT(7)

diff --git a/drivers/accel/ivpu/ivpu_fw.c b/drivers/accel/ivpu/ivpu_fw.c
index ede6165e09d9..6037ec0b3096 100644
--- a/drivers/accel/ivpu/ivpu_fw.c
+++ b/drivers/accel/ivpu/ivpu_fw.c

-#define FW_VERSION_HEADER_SIZE SZ_4K

- ivpu_info(vdev, "Firmware: %s, version: %s", fw->name,

- (const char *)fw_hdr + VPU_FW_HEADER_SIZE);

- fw->trace_level = min_t(u32, ivpu_log_level, IVPU_FW_LOG_FATAL);

- if (ivpu_log_level <= IVPU_FW_LOG_INFO)

- boot_params->global_aliased_pio_base = vdev->hw->ranges.user.start;

- boot_params->global_aliased_pio_size = ivpu_hw_range_size(&vdev->hw->ranges.user);

- boot_params->vpu_scheduling_mode = vdev->hw->sched_mode;

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_HW)

diff --git a/drivers/accel/ivpu/ivpu_fw.h b/drivers/accel/ivpu/ivpu_fw.h
index 40d9d17be3f5..1d0b2bd9d65c 100644
--- a/drivers/accel/ivpu/ivpu_fw.h
+++ b/drivers/accel/ivpu/ivpu_fw.h

diff --git a/drivers/accel/ivpu/ivpu_fw_log.c b/drivers/accel/ivpu/ivpu_fw_log.c
index ef0adb5e0fbe..337c906b0210 100644
--- a/drivers/accel/ivpu/ivpu_fw_log.c
+++ b/drivers/accel/ivpu/ivpu_fw_log.c

-#define IVPU_FW_LOG_LINE_LENGTH 256

-unsigned int ivpu_log_level = IVPU_FW_LOG_ERROR;

-module_param(ivpu_log_level, uint, 0444);

-MODULE_PARM_DESC(ivpu_log_level,

- "NPU firmware default trace level: debug=" __stringify(IVPU_FW_LOG_DEBUG)

-static int fw_log_ptr(struct ivpu_device *vdev, struct ivpu_bo *bo, u32 *offset,

- struct vpu_tracing_buffer_header **log_header)

- *log_header = log;

-static void buffer_print(char *buffer, u32 size, struct drm_printer *p)

- drm_printf(p, "%s\n", line);

-static void fw_log_print_buffer(struct ivpu_device *vdev, struct vpu_tracing_buffer_header *log,

- const char *prefix, bool only_new_msgs, struct drm_printer *p)

- char *log_buffer = (void *)log + log->header_size;

- u32 log_size = log->size - log->header_size;

- u32 log_start = log->read_index;

- u32 log_end = log->write_index;

- if (!(log->write_index || log->wrap_count) ||

- (log->write_index == log->read_index && only_new_msgs)) {

- drm_printf(p, "==== %s \"%s\" log empty ====\n", prefix, log->name);

- if (log->write_index > log->read_index) {

- buffer_print(log_buffer + log_start, log_end - log_start, p);

- buffer_print(log_buffer + log_end, log_size - log_end, p);

- buffer_print(log_buffer, log_end, p);

- drm_printf(p, "\x1b[0m");

-void ivpu_fw_log_print(struct ivpu_device *vdev, bool only_new_msgs, struct drm_printer *p)

- struct vpu_tracing_buffer_header *log_header;

- while (fw_log_ptr(vdev, vdev->fw->mem_log_crit, &next, &log_header) == 0)

- fw_log_print_buffer(vdev, log_header, "NPU critical", only_new_msgs, p);

- while (fw_log_ptr(vdev, vdev->fw->mem_log_verb, &next, &log_header) == 0)

- fw_log_print_buffer(vdev, log_header, "NPU verbose", only_new_msgs, p);

-void ivpu_fw_log_clear(struct ivpu_device *vdev)

- struct vpu_tracing_buffer_header *log_header;

- while (fw_log_ptr(vdev, vdev->fw->mem_log_crit, &next, &log_header) == 0)

- log_header->read_index = log_header->write_index;

- while (fw_log_ptr(vdev, vdev->fw->mem_log_verb, &next, &log_header) == 0)

- log_header->read_index = log_header->write_index;

diff --git a/drivers/accel/ivpu/ivpu_fw_log.h b/drivers/accel/ivpu/ivpu_fw_log.h
index 0b2573f6f315..8bb528a73cb7 100644
--- a/drivers/accel/ivpu/ivpu_fw_log.h
+++ b/drivers/accel/ivpu/ivpu_fw_log.h

-#include <drm/drm_print.h>

-extern unsigned int ivpu_log_level;

-void ivpu_fw_log_print(struct ivpu_device *vdev, bool only_new_msgs, struct drm_printer *p);

-void ivpu_fw_log_clear(struct ivpu_device *vdev);

-static inline void ivpu_fw_log_dump(struct ivpu_device *vdev)

- struct drm_printer p = drm_info_printer(vdev->drm.dev);

- ivpu_fw_log_print(vdev, false, &p);

diff --git a/drivers/accel/ivpu/ivpu_gem.c b/drivers/accel/ivpu/ivpu_gem.c
index 1b409dbd332d..16178054e629 100644
--- a/drivers/accel/ivpu/ivpu_gem.c
+++ b/drivers/accel/ivpu/ivpu_gem.c

- bo, bo->ctx->id, bo->vpu_addr, bo->base.base.size,

diff --git a/drivers/accel/ivpu/ivpu_hw.c b/drivers/accel/ivpu/ivpu_hw.c
index 27f0fe4d54e0..4e1054f3466e 100644
--- a/drivers/accel/ivpu/ivpu_hw.c
+++ b/drivers/accel/ivpu/ivpu_hw.c

- vdev->timeout.autosuspend = -1;

- ivpu_hw_range_init(&vdev->hw->ranges.user, 0xc0000000, 255 * SZ_1M);

- ivpu_hw_range_init(&vdev->hw->ranges.dma, 0x200000000, SZ_8G);

- ivpu_hw_range_init(&vdev->hw->ranges.user, 0x80000000, SZ_256M);

- ivpu_hw_range_init(&vdev->hw->ranges.shave, 0x80000000 + SZ_256M, SZ_2G - SZ_256M);

- ivpu_hw_range_init(&vdev->hw->ranges.dma, 0x200000000, SZ_8G);

diff --git a/drivers/accel/ivpu/ivpu_hw.h b/drivers/accel/ivpu/ivpu_hw.h
index 1c0c98e3afb8..fc4dbfc980c8 100644
--- a/drivers/accel/ivpu/ivpu_hw.h
+++ b/drivers/accel/ivpu/ivpu_hw.h

diff --git a/drivers/accel/ivpu/ivpu_hw_40xx_reg.h b/drivers/accel/ivpu/ivpu_hw_40xx_reg.h
index d0b795b344c7..fc0ee8d637f9 100644
--- a/drivers/accel/ivpu/ivpu_hw_40xx_reg.h
+++ b/drivers/accel/ivpu/ivpu_hw_40xx_reg.h

diff --git a/drivers/accel/ivpu/ivpu_hw_btrs.c b/drivers/accel/ivpu/ivpu_hw_btrs.c
index 745e5248803d..3212c99f3682 100644
--- a/drivers/accel/ivpu/ivpu_hw_btrs.c
+++ b/drivers/accel/ivpu/ivpu_hw_btrs.c

- if (!tile_disable_check(config)) {

- ivpu_err(vdev, "Fuse: Invalid tile disable config (0x%x)\n", config);

- ivpu_dbg(vdev, MISC, "Fuse: %d tiles enabled. Tile number %d disabled\n",

- BTRS_LNL_TILE_MAX_NUM - 1, ffs(config) - 1);

- ivpu_dbg(vdev, MISC, "Fuse: All %d tiles enabled\n", BTRS_LNL_TILE_MAX_NUM);

- hw->sched_mode = ivpu_sched_mode;

- /* Simics cannot start without at least one tile */

- if (enable && ivpu_is_simics(vdev))

- if (ivpu_is_simics(vdev))

diff --git a/drivers/accel/ivpu/ivpu_hw_ip.c b/drivers/accel/ivpu/ivpu_hw_ip.c
index dfd2f4a5b526..029dd065614b 100644
--- a/drivers/accel/ivpu/ivpu_hw_ip.c
+++ b/drivers/accel/ivpu/ivpu_hw_ip.c

-#define PWR_ISLAND_EN_POST_DLY_FREQ_DEFAULT 0

-#define PWR_ISLAND_EN_POST_DLY_FREQ_HIGH 18

-#define PWR_ISLAND_STATUS_DLY_FREQ_DEFAULT 3

-#define PWR_ISLAND_STATUS_DLY_FREQ_HIGH 46

-static void pwr_island_delay_set_50xx(struct ivpu_device *vdev)

- u32 val, post, status;

- if (vdev->hw->pll.profiling_freq == PLL_PROFILING_FREQ_DEFAULT) {

- post = PWR_ISLAND_EN_POST_DLY_FREQ_DEFAULT;

- status = PWR_ISLAND_STATUS_DLY_FREQ_DEFAULT;

- post = PWR_ISLAND_EN_POST_DLY_FREQ_HIGH;

- status = PWR_ISLAND_STATUS_DLY_FREQ_HIGH;

- if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_50XX)

- pwr_island_delay_set_50xx(vdev);

- ivpu_pm_trigger_recovery(vdev, "NOC Firewall IRQ");

diff --git a/drivers/accel/ivpu/ivpu_ipc.c b/drivers/accel/ivpu/ivpu_ipc.c
index 78b32a823241..01ebf88fe6ef 100644
--- a/drivers/accel/ivpu/ivpu_ipc.c
+++ b/drivers/accel/ivpu/ivpu_ipc.c

- ivpu_dbg(vdev, IPC, "IPC resp result error: %d\n", rx_msg->jsm_msg->result);

- struct vpu_jsm_msg *resp, u32 channel,

- unsigned long timeout_ms)

-int ivpu_ipc_send_receive_active(struct ivpu_device *vdev, struct vpu_jsm_msg *req,

- enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp,

- u32 channel, unsigned long timeout_ms)

- drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev));

-int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req,

- enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp,

- u32 channel, unsigned long timeout_ms)

- ret = ivpu_ipc_send_receive_active(vdev, req, expected_resp, resp, channel, timeout_ms);

- drm_WARN_ON(&vdev->drm, ipc->on);

diff --git a/drivers/accel/ivpu/ivpu_ipc.h b/drivers/accel/ivpu/ivpu_ipc.h
index 4fe38141045e..b4dfb504679b 100644
--- a/drivers/accel/ivpu/ivpu_ipc.h
+++ b/drivers/accel/ivpu/ivpu_ipc.h

-int ivpu_ipc_send_receive_active(struct ivpu_device *vdev, struct vpu_jsm_msg *req,

- enum vpu_ipc_msg_type expected_resp, struct vpu_jsm_msg *resp,

- u32 channel, unsigned long timeout_ms);

diff --git a/drivers/accel/ivpu/ivpu_job.c b/drivers/accel/ivpu/ivpu_job.c
index be2e2bf0f43f..7149312f16e1 100644
--- a/drivers/accel/ivpu/ivpu_job.c
+++ b/drivers/accel/ivpu/ivpu_job.c

-#define JOB_ID_JOB_MASK GENMASK(7, 0)

-#define JOB_ID_CONTEXT_MASK GENMASK(31, 8)

- struct ivpu_addr_range range;

- if (vdev->hw->sched_mode != VPU_SCHEDULING_MODE_HW)

- range.start = vdev->hw->ranges.user.end - (primary_size * IVPU_NUM_CMDQS_PER_CTX);

- range.end = vdev->hw->ranges.user.end;

- cmdq->primary_preempt_buf = ivpu_bo_create(vdev, &file_priv->ctx, &range, primary_size,

- range.start = vdev->hw->ranges.shave.end - (secondary_size * IVPU_NUM_CMDQS_PER_CTX);

- range.end = vdev->hw->ranges.shave.end;

- cmdq->secondary_preempt_buf = ivpu_bo_create(vdev, &file_priv->ctx, &range, secondary_size,

- if (vdev->hw->sched_mode != VPU_SCHEDULING_MODE_HW)

- drm_WARN_ON(&vdev->drm, !cmdq->primary_preempt_buf);

- drm_WARN_ON(&vdev->drm, !cmdq->secondary_preempt_buf);

- ivpu_bo_free(cmdq->primary_preempt_buf);

- ivpu_bo_free(cmdq->secondary_preempt_buf);

- struct xa_limit db_xa_limit = {.max = IVPU_MAX_DB, .min = IVPU_MIN_DB};

- ret = xa_alloc(&vdev->db_xa, &cmdq->db_id, NULL, db_xa_limit, GFP_KERNEL);

- goto err_erase_xa;

- goto err_free_cmdq_mem;

- ivpu_bo_free(cmdq->mem);

- ret = ivpu_jsm_hws_create_cmdq(vdev, file_priv->ctx.id, file_priv->ctx.id, cmdq->db_id,

- ret = ivpu_jsm_hws_set_context_sched_properties(vdev, file_priv->ctx.id, cmdq->db_id,

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_HW)

- ret = ivpu_jsm_hws_register_db(vdev, file_priv->ctx.id, cmdq->db_id, cmdq->db_id,

- ivpu_dbg(vdev, JOB, "DB %d registered to ctx %d\n", cmdq->db_id, file_priv->ctx.id);

-ivpu_cmdq_init(struct ivpu_file_priv *file_priv, struct ivpu_cmdq *cmdq, u16 engine, u8 priority)

- jobq_header->engine_idx = engine;

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_HW) {

- ret = ivpu_hws_cmdq_init(file_priv, cmdq, engine, priority);

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_HW) {

- ret = ivpu_jsm_hws_destroy_cmdq(vdev, file_priv->ctx.id, cmdq->db_id);

- ivpu_dbg(vdev, JOB, "Command queue %d destroyed\n", cmdq->db_id);

-static struct ivpu_cmdq *ivpu_cmdq_acquire(struct ivpu_file_priv *file_priv, u16 engine,

- int cmdq_idx = IVPU_CMDQ_INDEX(engine, priority);

- struct ivpu_cmdq *cmdq = file_priv->cmdq[cmdq_idx];

- file_priv->cmdq[cmdq_idx] = cmdq;

- ret = ivpu_cmdq_init(file_priv, cmdq, engine, priority);

-static void ivpu_cmdq_release_locked(struct ivpu_file_priv *file_priv, u16 engine, u8 priority)

- int cmdq_idx = IVPU_CMDQ_INDEX(engine, priority);

- struct ivpu_cmdq *cmdq = file_priv->cmdq[cmdq_idx];

- file_priv->cmdq[cmdq_idx] = NULL;

-void ivpu_cmdq_release_all_locked(struct ivpu_file_priv *file_priv)

- lockdep_assert_held(&file_priv->lock);

- for (engine = 0; engine < IVPU_NUM_ENGINES; engine++)

- for (priority = 0; priority < IVPU_NUM_PRIORITIES; priority++)

- ivpu_cmdq_release_locked(file_priv, engine, priority);

- for (engine = 0; engine < IVPU_NUM_ENGINES; engine++) {

- for (priority = 0; priority < IVPU_NUM_PRIORITIES; priority++) {

- int cmdq_idx = IVPU_CMDQ_INDEX(engine, priority);

- struct ivpu_cmdq *cmdq = file_priv->cmdq[cmdq_idx];

- cmdq->db_registered = false;

- for (engine = 0; engine < IVPU_NUM_ENGINES; engine++) {

- for (priority = 0; priority < IVPU_NUM_PRIORITIES; priority++) {

- int cmdq_idx = IVPU_CMDQ_INDEX(engine, priority);

- if (file_priv->cmdq[cmdq_idx])

- ivpu_cmdq_fini(file_priv, file_priv->cmdq[cmdq_idx]);

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_OS)

- ivpu_dbg(vdev, JOB, "Job queue full: ctx %d engine %d db %d head %d tail %d\n",

- job->file_priv->ctx.id, job->engine_idx, cmdq->db_id, header->head, tail);

- entry = &cmdq->jobq->job[tail];

- if (vdev->hw->sched_mode == VPU_SCHEDULING_MODE_HW &&

- (unlikely(!(ivpu_test_mode & IVPU_TEST_MODE_PREEMPTION_DISABLE)))) {

- entry->primary_preempt_buf_addr = cmdq->primary_preempt_buf->vpu_addr;

- entry->primary_preempt_buf_size = ivpu_bo_size(cmdq->primary_preempt_buf);

- entry->secondary_preempt_buf_addr = cmdq->secondary_preempt_buf->vpu_addr;

- entry->secondary_preempt_buf_size = ivpu_bo_size(cmdq->secondary_preempt_buf);

- struct xa_limit job_id_range;

- cmdq = ivpu_cmdq_acquire(job->file_priv, job->engine_idx, priority);

- job_id_range.min = FIELD_PREP(JOB_ID_CONTEXT_MASK, (file_priv->ctx.id - 1));

- job_id_range.max = job_id_range.min | JOB_ID_JOB_MASK;

- ret = __xa_alloc(&vdev->submitted_jobs_xa, &job->job_id, job, job_id_range, GFP_KERNEL);

- if (params->engine > DRM_IVPU_ENGINE_COPY)

diff --git a/drivers/accel/ivpu/ivpu_job.h b/drivers/accel/ivpu/ivpu_job.h
index 6accb94028c7..8b19e3f8b4cf 100644
--- a/drivers/accel/ivpu/ivpu_job.h
+++ b/drivers/accel/ivpu/ivpu_job.h

diff --git a/drivers/accel/ivpu/ivpu_jsm_msg.c b/drivers/accel/ivpu/ivpu_jsm_msg.c
index 46ef16c3c069..30a40be76930 100644
--- a/drivers/accel/ivpu/ivpu_jsm_msg.c
+++ b/drivers/accel/ivpu/ivpu_jsm_msg.c

- IVPU_CASE_TO_STR(VPU_JSM_MSG_BLOB_DEINIT);

- if (engine > VPU_ENGINE_COPY)

- VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);

- ret = ivpu_ipc_send_receive_active(vdev, &req, VPU_JSM_MSG_PWR_D0I3_ENTER_DONE,

- &resp, VPU_IPC_CHAN_GEN_CMD,

- vdev->timeout.d0i3_entry_msg);

- if (engine >= VPU_ENGINE_NB)

- req.payload.hws_set_scheduling_log.enable_extra_events =

- ivpu_test_mode & IVPU_TEST_MODE_HWS_EXTRA_EVENTS;

- ret = ivpu_ipc_send_receive_active(vdev, &req, VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP_RSP,

- &resp, VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);

- return ivpu_ipc_send_receive_active(vdev, &req, VPU_JSM_MSG_DCT_ENABLE_DONE,

- &resp, VPU_IPC_CHAN_ASYNC_CMD,

- vdev->timeout.jsm);

- return ivpu_ipc_send_receive_active(vdev, &req, VPU_JSM_MSG_DCT_DISABLE_DONE,

- &resp, VPU_IPC_CHAN_ASYNC_CMD,

- vdev->timeout.jsm);

diff --git a/drivers/accel/ivpu/ivpu_jsm_msg.h b/drivers/accel/ivpu/ivpu_jsm_msg.h
index e4e42c0ff6e6..9e84d3526a14 100644
--- a/drivers/accel/ivpu/ivpu_jsm_msg.h
+++ b/drivers/accel/ivpu/ivpu_jsm_msg.h

diff --git a/drivers/accel/ivpu/ivpu_mmu.c b/drivers/accel/ivpu/ivpu_mmu.c
index c078e214b221..26ef52fbb93e 100644
--- a/drivers/accel/ivpu/ivpu_mmu.c
+++ b/drivers/accel/ivpu/ivpu_mmu.c

-static int ivpu_mmu_cd_add(struct ivpu_device *vdev, u32 ssid, u64 cd_dma)

- if (cd_dma != 0) {

- cd[0] = FIELD_PREP(IVPU_MMU_CD_0_TCR_T0SZ, IVPU_MMU_T0SZ_48BIT) |

- FIELD_PREP(IVPU_MMU_CD_0_TCR_TG0, 0) |

- FIELD_PREP(IVPU_MMU_CD_0_TCR_IRGN0, 0) |

- FIELD_PREP(IVPU_MMU_CD_0_TCR_ORGN0, 0) |

- FIELD_PREP(IVPU_MMU_CD_0_TCR_SH0, 0) |

- FIELD_PREP(IVPU_MMU_CD_0_TCR_IPS, IVPU_MMU_IPS_48BIT) |

- FIELD_PREP(IVPU_MMU_CD_0_ASID, ssid) |

- IVPU_MMU_CD_0_TCR_EPD1 |

- IVPU_MMU_CD_0_AA64 |

- IVPU_MMU_CD_0_ASET |

- cd[1] = cd_dma & IVPU_MMU_CD_1_TTB0_MASK;

- cd[3] = 0x0000000000007444;

- /* For global context generate memory fault on VPU */

- if (ssid == IVPU_GLOBAL_CONTEXT_MMU_SSID)

- cd[0] |= IVPU_MMU_CD_0_A;

- memset(cd, 0, sizeof(cd));

- ivpu_dbg(vdev, MMU, "CDTAB %s entry (SSID=%u, dma=%pad): 0x%llx, 0x%llx, 0x%llx, 0x%llx\n",

- cd_dma ? "write" : "clear", ssid, &cd_dma, cd[0], cd[1], cd[2], cd[3]);

-static int ivpu_mmu_cd_add_gbl(struct ivpu_device *vdev)

- ret = ivpu_mmu_cd_add(vdev, 0, vdev->gctx.pgtable.pgd_dma);

- ivpu_err(vdev, "Failed to add global CD entry: %d\n", ret);

-static int ivpu_mmu_cd_add_user(struct ivpu_device *vdev, u32 ssid, dma_addr_t cd_dma)

- ivpu_err(vdev, "Invalid SSID: %u\n", ssid);

- ret = ivpu_mmu_cd_add(vdev, ssid, cd_dma);

- ivpu_err(vdev, "Failed to add CD entry SSID=%u: %d\n", ssid, ret);

- ret = ivpu_mmu_cd_add_gbl(vdev);

- ivpu_err(vdev, "Failed to initialize strtab: %d\n", ret);

-int ivpu_mmu_set_pgtable(struct ivpu_device *vdev, int ssid, struct ivpu_mmu_pgtable *pgtable)

- return ivpu_mmu_cd_add_user(vdev, ssid, pgtable->pgd_dma);

-void ivpu_mmu_clear_pgtable(struct ivpu_device *vdev, int ssid)

- ivpu_mmu_cd_add_user(vdev, ssid, 0); /* 0 will clear CD entry */

diff --git a/drivers/accel/ivpu/ivpu_mmu.h b/drivers/accel/ivpu/ivpu_mmu.h
index 6fa35c240710..7afea9cd8731 100644
--- a/drivers/accel/ivpu/ivpu_mmu.h
+++ b/drivers/accel/ivpu/ivpu_mmu.h

-int ivpu_mmu_set_pgtable(struct ivpu_device *vdev, int ssid, struct ivpu_mmu_pgtable *pgtable);

-void ivpu_mmu_clear_pgtable(struct ivpu_device *vdev, int ssid);

diff --git a/drivers/accel/ivpu/ivpu_mmu_context.c b/drivers/accel/ivpu/ivpu_mmu_context.c
index bbe652a7019d..0af614dfb6f9 100644
--- a/drivers/accel/ivpu/ivpu_mmu_context.c
+++ b/drivers/accel/ivpu/ivpu_mmu_context.c

-static int ivpu_mmu_pgtable_init(struct ivpu_device *vdev, struct ivpu_mmu_pgtable *pgtable)

- dma_addr_t pgd_dma;

- pgtable->pgd_dma_ptr = ivpu_pgtable_alloc_page(vdev, &pgd_dma);

- if (!pgtable->pgd_dma_ptr)

- pgtable->pgd_dma = pgd_dma;

- mutex_unlock(&ctx->lock);

-ivpu_mmu_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u32 context_id)

- ret = ivpu_mmu_pgtable_init(vdev, &ctx->pgtable);

- ivpu_err(vdev, "Failed to initialize pgtable for ctx %u: %d\n", context_id, ret);

- start = vdev->hw->ranges.user.start;

- end = vdev->hw->ranges.dma.end;

-static void ivpu_mmu_context_fini(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx)

- if (drm_WARN_ON(&vdev->drm, !ctx->pgtable.pgd_dma_ptr))

- ctx->pgtable.pgd_dma_ptr = NULL;

- ctx->pgtable.pgd_dma = 0;

-int ivpu_mmu_global_context_init(struct ivpu_device *vdev)

- return ivpu_mmu_context_init(vdev, &vdev->gctx, IVPU_GLOBAL_CONTEXT_MMU_SSID);

- return ivpu_mmu_context_fini(vdev, &vdev->gctx);

- return ivpu_mmu_user_context_init(vdev, &vdev->rctx, IVPU_RESERVED_CONTEXT_MMU_SSID);

- return ivpu_mmu_user_context_fini(vdev, &vdev->rctx);

-int ivpu_mmu_user_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u32 ctx_id)

- drm_WARN_ON(&vdev->drm, !ctx_id);

- ret = ivpu_mmu_context_init(vdev, ctx, ctx_id);

- ivpu_err(vdev, "Failed to initialize context %u: %d\n", ctx_id, ret);

- ret = ivpu_mmu_set_pgtable(vdev, ctx_id, &ctx->pgtable);

- ivpu_err(vdev, "Failed to set page table for context %u: %d\n", ctx_id, ret);

- goto err_context_fini;

- ivpu_mmu_context_fini(vdev, ctx);

-void ivpu_mmu_user_context_fini(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx)

- drm_WARN_ON(&vdev->drm, !ctx->id);

- ivpu_mmu_clear_pgtable(vdev, ctx->id);

- ivpu_mmu_context_fini(vdev, ctx);

diff --git a/drivers/accel/ivpu/ivpu_mmu_context.h b/drivers/accel/ivpu/ivpu_mmu_context.h
index 7f9aaf3d10c2..8042fc067062 100644
--- a/drivers/accel/ivpu/ivpu_mmu_context.h
+++ b/drivers/accel/ivpu/ivpu_mmu_context.h

- struct mutex lock; /* Protects: mm, pgtable */

-int ivpu_mmu_global_context_init(struct ivpu_device *vdev);

-int ivpu_mmu_user_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u32 ctx_id);

-void ivpu_mmu_user_context_fini(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx);

diff --git a/drivers/accel/ivpu/ivpu_ms.c b/drivers/accel/ivpu/ivpu_ms.c
index 2f9d37f5c208..ffe7b10f8a76 100644
--- a/drivers/accel/ivpu/ivpu_ms.c
+++ b/drivers/accel/ivpu/ivpu_ms.c

-#define MS_INFO_BUFFER_SIZE SZ_16K

diff --git a/drivers/accel/ivpu/ivpu_pm.c b/drivers/accel/ivpu/ivpu_pm.c
index 59d3170f5e35..5060c5dd40d1 100644
--- a/drivers/accel/ivpu/ivpu_pm.c
+++ b/drivers/accel/ivpu/ivpu_pm.c

-#include "vpu_boot_api.h"

-#include "ivpu_hw.h"

- pci_restore_state(to_pci_dev(vdev->drm.dev));

-static void ivpu_pm_recovery_work(struct work_struct *work)

- struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, recovery_work);

- struct ivpu_device *vdev = pm->vdev;

- char *evt[2] = {"IVPU_PM_EVENT=IVPU_RECOVER", NULL};

- ivpu_err(vdev, "Recovering the NPU (reset #%d)\n", atomic_read(&vdev->pm->reset_counter));

- ret = pm_runtime_resume_and_get(vdev->drm.dev);

- ivpu_err(vdev, "Failed to resume NPU: %d\n", ret);

- ivpu_fw_log_dump(vdev);

- ivpu_suspend(vdev);

- kobject_uevent_env(&vdev->drm.dev->kobj, KOBJ_CHANGE, evt);

- pm_runtime_put_autosuspend(vdev->drm.dev);

- ivpu_fw_log_dump(vdev);

- drm_WARN_ON(&vdev->drm, ret < 0);

- atomic_inc(&vdev->pm->reset_counter);

- atomic_set(&vdev->pm->reset_pending, 1);

- pm_runtime_get_sync(vdev->drm.dev);

- down_write(&vdev->pm->reset_lock);

- ivpu_prepare_for_reset(vdev);

- ivpu_hw_reset(vdev);

- ivpu_pm_prepare_cold_boot(vdev);

- ivpu_jobs_abort_all(vdev);

- ivpu_ms_cleanup_all(vdev);

- ret = ivpu_resume(vdev);

- ivpu_err(vdev, "Failed to set RESUME state: %d\n", ret);

- up_write(&vdev->pm->reset_lock);

- atomic_set(&vdev->pm->reset_pending, 0);

- ivpu_dbg(vdev, PM, "Post-reset done.\n");

- pm_runtime_mark_last_busy(vdev->drm.dev);

- pm_runtime_put_autosuspend(vdev->drm.dev);

- pm_runtime_set_active(dev);

- ivpu_err_ratelimited(vdev, "Filed to enable DCT: %d\n", ret);

- ivpu_err_ratelimited(vdev, "Filed to disable DCT: %d\n", ret);

diff --git a/drivers/accel/ivpu/ivpu_sysfs.c b/drivers/accel/ivpu/ivpu_sysfs.c
index 913669f1786e..616477fc17fa 100644
--- a/drivers/accel/ivpu/ivpu_sysfs.c
+++ b/drivers/accel/ivpu/ivpu_sysfs.c

diff --git a/drivers/accel/ivpu/ivpu_trace.h b/drivers/accel/ivpu/ivpu_trace.h
new file mode 100644
index 000000000000..eb792038e701
--- /dev/null
+++ b/drivers/accel/ivpu/ivpu_trace.h

diff --git a/drivers/accel/ivpu/ivpu_trace_points.c b/drivers/accel/ivpu/ivpu_trace_points.c
new file mode 100644
index 000000000000..f8fb99de0de3
--- /dev/null
+++ b/drivers/accel/ivpu/ivpu_trace_points.c

diff --git a/drivers/accel/ivpu/vpu_boot_api.h b/drivers/accel/ivpu/vpu_boot_api.h
index 82954b91b748..908e68ea1c39 100644
--- a/drivers/accel/ivpu/vpu_boot_api.h
+++ b/drivers/accel/ivpu/vpu_boot_api.h

- * =========== FW API version information beginning ================

- * The bellow values will be used to construct the version info this way:

-#define VPU_BOOT_API_VER_MINOR 24

-#define VPU_BOOT_API_VER_PATCH 0

-/* ------------ FW API version information end ---------------------*/

-#define VPU_TRACE_PROC_BIT_KMB_FIRST VPU_TRACE_PROC_BIT_30XX_FIRST

-#define VPU_TRACE_PROC_BIT_KMB_LAST VPU_TRACE_PROC_BIT_30XX_LAST

- /** DVFS Mode: Default: 0, Max Performance: 1, On Demand: 2, Power Save: 3 */

- * E.g the number of microseconds since 1st of January 1970, or whatever date the

- * host operating system uses to maintain system time.

- * Magic numbers set between host and vpu to detect corruptio of tracing init

- u32 pad_to_cache_line_size_0[14];

diff --git a/drivers/accel/ivpu/vpu_jsm_api.h b/drivers/accel/ivpu/vpu_jsm_api.h
index 33f462b1a25d..7215c144158c 100644
--- a/drivers/accel/ivpu/vpu_jsm_api.h
+++ b/drivers/accel/ivpu/vpu_jsm_api.h

-#define VPU_JSM_API_VER_MINOR 16

- * Bands: RealTime, Focus, Normal, Idle

-#define VPU_JOB_FLAGS_NULL_SUBMISSION_MASK 0x00000001

-#define VPU_JOB_FLAGS_PRIVATE_DATA_MASK 0xFF000000

- * Sizes of the reserved areas in jobs, in bytes.

-#define VPU_JOB_RESERVED_BYTES 8

- * Sizes of the reserved areas in job queues, in bytes.

-#define VPU_JOB_QUEUE_RESERVED_BYTES 52

- u64 batch_buf_addr; /**< Address of VPU commands batch buffer */

- u32 job_id; /**< Job ID */

- u32 flags; /**< Flags bit field, see VPU_JOB_FLAGS_* above */

- u64 root_page_table_addr; /**< Address of root page table to use for this job */

- u64 root_page_table_update_counter; /**< Page tables update events counter */

- u64 primary_preempt_buf_addr;

- u32 primary_preempt_buf_size;

- u32 secondary_preempt_buf_size;

- u64 secondary_preempt_buf_addr;

- u8 reserved_0[VPU_JOB_RESERVED_BYTES];

- u8 reserved_0[VPU_JOB_QUEUE_RESERVED_BYTES];

- struct vpu_job_queue_entry job[];

- /* Incremented by VPU every time the VPU overwrites the 0th entry;

- * initialised by host to 0.

- VPU_JSM_MSG_BLOB_DEINIT = VPU_JSM_MSG_GENERAL_CMD,

-struct vpu_ipc_msg_payload_blob_deinit {

- /* 64-bit unique ID for the blob to be de-initialized. */

-struct vpu_ipc_msg_payload_blob_deinit_done {

- /* 64-bit unique ID for the blob de-initialized. */

- /* Priority band to assign to work of this context */

- * Enable extra events to be output to log for debug of scheduling algorithm.

- * Interpreted by VPU as a boolean to enable or disable, expected values are

- struct vpu_ipc_msg_payload_blob_deinit blob_deinit;

- struct vpu_ipc_msg_payload_blob_deinit_done blob_deinit_done;

diff --git a/drivers/accel/qaic/mhi_controller.c b/drivers/accel/qaic/mhi_controller.c
index ada9b1eb0787..8ab82e78dd94 100644
--- a/drivers/accel/qaic/mhi_controller.c
+++ b/drivers/accel/qaic/mhi_controller.c

diff --git a/drivers/accel/qaic/qaic_control.c b/drivers/accel/qaic/qaic_control.c
index 9e8a8cbadf6b..d8bdab69f800 100644
--- a/drivers/accel/qaic/qaic_control.c
+++ b/drivers/accel/qaic/qaic_control.c

- for_each_sgtable_sg(sgt, sg, i) {

diff --git a/drivers/accel/qaic/qaic_data.c b/drivers/accel/qaic/qaic_data.c
index e86e71c1cdd8..c20eb63750f5 100644
--- a/drivers/accel/qaic/qaic_data.c
+++ b/drivers/accel/qaic/qaic_data.c

- for (sg = sgt_in->sgl; sg; sg = sg_next(sg)) {

- for_each_sgtable_sg(sgt, sg, j) {

- for_each_sgtable_sg(slice->sgt, sg, i) {

diff --git a/drivers/accel/qaic/qaic_debugfs.c b/drivers/accel/qaic/qaic_debugfs.c
index 20b653d99e52..ba0cf2f94732 100644
--- a/drivers/accel/qaic/qaic_debugfs.c
+++ b/drivers/accel/qaic/qaic_debugfs.c

-static int bootlog_fops_open(struct inode *inode, struct file *file)

- return single_open(file, bootlog_show, inode->i_private);

-static const struct file_operations bootlog_fops = {

- .owner = THIS_MODULE,

- .open = bootlog_fops_open,

- .llseek = seq_lseek,

- .release = single_release,

-static int read_dbc_fifo_size(struct seq_file *s, void *unused)

-static int fifo_size_open(struct inode *inode, struct file *file)

- return single_open(file, read_dbc_fifo_size, inode->i_private);

-static const struct file_operations fifo_size_fops = {

- .owner = THIS_MODULE,

- .open = fifo_size_open,

- .llseek = seq_lseek,

- .release = single_release,

-static int read_dbc_queued(struct seq_file *s, void *unused)

-static int queued_open(struct inode *inode, struct file *file)

- return single_open(file, read_dbc_queued, inode->i_private);

-static const struct file_operations queued_fops = {

- .owner = THIS_MODULE,

- .open = queued_open,

- .llseek = seq_lseek,

- .release = single_release,

diff --git a/drivers/accel/qaic/qaic_drv.c b/drivers/accel/qaic/qaic_drv.c
index bf10156c334e..81819b9ef8d4 100644
--- a/drivers/accel/qaic/qaic_drv.c
+++ b/drivers/accel/qaic/qaic_drv.c

-MODULE_IMPORT_NS(DMA_BUF);

-static struct workqueue_struct *qaicm_wq_init(struct drm_device *dev, const char *fmt)

- wq = alloc_workqueue(fmt, WQ_UNBOUND, 0);

- .date = "20190618",

- if (id->device == PCI_DEV_AIC100) {

diff --git a/drivers/accel/qaic/sahara.c b/drivers/accel/qaic/sahara.c
index bf94bbab6be5..21d58aed0deb 100644
--- a/drivers/accel/qaic/sahara.c
+++ b/drivers/accel/qaic/sahara.c

- struct work_struct work;

- le32_to_cpu(context->rx->hello.mode) != SAHARA_MODE_IMAGE_TX_COMPLETE) {

+ dev_err(&context->mhi_dev->dev, "Memory dump table length %lld exceeds supported size. Discarding dump\n",

- struct sahara_context *context = container_of(work, struct sahara_context, work);

+ "Memory dump table entry %lld type: %lld address: %#llx length: %#llx description: \"%s\" filename \"%s\"\n",

- INIT_WORK(&context->work, sahara_processing);

- cancel_work_sync(&context->work);

- if (!mhi_result->transaction_status)

- schedule_work(&context->work);

diff --git a/drivers/accessibility/speakup/Makefile b/drivers/accessibility/speakup/Makefile
index 6f6a83565c0d..14ba1cca87f4 100644
--- a/drivers/accessibility/speakup/Makefile
+++ b/drivers/accessibility/speakup/Makefile

- cmd_mkmap = TOPDIR=$(srctree) \

- SPKDIR=$(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD),$(srctree)/drivers/accessibility/speakup) \

- $(obj)/makemapdata > $@

diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index d67f63d93b2a..d81b55f5068c 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig

diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index 61ca4afe83dc..40208a0f5dfb 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile

diff --git a/drivers/acpi/ac.c b/drivers/acpi/ac.c
index 7c5b040a83e8..1f69be8f51a2 100644
--- a/drivers/acpi/ac.c
+++ b/drivers/acpi/ac.c

- .remove_new = acpi_ac_remove,

diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c
index 800f97868448..49539f7528c6 100644
--- a/drivers/acpi/acpi_apd.c
+++ b/drivers/acpi/acpi_apd.c

- strcpy(clk_data->name, obj->string.pointer);

diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
index ca87a0939135..f7fb7205028d 100644
--- a/drivers/acpi/acpi_extlog.c
+++ b/drivers/acpi/acpi_extlog.c

diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c
index 42b7220d4cfd..3fde4496f8a2 100644
--- a/drivers/acpi/acpi_pad.c
+++ b/drivers/acpi/acpi_pad.c

- if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)

- cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);

- .remove_new = acpi_pad_remove,

diff --git a/drivers/acpi/acpi_tad.c b/drivers/acpi/acpi_tad.c
index b831cb8e53dc..825c2a8acea4 100644
--- a/drivers/acpi/acpi_tad.c
+++ b/drivers/acpi/acpi_tad.c

- .remove_new = acpi_tad_remove,

diff --git a/drivers/acpi/acpi_video.c b/drivers/acpi/acpi_video.c
index 8274a17872ed..a972831dbd66 100644
--- a/drivers/acpi/acpi_video.c
+++ b/drivers/acpi/acpi_video.c

-acpi_video_device_EDID(struct acpi_video_device *device,

- union acpi_object **edid, int length)

- if (obj && obj->type == ACPI_TYPE_BUFFER)

- union acpi_object *buffer = NULL;

- acpi_status status;

- status = acpi_video_device_EDID(video_device, &buffer,

- if (ACPI_SUCCESS(status))

- *edid = buffer->buffer.pointer;

diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h
index 79bbfe00d241..b8543a34caea 100644
--- a/drivers/acpi/acpica/achware.h
+++ b/drivers/acpi/acpica/achware.h

-acpi_status acpi_hw_enable_all_wakeup_gpes(void);

diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c
index 95f78383bbdb..bff2d099f469 100644
--- a/drivers/acpi/acpica/evxfregn.c
+++ b/drivers/acpi/acpica/evxfregn.c

- acpi_os_release_mutex(handler_obj->address_space.

diff --git a/drivers/acpi/apei/einj-core.c b/drivers/acpi/apei/einj-core.c
index 5c22720f43cc..04731a5b01fa 100644
--- a/drivers/acpi/apei/einj-core.c
+++ b/drivers/acpi/apei/einj-core.c

- .remove_new = __exit_p(einj_remove),

diff --git a/drivers/acpi/apei/einj-cxl.c b/drivers/acpi/apei/einj-cxl.c
index a4e709937236..78da9ae543a2 100644
--- a/drivers/acpi/apei/einj-cxl.c
+++ b/drivers/acpi/apei/einj-cxl.c

-EXPORT_SYMBOL_NS_GPL(einj_cxl_available_error_type_show, CXL);

-EXPORT_SYMBOL_NS_GPL(einj_cxl_inject_rch_error, CXL);

-EXPORT_SYMBOL_NS_GPL(einj_cxl_inject_error, CXL);

-EXPORT_SYMBOL_NS_GPL(einj_cxl_is_initialized, CXL);

diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
index ada93cfde9ba..b72772494655 100644
--- a/drivers/acpi/apei/ghes.c
+++ b/drivers/acpi/apei/ghes.c

-static int ghes_panic_timeout __read_mostly = 30;

-EXPORT_SYMBOL_NS_GPL(cxl_cper_register_work, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_cper_unregister_work, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_cper_kfifo_get, CXL);

- /* reboot to log the error! */

- panic_timeout = ghes_panic_timeout;

- panic("Fatal hardware error!");

- .remove_new = ghes_remove,

diff --git a/drivers/acpi/arm64/agdi.c b/drivers/acpi/arm64/agdi.c
index f5f21dd0d277..e0df3daa4abf 100644
--- a/drivers/acpi/arm64/agdi.c
+++ b/drivers/acpi/arm64/agdi.c

- .remove_new = agdi_remove,

diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c
index c0e77c1c8e09..3561553eff8b 100644
--- a/drivers/acpi/arm64/gtdt.c
+++ b/drivers/acpi/arm64/gtdt.c

-static inline __init void *next_platform_timer(void *platform_timer)

- platform_timer += gh->length;

- if (platform_timer < acpi_gtdt_desc.gtdt_end)

- return platform_timer;

- for (_g = acpi_gtdt_desc.platform_timer; _g; \

- platform_timer = (void *)gtdt + gtdt->platform_timer_offset;

- if (platform_timer < (void *)table + sizeof(struct acpi_table_gtdt)) {

- acpi_gtdt_desc.platform_timer = platform_timer;

- } while (i-- >= 0 && gtdt_frame--);

- res[2] = (struct resource)DEFINE_RES_IRQ(irq);

diff --git a/drivers/acpi/arm64/init.c b/drivers/acpi/arm64/init.c
index d0c8aed90fd1..7a47d8095a7d 100644
--- a/drivers/acpi/arm64/init.c
+++ b/drivers/acpi/arm64/init.c

-void __init acpi_arm_init(void)

diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index 4c745a26226b..98759d6199d3 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c

diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 65fa3444367a..6760330a8af5 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c

- pr_info("extension unregistered: %s\n", hook->name);

- * the registration of the extension has failed,

- pr_err("extension failed to load: %s", hook->name);

- pr_info("new extension: %s\n", hook->name);

- * The notification of the extensions has failed, to

- * prevent further errors we will unload the extension.

- pr_err("error in extension, unloading: %s",

- battery->bat = power_supply_register_no_ws(&battery->device->dev,

- battery = kzalloc(sizeof(struct acpi_battery), GFP_KERNEL);

- mutex_init(&battery->lock);

- mutex_init(&battery->sysfs_lock);

- register_pm_notifier(&battery->pm_nb);

- mutex_destroy(&battery->lock);

- mutex_destroy(&battery->sysfs_lock);

- mutex_destroy(&battery->lock);

- mutex_destroy(&battery->sysfs_lock);

-#ifdef CONFIG_PM_SLEEP

-#define acpi_battery_resume NULL

-static SIMPLE_DEV_PM_OPS(acpi_battery_pm, NULL, acpi_battery_resume);

- .drv.pm = &acpi_battery_pm,

diff --git a/drivers/acpi/bgrt.c b/drivers/acpi/bgrt.c
index d1d9c9289087..35ece8e9f15d 100644
--- a/drivers/acpi/bgrt.c
+++ b/drivers/acpi/bgrt.c

-static BIN_ATTR_SIMPLE_RO(image);

-static struct bin_attribute *bgrt_bin_attributes[] = {

- .bin_attrs = bgrt_bin_attributes,

diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 16917dc3ad60..058910af82bc 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c

- acpi_riscv_init();

diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
index 51470208e6da..7773e6b860e7 100644
--- a/drivers/acpi/button.c
+++ b/drivers/acpi/button.c

diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index b73b3aa92f3f..f193e713825a 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c

-#ifndef arch_init_invariance_cppc

-static inline void arch_init_invariance_cppc(void) { }

- spin_lock_init(&cpc_ptr->rmw_lock);

- arch_init_invariance_cppc();

- if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {

- spin_lock(&cpc_desc->rmw_lock);

- spin_unlock(&cpc_desc->rmw_lock);

- mul = caps->nominal_freq - caps->lowest_freq;

- div = caps->nominal_perf - caps->lowest_perf;

- mul = caps->nominal_perf - caps->lowest_perf;

- div = caps->nominal_freq - caps->lowest_freq;

diff --git a/drivers/acpi/dptf/dptf_pch_fivr.c b/drivers/acpi/dptf/dptf_pch_fivr.c
index d202730fafd8..952216c67d58 100644
--- a/drivers/acpi/dptf/dptf_pch_fivr.c
+++ b/drivers/acpi/dptf/dptf_pch_fivr.c

- .remove_new = pch_fivr_remove,

diff --git a/drivers/acpi/dptf/dptf_power.c b/drivers/acpi/dptf/dptf_power.c
index 8023b3e23315..e8caf4106ff9 100644
--- a/drivers/acpi/dptf/dptf_power.c
+++ b/drivers/acpi/dptf/dptf_power.c

- .remove_new = dptf_power_remove,

diff --git a/drivers/acpi/dptf/int340x_thermal.c b/drivers/acpi/dptf/int340x_thermal.c
index 014ada759954..aef7aca2161d 100644
--- a/drivers/acpi/dptf/int340x_thermal.c
+++ b/drivers/acpi/dptf/int340x_thermal.c

diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 25399f6dde7e..8db09d81918f 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c

- strcpy(acpi_device_name(device), ACPI_EC_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_EC_CLASS);

diff --git a/drivers/acpi/event.c b/drivers/acpi/event.c
index d199a19bb292..96a9aaaaf9f7 100644
--- a/drivers/acpi/event.c
+++ b/drivers/acpi/event.c

- strcpy(event.device_class, dev->pnp.device_class);

- strcpy(event.bus_id, dev->pnp.bus_id);

diff --git a/drivers/acpi/evged.c b/drivers/acpi/evged.c
index 11778c93254b..5c35cbc7f6ff 100644
--- a/drivers/acpi/evged.c
+++ b/drivers/acpi/evged.c

- .remove_new = ged_remove,

diff --git a/drivers/acpi/fan.h b/drivers/acpi/fan.h
index db25a3898af7..488b51e2cb31 100644
--- a/drivers/acpi/fan.h
+++ b/drivers/acpi/fan.h

diff --git a/drivers/acpi/fan_core.c b/drivers/acpi/fan_core.c
index 7cea4495f19b..10016f52f4f4 100644
--- a/drivers/acpi/fan_core.c
+++ b/drivers/acpi/fan_core.c

- .remove_new = acpi_fan_remove,

diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
index ced7dff9a5db..00910ccd7eda 100644
--- a/drivers/acpi/internal.h
+++ b/drivers/acpi/internal.h

diff --git a/drivers/acpi/mipi-disco-img.c b/drivers/acpi/mipi-disco-img.c
index 92b658f92dc0..5b85989f96be 100644
--- a/drivers/acpi/mipi-disco-img.c
+++ b/drivers/acpi/mipi-disco-img.c

- status = acpi_get_physical_device_location(handle, &pld);

- if (ACPI_SUCCESS(status)) {

diff --git a/drivers/acpi/nfit/core.c b/drivers/acpi/nfit/core.c
index 5429ec9ef06f..a5d47819b3a4 100644
--- a/drivers/acpi/nfit/core.c
+++ b/drivers/acpi/nfit/core.c

- if (cmd == ND_CMD_CALL)

diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index 1a902a02390f..bfbb08b1e6af 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c

-EXPORT_SYMBOL_NS_GPL(acpi_get_genport_coordinates, CXL);

- pr_info("Locality: Flags:%02x Type:%s Initiator Domains:%u Target Domains:%u Base:%lld\n",

- hmat_loc->flags, hmat_data_type(type), ipds, tpds,

- hmat_loc->entry_base_unit);

- pr_info(" Initiator-Target[%u-%u]:%u%s\n",

- inits[init], targs[targ], value,

- hmat_data_type_suffix(type));

- pr_info("Cache: Domain:%u Size:%llu Attrs:%08x SMBIOS Handles:%d\n",

- cache->memory_PD, cache->cache_size, attrs,

- cache->number_of_SMBIOShandles);

- pr_info("Memory (%#llx length %#llx) Flags:%04x Processor Domain:%u Memory Domain:%u\n",

- p->reserved3, p->reserved4, p->flags, p->processor_PD,

diff --git a/drivers/acpi/numa/srat.c b/drivers/acpi/numa/srat.c
index bec0dcd1f9c3..00ac0d7bb8c9 100644
--- a/drivers/acpi/numa/srat.c
+++ b/drivers/acpi/numa/srat.c

diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 70af3fbbebe5..5ff343096ece 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c

diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c
index b727db968f33..08e10b6226dc 100644
--- a/drivers/acpi/pci_link.c
+++ b/drivers/acpi/pci_link.c

- strcpy(acpi_device_name(device), ACPI_PCI_LINK_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_PCI_LINK_CLASS);

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index d0bfb3706801..d0b6a024daae 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c

- strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);

diff --git a/drivers/acpi/pfr_telemetry.c b/drivers/acpi/pfr_telemetry.c
index 998264a7333d..32bdf8cbe8f2 100644
--- a/drivers/acpi/pfr_telemetry.c
+++ b/drivers/acpi/pfr_telemetry.c

- .remove_new = acpi_pfrt_log_remove,

diff --git a/drivers/acpi/pfr_update.c b/drivers/acpi/pfr_update.c
index 8b2910995fc1..031d1ba81b86 100644
--- a/drivers/acpi/pfr_update.c
+++ b/drivers/acpi/pfr_update.c

- .remove_new = acpi_pfru_remove,

diff --git a/drivers/acpi/platform_profile.c b/drivers/acpi/platform_profile.c
index d2f7fd7743a1..fc92e43d0fe9 100644
--- a/drivers/acpi/platform_profile.c
+++ b/drivers/acpi/platform_profile.c

-static struct platform_profile_handler *cur_profile;

-static ssize_t platform_profile_choices_show(struct device *dev,

- struct device_attribute *attr,

- err = mutex_lock_interruptible(&profile_lock);

- if (!cur_profile) {

- mutex_unlock(&profile_lock);

- for_each_set_bit(i, cur_profile->choices, PLATFORM_PROFILE_LAST) {

- mutex_unlock(&profile_lock);

-static ssize_t platform_profile_show(struct device *dev,

- struct device_attribute *attr,

- enum platform_profile_option profile = PLATFORM_PROFILE_BALANCED;

- err = mutex_lock_interruptible(&profile_lock);

- if (!cur_profile) {

- mutex_unlock(&profile_lock);

- err = cur_profile->profile_get(cur_profile, &profile);

- mutex_unlock(&profile_lock);

- /* Check that profile is valid index */

- if (WARN_ON((profile < 0) || (profile >= ARRAY_SIZE(profile_names))))

- return sysfs_emit(buf, "%s\n", profile_names[profile]);

-static ssize_t platform_profile_store(struct device *dev,

- struct device_attribute *attr,

- const char *buf, size_t count)

- err = mutex_lock_interruptible(&profile_lock);

- if (!cur_profile) {

- mutex_unlock(&profile_lock);

- /* Check that platform supports this profile choice */

- if (!test_bit(i, cur_profile->choices)) {

- mutex_unlock(&profile_lock);

- return -EOPNOTSUPP;

- err = cur_profile->profile_set(cur_profile, i);

- sysfs_notify(acpi_kobj, NULL, "platform_profile");

- mutex_unlock(&profile_lock);

- .attrs = platform_profile_attrs

-void platform_profile_notify(void)

- enum platform_profile_option profile;

- enum platform_profile_option next;

- err = mutex_lock_interruptible(&profile_lock);

- if (!cur_profile) {

- mutex_unlock(&profile_lock);

- err = cur_profile->profile_get(cur_profile, &profile);

- mutex_unlock(&profile_lock);

- next = find_next_bit_wrap(cur_profile->choices, PLATFORM_PROFILE_LAST,

- if (WARN_ON(next == PLATFORM_PROFILE_LAST)) {

- mutex_unlock(&profile_lock);

- err = cur_profile->profile_set(cur_profile, next);

- mutex_unlock(&profile_lock);

- sysfs_notify(acpi_kobj, NULL, "platform_profile");

-int platform_profile_register(struct platform_profile_handler *pprof)

- mutex_lock(&profile_lock);

- /* We can only have one active profile */

- if (cur_profile) {

- mutex_unlock(&profile_lock);

- /* Sanity check the profile handler field are set */

- if (!pprof || bitmap_empty(pprof->choices, PLATFORM_PROFILE_LAST) ||

- !pprof->profile_set || !pprof->profile_get) {

- mutex_unlock(&profile_lock);

- err = sysfs_create_group(acpi_kobj, &platform_profile_group);

- mutex_unlock(&profile_lock);

- cur_profile = pprof;

- mutex_unlock(&profile_lock);

-int platform_profile_remove(void)

- sysfs_remove_group(acpi_kobj, &platform_profile_group);

- mutex_lock(&profile_lock);

- cur_profile = NULL;

- mutex_unlock(&profile_lock);

diff --git a/drivers/acpi/power.c b/drivers/acpi/power.c
index c2c70139c4f1..25174c24d3d7 100644
--- a/drivers/acpi/power.c
+++ b/drivers/acpi/power.c

- strcpy(acpi_device_name(device), ACPI_POWER_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_POWER_CLASS);

diff --git a/drivers/acpi/prmt.c b/drivers/acpi/prmt.c
index 1cfaa5957ac4..e549914a636c 100644
--- a/drivers/acpi/prmt.c
+++ b/drivers/acpi/prmt.c

-static u64 efi_pa_va_lookup(u64 pa)

- if (md->phys_addr < pa && pa < md->phys_addr + PAGE_SIZE * md->num_pages)

- th->handler_addr = (void *)efi_pa_va_lookup(handler_info->handler_address);

- th->static_data_buffer_addr = efi_pa_va_lookup(handler_info->static_data_buffer_address);

- th->acpi_param_buffer_addr = efi_pa_va_lookup(handler_info->acpi_param_buffer_address);

diff --git a/drivers/acpi/processor_driver.c b/drivers/acpi/processor_driver.c
index cb52dd000b95..3b281bc1e73c 100644
--- a/drivers/acpi/processor_driver.c
+++ b/drivers/acpi/processor_driver.c

diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 831fa4a12159..698897b29de2 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c

-static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)

- /* Never reached */

- if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 ||

- cx->type == ACPI_STATE_C3) {

- state->enter_dead = acpi_idle_play_dead;

- if (cx->type != ACPI_STATE_C3)

- drv->safe_state_index = count;

diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 4265814c74f8..53996f1a2d80 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c

-static DEFINE_MUTEX(performance_mutex);

-static void amd_fixup_frequency(struct acpi_processor_px *px, int i) {};

diff --git a/drivers/acpi/property.c b/drivers/acpi/property.c
index 80a52a4e66dd..436019d96027 100644
--- a/drivers/acpi/property.c
+++ b/drivers/acpi/property.c

- ret = acpi_copy_property_array_string(

- items, (char **)val,

- min_t(u32, nval, obj->package.count));

diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c
index 3d74ebe9dbd8..b4cd14e7fa76 100644
--- a/drivers/acpi/resource.c
+++ b/drivers/acpi/resource.c

- if (addr->info.mem.caching == ACPI_PREFETCHABLE_MEMORY)

- res->flags |= IORESOURCE_PREFETCH;

- /* Asus Vivobook X1704VAP */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "X1704VAP"),

- /* Asus ExpertBook B1402CBA */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "B1402CBA"),

- /* Asus ExpertBook B1402CVA */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "B1402CVA"),

- /* Asus ExpertBook B1502CBA */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "B1502CBA"),

- /* Asus ExpertBook B1502CGA */

- DMI_MATCH(DMI_BOARD_NAME, "B1502CGA"),

- /* Asus ExpertBook B1502CVA */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "B1502CVA"),

- /* Asus ExpertBook B2402CBA */

- DMI_MATCH(DMI_BOARD_NAME, "B2402CBA"),

- /* Asus ExpertBook B2402FBA */

- DMI_MATCH(DMI_BOARD_NAME, "B2402FBA"),

- /* Asus ExpertBook B2502 */

- DMI_MATCH(DMI_BOARD_NAME, "B2502CBA"),

- /* Asus ExpertBook B2502FBA */

- DMI_MATCH(DMI_BOARD_NAME, "B2502FBA"),

- /* Asus ExpertBook B2502CVA */

- DMI_MATCH(DMI_BOARD_NAME, "B2502CVA"),

- /* Asus Vivobook Pro N6506MV */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "N6506MV"),

- /* Asus Vivobook Pro N6506MU */

- DMI_MATCH(DMI_BOARD_NAME, "N6506MU"),

- /* Asus Vivobook Pro N6506MJ */

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_BOARD_NAME, "N6506MJ"),

- /* LG Electronics 17U70P */

- DMI_MATCH(DMI_BOARD_NAME, "17U70P"),

- if (dmi_check_system(entry->system) &&

- entry->irq == gsi &&

- entry->shareable == shareable)

diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c
index 5ef97905a727..673e4d5dd752 100644
--- a/drivers/acpi/riscv/init.c
+++ b/drivers/acpi/riscv/init.c

-void __init acpi_riscv_init(void)

diff --git a/drivers/acpi/sbs.c b/drivers/acpi/sbs.c
index 7a0914055fca..a3f95a3fffde 100644
--- a/drivers/acpi/sbs.c
+++ b/drivers/acpi/sbs.c

- strcpy(acpi_device_name(device), ACPI_SBS_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_SBS_CLASS);

diff --git a/drivers/acpi/sbshc.c b/drivers/acpi/sbshc.c
index 16f2daaa2c45..1a2bf520be23 100644
--- a/drivers/acpi/sbshc.c
+++ b/drivers/acpi/sbshc.c

-typedef int (*acpi_ec_query_func) (void *data);

-extern int acpi_ec_add_query_handler(struct acpi_ec *ec, u8 query_bit,

- acpi_handle handle, acpi_ec_query_func func,

- strcpy(acpi_device_name(device), ACPI_SMB_HC_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_SMB_HC_CLASS);

-extern void acpi_ec_remove_query_handler(struct acpi_ec *ec, u8 query_bit);

diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
index 7ecc401fb97f..9f4efa8f75a6 100644
--- a/drivers/acpi/scan.c
+++ b/drivers/acpi/scan.c

- acpi_status status;

- status = acpi_get_physical_device_location(adev->handle, &pld);

- if (ACPI_FAILURE(status))

- strcpy(device->pnp.bus_id, "ACPI");

- strcpy(device->pnp.bus_id, "PWRF");

- strcpy(device->pnp.bus_id, "SLPF");

- strcpy(device->pnp.bus_id, "ECDT");

- strcpy(device->pnp.bus_id, bus_id);

- strcpy(pnp->device_name, ACPI_BUS_DEVICE_NAME);

- strcpy(pnp->device_class, ACPI_BUS_CLASS);

diff --git a/drivers/acpi/sysfs.c b/drivers/acpi/sysfs.c
index 687524b50085..a48ebbf768f9 100644
--- a/drivers/acpi/sysfs.c
+++ b/drivers/acpi/sysfs.c

- struct bin_attribute *bin_attr, char *buf,

- table_attr->attr.read = acpi_table_show;

- struct bin_attribute *bin_attr, char *buf,

- data_attr->attr.read = acpi_data_show;

diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c
index 9e1b01c35070..2295abbecd14 100644
--- a/drivers/acpi/tables.c
+++ b/drivers/acpi/tables.c

- (p->lapic_flags & ACPI_MADT_ENABLED) ? "enabled" : "disabled");

- (p->flags & ACPI_MADT_ENABLED) ? "enabled" : "disabled");

diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c
index 78db38c7076e..95982c098d5b 100644
--- a/drivers/acpi/thermal.c
+++ b/drivers/acpi/thermal.c

- strcpy(tz->name, device->pnp.bus_id);

- strcpy(acpi_device_name(device), ACPI_THERMAL_DEVICE_NAME);

- strcpy(acpi_device_class(device), ACPI_THERMAL_CLASS);

-MODULE_IMPORT_NS(ACPI_THERMAL);

diff --git a/drivers/acpi/thermal_lib.c b/drivers/acpi/thermal_lib.c
index 6214d6ebe1fa..f81591927e86 100644
--- a/drivers/acpi/thermal_lib.c
+++ b/drivers/acpi/thermal_lib.c

-EXPORT_SYMBOL_NS_GPL(acpi_active_trip_temp, ACPI_THERMAL);

-EXPORT_SYMBOL_NS_GPL(acpi_passive_trip_temp, ACPI_THERMAL);

-EXPORT_SYMBOL_NS_GPL(acpi_hot_trip_temp, ACPI_THERMAL);

-EXPORT_SYMBOL_NS_GPL(acpi_critical_trip_temp, ACPI_THERMAL);

diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c
index 6de542d99518..526563a0d188 100644
--- a/drivers/acpi/utils.c
+++ b/drivers/acpi/utils.c

diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c
index 015bd8e66c1c..d507d5e08435 100644
--- a/drivers/acpi/video_detect.c
+++ b/drivers/acpi/video_detect.c

diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
index 6af546b21574..068c1612660b 100644
--- a/drivers/acpi/x86/utils.c
+++ b/drivers/acpi/x86/utils.c

- /* Lenovo Yoga Book X90F/L */

- DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),

- DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),

- DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"),

- ACPI_QUIRK_UART1_SKIP |

- DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),

- DMI_MATCH(DMI_PRODUCT_NAME, "TF103C"),

- ret = acpi_dev_uid_to_integer(adev, &uid);

- dmi_id = dmi_first_match(acpi_quirk_skip_dmi_ids);

- quirks = (unsigned long)dmi_id->driver_data;

- if (!dev_is_platform(controller_parent)) {

- if (acpi_dev_hid_match(adev, "DELL0501")) {

diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index 0230c43377c1..8ef259b4d037 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c

diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 978740537a1a..76052006bd87 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c

- * @fd: fd to close

- char *secctx = NULL;

- u32 secctx_sz = 0;

- ret = security_secid_to_secctx(secid, &secctx, &secctx_sz);

- added_size = ALIGN(secctx_sz, sizeof(u64));

- ALIGN(secctx_sz, sizeof(u64));

- secctx, secctx_sz);

- security_release_secctx(secctx, secctx_sz);

- ALIGN(secctx_sz, sizeof(u64));

- security_release_secctx(secctx, secctx_sz);

- "%d:%d transaction %s to %d:%d failed %d/%d/%d, size %lld-%lld line %d\n",

- (u64)tr->data_size, (u64)tr->offsets_size,

- if (ref->freeze || !ref->node->proc) {

- binder_user_error("%d:%d invalid BC_REQUEST_FREEZE_NOTIFICATION %s\n",

- proc->pid, thread->pid,

- ref->freeze ? "already set" : "dead node");

- binder_inner_proc_lock(ref->node->proc);

- is_frozen = ref->node->proc->is_frozen;

- binder_inner_proc_unlock(ref->node->proc);

- freeze->is_frozen = is_frozen;

- binder_inner_proc_lock(proc);

- binder_enqueue_work_ilocked(&ref->freeze->work, &proc->todo);

- binder_wakeup_proc_ilocked(proc);

- binder_inner_proc_unlock(proc);

- proc->alloc.buffer - buffer->user_data);

diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c
index b3acbc4174fb..fcfaf1b899c8 100644
--- a/drivers/android/binder_alloc.c
+++ b/drivers/android/binder_alloc.c

- return alloc->buffer + alloc->buffer_size - buffer->user_data;

- spin_lock(&alloc->lock);

- spin_unlock(&alloc->lock);

-binder_set_installed_page(struct binder_lru_page *lru_page,

- smp_store_release(&lru_page->page_ptr, page);

-binder_get_installed_page(struct binder_lru_page *lru_page)

- return smp_load_acquire(&lru_page->page_ptr);

- struct binder_lru_page *page;

- index = (page_addr - alloc->buffer) / PAGE_SIZE;

- page = &alloc->pages[index];

- if (!binder_get_installed_page(page))

- ret = list_lru_add_obj(&binder_freelist, &page->lru);

-static int binder_install_single_page(struct binder_alloc *alloc,

- struct binder_lru_page *lru_page,

- unsigned long addr)

- struct page *page;

- if (!mmget_not_zero(alloc->mm))

- * Protected with mmap_sem in write mode as multiple tasks

- * might race to install the same page.

- mmap_write_lock(alloc->mm);

- if (binder_get_installed_page(lru_page))

- if (!alloc->vma) {

- pr_err("%d: %s failed, no vma\n", alloc->pid, __func__);

- pr_err("%d: failed to allocate page\n", alloc->pid);

- ret = vm_insert_page(alloc->vma, addr, page);

- alloc->pid, __func__, addr - alloc->buffer, ret);

- __free_page(page);

- /* Mark page installation complete and safe to use */

- binder_set_installed_page(lru_page, page);

- mmap_write_unlock(alloc->mm);

- struct binder_lru_page *page;

- index = (page_addr - alloc->buffer) / PAGE_SIZE;

- page = &alloc->pages[index];

- if (binder_get_installed_page(page))

- ret = binder_install_single_page(alloc, page, page_addr);

- struct binder_lru_page *page;

- index = (page_addr - alloc->buffer) / PAGE_SIZE;

- page = &alloc->pages[index];

- if (page->page_ptr) {

- on_lru = list_lru_del_obj(&binder_freelist, &page->lru);

-static inline void binder_alloc_set_vma(struct binder_alloc *alloc,

- struct vm_area_struct *vma)

- /* pairs with smp_load_acquire in binder_alloc_get_vma() */

- smp_store_release(&alloc->vma, vma);

-static inline struct vm_area_struct *binder_alloc_get_vma(

- struct binder_alloc *alloc)

- /* pairs with smp_store_release in binder_alloc_set_vma() */

- return smp_load_acquire(&alloc->vma);

- if (!binder_alloc_get_vma(alloc)) {

- spin_lock(&alloc->lock);

- spin_unlock(&alloc->lock);

- BUG_ON(buffer->user_data < alloc->buffer);

- BUG_ON(buffer->user_data > alloc->buffer + alloc->buffer_size);

- (buffer->user_data - alloc->buffer);

- struct binder_lru_page *lru_page;

- lru_page = &alloc->pages[index];

- return lru_page->page_ptr;

- * increase contention for the alloc->lock if clear_on_free

- * is used frequently for large buffers. This lock is not

- spin_lock(&alloc->lock);

- spin_unlock(&alloc->lock);

- alloc->buffer = vma->vm_start;

- if (alloc->pages == NULL) {

- for (i = 0; i < alloc->buffer_size / PAGE_SIZE; i++) {

- alloc->pages[i].alloc = alloc;

- INIT_LIST_HEAD(&alloc->pages[i].lru);

- buffer->user_data = alloc->buffer;

- binder_alloc_set_vma(alloc, vma);

- alloc->buffer = 0;

- spin_lock(&alloc->lock);

- BUG_ON(alloc->vma);

- if (!alloc->pages[i].page_ptr)

- on_lru = list_lru_del_obj(&binder_freelist,

- &alloc->pages[i].lru);

- __free_page(alloc->pages[i].page_ptr);

- spin_unlock(&alloc->lock);

- spin_lock(&alloc->lock);

- buffer->user_data - alloc->buffer,

- spin_unlock(&alloc->lock);

- struct binder_lru_page *page;

- spin_lock(&alloc->lock);

- if (binder_alloc_get_vma(alloc) != NULL) {

- page = &alloc->pages[i];

- if (!page->page_ptr)

- else if (list_empty(&page->lru))

- spin_unlock(&alloc->lock);

- spin_lock(&alloc->lock);

- spin_unlock(&alloc->lock);

- * Clears alloc->vma to prevent new incoming transactions from

- binder_alloc_set_vma(alloc, NULL);

- * @lock: lock protecting the item

- struct binder_lru_page *page = container_of(item, typeof(*page), lru);

- struct binder_alloc *alloc = page->alloc;

- if (!mmap_read_trylock(mm))

- goto err_mmap_read_lock_failed;

- if (!spin_trylock(&alloc->lock))

- goto err_get_alloc_lock_failed;

- if (!page->page_ptr)

- goto err_page_already_freed;

- index = page - alloc->pages;

- page_addr = alloc->buffer + index * PAGE_SIZE;

- vma = vma_lookup(mm, page_addr);

- if (vma && vma != binder_alloc_get_vma(alloc))

- page_to_free = page->page_ptr;

- page->page_ptr = NULL;

- spin_unlock(&alloc->lock);

- spin_unlock(lock);

- mmap_read_unlock(mm);

- __free_page(page_to_free);

-err_page_already_freed:

- spin_unlock(&alloc->lock);

-err_get_alloc_lock_failed:

- mmap_read_unlock(mm);

- spin_lock_init(&alloc->lock);

diff --git a/drivers/android/binder_alloc.h b/drivers/android/binder_alloc.h
index 70387234477e..feecd7414241 100644
--- a/drivers/android/binder_alloc.h
+++ b/drivers/android/binder_alloc.h

-#include <linux/spinlock.h>

- * struct binder_lru_page - page object used for binder shrinker

- * @page_ptr: pointer to physical page in mmap'd space

- * @lru: entry in binder_freelist

- * @alloc: binder_alloc for a proc

-struct binder_lru_page {

- struct page *page_ptr;

- * @lock: protects binder_alloc fields

- * @vma: vm_area_struct passed to mmap_handler

- * (invariant after mmap)

- * @buffer: base of per-proc address space mapped via mmap

- * @pages: array of binder_lru_page

- struct vm_area_struct *vma;

- unsigned long buffer;

- struct binder_lru_page *pages;

- spinlock_t *lock, void *cb_arg);

- spin_lock(&alloc->lock);

- spin_unlock(&alloc->lock);

diff --git a/drivers/android/binder_alloc_selftest.c b/drivers/android/binder_alloc_selftest.c
index 81442fe20a69..c88735c54848 100644
--- a/drivers/android/binder_alloc_selftest.c
+++ b/drivers/android/binder_alloc_selftest.c

- page_index = (page_addr - alloc->buffer) / PAGE_SIZE;

- if (!alloc->pages[page_index].page_ptr ||

- !list_empty(&alloc->pages[page_index].lru)) {

- alloc->pages[page_index].page_ptr ?

- if (list_empty(&alloc->pages[i].lru)) {

- alloc->pages[i].page_ptr ? "alloc" : "free", i);

- if (alloc->pages[i].page_ptr) {

- list_empty(&alloc->pages[i].lru) ?

- if (!binder_selftest_run || !alloc->vma)

diff --git a/drivers/android/binder_internal.h b/drivers/android/binder_internal.h
index f8d6be682f23..e4eb8357989c 100644
--- a/drivers/android/binder_internal.h
+++ b/drivers/android/binder_internal.h

- * @hlist: list of binder devices (only used for devices requested via

- * CONFIG_ANDROID_BINDER_DEVICES)

diff --git a/drivers/android/binder_trace.h b/drivers/android/binder_trace.h
index fe38c6fc65d0..16de1b9e72f7 100644
--- a/drivers/android/binder_trace.h
+++ b/drivers/android/binder_trace.h

- __entry->offset = start - alloc->buffer;

diff --git a/drivers/android/binderfs.c b/drivers/android/binderfs.c
index ad1fa7abc323..bc6bae76ccaf 100644
--- a/drivers/android/binderfs.c
+++ b/drivers/android/binderfs.c

diff --git a/drivers/ata/acard-ahci.c b/drivers/ata/acard-ahci.c
index 547f56341705..3999305b5356 100644
--- a/drivers/ata/acard-ahci.c
+++ b/drivers/ata/acard-ahci.c

- rc = pcim_iomap_regions_request_all(pdev, 1 << AHCI_PCI_BAR, DRV_NAME);

- hpriv->mmio = pcim_iomap_table(pdev)[AHCI_PCI_BAR];

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 45f63b09828a..f813dbdc2346 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c

- * of multipe MSIs is negated and use single MSI mode instead.

- rc = pcim_iomap_regions_request_all(pdev, 1 << ahci_pci_bar, DRV_NAME);

- hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar];

- pci_intx(pdev, 1);

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 8f40f75ba08c..8e895ae45c86 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h

- u32 mask_port_map; /* mask out particular bits */

- .tag_alloc_policy = BLK_TAG_ALLOC_RR, \

- .device_configure = ata_scsi_device_configure

diff --git a/drivers/ata/ahci_brcm.c b/drivers/ata/ahci_brcm.c
index 2f16524c2526..29be74fedcf0 100644
--- a/drivers/ata/ahci_brcm.c
+++ b/drivers/ata/ahci_brcm.c

- .remove_new = brcm_ahci_remove,

diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index 11a2c199a7c2..2d6a08c23d6a 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_da850.c b/drivers/ata/ahci_da850.c
index 55a6627d5450..ca0924dc5bd2 100644
--- a/drivers/ata/ahci_da850.c
+++ b/drivers/ata/ahci_da850.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_dm816.c b/drivers/ata/ahci_dm816.c
index 4cb70064fb99..b08547b877a1 100644
--- a/drivers/ata/ahci_dm816.c
+++ b/drivers/ata/ahci_dm816.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_dwc.c b/drivers/ata/ahci_dwc.c
index ed263de3fd70..aec6d793f51a 100644
--- a/drivers/ata/ahci_dwc.c
+++ b/drivers/ata/ahci_dwc.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index 6f955e9105e8..f01f08048f97 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c

- * set PHY Paremeters, two steps to configure the GPR13,

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_mtk.c b/drivers/ata/ahci_mtk.c
index adc851cd5578..7295b9066ae2 100644
--- a/drivers/ata/ahci_mtk.c
+++ b/drivers/ata/ahci_mtk.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f3187351e8a6..8744dae41612 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 81fc63f6b008..c18054333f7c 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index b1a4e57578e2..30e39885b64e 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_seattle.c b/drivers/ata/ahci_seattle.c
index 59f97aa7ac75..3f16c1678402 100644
--- a/drivers/ata/ahci_seattle.c
+++ b/drivers/ata/ahci_seattle.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_st.c b/drivers/ata/ahci_st.c
index 79a8b0aa37bf..4336c8a6e208 100644
--- a/drivers/ata/ahci_st.c
+++ b/drivers/ata/ahci_st.c

-#ifdef CONFIG_PM_SLEEP

-static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);

- .pm = &st_ahci_pm_ops,

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 58b2683954dd..5d4584570ae0 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c
index 8703c2a4658b..44584eed6374 100644
--- a/drivers/ata/ahci_tegra.c
+++ b/drivers/ata/ahci_tegra.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index 81a1d838c0fc..dfbd8c53abcb 100644
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c

- * @host: Host that recieved the irq

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index 2f57ec00ab82..e70b6c089cf1 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c

-static struct pci_device_id ata_generic[] = {

diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 093b940bc953..d441246fa357 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c

- pci_intx(pdev, 1);

diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index 7a8064520a35..53b2c7719dc5 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c

- * If no sub-node was found, we still need to set nports to

- * one in order to be able to use the

- hpriv->nports = child_nodes;

- hpriv->nports = 1;

diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c
index d36e71f475ab..b7f0bf795521 100644
--- a/drivers/ata/libata-acpi.c
+++ b/drivers/ata/libata-acpi.c

- * All ACPI bay / device realted events end up in this function. If

- /* SATA _GTF needs to be evaulated after _SDD and

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index c085dd81ebe7..63ec2f218431 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c

diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 3f0144e7dc80..3b303d4ae37a 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c

- /* Set all devices attached to the port in standby mode */

- ata_for_each_link(link, ap, HOST_FIRST) {

- ata_for_each_dev(dev, link, ENABLED)

- ata_dev_power_set_standby(dev);

diff --git a/drivers/ata/libata-sata.c b/drivers/ata/libata-sata.c
index 9c76fb1ad2ec..ba300cc0a3a3 100644
--- a/drivers/ata/libata-sata.c
+++ b/drivers/ata/libata-sata.c

- * ata_sas_device_configure - Default device_configure routine for libata

-int ata_sas_device_configure(struct scsi_device *sdev, struct queue_limits *lim,

- struct ata_port *ap)

-EXPORT_SYMBOL_GPL(ata_sas_device_configure);

diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index f915e3df57a9..2796c0da8257 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c

- * ata_scsi_slave_alloc - Early setup of SCSI device

-int ata_scsi_slave_alloc(struct scsi_device *sdev)

-EXPORT_SYMBOL_GPL(ata_scsi_slave_alloc);

- * ata_scsi_device_configure - Set SCSI device attributes

-int ata_scsi_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim)

-EXPORT_SYMBOL_GPL(ata_scsi_device_configure);

- * ata_scsi_slave_destroy - SCSI device is about to be destroyed

-void ata_scsi_slave_destroy(struct scsi_device *sdev)

-EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);

- lba |= ((u64)(cdb[1] & 0x1f)) << 16;

- lba |= ((u64)cdb[2]) << 8;

- lba |= ((u64)cdb[3]);

-struct ata_scsi_args {

- struct ata_device *dev;

- struct scsi_cmnd *cmd;

- * @args: device IDENTIFY data / SCSI command of interest.

-static void ata_scsi_rbuf_fill(struct ata_scsi_args *args,

- unsigned int (*actor)(struct ata_scsi_args *args, u8 *rbuf))

- struct scsi_cmnd *cmd = args->cmd;

- rc = actor(args, ata_scsi_rbuf);

- cmd->result = SAM_STAT_GOOD;

- * ata_scsiop_inq_std - Simulate INQUIRY command

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf)

- if (ata_id_removable(args->id))

- if (args->dev->class == ATA_DEV_ZAC) {

- if (args->dev->flags & ATA_DFLAG_CDL)

- ata_id_string(args->id, &rbuf[16], ATA_ID_PROD, 16);

- ata_id_string(args->id, &rbuf[32], ATA_ID_FW_REV + 2, 4);

- ata_id_string(args->id, &rbuf[32], ATA_ID_FW_REV, 4);

- if (ata_id_zoned_cap(args->id) || args->dev->class == ATA_DEV_ZAC)

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf)

- !(args->dev->flags & ATA_DFLAG_ZAC))

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_inq_80(struct ata_scsi_args *args, u8 *rbuf)

- ata_id_string(args->id, (unsigned char *) &rbuf[4],

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_inq_83(struct ata_scsi_args *args, u8 *rbuf)

- ata_id_string(args->id, (unsigned char *) rbuf + num,

- ata_id_string(args->id, (unsigned char *) rbuf + num, ATA_ID_PROD,

- ata_id_string(args->id, (unsigned char *) rbuf + num, ATA_ID_SERNO,

- if (ata_id_has_wwn(args->id)) {

- ata_id_string(args->id, (unsigned char *) rbuf + num,

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_inq_89(struct ata_scsi_args *args, u8 *rbuf)

- memcpy(&rbuf[60], &args->id[0], 512);

-static unsigned int ata_scsiop_inq_b0(struct ata_scsi_args *args, u8 *rbuf)

- struct ata_device *dev = args->dev;

- min_io_sectors = 1 << ata_id_log2_per_physical_sector(args->id);

- if (ata_id_has_trim(args->id)) {

-static unsigned int ata_scsiop_inq_b1(struct ata_scsi_args *args, u8 *rbuf)

- int form_factor = ata_id_form_factor(args->id);

- int media_rotation_rate = ata_id_rotation_rate(args->id);

- u8 zoned = ata_id_zoned_cap(args->id);

-static unsigned int ata_scsiop_inq_b2(struct ata_scsi_args *args, u8 *rbuf)

-static unsigned int ata_scsiop_inq_b6(struct ata_scsi_args *args, u8 *rbuf)

- if (args->dev->zac_zoned_cap & 1)

- put_unaligned_be32(args->dev->zac_zones_optimal_open, &rbuf[8]);

- put_unaligned_be32(args->dev->zac_zones_optimal_nonseq, &rbuf[12]);

- put_unaligned_be32(args->dev->zac_zones_max_open, &rbuf[16]);

-static unsigned int ata_scsiop_inq_b9(struct ata_scsi_args *args, u8 *rbuf)

- struct ata_cpr_log *cpr_log = args->dev->cpr_log;

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf)

- struct ata_device *dev = args->dev;

- u8 *scsicmd = args->cmd->cmnd, *p = rbuf;

- p += ata_msense_caching(args->id, p, page_control == 1);

- p += ata_msense_control(args->dev, p, spg, page_control == 1);

- p += ata_msense_caching(args->id, p, page_control == 1);

- p += ata_msense_control(args->dev, p, spg, page_control == 1);

- put_unaligned_be16(p - rbuf - 2, &rbuf[0]);

- rbuf[3] |= dpofua;

- rbuf[7] = sizeof(sat_blk_desc);

- memcpy(rbuf + 8, sat_blk_desc, sizeof(sat_blk_desc));

- ata_scsi_set_invalid_field(dev, args->cmd, fp, bp);

- ata_scsi_set_sense(dev, args->cmd, ILLEGAL_REQUEST, 0x39, 0x0);

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf)

- struct ata_device *dev = args->dev;

- if (args->cmd->cmnd[0] == READ_CAPACITY) {

- /* sector count, 64-bit */

- rbuf[0] = last_lba >> (8 * 7);

- rbuf[1] = last_lba >> (8 * 6);

- rbuf[2] = last_lba >> (8 * 5);

- rbuf[3] = last_lba >> (8 * 4);

- rbuf[4] = last_lba >> (8 * 3);

- rbuf[5] = last_lba >> (8 * 2);

- rbuf[6] = last_lba >> (8 * 1);

- rbuf[7] = last_lba;

- rbuf[ 8] = sector_size >> (8 * 3);

- rbuf[ 9] = sector_size >> (8 * 2);

- rbuf[10] = sector_size >> (8 * 1);

- rbuf[11] = sector_size;

- rbuf[13] = log2_per_phys;

- rbuf[14] = (lowest_aligned >> 8) & 0x3f;

- rbuf[15] = lowest_aligned;

- if (ata_id_has_trim(args->id) &&

- !(dev->quirks & ATA_QUIRK_NOTRIM)) {

- rbuf[14] |= 0x80; /* LBPME */

- if (ata_id_has_zero_after_trim(args->id) &&

- dev->quirks & ATA_QUIRK_ZERO_AFTER_TRIM) {

- ata_dev_info(dev, "Enabling discard_zeroes_data\n");

- rbuf[14] |= 0x40; /* LBPRZ */

- if (ata_id_zoned_cap(args->id) ||

- args->dev->class == ATA_DEV_ZAC)

- rbuf[12] = (1 << 4); /* RC_BASIS */

- * @args: device IDENTIFY data / SCSI command of interest.

-static unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf)

- * @args: device MAINTENANCE_IN data / SCSI command of interest.

-static unsigned int ata_scsiop_maint_in(struct ata_scsi_args *args, u8 *rbuf)

- struct ata_device *dev = args->dev;

- u8 *cdb = args->cmd->cmnd;

- unsigned int err = 0;

- struct ata_scsi_args args;

- args.id = dev->id;

- if (scsicmd[1] & 2) /* is CmdDt set? */

- ata_scsi_set_invalid_field(dev, cmd, 1, 0xff);

- else if ((scsicmd[1] & 1) == 0) /* is EVPD clear? */

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_std);

- else switch (scsicmd[2]) {

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_00);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_80);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_83);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_89);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b0);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b1);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b2);

- if (dev->flags & ATA_DFLAG_ZAC)

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b6);

- ata_scsi_set_invalid_field(dev, cmd, 2, 0xff);

- ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b9);

- ata_scsi_set_invalid_field(dev, cmd, 2, 0xff);

- ata_scsi_rbuf_fill(&args, ata_scsiop_mode_sense);

- ata_scsi_rbuf_fill(&args, ata_scsiop_read_cap);

- if ((scsicmd[1] & 0x1f) == SAI_READ_CAPACITY_16)

- ata_scsi_rbuf_fill(&args, ata_scsiop_read_cap);

- ata_scsi_set_invalid_field(dev, cmd, 1, 0xff);

- ata_scsi_rbuf_fill(&args, ata_scsiop_report_luns);

- if ((scsicmd[1] & 0x1f) == MI_REPORT_SUPPORTED_OPERATION_CODES)

- ata_scsi_rbuf_fill(&args, ata_scsiop_maint_in);

- ata_scsi_set_invalid_field(dev, cmd, 1, 0xff);

diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 67f277e1c3bf..5a46c066abc3 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c

- unsigned int offset;

- trace_ata_sff_pio_transfer_data(qc, offset, qc->sect_size);

- if (offset + qc->sect_size > PAGE_SIZE) {

- ata_pio_xfer(qc, nth_page(page, 1), 0,

- qc->sect_size - split_len);

- ata_pio_xfer(qc, page, offset, qc->sect_size);

- qc->curbytes += qc->sect_size;

- qc->cursg_ofs += qc->sect_size;

diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
index d0c6924d25b6..514d549286b5 100644
--- a/drivers/ata/pata_arasan_cf.c
+++ b/drivers/ata/pata_arasan_cf.c

- .remove_new = arasan_cf_remove,

diff --git a/drivers/ata/pata_atp867x.c b/drivers/ata/pata_atp867x.c
index aaef5924f636..308f86f9e2f0 100644
--- a/drivers/ata/pata_atp867x.c
+++ b/drivers/ata/pata_atp867x.c

-static struct pci_device_id atp867x_pci_tbl[] = {

diff --git a/drivers/ata/pata_ep93xx.c b/drivers/ata/pata_ep93xx.c
index f3f5b2b0ecc9..e8cda988feb5 100644
--- a/drivers/ata/pata_ep93xx.c
+++ b/drivers/ata/pata_ep93xx.c

- .remove_new = ep93xx_pata_remove,

diff --git a/drivers/ata/pata_falcon.c b/drivers/ata/pata_falcon.c
index 18ceefd176df..334c4eea41ec 100644
--- a/drivers/ata/pata_falcon.c
+++ b/drivers/ata/pata_falcon.c

- .remove_new = pata_falcon_remove_one,

diff --git a/drivers/ata/pata_ftide010.c b/drivers/ata/pata_ftide010.c
index 73a9a5109238..c3a8384c3e04 100644
--- a/drivers/ata/pata_ftide010.c
+++ b/drivers/ata/pata_ftide010.c

- .remove_new = pata_ftide010_remove,

diff --git a/drivers/ata/pata_gayle.c b/drivers/ata/pata_gayle.c
index 94df60ac2307..8602c3889948 100644
--- a/drivers/ata/pata_gayle.c
+++ b/drivers/ata/pata_gayle.c

- .remove_new = pata_gayle_remove_one,

- .name = "amiga-gayle-ide",

diff --git a/drivers/ata/pata_imx.c b/drivers/ata/pata_imx.c
index d0aa8fc929b4..b37682b0578f 100644
--- a/drivers/ata/pata_imx.c
+++ b/drivers/ata/pata_imx.c

- .remove_new = pata_imx_remove,

diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c
index b7ac56103c8a..9cbe2132ce59 100644
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c

- * See Intel Document 298600-004 for the timing programing rules

diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c
index 8a9ee828478f..80f6a91acf6f 100644
--- a/drivers/ata/pata_ixp4xx_cf.c
+++ b/drivers/ata/pata_ixp4xx_cf.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/pata_macio.c b/drivers/ata/pata_macio.c
index f2f36e55a1f4..fbf5f07ea357 100644
--- a/drivers/ata/pata_macio.c
+++ b/drivers/ata/pata_macio.c

-static int pata_macio_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim)

- rc = ata_scsi_device_configure(sdev, lim);

- .device_configure = pata_macio_device_configure,

- .tag_alloc_policy = BLK_TAG_ALLOC_RR,

diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 3f9258677915..210a63283f62 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c

- .remove_new = mpc52xx_ata_remove,

diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c
index 0bb9607e7348..dce24806a052 100644
--- a/drivers/ata/pata_octeon_cf.c
+++ b/drivers/ata/pata_octeon_cf.c

- /* Time after IORDY to coninue to assert the data */

diff --git a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c
index 4956f0f5b93f..178b28eff170 100644
--- a/drivers/ata/pata_of_platform.c
+++ b/drivers/ata/pata_of_platform.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c
index dca82d92b004..3d01b7000e41 100644
--- a/drivers/ata/pata_oldpiix.c
+++ b/drivers/ata/pata_oldpiix.c

- * See Intel Document 298600-004 for the timing programing rules

diff --git a/drivers/ata/pata_piccolo.c b/drivers/ata/pata_piccolo.c
index ced906bf56be..beb53bd990be 100644
--- a/drivers/ata/pata_piccolo.c
+++ b/drivers/ata/pata_piccolo.c

-static struct pci_device_id ata_tosh[] = {

diff --git a/drivers/ata/pata_platform.c b/drivers/ata/pata_platform.c
index 232c3dad7ee8..87479bc893b2 100644
--- a/drivers/ata/pata_platform.c
+++ b/drivers/ata/pata_platform.c

- .remove_new = ata_platform_remove_one,

diff --git a/drivers/ata/pata_pxa.c b/drivers/ata/pata_pxa.c
index 538bd3423d85..434f380114af 100644
--- a/drivers/ata/pata_pxa.c
+++ b/drivers/ata/pata_pxa.c

- .remove_new = pxa_ata_remove,

diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c
index 84b001097093..40ef8072c159 100644
--- a/drivers/ata/pata_radisys.c
+++ b/drivers/ata/pata_radisys.c

- * See Intel Document 298600-004 for the timing programing rules

diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c
index 0fa253ad7c93..fd81e75c9402 100644
--- a/drivers/ata/pata_rb532_cf.c
+++ b/drivers/ata/pata_rb532_cf.c

- .remove_new = rb532_pata_driver_remove,

diff --git a/drivers/ata/pata_rdc.c b/drivers/ata/pata_rdc.c
index 0a9689862f71..09792aac7f9d 100644
--- a/drivers/ata/pata_rdc.c
+++ b/drivers/ata/pata_rdc.c

- pci_intx(pdev, 1);

diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
index 52f5168e4db5..6e1dd0d9c035 100644
--- a/drivers/ata/sata_dwc_460ex.c
+++ b/drivers/ata/sata_dwc_460ex.c

- .remove_new = sata_dwc_remove,

diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 01aa05f4c3f5..87e91a937a44 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c

- .remove_new = sata_fsl_remove,

diff --git a/drivers/ata/sata_gemini.c b/drivers/ata/sata_gemini.c
index f574e3c3f5b4..530ee26b3012 100644
--- a/drivers/ata/sata_gemini.c
+++ b/drivers/ata/sata_gemini.c

-#include <linux/reset.h>

- * @sata0_reset: SATA0 reset handler

- * @sata1_reset: SATA1 reset handler

- struct reset_control *sata0_reset;

- struct reset_control *sata1_reset;

-int gemini_sata_reset_bridge(struct sata_gemini *sg,

- unsigned int bridge)

- reset_control_reset(sg->sata0_reset);

- reset_control_reset(sg->sata1_reset);

- return gemini_sata_setup_bridge(sg, bridge);

-EXPORT_SYMBOL(gemini_sata_reset_bridge);

- sg->sata0_reset = devm_reset_control_get_exclusive(dev, "sata0");

- if (IS_ERR(sg->sata0_reset)) {

- dev_err(dev, "no SATA0 reset controller\n");

- clk_disable_unprepare(sg->sata1_pclk);

- clk_disable_unprepare(sg->sata0_pclk);

- return PTR_ERR(sg->sata0_reset);

- sg->sata1_reset = devm_reset_control_get_exclusive(dev, "sata1");

- if (IS_ERR(sg->sata1_reset)) {

- dev_err(dev, "no SATA1 reset controller\n");

- clk_disable_unprepare(sg->sata1_pclk);

- clk_disable_unprepare(sg->sata0_pclk);

- return PTR_ERR(sg->sata1_reset);

- .remove_new = gemini_sata_remove,

diff --git a/drivers/ata/sata_gemini.h b/drivers/ata/sata_gemini.h
index 6f6e691d6007..b6e4a5c86e01 100644
--- a/drivers/ata/sata_gemini.h
+++ b/drivers/ata/sata_gemini.h

-int gemini_sata_reset_bridge(struct sata_gemini *sg, unsigned int bridge);

diff --git a/drivers/ata/sata_highbank.c b/drivers/ata/sata_highbank.c
index 63ef7bb073ce..c8c817c51230 100644
--- a/drivers/ata/sata_highbank.c
+++ b/drivers/ata/sata_highbank.c

- .remove_new = ata_platform_remove_one,

- .name = "highbank-ahci",

- .of_match_table = ahci_of_match,

- .pm = &ahci_highbank_pm_ops,

diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 05c905827dc5..bcbf96867f89 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c

- .tag_alloc_policy = BLK_TAG_ALLOC_RR,

- .device_configure = ata_scsi_device_configure

- .remove_new = mv_platform_remove,

diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 36d99043ef50..f36e2915ccf1 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c

-static int nv_adma_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim);

-static int nv_swncq_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim);

- .device_configure = nv_adma_device_configure,

- .tag_alloc_policy = BLK_TAG_ALLOC_RR,

- .device_configure = nv_swncq_device_configure,

- .tag_alloc_policy = BLK_TAG_ALLOC_RR,

-static int nv_adma_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim)

- rc = ata_scsi_device_configure(sdev, lim);

-static int nv_swncq_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim)

- rc = ata_scsi_device_configure(sdev, lim);

diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
index c1469d076880..22820a02d740 100644
--- a/drivers/ata/sata_rcar.c
+++ b/drivers/ata/sata_rcar.c

- .remove_new = sata_rcar_remove,

diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index 72c03cbdaff4..87f4cde6a686 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c

- .tag_alloc_policy = BLK_TAG_ALLOC_FIFO,

- .device_configure = ata_scsi_device_configure

- pci_intx(pdev, 0);

diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index ef8724986de3..b8b6d9eff3b8 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c

- pci_intx(pdev, 1);

diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c
index 60ea45926cd1..52894ff49dcb 100644
--- a/drivers/ata/sata_uli.c
+++ b/drivers/ata/sata_uli.c

- pci_intx(pdev, 1);

diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c
index d39b87537168..a53a2dfc1e17 100644
--- a/drivers/ata/sata_vsc.c
+++ b/drivers/ata/sata_vsc.c

- pci_intx(pdev, 0);

diff --git a/drivers/atm/fore200e.c b/drivers/atm/fore200e.c
index cb00f8244e41..4fea1149e003 100644
--- a/drivers/atm/fore200e.c
+++ b/drivers/atm/fore200e.c

- .remove_new = fore200e_sba_remove,

diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig
index 21545ffba065..8934e6ad5772 100644
--- a/drivers/auxdisplay/Kconfig
+++ b/drivers/auxdisplay/Kconfig

- depends on FB && I2C && INPUT

diff --git a/drivers/auxdisplay/cfag12864b.c b/drivers/auxdisplay/cfag12864b.c
index 6526aa51fb1d..e1a94ae3eb0c 100644
--- a/drivers/auxdisplay/cfag12864b.c
+++ b/drivers/auxdisplay/cfag12864b.c

-unsigned int cfag12864b_getrate(void)

- return cfag12864b_rate;

-unsigned char cfag12864b_isenabled(void)

- return cfag12864b_updating;

-EXPORT_SYMBOL_GPL(cfag12864b_getrate);

-EXPORT_SYMBOL_GPL(cfag12864b_isenabled);

diff --git a/drivers/auxdisplay/cfag12864bfb.c b/drivers/auxdisplay/cfag12864bfb.c
index 2b74dabe7e17..24baf6b2c587 100644
--- a/drivers/auxdisplay/cfag12864bfb.c
+++ b/drivers/auxdisplay/cfag12864bfb.c

- .remove_new = cfag12864bfb_remove,

diff --git a/drivers/auxdisplay/hd44780.c b/drivers/auxdisplay/hd44780.c
index 025dc6855cb2..0526f0d90a79 100644
--- a/drivers/auxdisplay/hd44780.c
+++ b/drivers/auxdisplay/hd44780.c

- .remove_new = hd44780_remove,

diff --git a/drivers/auxdisplay/ht16k33.c b/drivers/auxdisplay/ht16k33.c
index a816f9e10255..0b8ba754b343 100644
--- a/drivers/auxdisplay/ht16k33.c
+++ b/drivers/auxdisplay/ht16k33.c

- const struct of_device_id *id;

- id = i2c_of_match_device(dev->driver->of_match_table, client);

- priv->type = (uintptr_t)id->data;

-MODULE_IMPORT_NS(LINEDISP);

diff --git a/drivers/auxdisplay/img-ascii-lcd.c b/drivers/auxdisplay/img-ascii-lcd.c
index 9ba132dc6143..32e1863ef4b2 100644
--- a/drivers/auxdisplay/img-ascii-lcd.c
+++ b/drivers/auxdisplay/img-ascii-lcd.c

- * @cfg: pointer to the LCD model configuration

- const struct img_ascii_lcd_config *cfg;

-static struct img_ascii_lcd_config boston_config = {

-static struct img_ascii_lcd_config malta_config = {

-static struct img_ascii_lcd_config sead3_config = {

- .remove_new = img_ascii_lcd_remove,

-MODULE_IMPORT_NS(LINEDISP);

diff --git a/drivers/auxdisplay/lcd2s.c b/drivers/auxdisplay/lcd2s.c
index 6422be0dfe20..a28daa4ffbf7 100644
--- a/drivers/auxdisplay/lcd2s.c
+++ b/drivers/auxdisplay/lcd2s.c

diff --git a/drivers/auxdisplay/line-display.c b/drivers/auxdisplay/line-display.c
index 731ffdfafc4e..fcec77f100ce 100644
--- a/drivers/auxdisplay/line-display.c
+++ b/drivers/auxdisplay/line-display.c

-EXPORT_SYMBOL_NS_GPL(linedisp_register, LINEDISP);

-EXPORT_SYMBOL_NS_GPL(linedisp_unregister, LINEDISP);

diff --git a/drivers/auxdisplay/max6959.c b/drivers/auxdisplay/max6959.c
index 5519c014bd29..962488197b9e 100644
--- a/drivers/auxdisplay/max6959.c
+++ b/drivers/auxdisplay/max6959.c

-MODULE_IMPORT_NS(LINEDISP);

diff --git a/drivers/auxdisplay/seg-led-gpio.c b/drivers/auxdisplay/seg-led-gpio.c
index 183ab3011cbb..f10c25e6bf12 100644
--- a/drivers/auxdisplay/seg-led-gpio.c
+++ b/drivers/auxdisplay/seg-led-gpio.c

- .remove_new = seg_led_remove,

-MODULE_IMPORT_NS(LINEDISP);

diff --git a/drivers/base/arch_numa.c b/drivers/base/arch_numa.c
index e18701676426..c99f2ab105e5 100644
--- a/drivers/base/arch_numa.c
+++ b/drivers/base/arch_numa.c

diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
index 75fcb75d5515..3ebe77566788 100644
--- a/drivers/base/arch_topology.c
+++ b/drivers/base/arch_topology.c

-void topology_init_cpu_capacity_cppc(void)

diff --git a/drivers/base/auxiliary.c b/drivers/base/auxiliary.c
index 7823888af4f6..afa4df4c5a3f 100644
--- a/drivers/base/auxiliary.c
+++ b/drivers/base/auxiliary.c

- * domain- pecific structure defined by the parent device. This structure

- * auxiliary_find_device - auxiliary device iterator for locating a particular device.

- * @start: Device to begin with

- * @data: Data to pass to match function

- * @match: Callback function to check device

- * This function returns a reference to a device that is 'found'

- * for later use, as determined by the @match callback.

- * The reference returned should be released with put_device().

- * The callback should return 0 if the device doesn't match and non-zero

- * if it does. If the callback returns non-zero, this function will

- * return to the caller and not iterate over any more devices.

-struct auxiliary_device *auxiliary_find_device(struct device *start,

- device_match_t match)

- struct device *dev;

- dev = bus_find_device(&auxiliary_bus_type, start, data, match);

- return to_auxiliary_dev(dev);

-EXPORT_SYMBOL_GPL(auxiliary_find_device);

diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 657c93c38b0d..6b9e65a42cd2 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c

- void *data, int (*fn)(struct device *, void *))

- while ((dev = next_device(&i)))

- if (match(dev, data) && get_device(dev))

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 7a7609298e18..cf0d455209d7 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c

- if (!cache_leaves(cpu))

- if (of_property_read_bool(np, "cache-size"))

- if (of_property_read_bool(np, "i-cache-size"))

- if (of_property_read_bool(np, "d-cache-size"))

- struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);

- if (i == cpu || !sib_cpu_ci->info_list)

- struct cpu_cacheinfo *sib_cpu_ci =

- get_cpu_cacheinfo(sibling);

- if (sibling == cpu || !sib_cpu_ci->info_list)

-int allocate_cache_info(int cpu)

- per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),

- sizeof(struct cacheinfo), GFP_ATOMIC);

- if (cache_leaves(cpu) <= early_leaves)

diff --git a/drivers/base/class.c b/drivers/base/class.c
index cb5359235c70..2526c57d924e 100644
--- a/drivers/base/class.c
+++ b/drivers/base/class.c

- void *data, int (*fn)(struct device *, void *))

- WARN(1, "%s called for class '%s' before it was initialized",

- * @device_link: an optional device to which a "device" link should be created

-int class_compat_create_link(struct class_compat *cls, struct device *dev,

- struct device *device_link)

- error = sysfs_create_link(cls->kobj, &dev->kobj, dev_name(dev));

- * Optionally add a "device" link (typically to the parent), as a

- * class device would have one and we want to provide as much

- * backwards compatibility as possible.

- if (device_link) {

- error = sysfs_create_link(&dev->kobj, &device_link->kobj,

- sysfs_remove_link(cls->kobj, dev_name(dev));

- * @device_link: an optional device to which a "device" link was previously

-void class_compat_remove_link(struct class_compat *cls, struct device *dev,

- struct device *device_link)

- sysfs_remove_link(&dev->kobj, "device");

diff --git a/drivers/base/core.c b/drivers/base/core.c
index a4c853411a6b..5a1f05198114 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c

-#include <linux/rcupdate.h>

-static struct class devlink_class = {

- * @con: Potential consumer device.

@@ -1990,10 +1989,10 @@ static struct device *fwnode_get_next_parent_dev(const struct fwnode_handle *fwn

-static bool __fw_devlink_relax_cycles(struct device *con,

- struct device *sup_dev = NULL, *par_dev = NULL;

- sup_dev = get_dev_from_fwnode(sup_handle);

- if (sup_dev == con) {

- con->links.status == DL_DEV_NO_DRIVER) {

- if (__fw_devlink_relax_cycles(con, link->supplier)) {

- if (par_dev && __fw_devlink_relax_cycles(con, par_dev->fwnode)) {

- if (__fw_devlink_relax_cycles(con,

- if (con->fwnode == link->consumer)

- flags = fw_devlink_get_flags(link->flags);

- flags = FW_DEVLINK_FLAGS_PERMISSIVE;

- * SYNC_STATE_ONLY device links don't block probing and supports cycles.

- * So, one might expect that cycle detection isn't necessary for them.

- * However, if the device link was marked as SYNC_STATE_ONLY because

- * it's part of a cycle, then we still need to do cycle detection. This

- * is because the consumer and supplier might be part of multiple cycles

- * and we need to detect all those cycles.

- if (!device_link_flag_is_sync_state_only(flags) ||

- flags & DL_FLAG_CYCLE) {

- device_links_write_lock();

- if (__fw_devlink_relax_cycles(con, sup_handle)) {

- __fwnode_link_cycle(link);

- flags = fw_devlink_get_flags(link->flags);

- pr_debug("----- cycle: end -----\n");

- dev_info(con, "Fixed dependency cycle(s) with %pfwf\n",

- device_links_write_unlock();

- dev_err(con, "Failed to create device link (0x%x) with %s\n",

- flags, dev_name(sup_dev));

- struct device_driver *driver;

- /* Synchronize with module_remove_driver() */

- driver = READ_ONCE(dev->driver);

- add_uevent_var(env, "DRIVER=%s", driver->name);

- rcu_read_unlock();

- int (*fn)(struct device *dev, void *data))

- * device_find_child - device iterator for locating a particular device.

- * @parent: parent struct device

- * @match: Callback function to check device

- * @data: Data to pass to match function

- * This is similar to the device_for_each_child() function above, but it

- * returns a reference to a device that is 'found' for later use, as

- * determined by the @match callback.

- * The callback should return 0 if the device doesn't match and non-zero

- * if it does. If the callback returns non-zero and a reference to the

- * current device can be obtained, this function will return to the caller

- * and not iterate over any more devices.

- * NOTE: you will need to drop the reference with put_device() after use.

-struct device *device_find_child(struct device *parent, void *data,

- int (*match)(struct device *dev, void *data))

- klist_iter_init(&parent->p->klist_children, &i);

- while ((child = next_device(&i)))

- if (match(child, data) && get_device(child))

-EXPORT_SYMBOL_GPL(device_find_child);

- * device_find_child_by_name - device iterator for locating a child device.

- * @name: name of the child device

- * This is similar to the device_find_child() function above, but it

- * returns a reference to a device that has the name @name.

-struct device *device_find_child_by_name(struct device *parent,

- while ((child = next_device(&i)))

- if (sysfs_streq(dev_name(child), name) && get_device(child))

-EXPORT_SYMBOL_GPL(device_find_child_by_name);

-static int match_any(struct device *dev, void *unused)

- * device_find_any_child - device iterator for locating a child device, if any.

- * @parent: parent struct device

- * This is similar to the device_find_child() function above, but it

- * returns a reference to a child device, if any.

- * NOTE: you will need to drop the reference with put_device() after use.

-struct device *device_find_any_child(struct device *parent)

- return device_find_child(parent, NULL, match_any);

-EXPORT_SYMBOL_GPL(device_find_any_child);

- * It replaces code sequence::

- * Using this helper in your probe function is totally fine even if @err is

- * known to never be -EPROBE_DEFER.

- * of the error code, it being emitted symbolically (i.e. you get "EAGAIN"

- * instead of "-35") and the fact that the error code is returned which allows

- * more compact error paths.

- struct va_format vaf;

- va_start(args, fmt);

- case -EPROBE_DEFER:

- device_set_deferred_probe_reason(dev, &vaf);

- dev_dbg(dev, "error %pe: %pV", ERR_PTR(err), &vaf);

- * We don't print anything on -ENOMEM, there is already enough

- dev_err(dev, "error %pe: %pV", ERR_PTR(err), &vaf);

-EXPORT_SYMBOL_GPL(dev_err_probe);

- return dev->of_node == np;

- return dev_fwnode(dev) == fwnode;

- return ACPI_COMPANION(dev) == adev;

- return ACPI_HANDLE(dev) == handle;

diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index fdaa24bb641a..a7e511849875 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c

diff --git a/drivers/base/devcoredump.c b/drivers/base/devcoredump.c
index c795edad1b96..64840e5d5fcc 100644
--- a/drivers/base/devcoredump.c
+++ b/drivers/base/devcoredump.c

- struct bin_attribute *bin_attr,

-static struct bin_attribute devcd_attr_data = {

- .attr = { .name = "data", .mode = S_IRUSR | S_IWUSR, },

- .read = devcd_data_read,

- .write = devcd_data_write,

-static struct bin_attribute *devcd_dev_bin_attrs[] = {

- .bin_attrs = devcd_dev_bin_attrs,

- * In the above diagram, It looks like disabled_store() would be racing with parallely

- * is called after kfree of devcd memory after dropping its last reference with

diff --git a/drivers/base/devres.c b/drivers/base/devres.c
index 2152eec0c135..93e7779ef21e 100644
--- a/drivers/base/devres.c
+++ b/drivers/base/devres.c

- * devm_remove_action() - removes previously added custom action

-void devm_remove_action(struct device *dev, void (*action)(void *), void *data)

- WARN_ON(devres_destroy(dev, devm_action_release, devm_action_match,

-EXPORT_SYMBOL_GPL(devm_remove_action);

diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index b4eb5b89c4ee..8ab010ddf709 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c

- void *data, int (*fn)(struct device *, void *))

- while ((dev = next_device(&i)))

- if (match(dev, data) && get_device(dev))

diff --git a/drivers/base/firmware_loader/builtin/main.c b/drivers/base/firmware_loader/builtin/main.c
index a065c3150897..d36befebb1b9 100644
--- a/drivers/base/firmware_loader/builtin/main.c
+++ b/drivers/base/firmware_loader/builtin/main.c

-EXPORT_SYMBOL_NS_GPL(firmware_request_builtin, TEST_FIRMWARE);

diff --git a/drivers/base/firmware_loader/fallback_table.c b/drivers/base/firmware_loader/fallback_table.c
index 8432ab2c3b3c..c8afc501a8a4 100644
--- a/drivers/base/firmware_loader/fallback_table.c
+++ b/drivers/base/firmware_loader/fallback_table.c

-EXPORT_SYMBOL_NS_GPL(fw_fallback_config, FIRMWARE_LOADER_PRIVATE);

-static struct ctl_table firmware_config_table[] = {

-EXPORT_SYMBOL_NS_GPL(register_firmware_config_sysctl, FIRMWARE_LOADER_PRIVATE);

-EXPORT_SYMBOL_NS_GPL(unregister_firmware_config_sysctl, FIRMWARE_LOADER_PRIVATE);

diff --git a/drivers/base/firmware_loader/main.c b/drivers/base/firmware_loader/main.c
index 324a9a3c087a..cb0912ea3e62 100644
--- a/drivers/base/firmware_loader/main.c
+++ b/drivers/base/firmware_loader/main.c

- crypto_free_shash(alg);

- * @name: name of firmware file

diff --git a/drivers/base/firmware_loader/sysfs.c b/drivers/base/firmware_loader/sysfs.c
index c9c93b47d9a5..d254ceb56d84 100644
--- a/drivers/base/firmware_loader/sysfs.c
+++ b/drivers/base/firmware_loader/sysfs.c

- struct bin_attribute *bin_attr,

-static struct bin_attribute firmware_attr_data = {

- .read = firmware_data_read,

- .write = firmware_data_write,

-static struct bin_attribute *fw_dev_bin_attrs[] = {

- .bin_attrs = fw_dev_bin_attrs,

diff --git a/drivers/base/firmware_loader/sysfs.h b/drivers/base/firmware_loader/sysfs.h
index 2060add8ef81..1cabea544a40 100644
--- a/drivers/base/firmware_loader/sysfs.h
+++ b/drivers/base/firmware_loader/sysfs.h

-MODULE_IMPORT_NS(FIRMWARE_LOADER_PRIVATE);

diff --git a/drivers/base/memory.c b/drivers/base/memory.c
index 67858eeb92ed..348c5dbbfa68 100644
--- a/drivers/base/memory.c
+++ b/drivers/base/memory.c

- online_type_to_str[mhp_default_online_type]);

- mhp_default_online_type = online_type;

diff --git a/drivers/base/module.c b/drivers/base/module.c
index c4eaa1158d54..5bc71bea883a 100644
--- a/drivers/base/module.c
+++ b/drivers/base/module.c

-#include <linux/rcupdate.h>

- /* Synchronize with dev_uevent() */

- synchronize_rcu();

diff --git a/drivers/base/node.c b/drivers/base/node.c
index eb72580288e6..0ea653fa3433 100644
--- a/drivers/base/node.c
+++ b/drivers/base/node.c

- struct bin_attribute *attr, char *buf,

-static BIN_ATTR_RO(cpumap, CPUMAP_FILE_MAX_BYTES);

- struct bin_attribute *attr, char *buf,

-static BIN_ATTR_RO(cpulist, CPULIST_FILE_MAX_BYTES);

-static struct bin_attribute *node_dev_bin_attrs[] = {

- .bin_attrs = node_dev_bin_attrs

diff --git a/drivers/base/physical_location.c b/drivers/base/physical_location.c
index 951819e71b4a..5db06e825c94 100644
--- a/drivers/base/physical_location.c
+++ b/drivers/base/physical_location.c

- acpi_status status;

- status = acpi_get_physical_device_location(ACPI_HANDLE(dev), &pld);

- if (ACPI_FAILURE(status))

diff --git a/drivers/base/power/common.c b/drivers/base/power/common.c
index 8c34ae1cd8d5..781968a128ff 100644
--- a/drivers/base/power/common.c
+++ b/drivers/base/power/common.c

- pds = devm_kzalloc(dev, sizeof(*pds), GFP_KERNEL);

- pds->pd_devs = devm_kcalloc(dev, num_pds, sizeof(*pds->pd_devs),

- if (!pds->pd_devs)

- pds->pd_links = devm_kcalloc(dev, num_pds, sizeof(*pds->pd_links),

- if (!pds->pd_links)

diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 4a67e83300e1..d497d448e4b2 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c

- dev_emerg(wd->dev, "**** DPM device timeout ****\n");

- show_stack(wd->tsk, NULL, KERN_EMERG);

- panic("%s %s: unrecoverable failure\n",

- dev_driver_string(wd->dev), dev_name(wd->dev));

- timer->expires = jiffies + HZ * CONFIG_DPM_WATCHDOG_TIMEOUT;

- * status to "active", but do that only if DPM_FLAG_SMART_SUSPEND is set

- * to avoid confusing drivers that don't use it.

- else if (dev_pm_skip_suspend(dev))

- /* Match the pm_runtime_disable() in __device_suspend(). */

-static void dpm_superior_set_must_resume(struct device *dev)

- list_for_each_entry_rcu_locked(link, &dev->links.suppliers, c_node)

- if (dev->power.must_resume)

- dpm_superior_set_must_resume(dev);

diff --git a/drivers/base/power/qos.c b/drivers/base/power/qos.c
index bd77f6734f14..ff393cba7649 100644
--- a/drivers/base/power/qos.c
+++ b/drivers/base/power/qos.c

diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
index a1474fb67db9..f84018125b46 100644
--- a/drivers/base/power/sysfs.c
+++ b/drivers/base/power/sysfs.c

-#include <linux/pm_wakeup.h>

-static inline int dpm_sysfs_wakeup_change_owner(struct device *dev, kuid_t kuid,

- if (dev->power.wakeup && dev->power.wakeup->dev)

- return device_change_owner(dev->power.wakeup->dev, kuid, kgid);

diff --git a/drivers/base/power/wakeirq.c b/drivers/base/power/wakeirq.c
index 5a5a9e978e85..8aa28c08b289 100644
--- a/drivers/base/power/wakeirq.c
+++ b/drivers/base/power/wakeirq.c

diff --git a/drivers/base/property.c b/drivers/base/property.c
index 837d77e3af2b..c1392743df9c 100644
--- a/drivers/base/property.c
+++ b/drivers/base/property.c

diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
index 83acccdc1008..bdb450436cbc 100644
--- a/drivers/base/regmap/internal.h
+++ b/drivers/base/regmap/internal.h

diff --git a/drivers/base/regmap/regcache-maple.c b/drivers/base/regmap/regcache-maple.c
index 8d27d3653ea3..2319c30283a6 100644
--- a/drivers/base/regmap/regcache-maple.c
+++ b/drivers/base/regmap/regcache-maple.c

- entry = kmalloc((last - index + 1) * sizeof(unsigned long),

- map->alloc_flags);

- buf = kmalloc(val_bytes * (max - min), map->alloc_flags);

- entry = kcalloc(last - first + 1, sizeof(unsigned long), map->alloc_flags);

diff --git a/drivers/base/regmap/regcache-rbtree.c b/drivers/base/regmap/regcache-rbtree.c
index 188438186589..a9d17f316e55 100644
--- a/drivers/base/regmap/regcache-rbtree.c
+++ b/drivers/base/regmap/regcache-rbtree.c

- blk = krealloc(rbnode->block,

- blklen * map->cache_word_size,

- map->alloc_flags);

- present = krealloc(rbnode->cache_present,

- BITS_TO_LONGS(blklen) * sizeof(*present),

- map->alloc_flags);

diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index d3659ba3cc11..b1f8508c3966 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c

- map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index a750e48a26b8..0bcd81389a29 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c

- unsigned long size;

- size = chip->num_regs * sizeof(unsigned int);

- memset(data->status_buf, 0, size);

diff --git a/drivers/base/regmap/regmap-kunit.c b/drivers/base/regmap/regmap-kunit.c
index 4bf3f1e59ed7..64ea340950b6 100644
--- a/drivers/base/regmap/regmap-kunit.c
+++ b/drivers/base/regmap/regmap-kunit.c

- { .cache = REGCACHE_RBTREE, .from_reg = 0, .fast_io = true },

diff --git a/drivers/base/regmap/regmap-sdw-mbq.c b/drivers/base/regmap/regmap-sdw-mbq.c
index c99eada83780..86644bbd0710 100644
--- a/drivers/base/regmap/regmap-sdw-mbq.c
+++ b/drivers/base/regmap/regmap-sdw-mbq.c

- struct device *dev = context;

- ret = sdw_write_no_pm(slave, SDW_SDCA_MBQ_CTL(reg), (val >> 8) & 0xff);

- return sdw_write_no_pm(slave, reg, val & 0xff);

- struct device *dev = context;

- read0 = sdw_read_no_pm(slave, reg);

- read1 = sdw_read_no_pm(slave, SDW_SDCA_MBQ_CTL(reg));

- *val = (read1 << 8) | read0;

- /* MBQ-based controls are only 16-bits for now */

- if (config->val_bits != 16)

- return __regmap_init(&sdw->dev, &regmap_sdw_mbq,

- &sdw->dev, config, lock_key, lock_name);

- return __devm_regmap_init(&sdw->dev, &regmap_sdw_mbq,

- &sdw->dev, config, lock_key, lock_name);

diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 4ded93687c1f..f2843f814675 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c

- map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);

- map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);

- map->format.buf_size = DIV_ROUND_UP(config->reg_bits +

- config->val_bits + config->pad_bits, 8);

- map->reg_shift = config->pad_bits % 8;

- dev_err(map->dev, "Invalid range %d: %d < %d\n", i,

- dev_err(map->dev, "Invalid range %d: %d > %d\n", i,

- unsigned int *regs, void *val, size_t val_count)

-int regmap_multi_reg_read(struct regmap *map, unsigned int *regs, void *val,

diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c
index eb6eb25b343b..b1726a3515f6 100644
--- a/drivers/base/swnode.c
+++ b/drivers/base/swnode.c

diff --git a/drivers/base/test/Kconfig b/drivers/base/test/Kconfig
index 5c7fac80611c..2756870615cc 100644
--- a/drivers/base/test/Kconfig
+++ b/drivers/base/test/Kconfig

diff --git a/drivers/base/test/platform-device-test.c b/drivers/base/test/platform-device-test.c
index ea05b8785743..6355a2231b74 100644
--- a/drivers/base/test/platform-device-test.c
+++ b/drivers/base/test/platform-device-test.c

-kunit_test_suite(platform_device_devm_test_suite);

diff --git a/drivers/base/topology.c b/drivers/base/topology.c
index 89f98be5c5b9..b962da263eee 100644
--- a/drivers/base/topology.c
+++ b/drivers/base/topology.c

- struct bin_attribute *attr, char *buf, \

- return cpumap_print_bitmask_to_buf(buf, topology_##mask(dev->id), \

- struct bin_attribute *attr, char *buf, \

- return cpumap_print_list_to_buf(buf, topology_##mask(dev->id), \

-static BIN_ATTR_RO(thread_siblings, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(thread_siblings_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(core_cpus, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(core_cpus_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(core_siblings, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(core_siblings_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(cluster_cpus, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(cluster_cpus_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(die_cpus, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(die_cpus_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(package_cpus, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(package_cpus_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(book_siblings, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(book_siblings_list, CPULIST_FILE_MAX_BYTES);

-static BIN_ATTR_RO(drawer_siblings, CPUMAP_FILE_MAX_BYTES);

-static BIN_ATTR_RO(drawer_siblings_list, CPULIST_FILE_MAX_BYTES);

-static struct bin_attribute *bin_attrs[] = {

- .bin_attrs = bin_attrs,

diff --git a/drivers/base/trace.h b/drivers/base/trace.h
index e52b6eae060d..3b83b13a57ff 100644
--- a/drivers/base/trace.h
+++ b/drivers/base/trace.h

- __field(const char *, name)

- __entry->name = name;

- __entry->op, __entry->node, __entry->name, __entry->size)

diff --git a/drivers/bcma/host_soc.c b/drivers/bcma/host_soc.c
index 8ae0b918e740..20b1816c570b 100644
--- a/drivers/bcma/host_soc.c
+++ b/drivers/bcma/host_soc.c

- .remove_new = bcma_host_soc_remove,

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index ed209f4f2798..a97f2c40c640 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig

- If you're running a journalling file system (like reiserfs, for

diff --git a/drivers/block/amiflop.c b/drivers/block/amiflop.c
index 49ced65bef4c..9edd4468f755 100644
--- a/drivers/block/amiflop.c
+++ b/drivers/block/amiflop.c

- unit[drive].tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

diff --git a/drivers/block/aoe/aoeblk.c b/drivers/block/aoe/aoeblk.c
index 2028795ec61c..00b74a845328 100644
--- a/drivers/block/aoe/aoeblk.c
+++ b/drivers/block/aoe/aoeblk.c

- set->flags = BLK_MQ_F_SHOULD_MERGE;

diff --git a/drivers/block/aoe/aoedev.c b/drivers/block/aoe/aoedev.c
index 3523dd82d7a0..4db7f6ce8ade 100644
--- a/drivers/block/aoe/aoedev.c
+++ b/drivers/block/aoe/aoedev.c

- blk_mq_freeze_queue(d->blkq);

- blk_mq_unfreeze_queue(d->blkq);

diff --git a/drivers/block/ataflop.c b/drivers/block/ataflop.c
index 4ba98c6654be..a81ade622a01 100644
--- a/drivers/block/ataflop.c
+++ b/drivers/block/ataflop.c

- blk_mq_freeze_queue(q);

- blk_mq_unfreeze_queue(q);

- unit[i].tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

diff --git a/drivers/block/brd.c b/drivers/block/brd.c
index 2fd1ed101748..292f127cae0a 100644
--- a/drivers/block/brd.c
+++ b/drivers/block/brd.c

- list_for_each_entry(brd, &brd_devices, brd_list)

- if (brd->brd_number == i)

- brd = kzalloc(sizeof(*brd), GFP_KERNEL);

- brd->brd_number = i;

- list_add_tail(&brd->brd_list, &brd_devices);

- list_del(&brd->brd_list);

- brd_check_and_reset_par();

- brd_debugfs_dir = debugfs_create_dir("ramdisk_pages", NULL);

- for (i = 0; i < rd_nr; i++) {

- err = brd_alloc(i);

diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h
index 2a05d955e30b..e21492981f7d 100644
--- a/drivers/block/drbd/drbd_int.h
+++ b/drivers/block/drbd/drbd_int.h

-extern int conn_lowest_minor(struct drbd_connection *connection);

diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c
index 0d74d75260ef..5bbd312c3e14 100644
--- a/drivers/block/drbd/drbd_main.c
+++ b/drivers/block/drbd/drbd_main.c

-int conn_lowest_minor(struct drbd_connection *connection)

- struct drbd_peer_device *peer_device;

- int vnr = 0, minor = -1;

- peer_device = idr_get_next(&connection->peer_devices, &vnr);

- minor = device_to_minor(peer_device->device);

- rcu_read_unlock();

diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index 3affb538b989..abf0486f0d4f 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c

- tag_sets[drive].flags = BLK_MQ_F_SHOULD_MERGE;

diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index 78a7bb28defe..c05fe27a96b6 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c

- unsigned short sb_bsize = bdev_logical_block_size(backing_bdev);

-static void __loop_update_dio(struct loop_device *lo, bool dio)

- struct file *file = lo->lo_backing_file;

- struct inode *inode = file->f_mapping->host;

- struct block_device *backing_bdev = NULL;

- if (S_ISBLK(inode->i_mode))

- backing_bdev = I_BDEV(inode);

- else if (inode->i_sb->s_bdev)

- backing_bdev = inode->i_sb->s_bdev;

- use_dio = dio && (file->f_mode & FMODE_CAN_ODIRECT) &&

- (!backing_bdev || lo_bdev_can_use_dio(lo, backing_bdev));

- if (lo->use_dio == use_dio)

- /* flush dirty pages before changing direct IO */

- vfs_fsync(file, 0);

- * The flag of LO_FLAGS_DIRECT_IO is handled similarly with

- * LO_FLAGS_READ_ONLY, both are set from kernel, and losetup

- * will get updated by ioctl(LOOP_GET_STATUS)

- if (lo->lo_state == Lo_bound)

- blk_mq_freeze_queue(lo->lo_queue);

- lo->use_dio = use_dio;

- if (lo->lo_state == Lo_bound)

- blk_mq_unfreeze_queue(lo->lo_queue);

-static inline void loop_update_dio(struct loop_device *lo)

- __loop_update_dio(lo, (lo->lo_backing_file->f_flags & O_DIRECT) |

- blk_mq_freeze_queue(lo->lo_queue);

- blk_mq_unfreeze_queue(lo->lo_queue);

-static void loop_config_discard(struct loop_device *lo,

- struct queue_limits *lim)

- u32 granularity = 0, max_discard_sectors = 0;

- struct request_queue *backingq = bdev_get_queue(I_BDEV(inode));

- max_discard_sectors = backingq->limits.max_write_zeroes_sectors;

- granularity = bdev_discard_granularity(I_BDEV(inode)) ?:

- queue_physical_block_size(backingq);

- max_discard_sectors = UINT_MAX >> 9;

- granularity = sbuf.f_bsize;

- lim->max_hw_discard_sectors = max_discard_sectors;

- lim->max_write_zeroes_sectors = max_discard_sectors;

- if (max_discard_sectors)

- lim->discard_granularity = granularity;

- lim->discard_granularity = 0;

- lo->lo_flags = info->lo_flags;

-static unsigned short loop_default_blocksize(struct loop_device *lo,

-static int loop_reconfigure_limits(struct loop_device *lo, unsigned short bsize)

- struct queue_limits lim;

- lim = queue_limits_start_update(lo->lo_queue);

- lim.logical_block_size = bsize;

- lim.physical_block_size = bsize;

- lim.io_min = bsize;

- lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_ROTATIONAL);

- lim.features |= BLK_FEAT_WRITE_CACHE;

- lim.features |= BLK_FEAT_ROTATIONAL;

- loop_config_discard(lo, &lim);

- return queue_limits_commit_update(lo->lo_queue, &lim);

- lo->use_dio = lo->lo_flags & LO_FLAGS_DIRECT_IO;

- error = loop_reconfigure_limits(lo, config->block_size);

- /* reset the block size to the default */

- int prev_lo_flags;

- /* I/O need to be drained during transfer transition */

- blk_mq_freeze_queue(lo->lo_queue);

- prev_lo_flags = lo->lo_flags;

- /* Mask out flags that can't be set using LOOP_SET_STATUS. */

- lo->lo_flags &= LOOP_SET_STATUS_SETTABLE_FLAGS;

- /* For those flags, use the previous values instead */

- lo->lo_flags |= prev_lo_flags & ~LOOP_SET_STATUS_SETTABLE_FLAGS;

- /* For flags that can't be cleared, use previous values too */

- lo->lo_flags |= prev_lo_flags & ~LOOP_SET_STATUS_CLEARABLE_FLAGS;

- /* update dio if lo_offset or transfer is changed */

- __loop_update_dio(lo, lo->use_dio);

- blk_mq_unfreeze_queue(lo->lo_queue);

- if (!err && (lo->lo_flags & LO_FLAGS_PARTSCAN) &&

- !(prev_lo_flags & LO_FLAGS_PARTSCAN)) {

- int error = -ENXIO;

- if (lo->lo_state != Lo_bound)

- __loop_update_dio(lo, !!arg);

- if (lo->use_dio == !!arg)

- blk_mq_freeze_queue(lo->lo_queue);

- err = loop_reconfigure_limits(lo, arg);

- blk_mq_unfreeze_queue(lo->lo_queue);

- cmd->use_aio = lo->use_dio;

- lo->tag_set.flags = BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_STACKING |

- BLK_MQ_F_NO_SCHED_BY_DEFAULT;

diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c
index 223faa9d5ffd..95361099a2dc 100644
--- a/drivers/block/mtip32xx/mtip32xx.c
+++ b/drivers/block/mtip32xx/mtip32xx.c

- dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];

- dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;

- /* Map BAR5 to memory. */

- rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);

- dev_err(&pdev->dev, "Unable to map regions\n");

diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index b852050d8a96..7bdc7eb808ea 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c

-static int __nbd_set_size(struct nbd_device *nbd, loff_t bytesize,

- error = queue_limits_commit_update(nbd->disk->queue, &lim);

-static int nbd_set_size(struct nbd_device *nbd, loff_t bytesize,

- blk_mq_freeze_queue(nbd->disk->queue);

- error = __nbd_set_size(nbd, bytesize, blksize);

- blk_mq_unfreeze_queue(nbd->disk->queue);

- nsock->pending = req;

- nsock->sent = sent;

- /* We've already sent the header, we

- * have no choice but to set pending and

- nsock->pending = req;

- nsock->sent = sent;

- set_bit(NBD_CMD_REQUEUED, &cmd->flags);

- return BLK_STS_RESOURCE;

- blk_mq_freeze_queue(nbd->disk->queue);

- blk_mq_unfreeze_queue(nbd->disk->queue);

- nbd->tag_set.flags = BLK_MQ_F_SHOULD_MERGE |

- BLK_MQ_F_BLOCKING;

diff --git a/drivers/block/null_blk/main.c b/drivers/block/null_blk/main.c
index 2f0431e42c49..d94ef37480bd 100644
--- a/drivers/block/null_blk/main.c
+++ b/drivers/block/null_blk/main.c

MODULE_PARM_DESC(zone_full, "Initialize the sequential write required zones of a zoned device to be full. Default: false");

- "zone_size,zone_append_max_sectors,zone_full\n");

- WARN_ON(!t_page || t_page->page->index != idx);

- pos = t_pages[i]->page->index;

- WARN_ON(t_page && t_page->page->index != idx);

- t_page->page->index = idx;

- idx = c_page->page->index;

- nullb->cache_flush_pos = c_pages[i]->page->index;

-static void null_queue_rqs(struct request **rqlist)

- struct request *requeue_list = NULL;

- struct request **requeue_lastp = &requeue_list;

- rq_list_add_tail(&requeue_lastp, rq);

- } while (!rq_list_empty(*rqlist));

- tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

- tag_set.flags |= BLK_MQ_F_NO_SCHED;

- nullb->tag_set->flags = BLK_MQ_F_SHOULD_MERGE;

- nullb->tag_set->flags |= BLK_MQ_F_NO_SCHED;

diff --git a/drivers/block/null_blk/null_blk.h b/drivers/block/null_blk/null_blk.h
index a7bb32f73ec3..6f9fe6171087 100644
--- a/drivers/block/null_blk/null_blk.h
+++ b/drivers/block/null_blk/null_blk.h

diff --git a/drivers/block/null_blk/zoned.c b/drivers/block/null_blk/zoned.c
index 9bc768b2ca56..0d5f9bf95229 100644
--- a/drivers/block/null_blk/zoned.c
+++ b/drivers/block/null_blk/zoned.c

- lim->max_zone_append_sectors = dev->zone_append_max_sectors;

diff --git a/drivers/block/ps3disk.c b/drivers/block/ps3disk.c
index ff45ed766469..dc9e4a14b885 100644
--- a/drivers/block/ps3disk.c
+++ b/drivers/block/ps3disk.c

- .max_hw_sectors = dev->bounce_size >> 9,

- .max_segment_size = dev->bounce_size,

- error = blk_mq_alloc_sq_tag_set(&priv->tag_set, &ps3disk_mq_ops, 1,

- BLK_MQ_F_SHOULD_MERGE);

diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c
index 9c8b19a22c2a..faafd7ff43d6 100644
--- a/drivers/block/rbd.c
+++ b/drivers/block/rbd.c

- rbd_dev->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

- blk_mq_freeze_queue(rbd_dev->disk->queue);

diff --git a/drivers/block/rnbd/rnbd-clt.c b/drivers/block/rnbd/rnbd-clt.c
index c34695d2eea7..82467ecde7ec 100644
--- a/drivers/block/rnbd/rnbd-clt.c
+++ b/drivers/block/rnbd/rnbd-clt.c

- tag_set->flags = BLK_MQ_F_SHOULD_MERGE |

- BLK_MQ_F_TAG_QUEUE_SHARED;

diff --git a/drivers/block/rnbd/rnbd-srv.c b/drivers/block/rnbd/rnbd-srv.c
index 08ce6d96d04c..2ee6e9bd4e28 100644
--- a/drivers/block/rnbd/rnbd-srv.c
+++ b/drivers/block/rnbd/rnbd-srv.c

- bio_set_prio(bio, prio);

diff --git a/drivers/block/rnull.rs b/drivers/block/rnull.rs
index b0227cf9ddd3..ddf3629d8894 100644
--- a/drivers/block/rnull.rs
+++ b/drivers/block/rnull.rs

- _disk: Pin<Box<Mutex<GenDisk<NullBlkDevice>>>>,

-impl kernel::Module for NullBlkModule {

- fn init(_module: &'static ThisModule) -> Result<Self> {

- let tagset = Arc::pin_init(TagSet::new(1, 256, 1), flags::GFP_KERNEL)?;

- let disk = gen_disk::GenDiskBuilder::new()

- .capacity_sectors(4096 << 11)

- .logical_block_size(4096)?

- .physical_block_size(4096)?

- .rotational(false)

- .build(format_args!("rnullb{}", 0), tagset)?;

- let disk = Box::pin_init(new_mutex!(disk, "nullb:disk"), flags::GFP_KERNEL)?;

- Ok(Self { _disk: disk })

diff --git a/drivers/block/sunvdc.c b/drivers/block/sunvdc.c
index 2d38331ee667..282f81616a78 100644
--- a/drivers/block/sunvdc.c
+++ b/drivers/block/sunvdc.c

- VDC_TX_RING_SIZE, BLK_MQ_F_SHOULD_MERGE);

-static int vdc_device_probed(struct device *dev, void *arg)

- struct vdc_check_port_data *port_data;

- port_data = (struct vdc_check_port_data *)arg;

- blk_mq_freeze_queue(q);

- blk_mq_unfreeze_queue(q);

diff --git a/drivers/block/swim.c b/drivers/block/swim.c
index 126f151c4f2c..eda33c5eb5e2 100644
--- a/drivers/block/swim.c
+++ b/drivers/block/swim.c

- &swim_mq_ops, 2, BLK_MQ_F_SHOULD_MERGE);

- .remove_new = swim_remove,

diff --git a/drivers/block/swim3.c b/drivers/block/swim3.c
index 90be1017f7bf..3aedcb5add61 100644
--- a/drivers/block/swim3.c
+++ b/drivers/block/swim3.c

- blk_mq_freeze_queue(q);

- blk_mq_unfreeze_queue(q);

- rc = blk_mq_alloc_sq_tag_set(&fs->tag_set, &swim3_mq_ops, 2,

- BLK_MQ_F_SHOULD_MERGE);

diff --git a/drivers/block/ublk_drv.c b/drivers/block/ublk_drv.c
index a6c8e5cc6051..529085181f35 100644
--- a/drivers/block/ublk_drv.c
+++ b/drivers/block/ublk_drv.c

- struct work_struct quiesce_work;

- struct work_struct stop_work;

- return round_up(ubq->q_depth * sizeof(struct ublksrv_io_desc),

-static inline bool ublk_queue_can_use_recovery_reissue(

- struct ublk_queue *ubq)

- (ubq->flags & UBLK_F_USER_RECOVERY_REISSUE);

-static inline bool ublk_queue_can_use_recovery(

- struct ublk_queue *ubq)

- return ubq->flags & UBLK_F_USER_RECOVERY;

-static inline bool ublk_can_use_recovery(struct ublk_device *ub)

- return ub->dev_info.flags & UBLK_F_USER_RECOVERY;

- if (ublk_queue_can_use_recovery_reissue(ubq))

- if (ublk_queue_can_use_recovery(ubq))

- if (ublk_can_use_recovery(ub))

- schedule_work(&ub->quiesce_work);

- schedule_work(&ub->stop_work);

- if (ublk_queue_can_use_recovery(ubq) && unlikely(ubq->force_abort))

- unsigned max_sz = UBLK_MAX_QUEUE_DEPTH * sizeof(struct ublksrv_io_desc);

- if (ublk_can_use_recovery(ub))

- schedule_work(&ub->quiesce_work);

- schedule_work(&ub->stop_work);

-static void ublk_quiesce_work_fn(struct work_struct *work)

- struct ublk_device *ub =

- container_of(work, struct ublk_device, quiesce_work);

- mutex_lock(&ub->mutex);

- if (ub->dev_info.state != UBLK_S_DEV_LIVE)

- __ublk_quiesce_dev(ub);

- mutex_unlock(&ub->mutex);

- ublk_cancel_dev(ub);

- if (ublk_can_use_recovery(ub)) {

- /* Sync with ublk_abort_queue() by holding the lock */

- spin_lock(&ub->lock);

- disk = ub->ub_disk;

- ub->dev_info.state = UBLK_S_DEV_DEAD;

- ub->dev_info.ublksrv_pid = -1;

- ub->ub_disk = NULL;

- spin_unlock(&ub->lock);

-static void ublk_stop_work_fn(struct work_struct *work)

- struct ublk_device *ub =

- container_of(work, struct ublk_device, stop_work);

- ublk_stop_dev(ub);

- ub->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

- cancel_work_sync(&ub->stop_work);

- cancel_work_sync(&ub->quiesce_work);

- lim.max_zone_append_sectors = p->max_zone_append_sectors;

- ub->dev_info.state = UBLK_S_DEV_DEAD;

- if (info.flags & UBLK_F_UNPRIVILEGED_DEV)

- INIT_WORK(&ub->quiesce_work, ublk_quiesce_work_fn);

- INIT_WORK(&ub->stop_work, ublk_stop_work_fn);

- cancel_work_sync(&ub->stop_work);

- cancel_work_sync(&ub->quiesce_work);

- if (!ublk_can_use_recovery(ub))

- if (test_bit(UB_STATE_OPEN, &ub->state) ||

- ub->dev_info.state != UBLK_S_DEV_QUIESCED) {

- if (!ublk_can_use_recovery(ub))

- if (ub->dev_info.state != UBLK_S_DEV_QUIESCED) {

- blk_mq_unquiesce_queue(ub->ub_disk->queue);

- pr_devel("%s: queue unquiesced, dev id %d.\n",

- __func__, header->dev_id);

- blk_mq_kick_requeue_list(ub->ub_disk->queue);

- ub->dev_info.state = UBLK_S_DEV_LIVE;

diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index 194417abc105..6a61ec35f426 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c

-#include <linux/blk-mq-virtio.h>

-static bool virtblk_add_req_batch(struct virtio_blk_vq *vq,

- struct request **rqlist)

- while (!rq_list_empty(*rqlist)) {

- struct request *req = rq_list_pop(rqlist);

-static void virtio_queue_rqs(struct request **rqlist)

- struct request *req, *next, *prev = NULL;

- struct request *requeue_list = NULL;

- rq_list_for_each_safe(rqlist, req, next) {

- struct virtio_blk_vq *vq = get_virtio_blk_vq(req->mq_hctx);

- if (!virtblk_prep_rq_batch(req)) {

- rq_list_move(rqlist, &requeue_list, req, prev);

- if (!next || req->mq_hctx != next->mq_hctx) {

- req->rq_next = NULL;

- kick = virtblk_add_req_batch(vq, rqlist);

- virtqueue_notify(vq->vq);

- lim->max_zone_append_sectors = v;

- blk_mq_freeze_queue(disk->queue);

- i = queue_limits_commit_update(disk->queue, &lim);

- blk_mq_unfreeze_queue(disk->queue);

- blk_mq_virtio_map_queues(&set->map[i], vblk->vdev, 0);

- vblk->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

-#ifdef CONFIG_PM_SLEEP

-static int virtblk_freeze(struct virtio_device *vdev)

- blk_mq_freeze_queue(vblk->disk->queue);

-static int virtblk_restore(struct virtio_device *vdev)

- blk_mq_unfreeze_queue(vblk->disk->queue);

diff --git a/drivers/block/xen-blkback/blkback.c b/drivers/block/xen-blkback/blkback.c
index 838064593f62..a7c2b04ab943 100644
--- a/drivers/block/xen-blkback/blkback.c
+++ b/drivers/block/xen-blkback/blkback.c

- ring->st_print = jiffies + msecs_to_jiffies(10 * 1000);

diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 59ce113b882a..edcd08a9dcef 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c

- info->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

diff --git a/drivers/block/z2ram.c b/drivers/block/z2ram.c
index 4b7219be1bb8..8c1c7f4211eb 100644
--- a/drivers/block/z2ram.c
+++ b/drivers/block/z2ram.c

- tag_set.flags = BLK_MQ_F_SHOULD_MERGE;

diff --git a/drivers/block/zram/Kconfig b/drivers/block/zram/Kconfig
index 6aea609b795c..402b7b175863 100644
--- a/drivers/block/zram/Kconfig
+++ b/drivers/block/zram/Kconfig

diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c
index ad9c9bc3ccfc..9f5020b077c5 100644
--- a/drivers/block/zram/zram_drv.c
+++ b/drivers/block/zram/zram_drv.c

-static int zram_read_page(struct zram *zram, struct page *page, u32 index,

- struct bio *parent);

-static inline void zram_set_element(struct zram *zram, u32 index,

- unsigned long element)

- zram->table[index].element = element;

-static unsigned long zram_get_element(struct zram *zram, u32 index)

- return zram->table[index].element;

-static inline void update_used_max(struct zram *zram,

- const unsigned long pages)

- unsigned long cur_max = atomic_long_read(&zram->stats.max_used_pages);

- if (cur_max >= pages)

- } while (!atomic_long_try_cmpxchg(&zram->stats.max_used_pages,

- &cur_max, pages));

- * Do not mark ZRAM_UNDER_WB slot as ZRAM_IDLE to close race.

- * See the comment in writeback_store.

- if (zram_allocated(zram, index) &&

- !zram_test_flag(zram, index, ZRAM_UNDER_WB)) {

- is_idle = !cutoff || ktime_after(cutoff,

- zram->table[index].ac_time);

- zram_set_flag(zram, index, ZRAM_IDLE);

- for (; nr_pages != 0; index++, nr_pages--) {

- if (!zram_allocated(zram, index))

- if (zram_test_flag(zram, index, ZRAM_WB) ||

- zram_test_flag(zram, index, ZRAM_SAME) ||

- zram_test_flag(zram, index, ZRAM_UNDER_WB))

- if (mode & IDLE_WRITEBACK &&

- !zram_test_flag(zram, index, ZRAM_IDLE))

- if (mode & HUGE_WRITEBACK &&

- !zram_test_flag(zram, index, ZRAM_HUGE))

- if (mode & INCOMPRESSIBLE_WRITEBACK &&

- !zram_test_flag(zram, index, ZRAM_INCOMPRESSIBLE))

- * Clearing ZRAM_UNDER_WB is duty of caller.

- * IOW, zram_free_page never clear it.

- zram_set_flag(zram, index, ZRAM_UNDER_WB);

- /* Need for hugepage writeback racing */

- zram_set_flag(zram, index, ZRAM_IDLE);

- if (zram_read_page(zram, page, index, NULL)) {

- zram_slot_lock(zram, index);

- zram_clear_flag(zram, index, ZRAM_UNDER_WB);

- zram_clear_flag(zram, index, ZRAM_IDLE);

- zram_slot_unlock(zram, index);

- zram_slot_lock(zram, index);

- zram_clear_flag(zram, index, ZRAM_UNDER_WB);

- zram_clear_flag(zram, index, ZRAM_IDLE);

- zram_slot_unlock(zram, index);

- * We released zram_slot_lock so need to check if the slot was

- * changed. If there is freeing for the slot, we can catch it

- * easily by zram_allocated.

- * A subtle case is the slot is freed/reallocated/marked as

- * ZRAM_IDLE again. To close the race, idle_store doesn't

- * mark ZRAM_IDLE once it found the slot was ZRAM_UNDER_WB.

- * Thus, we could close the race by checking ZRAM_IDLE bit.

- zram_slot_lock(zram, index);

- if (!zram_allocated(zram, index) ||

- !zram_test_flag(zram, index, ZRAM_IDLE)) {

- zram_clear_flag(zram, index, ZRAM_UNDER_WB);

- zram_clear_flag(zram, index, ZRAM_IDLE);

- zram_clear_flag(zram, index, ZRAM_UNDER_WB);

- zram_set_element(zram, index, blk_idx);

- if (zram_test_flag(zram, index, ZRAM_IDLE))

- zram_clear_flag(zram, index, ZRAM_IDLE);

- if (zram_test_flag(zram, index, ZRAM_INCOMPRESSIBLE))

- zram_clear_flag(zram, index, ZRAM_INCOMPRESSIBLE);

- zram_set_priority(zram, index, 0);

- free_block_bdev(zram, zram_get_element(zram, index));

- &zram->stats.compr_data_size);

- WARN_ON_ONCE(zram->table[index].flags &

- ~(1UL << ZRAM_UNDER_WB));

- * Reads (decompresses if needed) a page from zspool (zsmalloc).

- * Corresponding ZRAM slot should be locked.

-static int zram_read_from_zspool(struct zram *zram, struct page *page,

- if (!handle || zram_test_flag(zram, index, ZRAM_SAME)) {

- unsigned long value;

- value = handle ? zram_get_element(zram, index) : 0;

- mem = kmap_local_page(page);

- zram_fill_page(mem, PAGE_SIZE, value);

- kunmap_local(mem);

- if (size != PAGE_SIZE) {

- prio = zram_get_priority(zram, index);

- zstrm = zcomp_stream_get(zram->comps[prio]);

- if (size == PAGE_SIZE) {

- dst = kmap_local_page(page);

- copy_page(dst, src);

- kunmap_local(dst);

- dst = kmap_local_page(page);

- ret = zcomp_decompress(zram->comps[prio], zstrm,

- kunmap_local(dst);

- zcomp_stream_put(zram->comps[prio]);

- ret = read_from_bdev(zram, page, zram_get_element(zram, index),

- unsigned long alloced_pages;

- void *src, *dst, *mem;

- enum zram_pageflags flags = 0;

- if (page_same_filled(mem, &element)) {

- kunmap_local(mem);

- /* Free memory associated with this sector now. */

- flags = ZRAM_SAME;

- atomic64_inc(&zram->stats.same_pages);

- src = kmap_local_page(page);

- kunmap_local(src);

- if (comp_len >= huge_class_size)

- comp_len = PAGE_SIZE;

- __GFP_KSWAPD_RECLAIM |

- GFP_NOIO | __GFP_HIGHMEM |

- if (comp_len != PAGE_SIZE)

- goto compress_again;

- * If the page is not compressible, you need to acquire the

- * lock and execute the code below. The zcomp_stream_get()

- * call is needed to disable the cpu hotplug and grab the

- * zstrm buffer back. It is necessary that the dereferencing

- * of the zstrm variable below occurs correctly.

- zstrm = zcomp_stream_get(zram->comps[ZRAM_PRIMARY_COMP]);

- alloced_pages = zs_get_total_pages(zram->mem_pool);

- update_used_max(zram, alloced_pages);

- if (zram->limit_pages && alloced_pages > zram->limit_pages) {

- src = zstrm->buffer;

- if (comp_len == PAGE_SIZE)

- src = kmap_local_page(page);

- memcpy(dst, src, comp_len);

- if (comp_len == PAGE_SIZE)

- kunmap_local(src);

- atomic64_add(comp_len, &zram->stats.compr_data_size);

- * Free memory associated with this sector

- * before overwriting unused sectors.

- zram_slot_lock(zram, index);

- zram_free_page(zram, index);

- if (comp_len == PAGE_SIZE) {

- zram_set_flag(zram, index, ZRAM_HUGE);

- atomic64_inc(&zram->stats.huge_pages);

- atomic64_inc(&zram->stats.huge_pages_since);

- zram_set_flag(zram, index, flags);

- zram_set_element(zram, index, element);

- zram_set_handle(zram, index, handle);

- zram_set_obj_size(zram, index, comp_len);

-static int zram_recompress(struct zram *zram, u32 index, struct page *page,

-#define RECOMPRESS_IDLE (1 << 0)

-#define RECOMPRESS_HUGE (1 << 1)

- unsigned long nr_pages = zram->disksize >> PAGE_SHIFT;

- unsigned long index;

- for (index = 0; index < nr_pages; index++) {

- zram_slot_lock(zram, index);

- if (!zram_allocated(zram, index))

- if (mode & RECOMPRESS_IDLE &&

- !zram_test_flag(zram, index, ZRAM_IDLE))

- if (mode & RECOMPRESS_HUGE &&

- !zram_test_flag(zram, index, ZRAM_HUGE))

- if (zram_test_flag(zram, index, ZRAM_WB) ||

- zram_test_flag(zram, index, ZRAM_UNDER_WB) ||

- zram_test_flag(zram, index, ZRAM_SAME) ||

- zram_test_flag(zram, index, ZRAM_INCOMPRESSIBLE))

- err = zram_recompress(zram, index, page, &num_recomp_pages,

- threshold, prio, prio_max);

- zram_slot_unlock(zram, index);

- for (prio = 0; prio < ZRAM_MAX_COMPS; prio++) {

- if (!init_done(zram)) {

- up_write(&zram->init_lock);

- for (prio = 0; prio < ZRAM_MAX_COMPS; prio++) {

- zram_comp_params_reset(zram);

- comp_algorithm_set(zram, ZRAM_PRIMARY_COMP, default_compressor);

diff --git a/drivers/block/zram/zram_drv.h b/drivers/block/zram/zram_drv.h
index cfc8c059db63..db78d7c01b9a 100644
--- a/drivers/block/zram/zram_drv.h
+++ b/drivers/block/zram/zram_drv.h

- ZRAM_UNDER_WB, /* page is under writeback */

- unsigned long handle;

- unsigned long element;

diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 18767b54df35..4ab32abf0f48 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig

diff --git a/drivers/bluetooth/btbcm.c b/drivers/bluetooth/btbcm.c
index eef00467905e..0a60660fc8ce 100644
--- a/drivers/bluetooth/btbcm.c
+++ b/drivers/bluetooth/btbcm.c

- struct device_node *root;

- root = of_find_node_by_path("/");

- of_node_put(root);

diff --git a/drivers/bluetooth/btintel.c b/drivers/bluetooth/btintel.c
index 438b92967bc3..d2540b28bc7a 100644
--- a/drivers/bluetooth/btintel.c
+++ b/drivers/bluetooth/btintel.c

- version->secure_boot ? "enabled" : "disabled");

- version->otp_lock ? "enabled" : "disabled");

- version->api_lock ? "enabled" : "disabled");

- version->debug_lock ? "enabled" : "disabled");

- params->secure_boot ? "enabled" : "disabled");

- params->otp_lock ? "enabled" : "disabled");

- params->api_lock ? "enabled" : "disabled");

- params->debug_lock ? "enabled" : "disabled");

- * firmware data buffer as a single Data fragement.

- * 1 second. However if that happens, then just fail the setup

- err = btintel_boot_wait(hdev, calltime, 1000);

- if (err == -ETIMEDOUT)

@@ -2693,20 +2748,32 @@ static int btintel_set_dsbr(struct hci_dev *hdev, struct intel_version_tlv *ver)

- /* DSBR command needs to be sent for BlazarI + B0 step product after

- * downloading IML image.

- apply_dsbr = (ver->img_type == BTINTEL_IMG_IML &&

- ((ver->cnvi_top & 0xfff) == BTINTEL_CNVI_BLAZARI) &&

- INTEL_CNVX_TOP_STEP(ver->cnvi_top) == 0x01);

- /* All Intel new genration controllers support the Microsoft vendor

-static int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)

- hci_devcd_append(hdev, skb);

diff --git a/drivers/bluetooth/btintel.h b/drivers/bluetooth/btintel.h
index aa70e4c27416..fa43eb137821 100644
--- a/drivers/bluetooth/btintel.h
+++ b/drivers/bluetooth/btintel.h

diff --git a/drivers/bluetooth/btintel_pcie.c b/drivers/bluetooth/btintel_pcie.c
index 5252125b003f..2b79952f3628 100644
--- a/drivers/bluetooth/btintel_pcie.c
+++ b/drivers/bluetooth/btintel_pcie.c

-static int btintel_pcie_poll_bit(struct btintel_pcie_data *data, u32 offset,

- u32 bits, u32 mask, int timeout_us)

- reg = btintel_pcie_rd_reg32(data, offset);

- if ((reg & mask) == (bits & mask))

- udelay(POLL_INTERVAL_US);

- t += POLL_INTERVAL_US;

- } while (t < timeout_us);

- return -ETIMEDOUT;

-static void btintel_pcie_reset_bt(struct btintel_pcie_data *data)

- btintel_pcie_wr_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,

- BTINTEL_PCIE_CSR_FUNC_CTRL_SW_RESET);

- btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG);

- btintel_pcie_set_reg_bits(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,

- BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_INIT);

- /* Wait until MAC_ACCESS is granted */

- err = btintel_pcie_poll_bit(data, BTINTEL_PCIE_CSR_FUNC_CTRL_REG,

- BTINTEL_PCIE_CSR_FUNC_CTRL_MAC_ACCESS_STS,

- BTINTEL_DEFAULT_MAC_ACCESS_TIMEOUT_US);

- BTINTEL_PCIE_CSR_FUNC_CTRL_FUNC_ENA |

- msecs_to_jiffies(BTINTEL_DEFAULT_INTR_TIMEOUT));

- /* If the boot stage is OP or IML, reset IA and start RX again */

- if (data->boot_stage_cache & BTINTEL_PCIE_CSR_BOOT_STAGE_OPFW ||

- data->boot_stage_cache & BTINTEL_PCIE_CSR_BOOT_STAGE_IML) {

- wake_up(&data->gp0_wait_q);

- ret = btintel_recv_event(hdev, new_skb);

- err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME);

- data->base_addr = pcim_iomap_table(pdev)[0];

- if (!data->base_addr)

-static int btintel_pcie_setup(struct hci_dev *hdev)

diff --git a/drivers/bluetooth/btintel_pcie.h b/drivers/bluetooth/btintel_pcie.h
index baaff70420f5..f9aada0543c4 100644
--- a/drivers/bluetooth/btintel_pcie.h
+++ b/drivers/bluetooth/btintel_pcie.h

-#define BTINTEL_DEFAULT_INTR_TIMEOUT 3000

diff --git a/drivers/bluetooth/btmrvl_main.c b/drivers/bluetooth/btmrvl_main.c
index 18f34998a120..e26b07a9387d 100644
--- a/drivers/bluetooth/btmrvl_main.c
+++ b/drivers/bluetooth/btmrvl_main.c

- (adapter->psmode) ? "Enable" : "Disable");

diff --git a/drivers/bluetooth/btmtk.c b/drivers/bluetooth/btmtk.c
index 9bbf20502163..68846c5bd4f7 100644
--- a/drivers/bluetooth/btmtk.c
+++ b/drivers/bluetooth/btmtk.c

- /* Activate funciton the firmware providing to */

- /* Mediatek coredump data would be more than MTK_COREDUMP_NUM */

- if (data->cd_info.cnt > MTK_COREDUMP_NUM &&

- skb->len > MTK_COREDUMP_END_LEN)

- if (!memcmp((char *)&skb->data[skb->len - MTK_COREDUMP_END_LEN],

- MTK_COREDUMP_END, MTK_COREDUMP_END_LEN - 1)) {

- bt_dev_info(hdev, "Mediatek coredump end");

- hci_devcd_complete(hdev);

- init_usb_anchor(&btmtk_data->isopkt_anchor);

diff --git a/drivers/bluetooth/btmtksdio.c b/drivers/bluetooth/btmtksdio.c
index 11d33cd7b08f..bd5464bde174 100644
--- a/drivers/bluetooth/btmtksdio.c
+++ b/drivers/bluetooth/btmtksdio.c

- /* Explitly set write-1-clear method */

-static void btmtksdio_cmd_timeout(struct hci_dev *hdev)

- hdev->cmd_timeout = btmtksdio_cmd_timeout;

- /* As explaination in drivers/mmc/core/sdio_bus.c tells us:

- bdev->dev->of_node = of_find_compatible_node(NULL, NULL,

- "mediatek,mt7921s-bluetooth");

diff --git a/drivers/bluetooth/btmtkuart.c b/drivers/bluetooth/btmtkuart.c
index 64e4d835af52..c97e260fcb0c 100644
--- a/drivers/bluetooth/btmtkuart.c
+++ b/drivers/bluetooth/btmtkuart.c

- /* Tranlate to how much the size of data H4 can handle so far */

diff --git a/drivers/bluetooth/btnxpuart.c b/drivers/bluetooth/btnxpuart.c
index 5ea0d23e88c0..aa5ec1d444a9 100644
--- a/drivers/bluetooth/btnxpuart.c
+++ b/drivers/bluetooth/btnxpuart.c

-#define FIRMWARE_W8987 "uart8987_bt_v0.bin"

-#define FIRMWARE_IW416 "uartiw416_bt_v0.bin"

-#define FIRMWARE_IW615 "uartspi_iw610_v0.bin"

-#define FIRMWARE_SECURE_IW615 "uartspi_iw610_v0.bin.se"

-#define CHIP_ID_IW615a0 0x8800

-#define CHIP_ID_IW615a1 0x8801

-static void ps_setup(struct hci_dev *hdev)

- switch (DEFAULT_H2C_WAKEUP_MODE) {

- case CHIP_ID_IW615a0:

- case CHIP_ID_IW615a1:

- fw_name = FIRMWARE_IW615;

- fw_name = FIRMWARE_SECURE_IW615;

- hci_free_dev(hdev);

diff --git a/drivers/bluetooth/btqca.c b/drivers/bluetooth/btqca.c
index dfbbac92242a..cdf09d9a9ad2 100644
--- a/drivers/bluetooth/btqca.c
+++ b/drivers/bluetooth/btqca.c

-static void qca_generate_hsp_nvm_name(char *fwname, size_t max_size,

- if ((le32_to_cpu(ver.soc_id) & QCA_HSP_GF_SOC_MASK) == QCA_HSP_GF_SOC_ID)

- snprintf(fwname, max_size, "qca/hpnv%02x%s.bin", rom_ver, variant);

- snprintf(fwname, max_size, "qca/hpnv%02x%s.%x", rom_ver, variant, bid);

-static inline void qca_get_nvm_name_generic(struct qca_fw_config *cfg,

- const char *stem, u8 rom_ver, u16 bid)

- snprintf(cfg->fwname, sizeof(cfg->fwname), "qca/%snv%02x.bin", stem, rom_ver);

- else if (bid & 0xff00)

- snprintf(cfg->fwname, sizeof(cfg->fwname),

- "qca/%snv%02x.b%x", stem, rom_ver, bid);

- snprintf(cfg->fwname, sizeof(cfg->fwname),

- "qca/%snv%02x.b%02x", stem, rom_ver, bid);

- const char *firmware_name)

- switch (soc_type) {

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/crbtfw%02x.tlv", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/apbtfw%02x.tlv", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/hpbtfw%02x.tlv", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/htbtfw%02x.tlv", rom_ver);

- /* Choose mbn file by default.If mbn file is not found

- * then choose tlv file

- config.type = ELF_TYPE_PATCH;

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/msbtfw%02x.mbn", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/hpbtfw%02x.tlv", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/hmtbtfw%02x.tlv", rom_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/rampatch_%08x.bin", soc_ver);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/%s", firmware_name);

- qca_generate_hsp_nvm_name(config.fwname,

- sizeof(config.fwname), ver, rom_ver, boardid);

- snprintf(config.fwname, sizeof(config.fwname),

- "qca/hpnv%02x.bin", rom_ver);

- qca_get_nvm_name_generic(&config, "hmt", rom_ver, boardid);

diff --git a/drivers/bluetooth/btqca.h b/drivers/bluetooth/btqca.h
index bb5207d7a8c7..9d28c8800225 100644
--- a/drivers/bluetooth/btqca.h
+++ b/drivers/bluetooth/btqca.h

- const char *firmware_name);

- const char *firmware_name)

diff --git a/drivers/bluetooth/btqcomsmd.c b/drivers/bluetooth/btqcomsmd.c
index 88dbb2f3fabf..c0eb71d6ffd3 100644
--- a/drivers/bluetooth/btqcomsmd.c
+++ b/drivers/bluetooth/btqcomsmd.c

- .remove_new = btqcomsmd_remove,

diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c
index 0bcb44cf7b31..d3eba0d4a57d 100644
--- a/drivers/bluetooth/btrtl.c
+++ b/drivers/bluetooth/btrtl.c

- hci_set_hw_info(hdev,

- skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT);

diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index f23c8801ad5c..90966dfbd278 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c

- unsigned cmd_timeout_cnt;

- if (hdev->reset) {

- hdev->reset(hdev);

-static void btusb_intel_cmd_timeout(struct hci_dev *hdev)

- if (++data->cmd_timeout_cnt < 5)

-static void btusb_rtl_cmd_timeout(struct hci_dev *hdev)

- if (++data->cmd_timeout_cnt < 5)

-static void btusb_qca_cmd_timeout(struct hci_dev *hdev)

- bt_dev_info(hdev, "Ramdump in progress, defer cmd_timeout");

- if (++data->cmd_timeout_cnt < 5)

- /* Trigger dequeue immediatelly if an event is received */

- /* Use maximum HCI Event size so the USB stack handles

- * ZPL/short-transfer automatically.

- size = HCI_MAX_EVENT_SIZE;

-static void btusb_mtk_release_iso_intf(struct btusb_data *data)

- struct btmtk_data *btmtk_data = hci_get_priv(data->hdev);

- if (btmtk_data->isopkt_intf) {

- if (test_bit(BTMTK_ISOPKT_RUNNING, &btmtk_data->flags))

- btusb_mtk_release_iso_intf(data);

- btmtk_data->isopkt_intf = usb_ifnum_to_if(data->udev, MTK_ISO_IFNUM);

- if (btmtk_data->isopkt_intf)

- struct btusb_data *data = hci_get_drvdata(hdev);

- struct btmtk_data *btmtk_data = hci_get_priv(hdev);

- if (test_bit(BTMTK_ISOPKT_RUNNING, &btmtk_data->flags))

- btusb_mtk_release_iso_intf(data);

- return btmtk_usb_shutdown(hdev);

- hdev->cmd_timeout = btusb_intel_cmd_timeout;

- hdev->cmd_timeout = btmtk_reset_sync;

- hdev->cmd_timeout = btusb_qca_cmd_timeout;

- hdev->cmd_timeout = btusb_rtl_cmd_timeout;

- /* Don't suspend if there are connections */

- if (hci_conn_count(data->hdev))

diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c
index 89d4c2224546..9684eb16059b 100644
--- a/drivers/bluetooth/hci_bcm.c
+++ b/drivers/bluetooth/hci_bcm.c

- clk = devm_clk_get(dev, "txco");

- if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)

- clk = devm_clk_get(dev, "extclk");

- if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)

- return devm_clk_get(dev, NULL);

- /* Handle deferred probing */

- if (dev->txco_clk == ERR_PTR(-EPROBE_DEFER))

- return PTR_ERR(dev->txco_clk);

- /* Ignore all other errors as before */

- dev->txco_clk = NULL;

- dev->lpo_clk = devm_clk_get(dev->dev, "lpo");

- if (dev->lpo_clk == ERR_PTR(-EPROBE_DEFER))

- return PTR_ERR(dev->lpo_clk);

- dev->lpo_clk = NULL;

- .remove_new = bcm_remove,

diff --git a/drivers/bluetooth/hci_intel.c b/drivers/bluetooth/hci_intel.c
index 999ccd5bb4f2..811f33701f84 100644
--- a/drivers/bluetooth/hci_intel.c
+++ b/drivers/bluetooth/hci_intel.c

- .remove_new = intel_remove,

diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index 395d66e32a2e..d2d6ba8d2f8b 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c

- * Arguments: tty pointer to tty isntance data

diff --git a/drivers/bluetooth/hci_ll.c b/drivers/bluetooth/hci_ll.c
index 4a0b5c3160c2..e19e9bd49555 100644
--- a/drivers/bluetooth/hci_ll.c
+++ b/drivers/bluetooth/hci_ll.c

-/* Enqueue frame for transmittion (padding, crc, etc) */

diff --git a/drivers/bluetooth/hci_nokia.c b/drivers/bluetooth/hci_nokia.c
index 49bbe4975be4..9fc10a16fd96 100644
--- a/drivers/bluetooth/hci_nokia.c
+++ b/drivers/bluetooth/hci_nokia.c

-/* Enqueue frame for transmittion (padding, crc, etc) */

diff --git a/drivers/bluetooth/hci_qca.c b/drivers/bluetooth/hci_qca.c
index 37fddf6055be..0ac2168f1dc4 100644
--- a/drivers/bluetooth/hci_qca.c
+++ b/drivers/bluetooth/hci_qca.c

- const char *firmware_name;

- return qsd->firmware_name;

- BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",

- vote ? "true" : "false");

-/* Enqueue frame for transmittion (padding, crc, etc) may be called from

- * the controller, Disable IBS to recevie dump

-static void qca_cmd_timeout(struct hci_dev *hdev)

- hu->hdev->cmd_timeout = qca_cmd_timeout;

- hu->hdev->cmd_timeout = NULL;

-static void qca_clk_disable_unprepare(void *data)

- struct clk *clk = data;

- clk_disable_unprepare(clk);

- device_property_read_string(&serdev->dev, "firmware-name",

- &qcadev->firmware_name);

- * drive everything outselves.

- qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);

- err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);

- err = clk_prepare_enable(qcadev->susclk);

- err = devm_add_action_or_reset(&serdev->dev,

- qca_clk_disable_unprepare,

- /* The serdev must be in open state when conrol logic arrives

diff --git a/drivers/bus/fsl-mc/dprc-driver.c b/drivers/bus/fsl-mc/dprc-driver.c
index 4b68c84ef485..52053f7c6d9a 100644
--- a/drivers/bus/fsl-mc/dprc-driver.c
+++ b/drivers/bus/fsl-mc/dprc-driver.c

-static bool fsl_mc_device_match(struct fsl_mc_device *mc_dev,

- struct fsl_mc_obj_desc *obj_desc)

-static int __fsl_mc_device_match(struct device *dev, void *data)

- struct fsl_mc_obj_desc *obj_desc = data;

diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index 930d8a3ba722..d1f3d327ddd1 100644
--- a/drivers/bus/fsl-mc/fsl-mc-bus.c
+++ b/drivers/bus/fsl-mc/fsl-mc-bus.c

-struct device_type fsl_mc_bus_dprc_type = {

-struct device_type fsl_mc_bus_dpni_type = {

-struct device_type fsl_mc_bus_dpio_type = {

-struct device_type fsl_mc_bus_dpsw_type = {

-struct device_type fsl_mc_bus_dpbp_type = {

-struct device_type fsl_mc_bus_dpcon_type = {

-struct device_type fsl_mc_bus_dpmcp_type = {

-struct device_type fsl_mc_bus_dpmac_type = {

-struct device_type fsl_mc_bus_dprtc_type = {

-struct device_type fsl_mc_bus_dpseci_type = {

-struct device_type fsl_mc_bus_dpdmux_type = {

-struct device_type fsl_mc_bus_dpdcei_type = {

-struct device_type fsl_mc_bus_dpaiop_type = {

-struct device_type fsl_mc_bus_dpci_type = {

-struct device_type fsl_mc_bus_dpdmai_type = {

-struct device_type fsl_mc_bus_dpdbg_type = {

-static struct device_type *fsl_mc_get_device_type(const char *type)

- struct device_type *dev_type;

- .remove_new = fsl_mc_bus_remove,

diff --git a/drivers/bus/hisi_lpc.c b/drivers/bus/hisi_lpc.c
index 09340adbacc2..53dd1573e323 100644
--- a/drivers/bus/hisi_lpc.c
+++ b/drivers/bus/hisi_lpc.c

- .remove_new = hisi_lpc_remove,

diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c
index dedd29ca8db3..9dcc7184817d 100644
--- a/drivers/bus/mhi/host/boot.c
+++ b/drivers/bus/mhi/host/boot.c

- * Normaly, we read/write pm_state only after grabbing the

- * gurantee that this state change would take effect since

diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h
index d057e877932e..3134f111be35 100644
--- a/drivers/bus/mhi/host/internal.h
+++ b/drivers/bus/mhi/host/internal.h

- * is guranteed to have space so we do not need to check both rings.

diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
index 9938bb034c1c..c41119b9079f 100644
--- a/drivers/bus/mhi/host/pci_generic.c
+++ b/drivers/bus/mhi/host/pci_generic.c

- err = pcim_iomap_regions(pdev, 1 << bar_num, pci_name(pdev));

- mhi_cntrl->regs = pcim_iomap_table(pdev)[bar_num];

- nr_vectors = pci_alloc_irq_vectors(pdev, 1, mhi_cntrl->nr_irqs, PCI_IRQ_MSI);

diff --git a/drivers/bus/mhi/host/trace.h b/drivers/bus/mhi/host/trace.h
index 95613c8ebe06..3e0c41777429 100644
--- a/drivers/bus/mhi/host/trace.h
+++ b/drivers/bus/mhi/host/trace.h

- __field(__le64, tre_ptr)

- __field(__le32, dword0)

- __field(__le32, dword1)

- __entry->tre_ptr = mhi_tre->ptr;

- __entry->dword0 = mhi_tre->dword[0];

- __entry->dword1 = mhi_tre->dword[1];

- __field(__le32, dword0)

- __field(__le32, dword1)

- __field(__le64, ptr)

- __entry->ptr = rp->ptr;

- __entry->dword0 = rp->dword[0];

- __entry->dword1 = rp->dword[1];

diff --git a/drivers/bus/moxtet.c b/drivers/bus/moxtet.c
index 6276551d7968..1e57ebfb7622 100644
--- a/drivers/bus/moxtet.c
+++ b/drivers/bus/moxtet.c

- seq_printf(p, " moxtet-%s.%i#%i", mox_module_name(id), pos->idx,

diff --git a/drivers/bus/omap-ocp2scp.c b/drivers/bus/omap-ocp2scp.c
index 7d7479ba0a75..e4dfda7b3b10 100644
--- a/drivers/bus/omap-ocp2scp.c
+++ b/drivers/bus/omap-ocp2scp.c

- .remove_new = omap_ocp2scp_remove,

diff --git a/drivers/bus/omap_l3_smx.c b/drivers/bus/omap_l3_smx.c
index ee6d29925e4d..7f0a8f8b3f4c 100644
--- a/drivers/bus/omap_l3_smx.c
+++ b/drivers/bus/omap_l3_smx.c

- .remove_new = omap3_l3_remove,

diff --git a/drivers/bus/qcom-ssc-block-bus.c b/drivers/bus/qcom-ssc-block-bus.c
index 5931974a21fa..85d781a32df4 100644
--- a/drivers/bus/qcom-ssc-block-bus.c
+++ b/drivers/bus/qcom-ssc-block-bus.c

- .remove_new = qcom_ssc_block_bus_remove,

diff --git a/drivers/bus/simple-pm-bus.c b/drivers/bus/simple-pm-bus.c
index 50870c827889..5dea31769f9a 100644
--- a/drivers/bus/simple-pm-bus.c
+++ b/drivers/bus/simple-pm-bus.c

- .remove_new = simple_pm_bus_remove,

diff --git a/drivers/bus/sun50i-de2.c b/drivers/bus/sun50i-de2.c
index 3339311ce068..dfe588179aca 100644
--- a/drivers/bus/sun50i-de2.c
+++ b/drivers/bus/sun50i-de2.c

- .remove_new = sun50i_de2_bus_remove,

diff --git a/drivers/bus/sunxi-rsb.c b/drivers/bus/sunxi-rsb.c
index a89d78925637..7a33c3b31d1e 100644
--- a/drivers/bus/sunxi-rsb.c
+++ b/drivers/bus/sunxi-rsb.c

- .remove_new = sunxi_rsb_remove,

diff --git a/drivers/bus/tegra-aconnect.c b/drivers/bus/tegra-aconnect.c
index de80008bff92..90e3b0a10816 100644
--- a/drivers/bus/tegra-aconnect.c
+++ b/drivers/bus/tegra-aconnect.c

- .remove_new = tegra_aconnect_remove,

diff --git a/drivers/bus/tegra-gmi.c b/drivers/bus/tegra-gmi.c
index f5d6414df9f2..9c09141961d8 100644
--- a/drivers/bus/tegra-gmi.c
+++ b/drivers/bus/tegra-gmi.c

- .remove_new = tegra_gmi_remove,

diff --git a/drivers/bus/ti-pwmss.c b/drivers/bus/ti-pwmss.c
index 4969c556e752..1f2cab91e438 100644
--- a/drivers/bus/ti-pwmss.c
+++ b/drivers/bus/ti-pwmss.c

- .remove_new = pwmss_remove,

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 270a94a06e05..f67b927ae4ca 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c

- .remove_new = sysc_remove,

diff --git a/drivers/bus/ts-nbus.c b/drivers/bus/ts-nbus.c
index b8af44c5cdbd..2328c48b9b12 100644
--- a/drivers/bus/ts-nbus.c
+++ b/drivers/bus/ts-nbus.c

- .remove_new = ts_nbus_remove,

diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c
index 9b0f37d4b9d4..b163e043c687 100644
--- a/drivers/cdrom/cdrom.c
+++ b/drivers/cdrom/cdrom.c

- cd_dbg(CD_OPEN, "all seems well, opening the devicen");

-static struct ctl_table cdrom_table[] = {

diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c
index 71cfe7a85913..85aceab5eac6 100644
--- a/drivers/cdrom/gdrom.c
+++ b/drivers/cdrom/gdrom.c

- BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_BLOCKING);

- .remove_new = remove_gdrom,

diff --git a/drivers/cdx/Makefile b/drivers/cdx/Makefile
index 749a3295c2bd..3ca7068a3052 100644
--- a/drivers/cdx/Makefile
+++ b/drivers/cdx/Makefile

-ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CDX_BUS

diff --git a/drivers/cdx/cdx.c b/drivers/cdx/cdx.c
index 07371cb653d3..c573ed2ee71a 100644
--- a/drivers/cdx/cdx.c
+++ b/drivers/cdx/cdx.c

- struct bin_attribute *attr,

-EXPORT_SYMBOL_NS_GPL(cdx_device_add, CDX_BUS_CONTROLLER);

-EXPORT_SYMBOL_NS_GPL(cdx_bus_add, CDX_BUS_CONTROLLER);

-EXPORT_SYMBOL_NS_GPL(cdx_register_controller, CDX_BUS_CONTROLLER);

-EXPORT_SYMBOL_NS_GPL(cdx_unregister_controller, CDX_BUS_CONTROLLER);

diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c
index e55f1716cfcb..06d723978232 100644
--- a/drivers/cdx/cdx_msi.c
+++ b/drivers/cdx/cdx_msi.c

-EXPORT_SYMBOL_NS_GPL(cdx_msi_domain_init, CDX_BUS_CONTROLLER);

diff --git a/drivers/cdx/controller/cdx_controller.c b/drivers/cdx/controller/cdx_controller.c
index 201f9a6fbde7..d623f9c7517a 100644
--- a/drivers/cdx/controller/cdx_controller.c
+++ b/drivers/cdx/controller/cdx_controller.c

- .remove_new = xlnx_cdx_remove,

-MODULE_IMPORT_NS(CDX_BUS_CONTROLLER);

diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 7c8dd0abcfdf..8fb33c90482f 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig

diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c
index e904e476e49a..e110857824fc 100644
--- a/drivers/char/hpet.c
+++ b/drivers/char/hpet.c

-static struct ctl_table hpet_table[] = {

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index b51d9e243f35..17854f052386 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig

- depends on (X86 || PPC_MAPLE || COMPILE_TEST)

- depends on ARCH_BCM_IPROC || ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST

diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index 01f012eab440..b9132b3f5d21 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile

diff --git a/drivers/char/hw_random/airoha-trng.c b/drivers/char/hw_random/airoha-trng.c
new file mode 100644
index 000000000000..1dbfa9505c21
--- /dev/null
+++ b/drivers/char/hw_random/airoha-trng.c

diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c
index e9157255f851..143406bc6939 100644
--- a/drivers/char/hw_random/atmel-rng.c
+++ b/drivers/char/hw_random/atmel-rng.c

- .remove_new = atmel_trng_remove,

diff --git a/drivers/char/hw_random/bcm74110-rng.c b/drivers/char/hw_random/bcm74110-rng.c
new file mode 100644
index 000000000000..5c64148e91f1
--- /dev/null
+++ b/drivers/char/hw_random/bcm74110-rng.c

diff --git a/drivers/char/hw_random/cctrng.c b/drivers/char/hw_random/cctrng.c
index 4c50efc46483..4db198849695 100644
--- a/drivers/char/hw_random/cctrng.c
+++ b/drivers/char/hw_random/cctrng.c

- .remove_new = cctrng_remove,

diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index 57c51efa5613..018316f54621 100644
--- a/drivers/char/hw_random/core.c
+++ b/drivers/char/hw_random/core.c

- return rng->read(rng, (void *)buffer, size, wait);

diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c
index 9f039fddaee3..02e207c09e81 100644
--- a/drivers/char/hw_random/exynos-trng.c
+++ b/drivers/char/hw_random/exynos-trng.c

- .remove_new = exynos_trng_remove,

diff --git a/drivers/char/hw_random/histb-rng.c b/drivers/char/hw_random/histb-rng.c
index f652e1135e4b..1b91e88cc4c0 100644
--- a/drivers/char/hw_random/histb-rng.c
+++ b/drivers/char/hw_random/histb-rng.c

- return sprintf(buf, "%d\n", histb_rng_get_depth(base));

diff --git a/drivers/char/hw_random/ingenic-rng.c b/drivers/char/hw_random/ingenic-rng.c
index 2f9b6483c4a1..bbfd662d25a6 100644
--- a/drivers/char/hw_random/ingenic-rng.c
+++ b/drivers/char/hw_random/ingenic-rng.c

- .remove_new = ingenic_rng_remove,

diff --git a/drivers/char/hw_random/ks-sa-rng.c b/drivers/char/hw_random/ks-sa-rng.c
index 36c34252b4f6..d8fd8a354482 100644
--- a/drivers/char/hw_random/ks-sa-rng.c
+++ b/drivers/char/hw_random/ks-sa-rng.c

- .remove_new = ks_sa_rng_remove,

diff --git a/drivers/char/hw_random/mxc-rnga.c b/drivers/char/hw_random/mxc-rnga.c
index f01eb95bee31..e3fcb8bcc29b 100644
--- a/drivers/char/hw_random/mxc-rnga.c
+++ b/drivers/char/hw_random/mxc-rnga.c

- .remove_new = mxc_rnga_remove,

diff --git a/drivers/char/hw_random/n2-drv.c b/drivers/char/hw_random/n2-drv.c
index 1b49e3a86d57..ea6d5599242f 100644
--- a/drivers/char/hw_random/n2-drv.c
+++ b/drivers/char/hw_random/n2-drv.c

- .remove_new = n2rng_remove,

diff --git a/drivers/char/hw_random/npcm-rng.c b/drivers/char/hw_random/npcm-rng.c
index bce8c4829a1f..9ff00f096f38 100644
--- a/drivers/char/hw_random/npcm-rng.c
+++ b/drivers/char/hw_random/npcm-rng.c

- .remove_new = npcm_rng_remove,

diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index 4914a8720e58..5e8b50f15db7 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c

- .remove_new = omap_rng_remove,

diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c
index 9d041a67c295..98edbe796bc5 100644
--- a/drivers/char/hw_random/stm32-rng.c
+++ b/drivers/char/hw_random/stm32-rng.c

- clock_rate = clk_get_rate(priv->clk);

- pr_debug("RNG clk rate : %lu\n", clk_get_rate(priv->clk) >> clock_div);

- err = clk_prepare_enable(priv->clk);

- clk_disable_unprepare(priv->clk);

- err = clk_prepare_enable(priv->clk);

- clk_disable_unprepare(priv->clk);

- err = clk_prepare_enable(priv->clk);

- clk_disable_unprepare(priv->clk);

- .max_clock_rate = 3000000,

- priv->clk = devm_clk_get(&ofdev->dev, NULL);

- if (IS_ERR(priv->clk))

- return PTR_ERR(priv->clk);

- .remove_new = stm32_rng_remove,

diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c
index 65b8260339f5..7174bfccc7b3 100644
--- a/drivers/char/hw_random/timeriomem-rng.c
+++ b/drivers/char/hw_random/timeriomem-rng.c

- .remove_new = timeriomem_rng_remove,

diff --git a/drivers/char/hw_random/xgene-rng.c b/drivers/char/hw_random/xgene-rng.c
index 642d13519464..39acaa503fec 100644
--- a/drivers/char/hw_random/xgene-rng.c
+++ b/drivers/char/hw_random/xgene-rng.c

- .remove_new = xgene_rng_remove,

diff --git a/drivers/char/ipmi/bt-bmc.c b/drivers/char/ipmi/bt-bmc.c
index b8b9c07d3b5d..009e32033b17 100644
--- a/drivers/char/ipmi/bt-bmc.c
+++ b/drivers/char/ipmi/bt-bmc.c

- .remove_new = bt_bmc_remove,

diff --git a/drivers/char/ipmi/ipmb_dev_int.c b/drivers/char/ipmi/ipmb_dev_int.c
index 7296127181ec..ee2bdc7ed0da 100644
--- a/drivers/char/ipmi/ipmb_dev_int.c
+++ b/drivers/char/ipmi/ipmb_dev_int.c

diff --git a/drivers/char/ipmi/ipmi_devintf.c b/drivers/char/ipmi/ipmi_devintf.c
index 332082e02ea5..e6ba35b71f10 100644
--- a/drivers/char/ipmi/ipmi_devintf.c
+++ b/drivers/char/ipmi/ipmi_devintf.c

- rv = ipmi_destroy_user(priv->user);

diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c
index e12b531f5c2f..1e5313748f8b 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c

-int ipmi_destroy_user(struct ipmi_user *user)

diff --git a/drivers/char/ipmi/ipmi_powernv.c b/drivers/char/ipmi/ipmi_powernv.c
index c59a86eb58c7..4a2efafcd1f8 100644
--- a/drivers/char/ipmi/ipmi_powernv.c
+++ b/drivers/char/ipmi/ipmi_powernv.c

- .remove_new = ipmi_powernv_remove,

diff --git a/drivers/char/ipmi/ipmi_poweroff.c b/drivers/char/ipmi/ipmi_poweroff.c
index 941d2dcc8c9d..e63c316d8aaa 100644
--- a/drivers/char/ipmi/ipmi_poweroff.c
+++ b/drivers/char/ipmi/ipmi_poweroff.c

-static struct ctl_table ipmi_table[] = {

- rv = ipmi_destroy_user(ipmi_user);

- pr_err("could not cleanup the IPMI user: 0x%x\n", rv);

diff --git a/drivers/char/ipmi/ipmi_si_pci.c b/drivers/char/ipmi/ipmi_si_pci.c
index b83d55685b22..8c0ea637aba0 100644
--- a/drivers/char/ipmi/ipmi_si_pci.c
+++ b/drivers/char/ipmi/ipmi_si_pci.c

- dev_info(&pdev->dev, "%pR regsize %d spacing %d irq %d\n",

diff --git a/drivers/char/ipmi/ipmi_si_platform.c b/drivers/char/ipmi/ipmi_si_platform.c
index 96ba85648120..550cabd43ae6 100644
--- a/drivers/char/ipmi/ipmi_si_platform.c
+++ b/drivers/char/ipmi/ipmi_si_platform.c

- .remove_new = ipmi_remove,

diff --git a/drivers/char/ipmi/ipmi_ssif.c b/drivers/char/ipmi/ipmi_ssif.c
index d04b391048fb..506d9988721e 100644
--- a/drivers/char/ipmi/ipmi_ssif.c
+++ b/drivers/char/ipmi/ipmi_ssif.c

- .remove_new = ssif_platform_remove,

diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c
index 335eea80054e..f1875b2bebbc 100644
--- a/drivers/char/ipmi/ipmi_watchdog.c
+++ b/drivers/char/ipmi/ipmi_watchdog.c

- rv = ipmi_destroy_user(loc_user);

- pr_warn("error unlinking from IPMI: %d\n", rv);

diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c
index 227bf06c7ca4..c03bc1ec593a 100644
--- a/drivers/char/ipmi/kcs_bmc_aspeed.c
+++ b/drivers/char/ipmi/kcs_bmc_aspeed.c

- .remove_new = aspeed_kcs_remove,

diff --git a/drivers/char/ipmi/kcs_bmc_npcm7xx.c b/drivers/char/ipmi/kcs_bmc_npcm7xx.c
index 07710198233a..4808a61bf273 100644
--- a/drivers/char/ipmi/kcs_bmc_npcm7xx.c
+++ b/drivers/char/ipmi/kcs_bmc_npcm7xx.c

- .remove_new = npcm7xx_kcs_remove,

diff --git a/drivers/char/ipmi/ssif_bmc.c b/drivers/char/ipmi/ssif_bmc.c
index a14fafc583d4..310f17dd9511 100644
--- a/drivers/char/ipmi/ssif_bmc.c
+++ b/drivers/char/ipmi/ssif_bmc.c

- memset(&ssif_bmc->part_buf, 0, sizeof(struct ssif_part_buffer));

- if (ssif_bmc->is_singlepart_read || ssif_bmc->block_num == 0xFF)

diff --git a/drivers/char/misc.c b/drivers/char/misc.c
index 541edc26ec89..2cf595d2e10b 100644
--- a/drivers/char/misc.c
+++ b/drivers/char/misc.c

-static int misc_minor_alloc(void)

- ret = ida_alloc_max(&misc_minors_ida, DYNAMIC_MINORS - 1, GFP_KERNEL);

- ret = DYNAMIC_MINORS - ret - 1;

- ret = ida_alloc_range(&misc_minors_ida, MISC_DYNAMIC_MINOR + 1,

- MINORMASK, GFP_KERNEL);

- int i = misc_minor_alloc();

diff --git a/drivers/char/powernv-op-panel.c b/drivers/char/powernv-op-panel.c
index f2cff1a6fed5..53467b0a6187 100644
--- a/drivers/char/powernv-op-panel.c
+++ b/drivers/char/powernv-op-panel.c

- .remove_new = oppanel_remove,

diff --git a/drivers/char/random.c b/drivers/char/random.c
index 23ee76bbb4aa..2581186fa61b 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c

-static struct ctl_table random_table[] = {

diff --git a/drivers/char/sonypi.c b/drivers/char/sonypi.c
index 0f8185e541ed..f887569fd3d0 100644
--- a/drivers/char/sonypi.c
+++ b/drivers/char/sonypi.c

- .remove_new = sonypi_remove,

diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig
index cf0be8a7939d..0fc9a510e059 100644
--- a/drivers/char/tpm/Kconfig
+++ b/drivers/char/tpm/Kconfig

- depends on PPC64 || HAS_IOPORT_MAP

diff --git a/drivers/char/tpm/eventlog/acpi.c b/drivers/char/tpm/eventlog/acpi.c
index 69533d0bfb51..cf02ec646f46 100644
--- a/drivers/char/tpm/eventlog/acpi.c
+++ b/drivers/char/tpm/eventlog/acpi.c

- log->bios_event_log = devm_kmalloc(&chip->dev, len, GFP_KERNEL);

- devm_kfree(&chip->dev, log->bios_event_log);

diff --git a/drivers/char/tpm/tpm-buf.c b/drivers/char/tpm/tpm-buf.c
index cad0048bcc3c..e49a19fea3bd 100644
--- a/drivers/char/tpm/tpm-buf.c
+++ b/drivers/char/tpm/tpm-buf.c

diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c
index 854546000c92..7df7abaf3e52 100644
--- a/drivers/char/tpm/tpm-chip.c
+++ b/drivers/char/tpm/tpm-chip.c

- /* Give back zero bytes, as TPM chip has not yet fully resumed: */

- if (chip->flags & TPM_CHIP_FLAG_SUSPENDED)

diff --git a/drivers/char/tpm/tpm-dev-common.c b/drivers/char/tpm/tpm-dev-common.c
index c3fbbf4d3db7..48ff87444f85 100644
--- a/drivers/char/tpm/tpm-dev-common.c
+++ b/drivers/char/tpm/tpm-dev-common.c

diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c
index 5da134f12c9a..b1daa0d7b341 100644
--- a/drivers/char/tpm/tpm-interface.c
+++ b/drivers/char/tpm/tpm-interface.c

- rc = tpm_try_get_ops(chip);

- if (chip->flags & TPM_CHIP_FLAG_TPM2)

- tpm2_shutdown(chip, TPM2_SU_STATE);

- rc = tpm1_pm_suspend(chip, tpm_suspend_pcr);

- tpm_put_ops(chip);

diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c
index 1e856259219e..dfdcbd009720 100644
--- a/drivers/char/tpm/tpm2-cmd.c
+++ b/drivers/char/tpm/tpm2-cmd.c

- rc = tpm2_start_auth_session(chip);

- tpm2_end_auth_session(chip);

- tpm_buf_append_name(chip, &buf, pcr_idx, NULL);

- tpm_buf_append_hmac_session(chip, &buf, 0, NULL, 0);

- tpm_buf_fill_hmac_session(chip, &buf);

- rc = tpm_buf_check_hmac_response(chip, &buf, rc);

diff --git a/drivers/char/tpm/tpm2-sessions.c b/drivers/char/tpm/tpm2-sessions.c
index 511c67061728..b70165b588ec 100644
--- a/drivers/char/tpm/tpm2-sessions.c
+++ b/drivers/char/tpm/tpm2-sessions.c

- tpm_buf_append_u32(buf, handle);

- /* count the number of handles in the upper bits of flags */

- /* offset tells us where the sessions area begins */

- int offset = buf->handles * 4 + TPM_HEADER_SIZE;

- u32 len = 9 + passphrase_len;

- if (tpm_buf_length(buf) != offset) {

- /* not the first session so update the existing length */

- len += get_unaligned_be32(&buf->data[offset]);

- put_unaligned_be32(len, &buf->data[offset]);

- tpm_buf_append_u32(buf, len);

- tpm_buf_append_u32(buf, TPM2_RS_PW);

- tpm_buf_append_u16(buf, 0);

- tpm_buf_append_u8(buf, 0);

- tpm_buf_append_u16(buf, passphrase_len);

- tpm_buf_append(buf, passphrase, passphrase_len);

-static void tpm_buf_append_salt(struct tpm_buf *buf, struct tpm_chip *chip)

- sg_init_one(d, chip->auth->salt, EC_PT_SZ);

- tpm2_KDFe(chip->auth->salt, "SECRET", x, chip->null_ec_key_x,

- chip->auth->salt);

- memzero_explicit(auth, sizeof(*auth));

- if (rc != -EINVAL)

- /* an integrity failure may mean the TPM has been reset */

- dev_err(&chip->dev, "NULL key integrity failure!\n");

- /* check the null name against what we know */

- tpm2_create_primary(chip, TPM2_RH_NULL, NULL, name);

- if (memcmp(name, chip->null_key_name, sizeof(name)) == 0)

- /* name unchanged, assume transient integrity failure */

- * Fatal TPM failure: the NULL seed has actually changed, so

- * the TPM must have been illegally reset. All in-kernel TPM

- * operations will fail because the NULL primary can't be

- * loaded to salt the sessions, but disable the TPM anyway so

- * userspace programmes can't be compromised by it.

- dev_err(&chip->dev, "NULL name has changed, disabling TPM due to interference\n");

- chip->flags |= TPM_CHIP_FLAG_DISABLE;

- struct tpm2_auth *auth = chip->auth;

- dev_warn_once(&chip->dev, "auth session is not active\n");

- tpm_buf_append_salt(&buf, chip);

- dev_err(&chip->dev, "TPM: security failed (NULL seed derivation): %d\n", rc);

- chip->auth = kmalloc(sizeof(*chip->auth), GFP_KERNEL);

-EXPORT_SYMBOL(tpm2_sessions_init);

diff --git a/drivers/char/tpm/tpm_atmel.c b/drivers/char/tpm/tpm_atmel.c
index 9fb2defa9dc4..54a0360a3c95 100644
--- a/drivers/char/tpm/tpm_atmel.c
+++ b/drivers/char/tpm/tpm_atmel.c

-#include "tpm_atmel.h"

- atmel_put_base_addr(priv->iobase);

- atmel_put_base_addr(iobase);

diff --git a/drivers/char/tpm/tpm_atmel.h b/drivers/char/tpm/tpm_atmel.h
deleted file mode 100644
index 7ac3f69dcf0f..000000000000
--- a/drivers/char/tpm/tpm_atmel.h
+++ /dev/null

-/* SPDX-License-Identifier: GPL-2.0-only */

- * Kylene Hall <kjhall@us.ibm.com>

- * Maintained by: <tpmdd-devel@lists.sourceforge.net>

- * Device driver for TCG/TCPA TPM (trusted platform module).

- * Specifications at www.trustedcomputinggroup.org

- * These difference are required on power because the device must be

- * discovered through the device tree and iomap must be used to get

- * around the need for holes in the io_page_mask. This does not happen

- * automatically because the tpm is not a normal pci device and lives

- * under the root node.

-struct tpm_atmel_priv {

- unsigned long base;

- void __iomem *iobase;

-#ifdef CONFIG_PPC64

-#include <linux/of.h>

-#define atmel_getb(priv, offset) readb(priv->iobase + offset)

-#define atmel_putb(val, priv, offset) writeb(val, priv->iobase + offset)

-#define atmel_request_region request_mem_region

-#define atmel_release_region release_mem_region

-static inline void atmel_put_base_addr(void __iomem *iobase)

-static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size)

- struct device_node *dn;

- unsigned long address, size;

- const unsigned int *reg;

- dn = of_find_node_by_name(NULL, "tpm");

- if (!of_device_is_compatible(dn, "AT97SC3201")) {

- reg = of_get_property(dn, "reg", &reglen);

- naddrc = of_n_addr_cells(dn);

- nsizec = of_n_size_cells(dn);

- address = ((unsigned long) reg[0] << 32) | reg[1];

- ((unsigned long) reg[naddrc] << 32) | reg[naddrc + 1];

- size = reg[naddrc];

- *region_size = size;

- return ioremap(*base, *region_size);

-#define atmel_getb(chip, offset) inb(atmel_get_priv(chip)->base + offset)

-#define atmel_putb(val, chip, offset) \

- outb(val, atmel_get_priv(chip)->base + offset)

-#define atmel_request_region request_region

-#define atmel_release_region release_region

-/* Atmel definitions */

-enum tpm_atmel_addr {

- TPM_ATMEL_BASE_ADDR_LO = 0x08,

- TPM_ATMEL_BASE_ADDR_HI = 0x09

-static inline int tpm_read_index(int base, int index)

- outb(index, base);

- return inb(base+1) & 0xFF;

-/* Verify this is a 1.1 Atmel TPM */

-static int atmel_verify_tpm11(void)

- /* verify that it is an Atmel part */

- if (tpm_read_index(TPM_ADDR, 4) != 'A' ||

- tpm_read_index(TPM_ADDR, 5) != 'T' ||

- tpm_read_index(TPM_ADDR, 6) != 'M' ||

- tpm_read_index(TPM_ADDR, 7) != 'L')

- /* query chip for its version number */

- if (tpm_read_index(TPM_ADDR, 0x00) != 1 ||

- tpm_read_index(TPM_ADDR, 0x01) != 1)

- /* This is an atmel supported part */

-static inline void atmel_put_base_addr(void __iomem *iobase)

-/* Determine where to talk to device */

-static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size)

- if (atmel_verify_tpm11() != 0)

- lo = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_LO);

- hi = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_HI);

- *base = (hi << 8) | lo;

- return ioport_map(*base, *region_size);

diff --git a/drivers/char/tpm/tpm_ftpm_tee.c b/drivers/char/tpm/tpm_ftpm_tee.c
index 2ea4882251cf..139556b21cc6 100644
--- a/drivers/char/tpm/tpm_ftpm_tee.c
+++ b/drivers/char/tpm/tpm_ftpm_tee.c

- .remove_new = ftpm_plat_tee_remove,

diff --git a/drivers/char/tpm/tpm_ibmvtpm.c b/drivers/char/tpm/tpm_ibmvtpm.c
index 1e5b107d1f3b..76d048f63d55 100644
--- a/drivers/char/tpm/tpm_ibmvtpm.c
+++ b/drivers/char/tpm/tpm_ibmvtpm.c

- rc = tpm_get_timeouts(chip);

- goto init_irq_cleanup;

- if (chip->flags & TPM_CHIP_FLAG_TPM2) {

- rc = tpm2_get_cc_attrs_tbl(chip);

- goto init_irq_cleanup;

- rc = tpm2_sessions_init(chip);

- goto init_irq_cleanup;

diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 2f7326d297ad..9aa230a63616 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c

- .remove_new = tpm_tis_plat_remove,

diff --git a/drivers/char/tpm/tpm_tis_i2c_cr50.c b/drivers/char/tpm/tpm_tis_i2c_cr50.c
index adf22992138e..3b55a7b05c46 100644
--- a/drivers/char/tpm/tpm_tis_i2c_cr50.c
+++ b/drivers/char/tpm/tpm_tis_i2c_cr50.c

-#define TPM_CR50_I2C_DID_VID 0x00281ae0L /* Device and vendor ID reg value */

-#define TPM_TI50_I2C_DID_VID 0x504a6666L /* Device and vendor ID reg value */

- i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);

- i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);

- i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);

- i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);

- * tpm_cr50_check_locality() - Verify TPM locality 0 is active.

-static int tpm_cr50_check_locality(struct tpm_chip *chip)

- rc = tpm_cr50_i2c_read(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf));

- * @force: Flag to force release if set.

-static void tpm_cr50_release_locality(struct tpm_chip *chip, bool force)

- u8 addr = TPM_I2C_ACCESS(0);

- if (tpm_cr50_i2c_read(chip, addr, &buf, sizeof(buf)) < 0)

- if (force || (buf & mask) == mask) {

- tpm_cr50_i2c_write(chip, addr, &buf, sizeof(buf));

- * tpm_cr50_request_locality() - Request TPM locality 0.

-static int tpm_cr50_request_locality(struct tpm_chip *chip)

- if (!tpm_cr50_check_locality(chip))

- rc = tpm_cr50_i2c_write(chip, TPM_I2C_ACCESS(0), &buf, sizeof(buf));

- if (!tpm_cr50_check_locality(chip))

- return -ETIMEDOUT;

- if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0)

- tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), buf, sizeof(buf));

- if (tpm_cr50_i2c_read(chip, TPM_I2C_STS(0), buf, sizeof(buf)) < 0) {

- u8 addr = TPM_I2C_DATA_FIFO(0);

- tpm_cr50_release_locality(chip, false);

- rc = tpm_cr50_request_locality(chip);

- rc = tpm_cr50_i2c_write(chip, TPM_I2C_DATA_FIFO(0), &buf[sent], limit);

- rc = tpm_cr50_i2c_write(chip, TPM_I2C_STS(0), tpm_go,

- tpm_cr50_release_locality(chip, false);

- rc = tpm_cr50_request_locality(chip);

- rc = tpm_cr50_i2c_read(chip, TPM_I2C_DID_VID(0), buf, sizeof(buf));

- tpm_cr50_release_locality(chip, true);

- if (vendor != TPM_CR50_I2C_DID_VID && vendor != TPM_TI50_I2C_DID_VID) {

- tpm_cr50_release_locality(chip, true);

- vendor == TPM_TI50_I2C_DID_VID ? "ti50" : "cr50",

- tpm_cr50_release_locality(chip, true);

diff --git a/drivers/char/tpm/tpm_tis_synquacer.c b/drivers/char/tpm/tpm_tis_synquacer.c
index 0621ebec530b..4927714d277a 100644
--- a/drivers/char/tpm/tpm_tis_synquacer.c
+++ b/drivers/char/tpm/tpm_tis_synquacer.c

- .remove_new = tpm_tis_synquacer_remove,

diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c
index 99a7f2441e70..24442485e73e 100644
--- a/drivers/char/virtio_console.c
+++ b/drivers/char/virtio_console.c

- src = kmap_atomic(buf->page);

- kunmap_atomic(src);

- err = init_vqs(portdev);

- dev_err(&vdev->dev, "Error %d initializing vqs\n", err);

- virtio_device_ready(portdev->vdev);

diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
index 4f6c3cb8aa41..34a345dc5e72 100644
--- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c
+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c

- .remove_new = hwicap_drv_remove,

diff --git a/drivers/char/xillybus/xillybus_of.c b/drivers/char/xillybus/xillybus_of.c
index 8802e2a6fd20..1a1e64133315 100644
--- a/drivers/char/xillybus/xillybus_of.c
+++ b/drivers/char/xillybus/xillybus_of.c

- .remove_new = xilly_drv_remove,

diff --git a/drivers/clk/.kunitconfig b/drivers/clk/.kunitconfig
index 54ece9207055..08e26137f3d9 100644
--- a/drivers/clk/.kunitconfig
+++ b/drivers/clk/.kunitconfig

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 299bc678ed1b..713573b6c86c 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig

- depends on SOC_LAN966 || COMPILE_TEST

- controlled by software. For now, only the TWL6032 clocks are

- select OF_OVERLAY if OF

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index fb8878a5d7d9..bf4bd45adc3a 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile

diff --git a/drivers/clk/analogbits/wrpll-cln28hpc.c b/drivers/clk/analogbits/wrpll-cln28hpc.c
index 65d422a588e1..9d178afc73bd 100644
--- a/drivers/clk/analogbits/wrpll-cln28hpc.c
+++ b/drivers/clk/analogbits/wrpll-cln28hpc.c

- delta = abs(target_rate - vco);

diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 8e3684ba2c74..9128a06b860d 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile

diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 15c46489ba85..7a544e429d34 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c

-#define MASTER_MAX_ID 4

diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
index fda041102224..cefd9948e103 100644
--- a/drivers/clk/at91/clk-sam9x60-pll.c
+++ b/drivers/clk/at91/clk-sam9x60-pll.c

-#define PLL_MAX_ID 7

diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 5aa9c1f1c886..acf780a81589 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c

diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
new file mode 100644
index 000000000000..a5d40df8b2f2
--- /dev/null
+++ b/drivers/clk/at91/sama7d65.c

diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 7741d8f3dbee..021d1b412af4 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c

- struct clk_hw *slow_rc, *slow_osc;

- clk_data->hws[0] = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck",

- if (IS_ERR(clk_data->hws[0]))

- clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck",

- &at91sam9x60_bits);

- if (IS_ERR(clk_data->hws[1]))

- at91_clk_unregister_sam9x5_slow(clk_data->hws[1]);

- clk_hw_unregister(clk_data->hws[0]);

diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index ec5749e301ba..2b0ea882f1e4 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c

- enable ? "enable" : "disable", name);

diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c
index a18a8768feb4..0e1fe3759530 100644
--- a/drivers/clk/bcm/clk-raspberrypi.c
+++ b/drivers/clk/bcm/clk-raspberrypi.c

- .disable_turbo = cpu_to_le32(1),

- struct raspberrypi_clk_data *data =

- container_of(hw, struct raspberrypi_clk_data, hw);

- struct raspberrypi_clk_data *data =

- container_of(hw, struct raspberrypi_clk_data, hw);

- struct raspberrypi_clk_data *data =

- container_of(hw, struct raspberrypi_clk_data, hw);

- struct raspberrypi_clk_data *data =

- container_of(hw, struct raspberrypi_clk_data, hw);

diff --git a/drivers/clk/clk-apple-nco.c b/drivers/clk/clk-apple-nco.c
index 39472a51530a..457a48d48941 100644
--- a/drivers/clk/clk-apple-nco.c
+++ b/drivers/clk/clk-apple-nco.c

diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index bf4d8ddc93ae..934e53a96ddd 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c

- if (init.num_parents < 1 || init.num_parents > 2)

diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c
index dd3d42d9ad86..d0705bb03a2a 100644
--- a/drivers/clk/clk-cdce706.c
+++ b/drivers/clk/clk-cdce706.c

diff --git a/drivers/clk/clk-cdce925.c b/drivers/clk/clk-cdce925.c
index e48be7a6c0e2..c51818c1af98 100644
--- a/drivers/clk/clk-cdce925.c
+++ b/drivers/clk/clk-cdce925.c

-static struct regmap_bus regmap_cdce925_bus = {

diff --git a/drivers/clk/clk-devres.c b/drivers/clk/clk-devres.c
index 82ae1f26e634..5368d92d9b39 100644
--- a/drivers/clk/clk-devres.c
+++ b/drivers/clk/clk-devres.c

-int __must_check devm_clk_bulk_get_all_enable(struct device *dev,

- struct clk_bulk_data **clks)

-EXPORT_SYMBOL_GPL(devm_clk_bulk_get_all_enable);

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index a2c2b5203b0a..c1f426b8a504 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c

- void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,

- u8 clk_divider_flags, const struct clk_div_table *table,

- void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,

diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c
index 22fbea61c3dc..15bbdeb60b8e 100644
--- a/drivers/clk/clk-en7523.c
+++ b/drivers/clk/clk-en7523.c

-#define REG_PCIE0_MEM 0x00

-#define REG_PCIE0_MEM_MASK 0x04

-#define REG_PCIE1_MEM 0x08

-#define REG_PCIE1_MEM_MASK 0x0c

-#define REG_PCIE2_MEM 0x10

-#define REG_PCIE2_MEM_MASK 0x14

-#define REG_RST_CTRL2 0x00

-#define REG_RST_CTRL1 0x04

- const u16 *bank_ofs;

- const u16 *idx_map;

- int (*hw_init)(struct platform_device *pdev, void __iomem *np_base);

-static unsigned int en7523_get_base_rate(void __iomem *base, unsigned int i)

- const struct en_clk_desc *desc = &en7523_base_clks[i];

- val = readl(base + desc->base_reg);

-static u32 en7523_get_div(void __iomem *base, int i)

- const struct en_clk_desc *desc = &en7523_base_clks[i];

- reg = desc->div_reg ? desc->div_reg : desc->base_reg;

- val = readl(base + reg);

-static int en7581_clk_hw_init(struct platform_device *pdev,

- void __iomem *np_base)

- void __iomem *pb_base;

- pb_base = devm_platform_ioremap_resource(pdev, 3);

- if (IS_ERR(pb_base))

- return PTR_ERR(pb_base);

- val = readl(np_base + REG_NP_SCU_SSTR);

- val &= ~(REG_PCIE_XSI0_SEL_MASK | REG_PCIE_XSI1_SEL_MASK);

- writel(val, np_base + REG_NP_SCU_SSTR);

- val = readl(np_base + REG_NP_SCU_PCIC);

- writel(val | 3, np_base + REG_NP_SCU_PCIC);

- writel(0x20000000, pb_base + REG_PCIE0_MEM);

- writel(0xfc000000, pb_base + REG_PCIE0_MEM_MASK);

- writel(0x24000000, pb_base + REG_PCIE1_MEM);

- writel(0xfc000000, pb_base + REG_PCIE1_MEM_MASK);

- writel(0x28000000, pb_base + REG_PCIE2_MEM);

- writel(0xfc000000, pb_base + REG_PCIE2_MEM_MASK);

-static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data,

- void __iomem *base, void __iomem *np_base)

- for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {

- const struct en_clk_desc *desc = &en7523_base_clks[i];

- rate = en7523_get_base_rate(base, i);

- rate /= en7523_get_div(base, i);

- hw = en7523_register_pcie_clk(dev, np_base);

- clk_data->num = EN7523_NUM_CLOCKS;

-static const struct reset_control_ops en7523_reset_ops = {

-static int en7523_reset_register(struct platform_device *pdev,

- const struct en_clk_soc_data *soc_data)

- struct device *dev = &pdev->dev;

- void __iomem *base;

- /* no reset lines available */

- if (!soc_data->reset.idx_map_nr)

- base = devm_platform_ioremap_resource(pdev, 2);

- return PTR_ERR(base);

- rst_data->bank_ofs = soc_data->reset.bank_ofs;

- rst_data->idx_map = soc_data->reset.idx_map;

- rst_data->rcdev.nr_resets = soc_data->reset.idx_map_nr;

- rst_data->rcdev.ops = &en7523_reset_ops;

-static int en7523_clk_probe(struct platform_device *pdev)

- struct device_node *node = pdev->dev.of_node;

- const struct en_clk_soc_data *soc_data;

- struct clk_hw_onecell_data *clk_data;

- void __iomem *base, *np_base;

- np_base = devm_platform_ioremap_resource(pdev, 1);

- if (IS_ERR(np_base))

- return PTR_ERR(np_base);

- if (soc_data->hw_init) {

- r = soc_data->hw_init(pdev, np_base);

- struct_size(clk_data, hws, EN7523_NUM_CLOCKS),

- en7523_register_clocks(&pdev->dev, clk_data, base, np_base);

- r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

- return dev_err_probe(&pdev->dev, r, "Could not register clock provider: %s\n",

- r = en7523_reset_register(pdev, soc_data);

- of_clk_del_provider(node);

- return dev_err_probe(&pdev->dev, r, "Could not register reset controller: %s\n",

- .bank_ofs = en7581_rst_ofs,

- .idx_map = en7581_rst_map,

- .idx_map_nr = ARRAY_SIZE(en7581_rst_map),

diff --git a/drivers/clk/clk-ep93xx.c b/drivers/clk/clk-ep93xx.c
index f888aed79b11..4bd8d6ecf6a2 100644
--- a/drivers/clk/clk-ep93xx.c
+++ b/drivers/clk/clk-ep93xx.c

- const char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };

- const char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };

- const char pclk_divisors[] = { 1, 2, 4, 8 };

diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c
new file mode 100644
index 000000000000..640c25788487
--- /dev/null
+++ b/drivers/clk/clk-eyeq.c

diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index 8fba63fc70c5..e62ae8794d44 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c

diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c
index 5b114043771d..9099c57e2715 100644
--- a/drivers/clk/clk-gpio.c
+++ b/drivers/clk/clk-gpio.c

- * prepare - clk_(un)prepare only ensures parent is (un)prepared

- * enable - clk_enable and clk_disable are functional & control gpio

- if (IS_ERR(gpiod)) {

- ret = PTR_ERR(gpiod);

- if (ret == -EPROBE_DEFER)

- pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",

- pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",

diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
index 870fd7df50c1..16e0405fe28b 100644
--- a/drivers/clk/clk-lan966x.c
+++ b/drivers/clk/clk-lan966x.c

-static const char *clk_names[N_CLOCKS] = {

-static const struct clk_gate_soc_desc clk_gate_desc[] = {

- for (i = GCK_GATE_UHPHS; i < N_CLOCKS; ++i) {

- int idx = i - GCK_GATE_UHPHS;

- devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,

- "lan966x", 0, gate_base,

- clk_gate_desc[idx].bit_idx,

- clk_gate_desc[idx].name);

- hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, N_CLOCKS),

- hw_data->num = GCK_GATE_UHPHS;

- for (i = 0; i < GCK_GATE_UHPHS; i++) {

- init.name = clk_names[i];

- hw_data->num = N_CLOCKS;

- ret = lan966x_gate_clk_register(dev, hw_data, gate_base);

- { .compatible = "microchip,lan966x-gck", },

diff --git a/drivers/clk/clk-lmk04832.c b/drivers/clk/clk-lmk04832.c
index c997e7491996..2bcf422f0b04 100644
--- a/drivers/clk/clk-lmk04832.c
+++ b/drivers/clk/clk-lmk04832.c

- const unsigned int pll2_p[] = {8, 2, 2, 3, 4, 5, 6, 7};

- const int dclk_div_adj[] = {0, 0, -2, -2, 0, 3, -1, 0};

diff --git a/drivers/clk/clk-loongson2.c b/drivers/clk/clk-loongson2.c
index 820bb1e9e3b7..27e632edd484 100644
--- a/drivers/clk/clk-loongson2.c
+++ b/drivers/clk/clk-loongson2.c

- struct clk_hw_onecell_data clk_data;

- clp->clk_data.num = clks_num + 1;

- hw = clk_hw_register_fixed_rate_parent_data(dev, p->name, pdata,

- 0, p->fixed_rate);

diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c
index 06245681dac7..fc0aeb4247f2 100644
--- a/drivers/clk/clk-nomadik.c
+++ b/drivers/clk/clk-nomadik.c

- (val & SRC_XTALCR_SXTALDIS) ? "disabled" : "enabled");

- (val & SRC_XTALCR_MXTALSTAT) ? "enabled" : "disabled");

diff --git a/drivers/clk/clk-npcm8xx.c b/drivers/clk/clk-npcm8xx.c
new file mode 100644
index 000000000000..2138c011411d
--- /dev/null
+++ b/drivers/clk/clk-npcm8xx.c

+ { NPCM8XX_CLKDIV1, 26, 2, "ahb", &hw_pre_clk, CLK_DIVIDER_READ_ONLY, CLK_IS_CRITICAL, NPCM8XX_CLK_AHB },

+ { NPCM8XX_CLKDIV1, 28, 3, "adc", &npcm8xx_pre_divs[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_ADC },

+ { NPCM8XX_CLKDIV2, 30, 2, "apb4", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB4 },

+ { NPCM8XX_CLKDIV2, 28, 2, "apb3", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB3 },

+ { NPCM8XX_CLKDIV2, 26, 2, "apb2", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB2 },

+ { NPCM8XX_CLKDIV2, 24, 2, "apb1", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB1 },

+ { NPCM8XX_CLKDIV2, 22, 2, "apb5", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_APB5 },

+ { NPCM8XX_CLKDIV2, 16, 5, "clkout", &npcm8xx_muxes[8].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_CLKOUT },

+ { NPCM8XX_CLKDIV2, 8, 5, "usb_bridge", &npcm8xx_muxes[4].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_SU },

+ { NPCM8XX_CLKDIV2, 4, 4, "usb_host", &npcm8xx_muxes[4].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_SU48 },

+ { NPCM8XX_CLKDIV3, 16, 8, "spi1", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_SPI1 },

+ { NPCM8XX_CLKDIV3, 11, 5, "uart2", &npcm8xx_muxes[3].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_UART2 },

+ { NPCM8XX_CLKDIV3, 6, 5, "spi0", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_SPI0 },

+ { NPCM8XX_CLKDIV3, 1, 5, "spix", &npcm8xx_pre_divs[1].hw, CLK_DIVIDER_READ_ONLY, 0, NPCM8XX_CLK_SPIX },

+ { NPCM8XX_THRTL_CNT, 0, 2, "th", &npcm8xx_muxes[0].hw, CLK_DIVIDER_READ_ONLY | CLK_DIVIDER_POWER_OF_TWO, 0, NPCM8XX_CLK_TH },

diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 4dcde305944c..a560edeb4b55 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c

- struct device_node *parent_np;

- parent_np = of_get_parent(np);

- of_node_put(parent_np);

diff --git a/drivers/clk/clk-si514.c b/drivers/clk/clk-si514.c
index 6ee148e5469d..1127c35ce57d 100644
--- a/drivers/clk/clk-si514.c
+++ b/drivers/clk/clk-si514.c

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 07c13ebe327d..f476883bc93b 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c

- n = (readl(base + pll->offset) >> 6) & 0x1ff;

- val = readl(base + pll->offset) & ~(0x1ff << 6);

- writel(val | ((n & 0x1ff) << 6), base + pll->offset);

- struct clk_hw *pll_src_hw;

- stm32f4_rcc_register_pll("vco_in", &data->pll_data[0],

- &stm32f4_clk_lock);

diff --git a/drivers/clk/clk-twl.c b/drivers/clk/clk-twl.c
index eab9d3c8ed8a..20bc3bf8fd62 100644
--- a/drivers/clk/clk-twl.c
+++ b/drivers/clk/clk-twl.c

-#define VREG_STATE 2

- ret = twlclk_write(cinfo, TWL_MODULE_PM_RECEIVER, VREG_STATE,

- TWL6030_CFG_STATE_ON);

- dev_err(cinfo->dev, "clk prepare failed\n");

- ret = twlclk_write(cinfo, TWL_MODULE_PM_RECEIVER, VREG_STATE,

- TWL6030_CFG_STATE_OFF);

-static int twl6032_clks_is_prepared(struct clk_hw *hw)

- struct twl_clock_info *cinfo = to_twl_clks_info(hw);

- val = twlclk_read(cinfo, TWL_MODULE_PM_RECEIVER, VREG_STATE);

- dev_err(cinfo->dev, "clk read failed\n");

- val &= TWL6030_CFG_STATE_MASK;

- return val == TWL6030_CFG_STATE_ON;

- .is_prepared = twl6032_clks_is_prepared,

diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c
index 76d7ea1964c3..9fe27dace111 100644
--- a/drivers/clk/clk-versaclock3.c
+++ b/drivers/clk/clk-versaclock3.c

-#define VC3_PLL2_VCO_MIN 400000000UL

-#define VC3_PLL2_VCO_MAX 1200000000UL

- unsigned long vco_min;

- unsigned long vco_max;

- if (rate < pll->vco_min)

- rate = pll->vco_min;

- if (rate > pll->vco_max)

- rate = pll->vco_max;

- .vco_min = VC3_PLL1_VCO_MIN,

- .vco_max = VC3_PLL1_VCO_MAX

- .vco_min = VC3_PLL2_VCO_MIN,

- .vco_max = VC3_PLL2_VCO_MAX

- .vco_min = VC3_PLL3_VCO_MIN,

- .vco_max = VC3_PLL3_VCO_MAX

- .bitmsk = VC3_SE2_CTRL_REG0_SE2_CLK_SEL

- { .compatible = "renesas,5p35023" },

diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index 0c3d0cee98c8..96946a8e2854 100644
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c

- data & pclk->param.reg_clk_mask ? "enabled" :

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index d02451f951cf..cf7720b9172f 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c

-bool clk_hw_rate_is_protected(const struct clk_hw *hw)

- return clk_core_rate_is_protected(hw->core);

-EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);

- if (of_property_present(clkspec.np, "clock-indices") && !found)

diff --git a/drivers/clk/clk_kunit_helpers.c b/drivers/clk/clk_kunit_helpers.c
index 52fd25594c96..68a28e70bb61 100644
--- a/drivers/clk/clk_kunit_helpers.c
+++ b/drivers/clk/clk_kunit_helpers.c

diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c
index 41fc8eba3418..f08feeaa3750 100644
--- a/drivers/clk/clk_test.c
+++ b/drivers/clk/clk_test.c

- ret = clk_hw_register(NULL, &ctx->parents_ctx[0].hw);

- ret = clk_hw_register(NULL, &ctx->parents_ctx[1].hw);

- ret = clk_hw_register(NULL, &ctx->hw);

-clk_multiple_parents_mux_test_exit(struct kunit *test)

- struct clk_multiple_parent_ctx *ctx = test->priv;

- clk_hw_unregister(&ctx->hw);

- clk_hw_unregister(&ctx->parents_ctx[0].hw);

- clk_hw_unregister(&ctx->parents_ctx[1].hw);

- struct clk *clk = clk_hw_get_clk(hw, NULL);

- parent1 = clk_hw_get_clk(&ctx->parents_ctx[0].hw, NULL);

- parent2 = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL);

- .exit = clk_multiple_parents_mux_test_exit,

- ret = clk_hw_register(NULL, &ctx->parents_ctx[1].hw);

- ret = clk_hw_register(NULL, &ctx->hw);

-clk_orphan_transparent_multiple_parent_mux_test_exit(struct kunit *test)

- struct clk_multiple_parent_ctx *ctx = test->priv;

- clk_hw_unregister(&ctx->hw);

- clk_hw_unregister(&ctx->parents_ctx[1].hw);

- struct clk *clk = clk_hw_get_clk(hw, NULL);

- parent = clk_hw_get_clk(&ctx->parents_ctx[1].hw, NULL);

- .exit = clk_orphan_transparent_multiple_parent_mux_test_exit,

- ret = clk_hw_register(NULL, &ctx->parent_ctx.hw);

- ret = clk_hw_register(NULL, &ctx->hw);

- struct clk *clk = clk_hw_get_clk(hw, NULL);

- .exit = clk_single_parent_mux_test_exit,

+static const struct clk_assigned_rates_test_param clk_assigned_rates_assigns_multiple_test_params[] = {

diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c
index 5bbbb3a66477..82727b1fc67a 100644
--- a/drivers/clk/davinci/pll.c
+++ b/drivers/clk/davinci/pll.c

-#include <linux/platform_data/clk-davinci-pll.h>

-static struct davinci_pll_platform_data *davinci_pll_get_pdata(struct device *dev)

- struct davinci_pll_platform_data *pdata = dev_get_platdata(dev);

- * Platform data is optional, so allocate a new struct if one was not

- * provided. For device tree, this will always be the case.

- pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);

- /* for device tree, we need to fill in the struct */

- syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");

- struct davinci_pll_platform_data *pdata;

- pdata = davinci_pll_get_pdata(dev);

- dev_err(dev, "missing platform data\n");

- return pll_init(dev, base, pdata->cfgchip);

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 591e0364ee5c..85771afd4698 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c

- writel_relaxed(val, pll->base + PLL_CTRL);

diff --git a/drivers/clk/imx/clk-imx8-acm.c b/drivers/clk/imx/clk-imx8-acm.c
index 6c351050b82a..c169fe53a35f 100644
--- a/drivers/clk/imx/clk-imx8-acm.c
+++ b/drivers/clk/imx/clk-imx8-acm.c

- if (IS_ERR(dev_pm->pd_dev_link[i])) {

- ret = PTR_ERR(dev_pm->pd_dev_link[i]);

diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index b2cb157703c5..c409fc7e0618 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c

-static int clk_imx8mp_audiomix_reset_controller_register(struct clk_imx8mp_audiomix_priv *priv)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 516dbd170c8a..fb18f507f121 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c

- "arm_pll_out", "sys_pll1", "sys_pll2", "sys_pll3",

- "dummy", "dummy", "osc_24m", "dummy", "osc_32k"};

diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index c6a9bc8ecc1f..c5f358a75f30 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c

- { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_FLEXIO1, "flexio1_root", 0x0500, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_FLEXIO2, "flexio2_root", 0x0580, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_ML_APB, "ml_apb_root", 0x2180, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_ML, "ml_root", 0x2200, FAST_SEL, },

- { IMX93_CLK_MEDIA_LDB, "media_ldb_root", 0x2380, VIDEO_SEL, },

- { IMX93_CLK_MIPI_TEST_BYTE, "mipi_test_byte_root", 0x2500, VIDEO_SEL, },

- { IMX93_CLK_MIPI_PHY_CFG, "mipi_phy_cfg_root", 0x2580, VIDEO_SEL, },

- { IMX93_CLK_ENET, "enet_root", 0x2b00, NON_IO_SEL, },

- { IMX93_CLK_ENET_TIMER1, "enet_timer1_root", 0x2b80, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_ENET_TIMER2, "enet_timer2_root", 0x2c00, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_ENET_REF, "enet_ref_root", 0x2c80, NON_IO_SEL, },

- { IMX93_CLK_ENET_REF_PHY, "enet_ref_phy_root", 0x2d00, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_I3C1_SLOW, "i3c1_slow_root", 0x2d80, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_I3C2_SLOW, "i3c2_slow_root", 0x2e00, LOW_SPEED_IO_SEL, },

- { IMX93_CLK_MU1_A_GATE, "mu1_a", "bus_aon_root", 0x84c0, CLK_IGNORE_UNUSED },

- { IMX93_CLK_MU2_A_GATE, "mu2_a", "bus_wakeup_root", 0x84c0, CLK_IGNORE_UNUSED },

- { IMX93_CLK_MU1_B_GATE, "mu1_b", "bus_aon_root", 0x8500, 0, &share_count_mub },

- { IMX93_CLK_MU2_B_GATE, "mu2_b", "bus_wakeup_root", 0x8500, 0, &share_count_mub },

- { IMX93_CLK_FLEXIO1_GATE, "flexio1", "flexio1_root", 0x8980, },

- { IMX93_CLK_FLEXIO2_GATE, "flexio2", "flexio2_root", 0x89c0, },

- { IMX93_CLK_MIPI_DSI_GATE, "mipi_dsi", "media_apb_root", 0x95c0, },

- { IMX93_CLK_LVDS_GATE, "lvds", "media_ldb_root", 0x9600, },

- { IMX93_CLK_PXP_GATE, "pxp", "media_apb_root", 0x9680, },

- { IMX93_CLK_SPDIF_GATE, "spdif", "spdif_root", 0x9c00, },

- { IMX93_CLK_ENET1_GATE, "enet1", "wakeup_axi_root", 0x9e00, },

- { IMX93_CLK_ENET_QOS_GATE, "enet_qos", "wakeup_axi_root", 0x9e40, },

- clks[root->clk] = imx93_clk_composite_flags(root->name,

- parent_names[root->sel],

- 4, base + root->off, 3,

- clks[ccgr->clk] = imx93_clk_gate(NULL, ccgr->name, ccgr->parent_name,

- ccgr->flags, base + ccgr->off, 0, 1, 1, 3,

- ccgr->shared_count);

- { .compatible = "fsl,imx93-ccm" },

diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c b/drivers/clk/imx/clk-imx95-blk-ctl.c
index 19a62da74be4..25974947ad0c 100644
--- a/drivers/clk/imx/clk-imx95-blk-ctl.c
+++ b/drivers/clk/imx/clk-imx95-blk-ctl.c

diff --git a/drivers/clk/imx/clk-lpcg-scu.c b/drivers/clk/imx/clk-lpcg-scu.c
index dd5abd09f3e2..6376557a3c3d 100644
--- a/drivers/clk/imx/clk-lpcg-scu.c
+++ b/drivers/clk/imx/clk-lpcg-scu.c

- writel(reg, clk->reg);

- * FIXME: Sometimes writes don't work unless the CPU issues

- writel(clk->state, clk->reg);

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index d63564dbb12c..f290981ea13b 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c

diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c
index b1dd0c08e091..b27186aaf2a1 100644
--- a/drivers/clk/imx/clk-scu.c
+++ b/drivers/clk/imx/clk-scu.c

- clk->is_enabled = clk_hw_is_enabled(&clk->hw);

diff --git a/drivers/clk/kunit_clk_assigned_rates.h b/drivers/clk/kunit_clk_assigned_rates.h
new file mode 100644
index 000000000000..df2d84dcaa93
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates.h

diff --git a/drivers/clk/kunit_clk_assigned_rates_multiple.dtso b/drivers/clk/kunit_clk_assigned_rates_multiple.dtso
new file mode 100644
index 000000000000..e600736e70f5
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_multiple.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_multiple_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_multiple_consumer.dtso
new file mode 100644
index 000000000000..260aba458daf
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_multiple_consumer.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_null.dtso b/drivers/clk/kunit_clk_assigned_rates_null.dtso
new file mode 100644
index 000000000000..0b27b38a9130
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_null.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_null_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_null_consumer.dtso
new file mode 100644
index 000000000000..99fb332ae83d
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_null_consumer.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_one.dtso b/drivers/clk/kunit_clk_assigned_rates_one.dtso
new file mode 100644
index 000000000000..dd95ec9b1cf9
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_one.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_one_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_one_consumer.dtso
new file mode 100644
index 000000000000..a41dca806318
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_one_consumer.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_u64_multiple.dtso b/drivers/clk/kunit_clk_assigned_rates_u64_multiple.dtso
new file mode 100644
index 000000000000..389b4e2eb7f7
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_u64_multiple.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_u64_multiple_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_u64_multiple_consumer.dtso
new file mode 100644
index 000000000000..3e117fd59b7d
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_u64_multiple_consumer.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_u64_one.dtso b/drivers/clk/kunit_clk_assigned_rates_u64_one.dtso
new file mode 100644
index 000000000000..87041264e8f5
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_u64_one.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_u64_one_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_u64_one_consumer.dtso
new file mode 100644
index 000000000000..3259c003aec0
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_u64_one_consumer.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_without.dtso b/drivers/clk/kunit_clk_assigned_rates_without.dtso
new file mode 100644
index 000000000000..22d333495cf2
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_without.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_without_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_without_consumer.dtso
new file mode 100644
index 000000000000..75ac09140f83
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_without_consumer.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_zero.dtso b/drivers/clk/kunit_clk_assigned_rates_zero.dtso
new file mode 100644
index 000000000000..08e042c2eafe
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_zero.dtso

diff --git a/drivers/clk/kunit_clk_assigned_rates_zero_consumer.dtso b/drivers/clk/kunit_clk_assigned_rates_zero_consumer.dtso
new file mode 100644
index 000000000000..1d964672e855
--- /dev/null
+++ b/drivers/clk/kunit_clk_assigned_rates_zero_consumer.dtso

diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
index 70a005e7e1b1..5f8e6d68fa14 100644
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig

-config COMMON_CLK_MT8195_AUDSYS

- tristate "Clock driver for MediaTek MT8195 audsys"

- depends on COMMON_CLK_MT8195

- default COMMON_CLK_MT8195

- This driver supports MediaTek MT8195 audsys clocks.

-config COMMON_CLK_MT8195_MSDC

- tristate "Clock driver for MediaTek MT8195 msdc"

- depends on COMMON_CLK_MT8195

- default COMMON_CLK_MT8195

- This driver supports MediaTek MT8195 MMC and SD Controller's

- msdc and msdc_top clocks.

diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index eeccfa039896..6efec95406bd 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile

obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o reset.o clk-mux.o

+obj-$(CONFIG_COMMON_CLK_MT6735) += clk-mt6735-apmixedsys.o clk-mt6735-infracfg.o clk-mt6735-pericfg.o clk-mt6735-topckgen.o

diff --git a/drivers/clk/mediatek/clk-mt2701-aud.c b/drivers/clk/mediatek/clk-mt2701-aud.c
index 425c69cfb105..e103121cf58e 100644
--- a/drivers/clk/mediatek/clk-mt2701-aud.c
+++ b/drivers/clk/mediatek/clk-mt2701-aud.c

diff --git a/drivers/clk/mediatek/clk-mt2701-bdp.c b/drivers/clk/mediatek/clk-mt2701-bdp.c
index 5da3eabffd3e..f11c7a4fa37b 100644
--- a/drivers/clk/mediatek/clk-mt2701-bdp.c
+++ b/drivers/clk/mediatek/clk-mt2701-bdp.c

diff --git a/drivers/clk/mediatek/clk-mt2701-img.c b/drivers/clk/mediatek/clk-mt2701-img.c
index 875594bc9dcb..c158e54c4652 100644
--- a/drivers/clk/mediatek/clk-mt2701-img.c
+++ b/drivers/clk/mediatek/clk-mt2701-img.c

diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c
index bc68fa718878..474d87d62e83 100644
--- a/drivers/clk/mediatek/clk-mt2701-mm.c
+++ b/drivers/clk/mediatek/clk-mt2701-mm.c

diff --git a/drivers/clk/mediatek/clk-mt2701-vdec.c b/drivers/clk/mediatek/clk-mt2701-vdec.c
index 94db86f8d0a4..5299d92f3aba 100644
--- a/drivers/clk/mediatek/clk-mt2701-vdec.c
+++ b/drivers/clk/mediatek/clk-mt2701-vdec.c

diff --git a/drivers/clk/mediatek/clk-mt6735-apmixedsys.c b/drivers/clk/mediatek/clk-mt6735-apmixedsys.c
new file mode 100644
index 000000000000..e0949911e8f7
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-apmixedsys.c

+ PLL(CLK_APMIXED_ARMPLL, "armpll", ARMPLL_CON0, ARMPLL_PWR_CON0, 0x00000001, 0, ARMPLL_CON1, 24, 0, 0, 0, ARMPLL_CON1, 21, PLL_AO),

+ PLL(CLK_APMIXED_MAINPLL, "mainpll", MAINPLL_CON0, MAINPLL_PWR_CON0, 0xf0000101, CON0_RST_BAR, MAINPLL_CON1, 24, 0, 0, 0, MAINPLL_CON1, 21, HAVE_RST_BAR),

+ PLL(CLK_APMIXED_UNIVPLL, "univpll", UNIVPLL_CON0, UNIVPLL_PWR_CON0, 0xfc000001, CON0_RST_BAR, UNIVPLL_CON1, 24, 0, 0, 0, UNIVPLL_CON1, 21, HAVE_RST_BAR),

+ PLL(CLK_APMIXED_MMPLL, "mmpll", MMPLL_CON0, MMPLL_PWR_CON0, 0x00000001, 0, MMPLL_CON1, 24, 0, 0, 0, MMPLL_CON1, 21, 0),

+ PLL(CLK_APMIXED_MSDCPLL, "msdcpll", MSDCPLL_CON0, MSDCPLL_PWR_CON0, 0x00000001, 0, MSDCPLL_CON1, 24, 0, 0, 0, MSDCPLL_CON1, 21, 0),

+ PLL(CLK_APMIXED_VENCPLL, "vencpll", VENCPLL_CON0, VENCPLL_PWR_CON0, 0x00000001, CON0_RST_BAR, VENCPLL_CON1, 24, 0, 0, 0, VENCPLL_CON1, 21, HAVE_RST_BAR),

+ PLL(CLK_APMIXED_TVDPLL, "tvdpll", TVDPLL_CON0, TVDPLL_PWR_CON0, 0x00000001, 0, TVDPLL_CON1, 24, 0, 0, 0, TVDPLL_CON1, 21, 0),

+ PLL(CLK_APMIXED_APLL1, "apll1", APLL1_CON0, APLL1_PWR_CON0, 0x00000001, 0, APLL1_CON0, 4, APLL1_CON2, AP_PLL_CON_5, 0, APLL1_CON1, 31, 0),

+ PLL(CLK_APMIXED_APLL2, "apll2", APLL2_CON0, APLL2_PWR_CON0, 0x00000001, 0, APLL2_CON0, 4, APLL2_CON2, AP_PLL_CON_5, 1, APLL2_CON1, 31, 0)

diff --git a/drivers/clk/mediatek/clk-mt6735-imgsys.c b/drivers/clk/mediatek/clk-mt6735-imgsys.c
new file mode 100644
index 000000000000..c564f8f72432
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-imgsys.c

diff --git a/drivers/clk/mediatek/clk-mt6735-infracfg.c b/drivers/clk/mediatek/clk-mt6735-infracfg.c
new file mode 100644
index 000000000000..c1171f903cfa
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-infracfg.c

+ GATE_MTK(CLK_INFRA_CONNMCU_BUS, "connmcu_bus", "axi_sel", &infra_cg_regs, 15, &mtk_clk_gate_ops_setclr),

+ GATE_MTK_FLAGS(CLK_INFRA_APXGPT, "apxgpt", "axi_sel", &infra_cg_regs, 18, &mtk_clk_gate_ops_setclr, CLK_IS_CRITICAL),

diff --git a/drivers/clk/mediatek/clk-mt6735-mfgcfg.c b/drivers/clk/mediatek/clk-mt6735-mfgcfg.c
new file mode 100644
index 000000000000..1f5aedddf209
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-mfgcfg.c

diff --git a/drivers/clk/mediatek/clk-mt6735-pericfg.c b/drivers/clk/mediatek/clk-mt6735-pericfg.c
new file mode 100644
index 000000000000..cbdf6d25c1b2
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-pericfg.c

diff --git a/drivers/clk/mediatek/clk-mt6735-topckgen.c b/drivers/clk/mediatek/clk-mt6735-topckgen.c
new file mode 100644
index 000000000000..2589ebfe2271
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-topckgen.c

+ MUX_CLR_SET_UPD(CLK_TOP_AXI_SEL, "axi_sel", axi_sel_parents, CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR, 0, 3, 0, 0),

+ MUX_CLR_SET_UPD(CLK_TOP_MEM_SEL, "mem_sel", mem_sel_parents, CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR, 8, 1, 0, 0),

+ MUX_CLR_SET_UPD(CLK_TOP_DDRPHY_SEL, "ddrphycfg_sel", ddrphycfg_parents, CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR, 16, 1, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MM_SEL, "mm_sel", mm_sel_parents, CLK_CFG_0, CLK_CFG_0_SET, CLK_CFG_0_CLR, 24, 3, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CFG_1_CLR, 0, 2, 7, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CFG_1_CLR, 8, 3, 15, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MFG_SEL, "mfg_sel", mfg_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CFG_1_CLR, 16, 4, 23, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CFG_1_CLR, 24, 3, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_UART_SEL, "uart_sel", uart_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 0, 1, 7, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 8, 3, 15, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_USB20_SEL, "usb20_sel", usb20_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 16, 2, 23, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", msdc50_0_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 24, 3, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_0_sel_parents, CLK_CFG_3, CLK_CFG_3_SET, CLK_CFG_3_CLR, 0, 4, 7, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_1_2_sel_parents, CLK_CFG_3, CLK_CFG_3_SET, CLK_CFG_3_CLR, 8, 3, 15, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_1_2_sel_parents, CLK_CFG_3, CLK_CFG_3_SET, CLK_CFG_3_CLR, 16, 3, 23, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel", msdc30_3_sel_parents, CLK_CFG_3, CLK_CFG_3_SET, CLK_CFG_3_CLR, 24, 4, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 0, 2, 7, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 8, 2, 15, 0, 0),

+ MUX_CLR_SET_UPD(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 16, 3, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, CLK_CFG_4_CLR, 24, 2, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel", atb_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 0, 2, 7, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 8, 3, 15, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_SCAM_SEL, "scam_sel", scam_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 16, 2, 23, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_MFG13M_SEL, "mfg13m_sel", mfg13m_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 24, 1, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD1_SEL, "aud_1_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 0, 1, 7, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD2_SEL, "aud_2_sel", aud_1_2_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 8, 1, 15, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_IRDA_SEL, "irda_sel", irda_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 16, 1, 23, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_IRTX_SEL, "irtx_sel", irtx_sel_parents, CLK_CFG_6, CLK_CFG_6_SET, CLK_CFG_6_CLR, 24, 1, 31, 0, 0),

+ MUX_GATE_CLR_SET_UPD(CLK_TOP_DISPPWM_SEL, "disppwm_sel", disppwm_sel_parents, CLK_CFG_7, CLK_CFG_7_SET, CLK_CFG_7_CLR, 0, 2, 7, 0, 0),

diff --git a/drivers/clk/mediatek/clk-mt6735-vdecsys.c b/drivers/clk/mediatek/clk-mt6735-vdecsys.c
new file mode 100644
index 000000000000..8817085fc1db
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-vdecsys.c

+ GATE_MTK(CLK_VDEC_SMI_LARB1, "smi_larb1", "vdec_sel", &smi_larb1_cg_regs, 0, &mtk_clk_gate_ops_setclr_inv),

diff --git a/drivers/clk/mediatek/clk-mt6735-vencsys.c b/drivers/clk/mediatek/clk-mt6735-vencsys.c
new file mode 100644
index 000000000000..8dec7f98492a
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt6735-vencsys.c

diff --git a/drivers/clk/mediatek/clk-mt8188-topckgen.c b/drivers/clk/mediatek/clk-mt8188-topckgen.c
index c4baf4076ed6..6b07abe9a8f5 100644
--- a/drivers/clk/mediatek/clk-mt8188-topckgen.c
+++ b/drivers/clk/mediatek/clk-mt8188-topckgen.c

diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index 78f648c9c97d..be2e3a5f8336 100644
--- a/drivers/clk/meson/Kconfig
+++ b/drivers/clk/meson/Kconfig

diff --git a/drivers/clk/meson/a1-peripherals.c b/drivers/clk/meson/a1-peripherals.c
index 7aa6abb2eb1f..36489e0f948a 100644
--- a/drivers/clk/meson/a1-peripherals.c
+++ b/drivers/clk/meson/a1-peripherals.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/a1-pll.c b/drivers/clk/meson/a1-pll.c
index 8e5a42d1afbb..8d7c7b4493c4 100644
--- a/drivers/clk/meson/a1-pll.c
+++ b/drivers/clk/meson/a1-pll.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/axg-aoclk.c b/drivers/clk/meson/axg-aoclk.c
index 1dabc81535a6..f44091ffb57d 100644
--- a/drivers/clk/meson/axg-aoclk.c
+++ b/drivers/clk/meson/axg-aoclk.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
index beda86349389..9df627b142f8 100644
--- a/drivers/clk/meson/axg-audio.c
+++ b/drivers/clk/meson/axg-audio.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 757c7a28c53d..448eece246ca 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c

-static DEFINE_SPINLOCK(meson_clk_lock);

- .lock = &meson_clk_lock,

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/c3-peripherals.c b/drivers/clk/meson/c3-peripherals.c
index 7dcbf4ebee07..2075668ed306 100644
--- a/drivers/clk/meson/c3-peripherals.c
+++ b/drivers/clk/meson/c3-peripherals.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/c3-pll.c b/drivers/clk/meson/c3-pll.c
index 32bd2ed9d304..ed4bc495862e 100644
--- a/drivers/clk/meson/c3-pll.c
+++ b/drivers/clk/meson/c3-pll.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/clk-cpu-dyndiv.c b/drivers/clk/meson/clk-cpu-dyndiv.c
index 6c1f58826e24..cb043b52b65d 100644
--- a/drivers/clk/meson/clk-cpu-dyndiv.c
+++ b/drivers/clk/meson/clk-cpu-dyndiv.c

-EXPORT_SYMBOL_NS_GPL(meson_clk_cpu_dyndiv_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/clk-dualdiv.c b/drivers/clk/meson/clk-dualdiv.c
index 913bf25d3771..c896cf29b318 100644
--- a/drivers/clk/meson/clk-dualdiv.c
+++ b/drivers/clk/meson/clk-dualdiv.c

-EXPORT_SYMBOL_NS_GPL(meson_clk_dualdiv_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_clk_dualdiv_ro_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c
index f639d56f0fd3..ee91e32b4050 100644
--- a/drivers/clk/meson/clk-mpll.c
+++ b/drivers/clk/meson/clk-mpll.c

- unsigned long flags = 0;

- spin_lock_irqsave(mpll->lock, flags);

- __acquire(mpll->lock);

- spin_unlock_irqrestore(mpll->lock, flags);

- __release(mpll->lock);

-EXPORT_SYMBOL_NS_GPL(meson_clk_mpll_ro_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_clk_mpll_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/clk-mpll.h b/drivers/clk/meson/clk-mpll.h
index a991d568c43a..4ffd3aeef799 100644
--- a/drivers/clk/meson/clk-mpll.h
+++ b/drivers/clk/meson/clk-mpll.h

diff --git a/drivers/clk/meson/clk-phase.c b/drivers/clk/meson/clk-phase.c
index c1526fbfb6c4..701211120610 100644
--- a/drivers/clk/meson/clk-phase.c
+++ b/drivers/clk/meson/clk-phase.c

-EXPORT_SYMBOL_NS_GPL(meson_clk_phase_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_clk_triphase_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_sclk_ws_inv_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index bc570a2ff3a3..e8e53855b00a 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c

- rate += DIV_ROUND_UP_ULL(frac_rate,

- (1 << pll->frac.width));

- unsigned int frac_max = (1 << pll->frac.width);

-EXPORT_SYMBOL_NS_GPL(meson_clk_pcie_pll_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_clk_pll_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_clk_pll_ro_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/clk-pll.h b/drivers/clk/meson/clk-pll.h
index 7b6b87274073..949157fb7bf5 100644
--- a/drivers/clk/meson/clk-pll.h
+++ b/drivers/clk/meson/clk-pll.h

diff --git a/drivers/clk/meson/clk-regmap.c b/drivers/clk/meson/clk-regmap.c
index 07f7e441b916..f3e504f67571 100644
--- a/drivers/clk/meson/clk-regmap.c
+++ b/drivers/clk/meson/clk-regmap.c

-EXPORT_SYMBOL_NS_GPL(clk_regmap_gate_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(clk_regmap_gate_ro_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(clk_regmap_divider_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(clk_regmap_divider_ro_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(clk_regmap_mux_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(clk_regmap_mux_ro_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/g12a-aoclk.c b/drivers/clk/meson/g12a-aoclk.c
index f0a18d8c9fc2..71c758ffa493 100644
--- a/drivers/clk/meson/g12a-aoclk.c
+++ b/drivers/clk/meson/g12a-aoclk.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 02dda57105b1..cfffd434e998 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c

-static DEFINE_SPINLOCK(meson_clk_lock);

- .lock = &meson_clk_lock,

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c
index 83b034157b35..43940232f718 100644
--- a/drivers/clk/meson/gxbb-aoclk.c
+++ b/drivers/clk/meson/gxbb-aoclk.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index f071faad1ebb..8575b8485385 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c

-static DEFINE_SPINLOCK(meson_clk_lock);

- .lock = &meson_clk_lock,

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/meson-aoclk.c b/drivers/clk/meson/meson-aoclk.c
index 053940ee8940..995be51987f4 100644
--- a/drivers/clk/meson/meson-aoclk.c
+++ b/drivers/clk/meson/meson-aoclk.c

-EXPORT_SYMBOL_NS_GPL(meson_aoclkc_probe, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/meson-clkc-utils.c b/drivers/clk/meson/meson-clkc-utils.c
index a8cd2c21fab7..6937d1482719 100644
--- a/drivers/clk/meson/meson-clkc-utils.c
+++ b/drivers/clk/meson/meson-clkc-utils.c

-EXPORT_SYMBOL_NS_GPL(meson_clk_hw_get, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/meson-eeclk.c b/drivers/clk/meson/meson-eeclk.c
index 66f79e384fe5..3053ee7425eb 100644
--- a/drivers/clk/meson/meson-eeclk.c
+++ b/drivers/clk/meson/meson-eeclk.c

-EXPORT_SYMBOL_NS_GPL(meson_eeclkc_probe, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index b7417ac262d3..e4b474c5f86c 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c

-static DEFINE_SPINLOCK(meson_clk_lock);

- .lock = &meson_clk_lock,

- unsigned long flags;

- spin_lock_irqsave(&meson_clk_lock, flags);

- spin_unlock_irqrestore(&meson_clk_lock, flags);

diff --git a/drivers/clk/meson/s4-peripherals.c b/drivers/clk/meson/s4-peripherals.c
index c930cf0614a0..8a4037377787 100644
--- a/drivers/clk/meson/s4-peripherals.c
+++ b/drivers/clk/meson/s4-peripherals.c

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/s4-pll.c b/drivers/clk/meson/s4-pll.c
index b0258933fb9d..f9cc05a506e3 100644
--- a/drivers/clk/meson/s4-pll.c
+++ b/drivers/clk/meson/s4-pll.c

-static DEFINE_SPINLOCK(meson_clk_lock);

- { .reg = ANACTRL_HIFIPLL_CTRL1, .def = 0x00010e56 },

- .lock = &meson_clk_lock,

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/sclk-div.c b/drivers/clk/meson/sclk-div.c
index ae03b048182f..9c4945234f26 100644
--- a/drivers/clk/meson/sclk-div.c
+++ b/drivers/clk/meson/sclk-div.c

-EXPORT_SYMBOL_NS_GPL(meson_sclk_div_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c
index 36f637d2d01b..6a167ebdc8d7 100644
--- a/drivers/clk/meson/vclk.c
+++ b/drivers/clk/meson/vclk.c

-EXPORT_SYMBOL_NS_GPL(meson_vclk_gate_ops, CLK_MESON);

-EXPORT_SYMBOL_NS_GPL(meson_vclk_div_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/meson/vid-pll-div.c b/drivers/clk/meson/vid-pll-div.c
index 486cf68fc97a..965ed7281f57 100644
--- a/drivers/clk/meson/vid-pll-div.c
+++ b/drivers/clk/meson/vid-pll-div.c

-EXPORT_SYMBOL_NS_GPL(meson_vid_pll_div_ro_ops, CLK_MESON);

-MODULE_IMPORT_NS(CLK_MESON);

diff --git a/drivers/clk/microchip/clk-mpfs.c b/drivers/clk/microchip/clk-mpfs.c
index 28ec0da88cb3..c22632a7439c 100644
--- a/drivers/clk/microchip/clk-mpfs.c
+++ b/drivers/clk/microchip/clk-mpfs.c

-MODULE_IMPORT_NS(MCHP_CLK_MPFS);

diff --git a/drivers/clk/mmp/Makefile b/drivers/clk/mmp/Makefile
index 441bf83080a1..062cd87fa8dd 100644
--- a/drivers/clk/mmp/Makefile
+++ b/drivers/clk/mmp/Makefile

-obj-y += clk-of-pxa1928.o

+obj-$(CONFIG_ARCH_MMP) += clk-of-pxa1928.o clk-pxa1908-apbc.o clk-pxa1908-apbcp.o clk-pxa1908-apmu.o clk-pxa1908-mpmu.o

diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c
index 1b90867b60c4..6556f6ada2e8 100644
--- a/drivers/clk/mmp/clk-frac.c
+++ b/drivers/clk/mmp/clk-frac.c

- rate *= factor->ftbl[i].den;

- do_div(rate, factor->ftbl[i].num * factor->masks->factor);

- unsigned int val, num, den;

- num = (val >> masks->num_shift) & masks->num_mask;

- den = (val >> masks->den_shift) & masks->den_mask;

- rate = parent_rate;

- do_div(rate, num * factor->masks->factor);

- rate *= factor->ftbl[i].den;

- do_div(rate, factor->ftbl[i].num * factor->masks->factor);

- val |= (factor->ftbl[i].num & masks->num_mask) << masks->num_shift;

- val |= (factor->ftbl[i].den & masks->den_mask) << masks->den_shift;

- u32 val, num, den;

- num = (val >> masks->num_shift) & masks->num_mask;

- den = (val >> masks->den_shift) & masks->den_mask;

- if (den == factor->ftbl[i].den && num == factor->ftbl[i].num)

- val |= (factor->ftbl[0].num & masks->num_mask) <<

- val |= (factor->ftbl[0].den & masks->den_mask) <<

- struct mmp_clk_factor_tbl *ftbl,

- unsigned int ftbl_cnt, spinlock_t *lock)

diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index eaad36ee323d..a4f15cee630e 100644
--- a/drivers/clk/mmp/clk-of-mmp2.c
+++ b/drivers/clk/mmp/clk-of-mmp2.c

-static struct mmp_clk_factor_tbl uart_factor_tbl[] = {

- {.num = 8125, .den = 1536}, /*14.745MHZ */

- {.num = 3521, .den = 689}, /*19.23MHZ */

-static struct mmp_clk_factor_tbl i2s_factor_tbl[] = {

- {.num = 24868, .den = 511}, /* 2.0480 MHz */

- {.num = 28003, .den = 793}, /* 2.8224 MHz */

- {.num = 24941, .den = 1025}, /* 4.0960 MHz */

- {.num = 28003, .den = 1586}, /* 5.6448 MHz */

- {.num = 31158, .den = 2561}, /* 8.1920 MHz */

- {.num = 16288, .den = 1845}, /* 11.2896 MHz */

- {.num = 20772, .den = 2561}, /* 12.2880 MHz */

- {.num = 8144, .den = 1845}, /* 22.5792 MHz */

- {.num = 10386, .den = 2561}, /* 24.5760 MHz */

diff --git a/drivers/clk/mmp/clk-of-pxa168.c b/drivers/clk/mmp/clk-of-pxa168.c
index c5a7ba1deaa3..5f250427e60d 100644
--- a/drivers/clk/mmp/clk-of-pxa168.c
+++ b/drivers/clk/mmp/clk-of-pxa168.c

-static struct mmp_clk_factor_tbl uart_factor_tbl[] = {

- {.num = 8125, .den = 1536}, /*14.745MHZ */

diff --git a/drivers/clk/mmp/clk-of-pxa1928.c b/drivers/clk/mmp/clk-of-pxa1928.c
index 9def4b5f10e9..ebb6e278eda3 100644
--- a/drivers/clk/mmp/clk-of-pxa1928.c
+++ b/drivers/clk/mmp/clk-of-pxa1928.c

-static struct mmp_clk_factor_tbl uart_factor_tbl[] = {

- {.num = 832, .den = 234}, /*58.5MHZ */

- {.num = 1, .den = 1}, /*26MHZ */

diff --git a/drivers/clk/mmp/clk-of-pxa910.c b/drivers/clk/mmp/clk-of-pxa910.c
index 7a38c424782e..fe65e7bdb411 100644
--- a/drivers/clk/mmp/clk-of-pxa910.c
+++ b/drivers/clk/mmp/clk-of-pxa910.c

-static struct mmp_clk_factor_tbl uart_factor_tbl[] = {

- {.num = 8125, .den = 1536}, /*14.745MHZ */

diff --git a/drivers/clk/mmp/clk-pxa1908-apbc.c b/drivers/clk/mmp/clk-pxa1908-apbc.c
new file mode 100644
index 000000000000..3fd7b5e644f3
--- /dev/null
+++ b/drivers/clk/mmp/clk-pxa1908-apbc.c

+ {PXA1908_CLK_KPC, "kpc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_KPC, 0x7, 3, 0, MMP_CLK_GATE_NEED_DELAY, NULL},

+ {PXA1908_CLK_RTC, "rtc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_RTC, 0x87, 0x83, 0, MMP_CLK_GATE_NEED_DELAY, NULL},

+ {PXA1908_CLK_PWM0, "pwm0_clk", "pwm01_apb_share", CLK_SET_RATE_PARENT, APBC_PWM0, 0x2, 2, 0, 0, &pwm0_lock},

+ {PXA1908_CLK_PWM1, "pwm1_clk", "pwm01_apb_share", CLK_SET_RATE_PARENT, APBC_PWM1, 0x6, 2, 0, 0, NULL},

+ {PXA1908_CLK_PWM2, "pwm2_clk", "pwm23_apb_share", CLK_SET_RATE_PARENT, APBC_PWM2, 0x2, 2, 0, 0, NULL},

+ {PXA1908_CLK_PWM3, "pwm3_clk", "pwm23_apb_share", CLK_SET_RATE_PARENT, APBC_PWM3, 0x6, 2, 0, 0, NULL},

+ {PXA1908_CLK_UART0, "uart0_clk", "uart0_mux", CLK_SET_RATE_PARENT, APBC_UART0, 0x7, 3, 0, 0, &uart0_lock},

+ {PXA1908_CLK_UART1, "uart1_clk", "uart1_mux", CLK_SET_RATE_PARENT, APBC_UART1, 0x7, 3, 0, 0, &uart1_lock},

+ {0, "uart0_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART0, 4, 3, 0, &uart0_lock},

+ {0, "uart1_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART1, 4, 3, 0, &uart1_lock},

diff --git a/drivers/clk/mmp/clk-pxa1908-apbcp.c b/drivers/clk/mmp/clk-pxa1908-apbcp.c
new file mode 100644
index 000000000000..f638d7e89b47
--- /dev/null
+++ b/drivers/clk/mmp/clk-pxa1908-apbcp.c

+ {PXA1908_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, APBCP_UART2, 0x7, 0x3, 0x0, 0, &uart2_lock},

+ {PXA1908_CLK_TWSI2, "twsi2_clk", "pll1_32", CLK_SET_RATE_PARENT, APBCP_TWSI2, 0x7, 0x3, 0x0, 0, NULL},

+ {0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBCP_UART2, 4, 3, 0, &uart2_lock},

diff --git a/drivers/clk/mmp/clk-pxa1908-apmu.c b/drivers/clk/mmp/clk-pxa1908-apmu.c
new file mode 100644
index 000000000000..8cfb1258202f
--- /dev/null
+++ b/drivers/clk/mmp/clk-pxa1908-apmu.c

+ {PXA1908_CLK_PLL1_1248_GATE, "pll1_1248_gate", "pll1_1248", 0, APMU_CLK_GATE_CTRL, 28, 0, &pll1_lock},

+ {PXA1908_CLK_SDH0, "sdh0_clk", "sdh0_mix_clk", CLK_SET_RATE_PARENT | CLK_SET_RATE_UNGATE, APMU_SDH0, 0x12, 0x12, 0x0, 0, &sdh0_lock},

+ {PXA1908_CLK_SDH1, "sdh1_clk", "sdh1_mix_clk", CLK_SET_RATE_PARENT | CLK_SET_RATE_UNGATE, APMU_SDH1, 0x12, 0x12, 0x0, 0, &sdh1_lock},

+ {PXA1908_CLK_SDH2, "sdh2_clk", "sdh2_mix_clk", CLK_SET_RATE_PARENT | CLK_SET_RATE_UNGATE, APMU_SDH2, 0x12, 0x12, 0x0, 0, &sdh2_lock}

diff --git a/drivers/clk/mmp/clk-pxa1908-mpmu.c b/drivers/clk/mmp/clk-pxa1908-mpmu.c
new file mode 100644
index 000000000000..90b4b2488574
--- /dev/null
+++ b/drivers/clk/mmp/clk-pxa1908-mpmu.c

diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h
index 55ac05379781..c83cec169ddc 100644
--- a/drivers/clk/mmp/clk.h
+++ b/drivers/clk/mmp/clk.h

-struct mmp_clk_factor_tbl {

- struct mmp_clk_factor_tbl *ftbl;

- struct mmp_clk_factor_tbl *ftbl, unsigned int ftbl_cnt,

diff --git a/drivers/clk/mmp/pwr-island.c b/drivers/clk/mmp/pwr-island.c
index edaa2433a472..eaf5d2c5e593 100644
--- a/drivers/clk/mmp/pwr-island.c
+++ b/drivers/clk/mmp/pwr-island.c

- pm_genpd_init(&pm_domain->genpd, NULL, true);

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index a3e2a09e2105..69bbf62ba3cd 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig

- Support for the camera clock controller on SM8450 devices.

- depends on SM_GCC_8550 || SM_GCC_8650

- SM8550 or SM8650 devices.

- Support for the global clock controller on SM8450 devices.

- Support for the graphics clock controller on SM8450 devices.

- select SM_GCC_8550

diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 2b378667a63f..0db2f98bcb3e 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index e8632db2c542..d6c1aea7e9e1 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c

- .alpha_en_mask = BIT(24),

diff --git a/drivers/clk/qcom/camcc-sa8775p.c b/drivers/clk/qcom/camcc-sa8775p.c
new file mode 100644
index 000000000000..c04801a5af35
--- /dev/null
+++ b/drivers/clk/qcom/camcc-sa8775p.c

diff --git a/drivers/clk/qcom/camcc-sm8450.c b/drivers/clk/qcom/camcc-sm8450.c
index 26b78eed15ef..08982737e490 100644
--- a/drivers/clk/qcom/camcc-sm8450.c
+++ b/drivers/clk/qcom/camcc-sm8450.c

- clk_lucid_evo_pll_configure(&cam_cc_pll0, regmap, &cam_cc_pll0_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll1, regmap, &cam_cc_pll1_config);

- clk_rivian_evo_pll_configure(&cam_cc_pll2, regmap, &cam_cc_pll2_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll3, regmap, &cam_cc_pll3_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll4, regmap, &cam_cc_pll4_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll5, regmap, &cam_cc_pll5_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll6, regmap, &cam_cc_pll6_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll7, regmap, &cam_cc_pll7_config);

- clk_lucid_evo_pll_configure(&cam_cc_pll8, regmap, &cam_cc_pll8_config);

-MODULE_DESCRIPTION("QCOM CAMCC SM8450 Driver");

diff --git a/drivers/clk/qcom/camcc-x1e80100.c b/drivers/clk/qcom/camcc-x1e80100.c
index 85e76c7712ad..b73524ae64b1 100644
--- a/drivers/clk/qcom/camcc-x1e80100.c
+++ b/drivers/clk/qcom/camcc-x1e80100.c

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index f9105443d7db..9a65d14acf71 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c

-# define PLL_POST_DIV_MASK(p) GENMASK((p)->width - 1, 0)

- for (count = 200; count > 0; count--) {

- ret = trion_pll_is_enabled(pll, pll->clkr.regmap);

- ret = trion_pll_is_enabled(pll, regmap);

- pr_warn("%s PLL is already enabled\n", clk_hw_get_name(&pll->clkr.hw));

diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 55eca04b23a1..79aca8525262 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h

diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c
index 88845baa7f84..987141c91fe0 100644
--- a/drivers/clk/qcom/clk-rcg.c
+++ b/drivers/clk/qcom/clk-rcg.c

diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index 8e0f3372dc7a..4fbdf4880d03 100644
--- a/drivers/clk/qcom/clk-rcg.h
+++ b/drivers/clk/qcom/clk-rcg.h

diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index bf26c5448f00..8001fd9faf9d 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c

- * Calculate m/n:d rate

-static int __clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f,

- u32 cfg, mask, d_val, not2d_val, n_minus_m;

- int ret, index = qcom_find_src_index(hw, rcg->parent_map, f->src);

- mask |= CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK;

- cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;

-static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate,

- unsigned long parent_rate)

- f = qcom_find_freq(rcg->freq_tbl, rate);

- return clk_rcg2_shared_set_rate(hw, rate, parent_rate);

diff --git a/drivers/clk/qcom/clk-rpm.c b/drivers/clk/qcom/clk-rpm.c
index 9da034f8f2ff..ccc112c21667 100644
--- a/drivers/clk/qcom/clk-rpm.c
+++ b/drivers/clk/qcom/clk-rpm.c

- mutex_lock(&rpm_clk_lock);

- mutex_unlock(&rpm_clk_lock);

- mutex_lock(&rpm_clk_lock);

- mutex_unlock(&rpm_clk_lock);

diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 4acde937114a..c7675930fde1 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c

- enable ? "enable" : "disable");

- return c->aggr_state * c->unit;

- { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},

diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index 45c5255bcd11..29ef08a9d50b 100644
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c

- mutex_lock(&rpm_smd_clk_lock);

- mutex_unlock(&rpm_smd_clk_lock);

- mutex_lock(&rpm_smd_clk_lock);

- mutex_unlock(&rpm_smd_clk_lock);

diff --git a/drivers/clk/qcom/clk-spmi-pmic-div.c b/drivers/clk/qcom/clk-spmi-pmic-div.c
index f394031eb0e5..41a0a4f3b4fb 100644
--- a/drivers/clk/qcom/clk-spmi-pmic-div.c
+++ b/drivers/clk/qcom/clk-spmi-pmic-div.c

- unsigned long flags;

- spin_lock_irqsave(&clkdiv->lock, flags);

- spin_unlock_irqrestore(&clkdiv->lock, flags);

diff --git a/drivers/clk/qcom/common.h b/drivers/clk/qcom/common.h
index 7e57f8fe8ea6..7ace5d7f5836 100644
--- a/drivers/clk/qcom/common.h
+++ b/drivers/clk/qcom/common.h

- struct qcom_icc_hws_data *icc_hws;

diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
index 449ffea2295d..d7bb1399e102 100644
--- a/drivers/clk/qcom/dispcc-qcm2290.c
+++ b/drivers/clk/qcom/dispcc-qcm2290.c

- .alpha_en_mask = BIT(24),

diff --git a/drivers/clk/qcom/dispcc-sm6115.c b/drivers/clk/qcom/dispcc-sm6115.c
index 939887f82ecc..2b236d52b29f 100644
--- a/drivers/clk/qcom/dispcc-sm6115.c
+++ b/drivers/clk/qcom/dispcc-sm6115.c

- .alpha_en_mask = BIT(24),

diff --git a/drivers/clk/qcom/dispcc-sm6350.c b/drivers/clk/qcom/dispcc-sm6350.c
index 50facb36701a..2bc6b5f99f57 100644
--- a/drivers/clk/qcom/dispcc-sm6350.c
+++ b/drivers/clk/qcom/dispcc-sm6350.c

- .parent_data = &(const struct clk_parent_data){

- .fw_name = "bi_tcxo",

diff --git a/drivers/clk/qcom/dispcc-sm8450.c b/drivers/clk/qcom/dispcc-sm8450.c
index d1d3f60789ee..a1f183e6c636 100644
--- a/drivers/clk/qcom/dispcc-sm8450.c
+++ b/drivers/clk/qcom/dispcc-sm8450.c

- clk_lucid_evo_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config);

- clk_lucid_evo_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config);

-MODULE_DESCRIPTION("QTI DISPCC SM8450 Driver");

diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c
index 7f9021ca0ecb..e41d4104d770 100644
--- a/drivers/clk/qcom/dispcc-sm8550.c
+++ b/drivers/clk/qcom/dispcc-sm8550.c

-static const struct alpha_pll_config disp_cc_pll0_config = {

-static const struct alpha_pll_config disp_cc_pll1_config = {

diff --git a/drivers/clk/qcom/dispcc-sm8750.c b/drivers/clk/qcom/dispcc-sm8750.c
new file mode 100644
index 000000000000..0358dff91da5
--- /dev/null
+++ b/drivers/clk/qcom/dispcc-sm8750.c

diff --git a/drivers/clk/qcom/dispcc0-sa8775p.c b/drivers/clk/qcom/dispcc0-sa8775p.c
new file mode 100644
index 000000000000..6e399b5f1383
--- /dev/null
+++ b/drivers/clk/qcom/dispcc0-sa8775p.c

diff --git a/drivers/clk/qcom/dispcc1-sa8775p.c b/drivers/clk/qcom/dispcc1-sa8775p.c
new file mode 100644
index 000000000000..30ccea59415a
--- /dev/null
+++ b/drivers/clk/qcom/dispcc1-sa8775p.c

diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
index 9536b2b7d07c..9246e97d785a 100644
--- a/drivers/clk/qcom/gcc-ipq5332.c
+++ b/drivers/clk/qcom/gcc-ipq5332.c

-static struct clk_branch gcc_q6_ahb_clk = {

- .halt_reg = 0x25014,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x25014,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_ahb_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_wcss_ahb_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_ahb_s_clk = {

- .halt_reg = 0x25018,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x25018,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_ahb_s_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_wcss_ahb_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_axim_clk = {

- .halt_reg = 0x2500c,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x2500c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_axim_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_q6_axim_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_axis_clk = {

- .halt_reg = 0x25010,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x25010,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_axis_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_system_noc_bfdcd_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_tsctr_1to2_clk = {

- .halt_reg = 0x25020,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x25020,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_tsctr_1to2_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_tsctr_div2_clk_src.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6ss_atbm_clk = {

- .halt_reg = 0x2501c,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x2501c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_atbm_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_at_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6ss_pclkdbg_clk = {

- .halt_reg = 0x25024,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x25024,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_pclkdbg_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_dap_div_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6ss_trig_clk = {

- .halt_reg = 0x250a0,

- .halt_check = BRANCH_HALT_VOTED,

- .enable_reg = 0x250a0,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_trig_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_dap_div_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_sys_noc_wcss_ahb_clk = {

- .halt_reg = 0x2e030,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x2e030,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_sys_noc_wcss_ahb_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_wcss_ahb_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_axim_clk = {

- .halt_reg = 0x2505c,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x2505c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_axim_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_system_noc_bfdcd_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_axis_clk = {

- .halt_reg = 0x25060,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x25060,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_axis_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_system_noc_bfdcd_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_apb_bdg_clk = {

- .halt_reg = 0x25048,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x25048,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_apb_bdg_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_dap_div_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_apb_clk = {

- .halt_reg = 0x25038,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x25038,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_apb_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_dap_div_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_atb_bdg_clk = {

- .halt_reg = 0x2504c,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x2504c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_atb_bdg_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_at_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_atb_clk = {

- .halt_reg = 0x2503c,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x2503c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_atb_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_at_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_nts_bdg_clk = {

- .halt_reg = 0x25050,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x25050,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_nts_bdg_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_tsctr_div2_clk_src.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_nts_clk = {

- .halt_reg = 0x25040,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x25040,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_nts_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_qdss_tsctr_div2_clk_src.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_ecahb_clk = {

- .halt_reg = 0x25058,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x25058,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_ecahb_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_wcss_ahb_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_mst_async_bdg_clk = {

- .halt_reg = 0x2e0b0,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x2e0b0,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_mst_async_bdg_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_system_noc_bfdcd_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_slv_async_bdg_clk = {

- .halt_reg = 0x2e0b4,

- .halt_check = BRANCH_HALT,

- .enable_reg = 0x2e0b4,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_slv_async_bdg_clk",

- .parent_hws = (const struct clk_hw*[]) {

- &gcc_system_noc_bfdcd_clk_src.clkr.hw,

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

- [GCC_Q6_AHB_CLK] = &gcc_q6_ahb_clk.clkr,

- [GCC_Q6_AHB_S_CLK] = &gcc_q6_ahb_s_clk.clkr,

- [GCC_Q6_AXIM_CLK] = &gcc_q6_axim_clk.clkr,

- [GCC_Q6_AXIS_CLK] = &gcc_q6_axis_clk.clkr,

- [GCC_Q6_TSCTR_1TO2_CLK] = &gcc_q6_tsctr_1to2_clk.clkr,

- [GCC_Q6SS_ATBM_CLK] = &gcc_q6ss_atbm_clk.clkr,

- [GCC_Q6SS_PCLKDBG_CLK] = &gcc_q6ss_pclkdbg_clk.clkr,

- [GCC_Q6SS_TRIG_CLK] = &gcc_q6ss_trig_clk.clkr,

- [GCC_SYS_NOC_WCSS_AHB_CLK] = &gcc_sys_noc_wcss_ahb_clk.clkr,

- [GCC_WCSS_AXIM_CLK] = &gcc_wcss_axim_clk.clkr,

- [GCC_WCSS_AXIS_CLK] = &gcc_wcss_axis_clk.clkr,

- [GCC_WCSS_DBG_IFC_APB_BDG_CLK] = &gcc_wcss_dbg_ifc_apb_bdg_clk.clkr,

- [GCC_WCSS_DBG_IFC_APB_CLK] = &gcc_wcss_dbg_ifc_apb_clk.clkr,

- [GCC_WCSS_DBG_IFC_ATB_BDG_CLK] = &gcc_wcss_dbg_ifc_atb_bdg_clk.clkr,

- [GCC_WCSS_DBG_IFC_ATB_CLK] = &gcc_wcss_dbg_ifc_atb_clk.clkr,

- [GCC_WCSS_DBG_IFC_NTS_BDG_CLK] = &gcc_wcss_dbg_ifc_nts_bdg_clk.clkr,

- [GCC_WCSS_DBG_IFC_NTS_CLK] = &gcc_wcss_dbg_ifc_nts_clk.clkr,

- [GCC_WCSS_ECAHB_CLK] = &gcc_wcss_ecahb_clk.clkr,

- [GCC_WCSS_MST_ASYNC_BDG_CLK] = &gcc_wcss_mst_async_bdg_clk.clkr,

- [GCC_WCSS_SLV_ASYNC_BDG_CLK] = &gcc_wcss_slv_async_bdg_clk.clkr,

-static struct qcom_icc_hws_data icc_ipq5332_hws[] = {

diff --git a/drivers/clk/qcom/gcc-ipq5424.c b/drivers/clk/qcom/gcc-ipq5424.c
new file mode 100644
index 000000000000..d5b218b76e29
--- /dev/null
+++ b/drivers/clk/qcom/gcc-ipq5424.c

diff --git a/drivers/clk/qcom/gcc-ipq6018.c b/drivers/clk/qcom/gcc-ipq6018.c
index ab0f7fc665a9..d861191b0c85 100644
--- a/drivers/clk/qcom/gcc-ipq6018.c
+++ b/drivers/clk/qcom/gcc-ipq6018.c

- .alpha_en_mask = BIT(24),

diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
index 645109f75b46..6bb66a7e1fb6 100644
--- a/drivers/clk/qcom/gcc-ipq9574.c
+++ b/drivers/clk/qcom/gcc-ipq9574.c

-static struct clk_branch gcc_q6ss_boot_clk = {

- .halt_reg = 0x25080,

- .halt_check = BRANCH_HALT_SKIP,

- .enable_reg = 0x25080,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_boot_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &system_noc_bfdcd_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_ahb_clk = {

- .halt_reg = 0x25014,

- .enable_reg = 0x25014,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_ahb_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &wcss_ahb_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_ahb_s_clk = {

- .halt_reg = 0x25018,

- .enable_reg = 0x25018,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_ahb_s_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &wcss_ahb_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_ecahb_clk = {

- .halt_reg = 0x25058,

- .enable_reg = 0x25058,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_ecahb_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &wcss_ahb_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_acmt_clk = {

- .halt_reg = 0x2505c,

- .enable_reg = 0x2505c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_acmt_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &wcss_ahb_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_sys_noc_wcss_ahb_clk = {

- .halt_reg = 0x2e030,

- .enable_reg = 0x2e030,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_sys_noc_wcss_ahb_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &wcss_ahb_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_anoc_wcss_axi_m_clk = {

- .halt_reg = 0x2e0a8,

- .enable_reg = 0x2e0a8,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_anoc_wcss_axi_m_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &wcss_axi_m_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6ss_atbm_clk = {

- .halt_reg = 0x2501c,

- .enable_reg = 0x2501c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_atbm_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_at_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_atb_clk = {

- .halt_reg = 0x2503c,

- .enable_reg = 0x2503c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_atb_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_at_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_tsctr_1to2_clk = {

- .halt_reg = 0x25020,

- .enable_reg = 0x25020,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_tsctr_1to2_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_tsctr_div2_clk_src.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_nts_clk = {

- .halt_reg = 0x25040,

- .enable_reg = 0x25040,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_nts_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_tsctr_div2_clk_src.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6ss_pclkdbg_clk = {

- .halt_reg = 0x25024,

- .enable_reg = 0x25024,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_pclkdbg_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_dap_sync_clk_src.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6ss_trig_clk = {

- .halt_reg = 0x25068,

- .enable_reg = 0x25068,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6ss_trig_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_dap_sync_clk_src.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_apb_clk = {

- .halt_reg = 0x25038,

- .enable_reg = 0x25038,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_apb_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_dap_sync_clk_src.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_dbg_ifc_dapbus_clk = {

- .halt_reg = 0x25044,

- .enable_reg = 0x25044,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_dbg_ifc_dapbus_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &qdss_dap_sync_clk_src.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_q6_axim_clk = {

- .halt_reg = 0x2500c,

- .enable_reg = 0x2500c,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_q6_axim_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &q6_axi_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_wcss_q6_tbu_clk = {

- .halt_reg = 0x12050,

- .halt_check = BRANCH_HALT_DELAY,

- .enable_reg = 0xb00c,

- .enable_mask = BIT(6),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_wcss_q6_tbu_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &q6_axi_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

-static struct clk_branch gcc_mem_noc_q6_axi_clk = {

- .halt_reg = 0x19010,

- .enable_reg = 0x19010,

- .enable_mask = BIT(0),

- .hw.init = &(const struct clk_init_data) {

- .name = "gcc_mem_noc_q6_axi_clk",

- .parent_hws = (const struct clk_hw *[]) {

- &q6_axi_clk_src.clkr.hw

- .flags = CLK_SET_RATE_PARENT,

- .ops = &clk_branch2_ops,

- [GCC_Q6_AHB_CLK] = &gcc_q6_ahb_clk.clkr,

- [GCC_Q6_AHB_S_CLK] = &gcc_q6_ahb_s_clk.clkr,

- [GCC_WCSS_ECAHB_CLK] = &gcc_wcss_ecahb_clk.clkr,

- [GCC_WCSS_ACMT_CLK] = &gcc_wcss_acmt_clk.clkr,

- [GCC_SYS_NOC_WCSS_AHB_CLK] = &gcc_sys_noc_wcss_ahb_clk.clkr,

- [GCC_ANOC_WCSS_AXI_M_CLK] = &gcc_anoc_wcss_axi_m_clk.clkr,

- [GCC_Q6SS_ATBM_CLK] = &gcc_q6ss_atbm_clk.clkr,

- [GCC_WCSS_DBG_IFC_ATB_CLK] = &gcc_wcss_dbg_ifc_atb_clk.clkr,

- [GCC_Q6_TSCTR_1TO2_CLK] = &gcc_q6_tsctr_1to2_clk.clkr,

- [GCC_WCSS_DBG_IFC_NTS_CLK] = &gcc_wcss_dbg_ifc_nts_clk.clkr,

- [GCC_Q6SS_PCLKDBG_CLK] = &gcc_q6ss_pclkdbg_clk.clkr,

- [GCC_Q6SS_TRIG_CLK] = &gcc_q6ss_trig_clk.clkr,

- [GCC_WCSS_DBG_IFC_APB_CLK] = &gcc_wcss_dbg_ifc_apb_clk.clkr,

- [GCC_WCSS_DBG_IFC_DAPBUS_CLK] = &gcc_wcss_dbg_ifc_dapbus_clk.clkr,

- [GCC_Q6_AXIM_CLK] = &gcc_q6_axim_clk.clkr,

- [GCC_WCSS_Q6_TBU_CLK] = &gcc_wcss_q6_tbu_clk.clkr,

- [GCC_MEM_NOC_Q6_AXI_CLK] = &gcc_mem_noc_q6_axi_clk.clkr,

- [GCC_Q6SS_BOOT_CLK] = &gcc_q6ss_boot_clk.clkr,

-static struct qcom_icc_hws_data icc_ipq9574_hws[] = {

diff --git a/drivers/clk/qcom/gcc-mdm9607.c b/drivers/clk/qcom/gcc-mdm9607.c
index 6e6068b168e6..07f1b78d737a 100644
--- a/drivers/clk/qcom/gcc-mdm9607.c
+++ b/drivers/clk/qcom/gcc-mdm9607.c

- .cmd_rcgr = 0x6044,

diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index c3cfd572e7c1..5ca003c9bfba 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c

diff --git a/drivers/clk/qcom/gcc-qcs615.c b/drivers/clk/qcom/gcc-qcs615.c
new file mode 100644
index 000000000000..9695446bc2a3
--- /dev/null
+++ b/drivers/clk/qcom/gcc-qcs615.c

diff --git a/drivers/clk/qcom/gcc-qcs8300.c b/drivers/clk/qcom/gcc-qcs8300.c
new file mode 100644
index 000000000000..80831c7dea3b
--- /dev/null
+++ b/drivers/clk/qcom/gcc-qcs8300.c

diff --git a/drivers/clk/qcom/gcc-sar2130p.c b/drivers/clk/qcom/gcc-sar2130p.c
new file mode 100644
index 000000000000..475e2cda3618
--- /dev/null
+++ b/drivers/clk/qcom/gcc-sar2130p.c

diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c
index dc3aa7014c3e..6d0f9cede5cf 100644
--- a/drivers/clk/qcom/gcc-sdm845.c
+++ b/drivers/clk/qcom/gcc-sdm845.c

- F(19200000, P_BI_TCXO, 1, 0, 0),

- F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0),

- F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0),

- F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),

- F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),

- .ops = &clk_rcg2_ops,

- .ops = &clk_rcg2_shared_ops,

diff --git a/drivers/clk/qcom/gcc-sm6350.c b/drivers/clk/qcom/gcc-sm6350.c
index a811fad2aa27..74346dc02606 100644
--- a/drivers/clk/qcom/gcc-sm6350.c
+++ b/drivers/clk/qcom/gcc-sm6350.c

- .parent_data = &(const struct clk_parent_data){

- .fw_name = "bi_tcxo",

- .parent_data = &(const struct clk_parent_data){

- .fw_name = "bi_tcxo",

diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c
index c445c271678a..65d7d52bce03 100644
--- a/drivers/clk/qcom/gcc-sm8450.c
+++ b/drivers/clk/qcom/gcc-sm8450.c

-MODULE_DESCRIPTION("QTI GCC SM8450 Driver");

diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c
index 5abaeddd6afc..862a9bf73bcb 100644
--- a/drivers/clk/qcom/gcc-sm8550.c
+++ b/drivers/clk/qcom/gcc-sm8550.c

- .pwrsts = PWRSTS_OFF_ON,

diff --git a/drivers/clk/qcom/gcc-sm8650.c b/drivers/clk/qcom/gcc-sm8650.c
index fd9d6544bdd5..9dd5c48f33be 100644
--- a/drivers/clk/qcom/gcc-sm8650.c
+++ b/drivers/clk/qcom/gcc-sm8650.c

- .pwrsts = PWRSTS_OFF_ON,

diff --git a/drivers/clk/qcom/gcc-sm8750.c b/drivers/clk/qcom/gcc-sm8750.c
new file mode 100644
index 000000000000..b36d70976095
--- /dev/null
+++ b/drivers/clk/qcom/gcc-sm8750.c

diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c
index 0f578771071f..7288af845434 100644
--- a/drivers/clk/qcom/gcc-x1e80100.c
+++ b/drivers/clk/qcom/gcc-x1e80100.c

- .halt_check = BRANCH_HALT_VOTED,

- .pwrsts = PWRSTS_OFF_ON,

diff --git a/drivers/clk/qcom/gpucc-sar2130p.c b/drivers/clk/qcom/gpucc-sar2130p.c
new file mode 100644
index 000000000000..dd72b2a48c42
--- /dev/null
+++ b/drivers/clk/qcom/gpucc-sar2130p.c

diff --git a/drivers/clk/qcom/gpucc-sm8450.c b/drivers/clk/qcom/gpucc-sm8450.c
index b3c5d6923cd2..059df72deaa1 100644
--- a/drivers/clk/qcom/gpucc-sm8450.c
+++ b/drivers/clk/qcom/gpucc-sm8450.c

-static struct alpha_pll_config gpu_cc_pll0_config = {

-static struct alpha_pll_config gpu_cc_pll1_config = {

- clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);

- clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);

-MODULE_DESCRIPTION("QTI GPU_CC SM8450 Driver");

diff --git a/drivers/clk/qcom/gpucc-x1p42100.c b/drivers/clk/qcom/gpucc-x1p42100.c
new file mode 100644
index 000000000000..dba783339613
--- /dev/null
+++ b/drivers/clk/qcom/gpucc-x1p42100.c

diff --git a/drivers/clk/qcom/ipq-cmn-pll.c b/drivers/clk/qcom/ipq-cmn-pll.c
new file mode 100644
index 000000000000..432d4c4b7aa6
--- /dev/null
+++ b/drivers/clk/qcom/ipq-cmn-pll.c

diff --git a/drivers/clk/qcom/lpasscc-sm6115.c b/drivers/clk/qcom/lpasscc-sm6115.c
new file mode 100644
index 000000000000..8ffdab71b948
--- /dev/null
+++ b/drivers/clk/qcom/lpasscc-sm6115.c

diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c
index 3f41249c5ae4..20d1c43f35d9 100644
--- a/drivers/clk/qcom/mmcc-msm8960.c
+++ b/drivers/clk/qcom/mmcc-msm8960.c

- .parent_map = mmcc_pxo_dsi2_dsi1_map,

- .parent_data = mmcc_pxo_dsi2_dsi1,

- .num_parents = ARRAY_SIZE(mmcc_pxo_dsi2_dsi1),

- .enable_mask = BIT(0),

diff --git a/drivers/clk/qcom/tcsrcc-sm8550.c b/drivers/clk/qcom/tcsrcc-sm8550.c
index e5e8f2e82b94..41d73f92a000 100644
--- a/drivers/clk/qcom/tcsrcc-sm8550.c
+++ b/drivers/clk/qcom/tcsrcc-sm8550.c

- { .compatible = "qcom,sm8550-tcsr" },

- regmap = qcom_cc_map(pdev, &tcsr_cc_sm8550_desc);

diff --git a/drivers/clk/qcom/tcsrcc-sm8750.c b/drivers/clk/qcom/tcsrcc-sm8750.c
new file mode 100644
index 000000000000..242e320986ef
--- /dev/null
+++ b/drivers/clk/qcom/tcsrcc-sm8750.c

diff --git a/drivers/clk/qcom/videocc-sa8775p.c b/drivers/clk/qcom/videocc-sa8775p.c
new file mode 100644
index 000000000000..bf5de411fd5d
--- /dev/null
+++ b/drivers/clk/qcom/videocc-sa8775p.c

diff --git a/drivers/clk/qcom/videocc-sm8350.c b/drivers/clk/qcom/videocc-sm8350.c
index 5bd6fe3e1298..874d4da95ff8 100644
--- a/drivers/clk/qcom/videocc-sm8350.c
+++ b/drivers/clk/qcom/videocc-sm8350.c

- .flags = HW_CTRL | RETAIN_FF_ENABLE,

diff --git a/drivers/clk/qcom/videocc-sm8450.c b/drivers/clk/qcom/videocc-sm8450.c
index ed9163d64244..f26c7eccb62e 100644
--- a/drivers/clk/qcom/videocc-sm8450.c
+++ b/drivers/clk/qcom/videocc-sm8450.c

- clk_lucid_evo_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config);

- clk_lucid_evo_pll_configure(&video_cc_pll1, regmap, &video_cc_pll1_config);

-MODULE_DESCRIPTION("QTI VIDEOCC SM8450 Driver");

diff --git a/drivers/clk/ralink/clk-mtmips.c b/drivers/clk/ralink/clk-mtmips.c
index 50a443bf79ec..19d433034884 100644
--- a/drivers/clk/ralink/clk-mtmips.c
+++ b/drivers/clk/ralink/clk-mtmips.c

-static struct mtmips_clk_fixed rt305x_fixed_clocks[] = {

- CLK_FIXED("xtal", NULL, 40000000)

- CLK_FIXED("pcmi2s", "xtal", 480000000),

- .clk_fixed = rt305x_fixed_clocks,

- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),

- .clk_fixed = rt305x_fixed_clocks,

- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),

- .clk_fixed = rt305x_fixed_clocks,

- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),

- .clk_fixed = NULL,

- .num_clk_fixed = 0,

- .clk_factor = NULL,

- .num_clk_factor = 0,

- .clk_factor = rt305x_factor_clocks,

- .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks),

diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 76791a1c50ac..5a4bc3f94d49 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig

- bool "RZ/V2H(P) family clock support" if COMPILE_TEST

diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 23d2e26051c8..2d6e746939c4 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile

diff --git a/drivers/clk/renesas/clk-r8a73a4.c b/drivers/clk/renesas/clk-r8a73a4.c
index 4b1815147f77..f331d8bc9daf 100644
--- a/drivers/clk/renesas/clk-r8a73a4.c
+++ b/drivers/clk/renesas/clk-r8a73a4.c

diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c
index 797556259370..6ea173f22251 100644
--- a/drivers/clk/renesas/clk-r8a7778.c
+++ b/drivers/clk/renesas/clk-r8a7778.c

diff --git a/drivers/clk/renesas/clk-vbattb.c b/drivers/clk/renesas/clk-vbattb.c
new file mode 100644
index 000000000000..ff9d1ead455c
--- /dev/null
+++ b/drivers/clk/renesas/clk-vbattb.c

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 4c8e4c69c1bf..9c7e4094705c 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c

diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
index 55c8dd032fc3..d45571096b96 100644
--- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c

diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
index e20c048bfa9b..607fa815b6c1 100644
--- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c

- DEF_FIXED(".pll2_div2", CLK_PLL2_DIV2, CLK_PLL2, 2, 1),

- DEF_GEN4_Z("zc0", R8A779H0_CLK_ZC0, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 0),

- DEF_GEN4_Z("zc1", R8A779H0_CLK_ZC1, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 8),

- DEF_GEN4_Z("zc2", R8A779H0_CLK_ZC2, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 32),

- DEF_GEN4_Z("zc3", R8A779H0_CLK_ZC3, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 40),

diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c
index c1348e2d450c..dcda19318b2a 100644
--- a/drivers/clk/renesas/r9a06g032-clocks.c
+++ b/drivers/clk/renesas/r9a06g032-clocks.c

-#define R9A06G032_SYSCTRL_USB_H2MODE (1<<1)

diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c
index 1ce40fb51f13..0e7e3bf05b52 100644
--- a/drivers/clk/renesas/r9a08g045-cpg.c
+++ b/drivers/clk/renesas/r9a08g045-cpg.c

- RZG2L_PD_F_ALWAYS_ON),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(0)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(1)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(11)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, GENMASK(6, 5)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(7)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(4)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(2)),

- DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(3)),

- DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(10)),

- DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(11)),

- DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(12)),

- DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(13)),

- DEF_REG_CONF(CPG_BUS_MCPU2_MSTOP, BIT(1)),

- RZG2L_PD_F_ALWAYS_ON),

diff --git a/drivers/clk/renesas/r9a09g011-cpg.c b/drivers/clk/renesas/r9a09g011-cpg.c
index dda9f29dff33..22272279b104 100644
--- a/drivers/clk/renesas/r9a09g011-cpg.c
+++ b/drivers/clk/renesas/r9a09g011-cpg.c

diff --git a/drivers/clk/renesas/r9a09g047-cpg.c b/drivers/clk/renesas/r9a09g047-cpg.c
new file mode 100644
index 000000000000..536d922bed70
--- /dev/null
+++ b/drivers/clk/renesas/r9a09g047-cpg.c

diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
index 3ee32db5c0af..3705e18f66ad 100644
--- a/drivers/clk/renesas/r9a09g057-cpg.c
+++ b/drivers/clk/renesas/r9a09g057-cpg.c

- DEF_MOD("gtm_0_pclk", CLK_PLLCM33_DIV16, 4, 3, 2, 3),

- DEF_MOD("gtm_1_pclk", CLK_PLLCM33_DIV16, 4, 4, 2, 4),

- DEF_MOD("gtm_2_pclk", CLK_PLLCLN_DIV16, 4, 5, 2, 5),

- DEF_MOD("gtm_3_pclk", CLK_PLLCLN_DIV16, 4, 6, 2, 6),

- DEF_MOD("gtm_4_pclk", CLK_PLLCLN_DIV16, 4, 7, 2, 7),

- DEF_MOD("gtm_5_pclk", CLK_PLLCLN_DIV16, 4, 8, 2, 8),

- DEF_MOD("gtm_6_pclk", CLK_PLLCLN_DIV16, 4, 9, 2, 9),

- DEF_MOD("gtm_7_pclk", CLK_PLLCLN_DIV16, 4, 10, 2, 10),

- DEF_MOD("wdt_0_clkp", CLK_PLLCM33_DIV16, 4, 11, 2, 11),

- DEF_MOD("wdt_0_clk_loco", CLK_QEXTAL, 4, 12, 2, 12),

- DEF_MOD("wdt_1_clkp", CLK_PLLCLN_DIV16, 4, 13, 2, 13),

- DEF_MOD("wdt_1_clk_loco", CLK_QEXTAL, 4, 14, 2, 14),

- DEF_MOD("wdt_2_clkp", CLK_PLLCLN_DIV16, 4, 15, 2, 15),

- DEF_MOD("wdt_2_clk_loco", CLK_QEXTAL, 5, 0, 2, 16),

- DEF_MOD("wdt_3_clkp", CLK_PLLCLN_DIV16, 5, 1, 2, 17),

- DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18),

- DEF_MOD("scif_0_clk_pck", CLK_PLLCM33_DIV16, 8, 15, 4, 15),

- DEF_MOD("riic_8_ckm", CLK_PLLCM33_DIV16, 9, 3, 4, 19),

- DEF_MOD("riic_0_ckm", CLK_PLLCLN_DIV16, 9, 4, 4, 20),

- DEF_MOD("riic_1_ckm", CLK_PLLCLN_DIV16, 9, 5, 4, 21),

- DEF_MOD("riic_2_ckm", CLK_PLLCLN_DIV16, 9, 6, 4, 22),

- DEF_MOD("riic_3_ckm", CLK_PLLCLN_DIV16, 9, 7, 4, 23),

- DEF_MOD("riic_4_ckm", CLK_PLLCLN_DIV16, 9, 8, 4, 24),

- DEF_MOD("riic_5_ckm", CLK_PLLCLN_DIV16, 9, 9, 4, 25),

- DEF_MOD("riic_6_ckm", CLK_PLLCLN_DIV16, 9, 10, 4, 26),

- DEF_MOD("riic_7_ckm", CLK_PLLCLN_DIV16, 9, 11, 4, 27),

- DEF_MOD("sdhi_0_imclk", CLK_PLLCLN_DIV8, 10, 3, 5, 3),

- DEF_MOD("sdhi_0_imclk2", CLK_PLLCLN_DIV8, 10, 4, 5, 4),

- DEF_MOD("sdhi_0_clk_hs", CLK_PLLCLN_DIV2, 10, 5, 5, 5),

- DEF_MOD("sdhi_0_aclk", CLK_PLLDTY_ACPU_DIV4, 10, 6, 5, 6),

- DEF_MOD("sdhi_1_imclk", CLK_PLLCLN_DIV8, 10, 7, 5, 7),

- DEF_MOD("sdhi_1_imclk2", CLK_PLLCLN_DIV8, 10, 8, 5, 8),

- DEF_MOD("sdhi_1_clk_hs", CLK_PLLCLN_DIV2, 10, 9, 5, 9),

- DEF_MOD("sdhi_1_aclk", CLK_PLLDTY_ACPU_DIV4, 10, 10, 5, 10),

- DEF_MOD("sdhi_2_imclk", CLK_PLLCLN_DIV8, 10, 11, 5, 11),

- DEF_MOD("sdhi_2_imclk2", CLK_PLLCLN_DIV8, 10, 12, 5, 12),

- DEF_MOD("sdhi_2_clk_hs", CLK_PLLCLN_DIV2, 10, 13, 5, 13),

- DEF_MOD("sdhi_2_aclk", CLK_PLLDTY_ACPU_DIV4, 10, 14, 5, 14),

diff --git a/drivers/clk/renesas/rcar-cpg-lib.c b/drivers/clk/renesas/rcar-cpg-lib.c
index 42b126ea3e13..a45f8e7e9ab6 100644
--- a/drivers/clk/renesas/rcar-cpg-lib.c
+++ b/drivers/clk/renesas/rcar-cpg-lib.c

diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c
index 20b89eb6c35c..027100e84ee4 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.c
+++ b/drivers/clk/renesas/rcar-gen3-cpg.c

diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 1b421b809796..bf85501709f0 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c

- struct device_node *soc = of_find_node_by_path("/soc");

diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 88bf39e8c79c..ddf722ca79eb 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c

- unsigned long foutpostdiv_rate;

- foutpostdiv_rate =

- EXTAL_FREQ_IN_MEGA_HZ * MEGA / params->pl5_refdiv *

- ((((params->pl5_intin << 24) + params->pl5_fracin)) >> 24) /

- (params->pl5_postdiv1 * params->pl5_postdiv2);

-static int __init rzg2l_cpg_pd_setup(struct rzg2l_cpg_pd *pd, bool always_on)

- pd->genpd.flags |= GENPD_FLAG_ALWAYS_ON;

- governor = &pm_domain_always_on_gov;

- pd->genpd.power_on = rzg2l_cpg_power_on;

- pd->genpd.power_off = rzg2l_cpg_power_off;

- governor = &simple_qos_governor;

- return pm_genpd_init(&pd->genpd, governor, !always_on);

- ret = rzg2l_cpg_pd_setup(pd, true);

- bool always_on = !!(info->pm_domains[i].flags & RZG2L_PD_F_ALWAYS_ON);

- ret = rzg2l_cpg_pd_setup(pd, always_on);

- ret = rzg2l_cpg_power_on(&pd->genpd);

diff --git a/drivers/clk/renesas/rzg2l-cpg.h b/drivers/clk/renesas/rzg2l-cpg.h
index ecfe7e7ea8a1..881a89b5a710 100644
--- a/drivers/clk/renesas/rzg2l-cpg.h
+++ b/drivers/clk/renesas/rzg2l-cpg.h

- * @flags: RZG2L PM domain flags (see RZG2L_PD_F_*)

- .flags = (_flags), \

-/* Power domain flags. */

-#define RZG2L_PD_F_ALWAYS_ON BIT(0)

-#define RZG2L_PD_F_NONE (0)

diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c
index b524a9d33610..a4c1e92e1fd7 100644
--- a/drivers/clk/renesas/rzv2h-cpg.c
+++ b/drivers/clk/renesas/rzv2h-cpg.c

- writel(value, priv->base + reg);

-static int rzv2h_mod_clock_is_enabled(struct clk_hw *hw)

- struct mod_clock *clock = to_mod_clock(hw);

- struct rzv2h_cpg_priv *priv = clock->priv;

- if (clock->mon_index >= 0) {

- offset = GET_CLK_MON_OFFSET(clock->mon_index);

- bitmask = BIT(clock->mon_bit);

- offset = GET_CLK_ON_OFFSET(clock->on_index);

- bitmask = BIT(clock->on_bit);

- return readl(priv->base + offset) & bitmask;

- while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,

diff --git a/drivers/clk/renesas/rzv2h-cpg.h b/drivers/clk/renesas/rzv2h-cpg.h
index 1bd406c69015..fd8eb985c75b 100644
--- a/drivers/clk/renesas/rzv2h-cpg.h
+++ b/drivers/clk/renesas/rzv2h-cpg.h

-#define DEF_MOD_BASE(_name, _parent, _critical, _onindex, _onbit, _monindex, _monbit) \

+#define DEF_MOD_BASE(_name, _mstop, _parent, _critical, _no_pm, _onindex, _onbit, _monindex, _monbit) \

-#define DEF_MOD(_name, _parent, _onindex, _onbit, _monindex, _monbit) \

- DEF_MOD_BASE(_name, _parent, false, _onindex, _onbit, _monindex, _monbit)

-#define DEF_MOD_CRITICAL(_name, _parent, _onindex, _onbit, _monindex, _monbit) \

- DEF_MOD_BASE(_name, _parent, true, _onindex, _onbit, _monindex, _monbit)

diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index af2ade54a7ef..3fe7616f0ebe 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile

diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-rk3588.c
index 0ffaf639f807..4031733def4e 100644
--- a/drivers/clk/rockchip/clk-rk3588.c
+++ b/drivers/clk/rockchip/clk-rk3588.c

- * Recent Rockchip SoCs have a new hardware block called Native Interface

- * Unit (NIU), which gates clocks to devices behind them. These effectively

- * need two parent clocks.

- * Downstream enables the linked clock via runtime PM whenever the gate is

- * enabled. This implementation uses separate clock nodes for each of the

- * linked gate clocks, which leaks parts of the clock tree into DT.

- * The GATE_LINK macro instead takes the second parent via 'linkname', but

- * ignores the information. Once the clock framework is ready to handle it, the

- * information should be passed on here. But since these clocks are required to

- * access multiple relevant IP blocks, such as PCIe or USB, we mark all linked

- * clocks critical until a better solution is available. This will waste some

- * power, but avoids leaking implementation details into DT or hanging the

-#define GATE_LINK(_id, cname, pname, linkedclk, f, o, b, gf) \

- GATE(_id, cname, pname, f, o, b, gf)

-#define RK3588_LINKED_CLK CLK_IS_CRITICAL

-static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = {

- COMPOSITE(REFCLKO25M_ETH0_OUT, "refclko25m_eth0_out", gpll_cpll_p, 0,

- COMPOSITE(REFCLKO25M_ETH1_OUT, "refclko25m_eth1_out", gpll_cpll_p, 0,

- COMPOSITE(ACLK_NVM_ROOT, "aclk_nvm_root", gpll_cpll_p, RK3588_LINKED_CLK,

- COMPOSITE(ACLK_VDPU_ROOT, "aclk_vdpu_root", gpll_cpll_aupll_p, RK3588_LINKED_CLK,

- COMPOSITE_NODIV(HCLK_VDPU_ROOT, "hclk_vdpu_root", mux_200m_100m_50m_24m_p, RK3588_LINKED_CLK,

- GATE(HCLK_RKVENC0, "hclk_rkvenc0", "hclk_rkvenc0_root", RK3588_LINKED_CLK,

- GATE(ACLK_RKVENC0, "aclk_rkvenc0", "aclk_rkvenc0_root", RK3588_LINKED_CLK,

- COMPOSITE(ACLK_VI_ROOT, "aclk_vi_root", gpll_cpll_npll_aupll_spll_p, RK3588_LINKED_CLK,

- COMPOSITE_NODIV(HCLK_VI_ROOT, "hclk_vi_root", mux_200m_100m_50m_24m_p, RK3588_LINKED_CLK,

- COMPOSITE_NODIV(ACLK_VOP_LOW_ROOT, "aclk_vop_low_root", mux_400m_200m_100m_24m_p, RK3588_LINKED_CLK,

- COMPOSITE_NODIV(HCLK_VOP_ROOT, "hclk_vop_root", mux_200m_100m_50m_24m_p, RK3588_LINKED_CLK,

GATE_LINK(ACLK_ISP1_PRE, "aclk_isp1_pre", "aclk_isp1_root", ACLK_VI_ROOT, 0, RK3588_CLKGATE_CON(26), 6, GFLAGS),

GATE_LINK(HCLK_ISP1_PRE, "hclk_isp1_pre", "hclk_isp1_root", HCLK_VI_ROOT, 0, RK3588_CLKGATE_CON(26), 8, GFLAGS),

- GATE_LINK(HCLK_NVM, "hclk_nvm", "hclk_nvm_root", ACLK_NVM_ROOT, RK3588_LINKED_CLK, RK3588_CLKGATE_CON(31), 2, GFLAGS),

+ GATE_LINK(HCLK_NVM, "hclk_nvm", "hclk_nvm_root", ACLK_NVM_ROOT, 0, RK3588_CLKGATE_CON(31), 2, GFLAGS),

GATE_LINK(ACLK_USB, "aclk_usb", "aclk_usb_root", ACLK_VO1USB_TOP_ROOT, 0, RK3588_CLKGATE_CON(42), 2, GFLAGS),

GATE_LINK(HCLK_USB, "hclk_usb", "hclk_usb_root", HCLK_VO1USB_TOP_ROOT, 0, RK3588_CLKGATE_CON(42), 3, GFLAGS),

GATE_LINK(ACLK_JPEG_DECODER_PRE, "aclk_jpeg_decoder_pre", "aclk_jpeg_decoder_root", ACLK_VDPU_ROOT, 0, RK3588_CLKGATE_CON(44), 7, GFLAGS),

GATE_LINK(HCLK_RKVDEC1_PRE, "hclk_rkvdec1_pre", "hclk_rkvdec1_root", HCLK_VDPU_ROOT, 0, RK3588_CLKGATE_CON(41), 4, GFLAGS),

GATE_LINK(ACLK_RKVDEC1_PRE, "aclk_rkvdec1_pre", "aclk_rkvdec1_root", ACLK_VDPU_ROOT, 0, RK3588_CLKGATE_CON(41), 5, GFLAGS),

GATE_LINK(ACLK_HDCP0_PRE, "aclk_hdcp0_pre", "aclk_vo0_root", ACLK_VOP_LOW_ROOT, 0, RK3588_CLKGATE_CON(55), 9, GFLAGS),

- GATE_LINK(HCLK_VO0, "hclk_vo0", "hclk_vo0_root", HCLK_VOP_ROOT, RK3588_LINKED_CLK, RK3588_CLKGATE_CON(55), 5, GFLAGS),

+ GATE_LINK(HCLK_VO0, "hclk_vo0", "hclk_vo0_root", HCLK_VOP_ROOT, 0, RK3588_CLKGATE_CON(55), 5, GFLAGS),

GATE_LINK(ACLK_HDCP1_PRE, "aclk_hdcp1_pre", "aclk_hdcp1_root", ACLK_VO1USB_TOP_ROOT, 0, RK3588_CLKGATE_CON(59), 6, GFLAGS),

- GATE_LINK(HCLK_VO1, "hclk_vo1", "hclk_vo1_root", HCLK_VO1USB_TOP_ROOT, RK3588_LINKED_CLK, RK3588_CLKGATE_CON(59), 9, GFLAGS),

+ GATE_LINK(HCLK_VO1, "hclk_vo1", "hclk_vo1_root", HCLK_VO1USB_TOP_ROOT, 0, RK3588_CLKGATE_CON(59), 9, GFLAGS),

GATE_LINK(ACLK_AV1_PRE, "aclk_av1_pre", "aclk_av1_root", ACLK_VDPU_ROOT, 0, RK3588_CLKGATE_CON(68), 1, GFLAGS),

GATE_LINK(PCLK_AV1_PRE, "pclk_av1_pre", "pclk_av1_root", HCLK_VDPU_ROOT, 0, RK3588_CLKGATE_CON(68), 4, GFLAGS),

GATE_LINK(HCLK_SDIO_PRE, "hclk_sdio_pre", "hclk_sdio_root", HCLK_NVM, 0, RK3588_CLKGATE_CON(75), 1, GFLAGS),

GATE_LINK(PCLK_VO1GRF, "pclk_vo1grf", "pclk_vo1_root", HCLK_VO1, CLK_IGNORE_UNUSED, RK3588_CLKGATE_CON(59), 12, GFLAGS),

-static void __init rk3588_clk_init(struct device_node *np)

- unsigned long clk_nr_clks;

- clk_nr_clks = rockchip_clk_find_max_clk_id(rk3588_clk_branches,

- ARRAY_SIZE(rk3588_clk_branches)) + 1;

- ctx = rockchip_clk_init(np, reg_base, clk_nr_clks);

- rockchip_clk_register_branches(ctx, rk3588_clk_branches,

- ARRAY_SIZE(rk3588_clk_branches));

- rk3588_rst_init(np, reg_base);

-CLK_OF_DECLARE(rk3588_cru, "rockchip,rk3588-cru", rk3588_clk_init);

diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 2fa7253c73b2..cbf93ea119a9 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c

-static void rockchip_clk_add_lookup(struct rockchip_clk_provider *ctx,

- struct clk *clk, unsigned int id)

- ctx->clk_data.clks[id] = clk;

- rockchip_clk_add_lookup(ctx, mux_clk, child->id);

-struct rockchip_clk_provider *rockchip_clk_init(struct device_node *np,

- void __iomem *base,

- unsigned long nr_clks)

- clk_table[i] = ERR_PTR(-ENOENT);

- rockchip_clk_add_lookup(ctx, clk, list->id);

- rockchip_clk_add_lookup(ctx, clk, lookup_id);

diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index f1957e1c1178..9b37d44b9e5d 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h

diff --git a/drivers/clk/rockchip/gate-link.c b/drivers/clk/rockchip/gate-link.c
new file mode 100644
index 000000000000..cd0f7a2d30ab
--- /dev/null
+++ b/drivers/clk/rockchip/gate-link.c

diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index f1ba48758c78..90e5b114872c 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile

diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c
index abd49edcf707..e11ac67819ef 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c

diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index cd4fec323a42..aec4d18c1f9e 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c

- MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p,SRC_TOP0, 24, 1),

diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 28945b6b0ee1..16be0c53903c 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c

diff --git a/drivers/clk/samsung/clk-exynos4412-isp.c b/drivers/clk/samsung/clk-exynos4412-isp.c
index a70c2b06a61a..29c5644f0593 100644
--- a/drivers/clk/samsung/clk-exynos4412-isp.c
+++ b/drivers/clk/samsung/clk-exynos4412-isp.c

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index e02e7c013f3d..47e9ac2275ee 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c

diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c
index 16da6ef5ca0c..fd0520d204dc 100644
--- a/drivers/clk/samsung/clk-exynos5260.c
+++ b/drivers/clk/samsung/clk-exynos5260.c

- "phyclk_mipi_dphy_4l_m_txbyte_clkhs" , NULL,

- MUX_SEL_TOP_ISP10, 8 , 1),

diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c
index 2654077211e7..99b1bb4539fd 100644
--- a/drivers/clk/samsung/clk-exynos5410.c
+++ b/drivers/clk/samsung/clk-exynos5410.c

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index c630135c686b..333c52fda17f 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c

-PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"};

-PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"};

diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c
index 4a5d2a914bd6..e6c938effa29 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c

diff --git a/drivers/clk/samsung/clk-exynos8895.c b/drivers/clk/samsung/clk-exynos8895.c
new file mode 100644
index 000000000000..29ec0c4a8635
--- /dev/null
+++ b/drivers/clk/samsung/clk-exynos8895.c

+#define CLK_CON_GAT_GOUT_BLK_FSYS1_UID_PCIE_IPCLKPORT_IEEE1500_WRAPPER_FOR_PCIE_PHY_LC_X2_INST_0_I_SCL_APB_PCLK 0x2044

+#define CLK_CON_GAT_GOUT_BLK_FSYS1_UID_PCIE_IPCLKPORT_PIPE2_DIGITAL_X2_WRAP_INST_0_I_APB_PCLK_SCL 0x2058

+ CLK_CON_GAT_GOUT_BLK_FSYS1_UID_PCIE_IPCLKPORT_IEEE1500_WRAPPER_FOR_PCIE_PHY_LC_X2_INST_0_I_SCL_APB_PCLK,

diff --git a/drivers/clk/samsung/clk-exynos990.c b/drivers/clk/samsung/clk-exynos990.c
new file mode 100644
index 000000000000..8e2a2e8eccee
--- /dev/null
+++ b/drivers/clk/samsung/clk-exynos990.c

diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung/clk-exynosautov920.c
index 7ba9748c0526..2a8bfd5d9abc 100644
--- a/drivers/clk/samsung/clk-exynosautov920.c
+++ b/drivers/clk/samsung/clk-exynosautov920.c

diff --git a/drivers/clk/samsung/clk-fsd.c b/drivers/clk/samsung/clk-fsd.c
index 6f984cfcd33c..9a6006c298c2 100644
--- a/drivers/clk/samsung/clk-fsd.c
+++ b/drivers/clk/samsung/clk-fsd.c

- .nr_clk_ids = CMU_NR_CLK,

- .nr_clk_ids = PERIC_NR_CLK,

- .nr_clk_ids = FSYS0_NR_CLK,

- .nr_clk_ids = FSYS1_NR_CLK,

- .nr_clk_ids = IMEM_NR_CLK,

- .nr_clk_ids = MFC_NR_CLK,

- .nr_clk_ids = CAM_CSI_NR_CLK,

diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c
index 85098c61c15e..86b39edba122 100644
--- a/drivers/clk/samsung/clk-gs101.c
+++ b/drivers/clk/samsung/clk-gs101.c

diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index cca3e630922c..2e94bba6c396 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c

-/* PLL1418x is similar to PLL0822x, except that MDIV is one bit smaller */

- if (pll->type != pll_1418x)

diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index 3481941ba07a..6ddc54d173a0 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h

diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index d27a1f73f077..e2ec8fe32e39 100644
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c

diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/clk-s5pv210-audss.c
index b31c00ea331f..d19a3d9fd452 100644
--- a/drivers/clk/samsung/clk-s5pv210-audss.c
+++ b/drivers/clk/samsung/clk-s5pv210-audss.c

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index afa5760ed3a1..283c523763e6 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c

diff --git a/drivers/clk/socfpga/clk-pll-a10.c b/drivers/clk/socfpga/clk-pll-a10.c
index b028f25c658a..62eed964c3d0 100644
--- a/drivers/clk/socfpga/clk-pll-a10.c
+++ b/drivers/clk/socfpga/clk-pll-a10.c

- unsigned long divf, divq, reg;

diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c
index ff9deeef509b..1537f4f05860 100644
--- a/drivers/clk/sophgo/clk-sg2042-pll.c
+++ b/drivers/clk/sophgo/clk-sg2042-pll.c

- numerator = parent_rate * ctrl_table.fbdiv;

diff --git a/drivers/clk/starfive/clk-starfive-jh7100-audio.c b/drivers/clk/starfive/clk-starfive-jh7100-audio.c
index 1fcf4e62f347..7de23f6749aa 100644
--- a/drivers/clk/starfive/clk-starfive-jh7100-audio.c
+++ b/drivers/clk/starfive/clk-starfive-jh7100-audio.c

-static struct clk_hw *jh7100_audclk_get(struct of_phandle_args *clkspec, void *data)

- struct jh71x0_clk_priv *priv = data;

- unsigned int idx = clkspec->args[0];

- if (idx < JH7100_AUDCLK_END)

- return &priv->reg[idx].hw;

- return ERR_PTR(-EINVAL);

- return devm_of_clk_add_hw_provider(priv->dev, jh7100_audclk_get, priv);

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-aon.c b/drivers/clk/starfive/clk-starfive-jh7110-aon.c
index 418efdad719b..6f67587f4335 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-aon.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-aon.c

-static struct clk_hw *jh7110_aonclk_get(struct of_phandle_args *clkspec, void *data)

- struct jh71x0_clk_priv *priv = data;

- unsigned int idx = clkspec->args[0];

- if (idx < JH7110_AONCLK_END)

- return &priv->reg[idx].hw;

- return ERR_PTR(-EINVAL);

- ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_aonclk_get, priv);

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-isp.c b/drivers/clk/starfive/clk-starfive-jh7110-isp.c
index 8c4c3a958a9f..f3fa069db193 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-isp.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-isp.c

-static struct clk_hw *jh7110_ispclk_get(struct of_phandle_args *clkspec, void *data)

- struct jh71x0_clk_priv *priv = data;

- unsigned int idx = clkspec->args[0];

- if (idx < JH7110_ISPCLK_END)

- return &priv->reg[idx].hw;

- return ERR_PTR(-EINVAL);

- ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_ispclk_get, priv);

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-pll.c b/drivers/clk/starfive/clk-starfive-jh7110-pll.c
index 3598390e8fd0..56dc58a04f8a 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-pll.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-pll.c

-static int jh7110_pll_probe(struct platform_device *pdev)

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-stg.c b/drivers/clk/starfive/clk-starfive-jh7110-stg.c
index dafcb7190592..2a5ad0e07d1d 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-stg.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-stg.c

-static struct clk_hw *jh7110_stgclk_get(struct of_phandle_args *clkspec, void *data)

- struct jh71x0_clk_priv *priv = data;

- unsigned int idx = clkspec->args[0];

- if (idx < JH7110_STGCLK_END)

- return &priv->reg[idx].hw;

- return ERR_PTR(-EINVAL);

- ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_stgclk_get, priv);

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
index 17325f17696f..e9d8168d02b8 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-sys.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c

-static struct clk_hw *jh7110_sysclk_get(struct of_phandle_args *clkspec, void *data)

- struct jh71x0_clk_priv *priv = data;

- unsigned int idx = clkspec->args[0];

- if (idx < JH7110_SYSCLK_END)

- return &priv->reg[idx].hw;

- return ERR_PTR(-EINVAL);

- ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_sysclk_get, priv);

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-vout.c b/drivers/clk/starfive/clk-starfive-jh7110-vout.c
index 04eeed199087..bad20d5d794a 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-vout.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-vout.c

-static struct clk_hw *jh7110_voutclk_get(struct of_phandle_args *clkspec, void *data)

- struct jh71x0_clk_priv *priv = data;

- unsigned int idx = clkspec->args[0];

- if (idx < JH7110_VOUTCLK_END)

- return &priv->reg[idx].hw;

- return ERR_PTR(-EINVAL);

- ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_voutclk_get, priv);

diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c b/drivers/clk/starfive/clk-starfive-jh71x0.c
index aebc99264a0b..80e9157347eb 100644
--- a/drivers/clk/starfive/clk-starfive-jh71x0.c
+++ b/drivers/clk/starfive/clk-starfive-jh71x0.c

diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.h b/drivers/clk/starfive/clk-starfive-jh71x0.h
index e3f441393e48..9d5dec1d5cd1 100644
--- a/drivers/clk/starfive/clk-starfive-jh71x0.h
+++ b/drivers/clk/starfive/clk-starfive-jh71x0.h

- struct jh71x0_clk reg[];

diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1-r.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1-r.c
index de36e21d3eaf..44b2ebdebdac 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1-r.c
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1-r.c

-static struct ccu_reset_map sun20i_d1_r_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
index 9b5cfac2ee70..bb66c906ebbb 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c

-static struct ccu_reset_map sun20i_d1_ccu_resets[] = {

- val &= ~BIT(1) | BIT(0);

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
index d1a1683baff4..409feb085021 100644
--- a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
+++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c

-static struct ccu_reset_map sunxi_a10_a20_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c
index 2c791761a646..cb0f8d110c32 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c

-static struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a100.c b/drivers/clk/sunxi-ng/ccu-sun50i-a100.c
index bbaa82978716..1f81c7ac41af 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a100.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a100.c

- CLK_SET_RATE_NO_REPARENT);

-static struct ccu_reset_map sun50i_a100_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index c255dba2c96d..ba1ad267f123 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c

- * DSI output seems to work only when PLL_MIPI selected. Set it and prevent

- * the mux from reparenting.

-#define SUN50I_A64_TCON0_CLK_REG 0x118

-static struct ccu_reset_map sun50i_a64_ccu_resets[] = {

- /* Set PLL MIPI as parent for TCON0 */

- val = readl(reg + SUN50I_A64_TCON0_CLK_REG);

- val &= ~GENMASK(26, 24);

- writel(val | (0 << 24), reg + SUN50I_A64_TCON0_CLK_REG);

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
index a8c11c0b4e06..dfba88a5ad0f 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h

-#define CLK_PLL_VIDEO0_2X 8

-#define CLK_PLL_MIPI 17

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
index c72815841111..acb4e8b9b1ba 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c

-static struct ccu_reset_map sun50i_h6_r_ccu_resets[] = {

-static struct ccu_reset_map sun50i_h616_r_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index a20b621ad8f1..7fccda96d444 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c

-static struct ccu_reset_map sun50i_h6_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
index 84e406ddf9d1..190816c35da9 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c

- * TODO: Determine SDM settings for the audio PLL. The manual suggests

- * PLL_FACTOR_N=16, PLL_POST_DIV_P=2, OUTPUT_DIV=2, pattern=0xe000c49b

- * for 24.576 MHz, and PLL_FACTOR_N=22, PLL_POST_DIV_P=3, OUTPUT_DIV=2,

- * pattern=0xe001288c for 22.5792 MHz.

- * This clashes with our fixed PLL_POST_DIV_P.

- .m = _SUNXI_CCU_DIV(1, 1), /* input divider */

- * The divider of pll-audio is fixed to 24 for now, so 24576000 and 22579200

- * rates can be set exactly in conjunction with sigma-delta modulation.

- 96, 1, CLK_SET_RATE_PARENT);

- 48, 1, CLK_SET_RATE_PARENT);

- 24, 1, CLK_SET_RATE_PARENT);

-static struct ccu_reset_map sun50i_h616_ccu_resets[] = {

- * Force the post-divider of pll-audio to 12 and the output divider

- * of it to 2, so 24576000 and 22579200 rates can be set exactly.

- val &= ~(GENMASK(21, 16) | BIT(0));

- writel(val | (11 << 16) | BIT(0), reg + SUN50I_H616_PLL_AUDIO_REG);

- return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_h616_ccu_desc);

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun5i.c b/drivers/clk/sunxi-ng/ccu-sun5i.c
index 1f4bc0e773a7..c9bf1fdb8a8a 100644
--- a/drivers/clk/sunxi-ng/ccu-sun5i.c
+++ b/drivers/clk/sunxi-ng/ccu-sun5i.c

-static struct ccu_reset_map sun5i_a10s_ccu_resets[] = {

diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
index e8b8d2dd7f2c..bab65cfe9501 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c

-static struct ccu_reset_map sun6i_a31_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
index 87e23d16ed0f..0536e880b80f 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c

- fw_name = of_property_read_bool(dev->of_node, "clock-names")

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
index 6c2a08f722a8..78cf3818ab09 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c

-static struct ccu_reset_map sun8i_a23_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
index 5e0bc08a9ce3..b039d419512c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a33.c

-static struct ccu_reset_map sun8i_a33_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
index cb4c6b16c467..60e918965a72 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c

-static struct ccu_reset_map sun8i_a83t_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index 7683ea08d8e3..f2aa71206bc2 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c

-static struct ccu_reset_map sun8i_a83t_de2_resets[] = {

-static struct ccu_reset_map sun8i_h3_de2_resets[] = {

-static struct ccu_reset_map sun50i_a64_de2_resets[] = {

-static struct ccu_reset_map sun50i_h5_de2_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
index 13e57db2f8d5..740c4c97331c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c

-static struct ccu_reset_map sun8i_h3_ccu_resets[] = {

-static struct ccu_reset_map sun50i_h5_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r.c b/drivers/clk/sunxi-ng/ccu-sun8i-r.c
index da6569334d68..0e324344673b 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-r.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-r.c

-static struct ccu_reset_map sun8i_a83t_r_ccu_resets[] = {

-static struct ccu_reset_map sun8i_h3_r_ccu_resets[] = {

-static struct ccu_reset_map sun50i_a64_r_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
index 2f51ceab8016..8b729c9b3545 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c

-static struct ccu_reset_map sun8i_r40_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
index d24c0d8dfee4..579a81bb46df 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

-static struct ccu_reset_map sun8i_v3s_ccu_resets[] = {

-static struct ccu_reset_map sun8i_v3_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80-de.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80-de.c
index 0975ac58949f..91e5dc448bc0 100644
--- a/drivers/clk/sunxi-ng/ccu-sun9i-a80-de.c
+++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80-de.c

-static struct ccu_reset_map sun9i_a80_de_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
index e5527c8cc64f..62063f525616 100644
--- a/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
+++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c

-static struct ccu_reset_map sun9i_a80_usb_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80.c
index 756dd8fca6b0..337751998005 100644
--- a/drivers/clk/sunxi-ng/ccu-sun9i-a80.c
+++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80.c

-static struct ccu_reset_map sun9i_a80_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c b/drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c
index 52f1a04269f8..35935423145e 100644
--- a/drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c
+++ b/drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c

-static struct ccu_reset_map suniv_ccu_resets[] = {

-MODULE_IMPORT_NS(SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_common.c b/drivers/clk/sunxi-ng/ccu_common.c
index 4117b0bea267..88ed89658d45 100644
--- a/drivers/clk/sunxi-ng/ccu_common.c
+++ b/drivers/clk/sunxi-ng/ccu_common.c

-EXPORT_SYMBOL_NS_GPL(ccu_helper_wait_for_lock, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_is_better_rate, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_pll_notifier_register, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(devm_sunxi_ccu_probe, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h
index 329734f8cf42..dd330426a6e5 100644
--- a/drivers/clk/sunxi-ng/ccu_common.h
+++ b/drivers/clk/sunxi-ng/ccu_common.h

- struct ccu_reset_map *resets;

diff --git a/drivers/clk/sunxi-ng/ccu_div.c b/drivers/clk/sunxi-ng/ccu_div.c
index cb10a3ea23f9..7f4691f09e01 100644
--- a/drivers/clk/sunxi-ng/ccu_div.c
+++ b/drivers/clk/sunxi-ng/ccu_div.c

-EXPORT_SYMBOL_NS_GPL(ccu_div_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_frac.c b/drivers/clk/sunxi-ng/ccu_frac.c
index b31f3ad946d6..75323912608a 100644
--- a/drivers/clk/sunxi-ng/ccu_frac.c
+++ b/drivers/clk/sunxi-ng/ccu_frac.c

-EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_is_enabled, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_enable, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_disable, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_has_rate, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_read_rate, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_frac_helper_set_rate, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_gate.c b/drivers/clk/sunxi-ng/ccu_gate.c
index a2115a21807d..ac52fd6bff67 100644
--- a/drivers/clk/sunxi-ng/ccu_gate.c
+++ b/drivers/clk/sunxi-ng/ccu_gate.c

-EXPORT_SYMBOL_NS_GPL(ccu_gate_helper_disable, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_gate_helper_enable, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_gate_helper_is_enabled, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_gate_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_mp.c b/drivers/clk/sunxi-ng/ccu_mp.c
index cc94a694cb67..2bb8987ddcc2 100644
--- a/drivers/clk/sunxi-ng/ccu_mp.c
+++ b/drivers/clk/sunxi-ng/ccu_mp.c

-EXPORT_SYMBOL_NS_GPL(ccu_mp_ops, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_mp_mmc_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
index 7bee217ef111..8d5720f3dec1 100644
--- a/drivers/clk/sunxi-ng/ccu_mult.c
+++ b/drivers/clk/sunxi-ng/ccu_mult.c

-EXPORT_SYMBOL_NS_GPL(ccu_mult_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
index 5edc63b46651..d7ffbdeee9e0 100644
--- a/drivers/clk/sunxi-ng/ccu_mux.c
+++ b/drivers/clk/sunxi-ng/ccu_mux.c

-EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_apply_prediv, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_determine_rate, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_get_parent, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_set_parent, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_mux_ops, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_mux_notifier_register, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_nk.c b/drivers/clk/sunxi-ng/ccu_nk.c
index 8aa35d5804f3..555e99de2cc6 100644
--- a/drivers/clk/sunxi-ng/ccu_nk.c
+++ b/drivers/clk/sunxi-ng/ccu_nk.c

-EXPORT_SYMBOL_NS_GPL(ccu_nk_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 1168d894d636..784eec9ac997 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c

-EXPORT_SYMBOL_NS_GPL(ccu_nkm_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c
index 99359a06892d..6e03b69d4028 100644
--- a/drivers/clk/sunxi-ng/ccu_nkmp.c
+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c

-EXPORT_SYMBOL_NS_GPL(ccu_nkmp_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c
index ffac3deb89d6..a4e2243b8d6b 100644
--- a/drivers/clk/sunxi-ng/ccu_nm.c
+++ b/drivers/clk/sunxi-ng/ccu_nm.c

-EXPORT_SYMBOL_NS_GPL(ccu_nm_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_phase.c b/drivers/clk/sunxi-ng/ccu_phase.c
index e4cae2afe9db..ca43cf448666 100644
--- a/drivers/clk/sunxi-ng/ccu_phase.c
+++ b/drivers/clk/sunxi-ng/ccu_phase.c

-EXPORT_SYMBOL_NS_GPL(ccu_phase_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_reset.c b/drivers/clk/sunxi-ng/ccu_reset.c
index 6577aa18cb01..55bc7c7cda0f 100644
--- a/drivers/clk/sunxi-ng/ccu_reset.c
+++ b/drivers/clk/sunxi-ng/ccu_reset.c

-EXPORT_SYMBOL_NS_GPL(ccu_reset_ops, SUNXI_CCU);

diff --git a/drivers/clk/sunxi-ng/ccu_reset.h b/drivers/clk/sunxi-ng/ccu_reset.h
index e9b973cae4af..941276a8ec2e 100644
--- a/drivers/clk/sunxi-ng/ccu_reset.h
+++ b/drivers/clk/sunxi-ng/ccu_reset.h

- struct ccu_reset_map *reset_map;

diff --git a/drivers/clk/sunxi-ng/ccu_sdm.c b/drivers/clk/sunxi-ng/ccu_sdm.c
index 41937ed0766d..c564e5f9e610 100644
--- a/drivers/clk/sunxi-ng/ccu_sdm.c
+++ b/drivers/clk/sunxi-ng/ccu_sdm.c

-EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_is_enabled, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_enable, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_disable, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_has_rate, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_read_rate, SUNXI_CCU);

-EXPORT_SYMBOL_NS_GPL(ccu_sdm_helper_get_factors, SUNXI_CCU);

diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c
index 7bfba0afd778..b2323cb8eddc 100644
--- a/drivers/clk/tegra/clk-bpmp.c
+++ b/drivers/clk/tegra/clk-bpmp.c

- rate = min(max(rate_req->rate, rate_req->min_rate), rate_req->max_rate);

diff --git a/drivers/clk/thead/clk-th1520-ap.c b/drivers/clk/thead/clk-th1520-ap.c
index 17e32ae08720..4c9555fc6184 100644
--- a/drivers/clk/thead/clk-th1520-ap.c
+++ b/drivers/clk/thead/clk-th1520-ap.c

- 0x140, BIT(9), 0);

- 0x150, BIT(10), 0);

- 0x150, BIT(11), 0);

-static CCU_GATE(CLK_EMMC_SDIO, emmc_sdio_clk, "emmc-sdio", video_pll_clk_pd, 0x204, BIT(30), 0);

- &cpu2vp_clk.common,

- 0, base + cg->common.cfg0,

diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index f2117fef7c7d..9c75dcc9a534 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c

- io = memblock_alloc(sizeof(*io), SMP_CACHE_BYTES);

- panic("%s: Failed to allocate %zu bytes\n", __func__,

diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index 216d85d6aac6..f684fc306ecc 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c

- parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL);

diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c
index 7a0269bdfbb3..bbf7714480e7 100644
--- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c
+++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c

-#define WZRD_M_MIN 2

-#define WZRD_M_MAX 128

-#define WZRD_D_MIN 1

-#define WZRD_D_MAX 106

-#define WZRD_VCO_MIN 800000000

-#define WZRD_VCO_MAX 1600000000

-#define WZRD_O_MIN 1

-#define WZRD_O_MAX 128

- * @clk_data: Clock data

- * @clkout: Output clocks

- struct clk_onecell_data clk_data;

- struct clk *clks_internal[wzrd_clk_int_max];

- struct clk *clkout[WZRD_NUM_OUTPUTS];

- u64 vco_freq, freq, diff, vcomin, vcomax;

- u32 mmin, mmax, dmin, dmax, omin, omax;

- mmin = WZRD_M_MIN;

- mmax = WZRD_M_MAX;

- omin = WZRD_O_MIN;

- omax = WZRD_O_MAX;

- vcomin = WZRD_VCO_MIN;

- vcomax = WZRD_VCO_MAX;

- for (d = dmin; d <= dmax; d++) {

- vco_freq = DIV_ROUND_CLOSEST((parent_rate * m), d);

- if (vco_freq >= vcomin && vco_freq <= vcomax) {

- for (o = omin; o <= omax; o++) {

- freq = DIV_ROUND_CLOSEST_ULL(vco_freq, o);

- diff = abs(freq - rate);

- if (diff < WZRD_MIN_ERR) {

- unsigned long vco_freq, rate_div, clockout0_div;

- vco_freq = DIV_ROUND_CLOSEST(parent_rate * divider->m, divider->d);

- rate_div = DIV_ROUND_CLOSEST_ULL((vco_freq * WZRD_FRAC_POINTS), rate);

- clockout0_div = div_u64(rate_div, WZRD_FRAC_POINTS);

- pre = DIV_ROUND_CLOSEST_ULL(vco_freq * WZRD_FRAC_POINTS, rate);

- f = (pre - (clockout0_div * WZRD_FRAC_POINTS));

- f &= WZRD_CLKOUT_FRAC_MASK;

- reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, clockout0_div) |

- FIELD_PREP(WZRD_CLKOUT0_FRAC_MASK, f);

- /* Set divisor and clear phase offset */

- writel(divider->o, divider->base + WZRD_CLK_CFG_REG(0, 2));

- u32 m, d, o, div, reg, f;

- div = DIV_ROUND_CLOSEST(d * (WZRD_FRAC_POINTS * o + f), WZRD_FRAC_POINTS);

- return divider_recalc_rate(hw, parent_rate * m, div, divider->table,

- divider->flags, divider->width);

- .round_rate = clk_wzrd_round_rate_all,

-static struct clk *clk_wzrd_register_divf(struct device *dev,

-static struct clk *clk_wzrd_ver_register_divider(struct device *dev,

-static struct clk *clk_wzrd_register_divider(struct device *dev,

-static int clk_wzrd_probe(struct platform_device *pdev)

- struct device_node *np = pdev->dev.of_node;

- struct clk_wzrd *clk_wzrd;

- bool is_versal = false;

- unsigned long rate;

- clk_wzrd = devm_kzalloc(&pdev->dev, sizeof(*clk_wzrd), GFP_KERNEL);

- platform_set_drvdata(pdev, clk_wzrd);

- clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0);

- if (IS_ERR(clk_wzrd->base))

- return PTR_ERR(clk_wzrd->base);

- ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade);

- if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) {

- dev_warn(&pdev->dev, "invalid speed grade '%d'\n",

- clk_wzrd->speed_grade);

- clk_wzrd->speed_grade = 0;

- clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1");

- if (IS_ERR(clk_wzrd->clk_in1))

- return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1),

- "clk_in1 not found\n");

- clk_wzrd->axi_clk = devm_clk_get(&pdev->dev, "s_axi_aclk");

- if (IS_ERR(clk_wzrd->axi_clk))

- return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk),

- "s_axi_aclk not found\n");

- ret = clk_prepare_enable(clk_wzrd->axi_clk);

- dev_err(&pdev->dev, "enabling s_axi_aclk failed\n");

- rate = clk_get_rate(clk_wzrd->axi_clk);

- if (rate > WZRD_ACLK_MAX_FREQ) {

- dev_err(&pdev->dev, "s_axi_aclk frequency (%lu) too high\n",

- goto err_disable_clk;

- data = device_get_match_data(&pdev->dev);

- ret = of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs);

- if (ret || nr_outputs > WZRD_NUM_OUTPUTS) {

- goto err_disable_clk;

- clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_out0", dev_name(&pdev->dev));

- if (!clkout_name) {

- goto err_disable_clk;

- clk_wzrd->clkout[0] = clk_wzrd_ver_register_divider

- (&pdev->dev, clkout_name,

- clk_wzrd->clkout[0] = clk_wzrd_register_divider

- (&pdev->dev, clkout_name,

- clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul", dev_name(&pdev->dev));

- goto err_disable_clk;

- clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor

- (&pdev->dev, clk_name,

- dev_err(&pdev->dev, "unable to register fixed-factor clock\n");

- ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul]);

- goto err_disable_clk;

- clk_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev));

- goto err_rm_int_clk;

- clk_mul_name = __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]);

- clk_register_fixed_factor(&pdev->dev, clk_name,

- clk_mul_name, 0, 1, div);

- clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_divider

- (&pdev->dev, clk_name,

- __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]),

- dev_err(&pdev->dev, "unable to register divider clock\n");

- ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]);

- goto err_rm_int_clk;

- clkout_name = devm_kasprintf(&pdev->dev, GFP_KERNEL,

- "%s_out%d", dev_name(&pdev->dev), i);

- if (!clkout_name) {

- goto err_rm_int_clk;

- clk_wzrd->clkout[i] = clk_wzrd_ver_register_divider

- clk_wzrd->clkout[i] = clk_wzrd_register_divf

- (&pdev->dev, clkout_name, clk_name, flags, clk_wzrd->base,

- clk_wzrd->clkout[i] = clk_wzrd_register_divider

- (&pdev->dev, clkout_name, clk_name, 0, clk_wzrd->base,

- if (IS_ERR(clk_wzrd->clkout[i])) {

- for (j = i + 1; j < nr_outputs; j++)

- clk_unregister(clk_wzrd->clkout[j]);

- dev_err(&pdev->dev,

- "unable to register divider clock\n");

- ret = PTR_ERR(clk_wzrd->clkout[i]);

- goto err_rm_int_clks;

- clk_wzrd->clk_data.clks = clk_wzrd->clkout;

- clk_wzrd->clk_data.clk_num = ARRAY_SIZE(clk_wzrd->clkout);

- of_clk_add_provider(np, of_clk_src_onecell_get, &clk_wzrd->clk_data);

- if (clk_wzrd->speed_grade) {

- clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier;

- ret = clk_notifier_register(clk_wzrd->clk_in1,

- dev_warn(&pdev->dev,

- "unable to register clock notifier\n");

- ret = clk_notifier_register(clk_wzrd->axi_clk, &clk_wzrd->nb);

- dev_warn(&pdev->dev,

- "unable to register clock notifier\n");

- clk_unregister(clk_wzrd->clks_internal[1]);

- clk_unregister(clk_wzrd->clks_internal[0]);

- clk_disable_unprepare(clk_wzrd->axi_clk);

-static void clk_wzrd_remove(struct platform_device *pdev)

- struct clk_wzrd *clk_wzrd = platform_get_drvdata(pdev);

- of_clk_del_provider(pdev->dev.of_node);

- for (i = 0; i < WZRD_NUM_OUTPUTS; i++)

- clk_unregister(clk_wzrd->clkout[i]);

- for (i = 0; i < wzrd_clk_int_max; i++)

- clk_unregister(clk_wzrd->clks_internal[i]);

- if (clk_wzrd->speed_grade) {

- clk_notifier_unregister(clk_wzrd->axi_clk, &clk_wzrd->nb);

- clk_notifier_unregister(clk_wzrd->clk_in1, &clk_wzrd->nb);

- clk_disable_unprepare(clk_wzrd->axi_clk);

- .remove = clk_wzrd_remove,

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 95dd4660b5b6..487c85259967 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig

- bool "Support for Dual Timer SP804 module" if COMPILE_TEST

diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 22743785299e..43ef16a4efa6 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 03733101e231..808f259781fd 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c

- clk->set_state_shutdown(clk);

- has_names = of_property_read_bool(np, "interrupt-names");

diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c
index a05cfaab5f84..2d86bbc2764a 100644
--- a/drivers/clocksource/arm_global_timer.c
+++ b/drivers/clocksource/arm_global_timer.c

- gt_clockevent_shutdown(clk);

diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c
index f5f24a95ee82..3a55ae5fe225 100644
--- a/drivers/clocksource/dw_apb_timer.c
+++ b/drivers/clocksource/dw_apb_timer.c

-static void apbt_disable_int(struct dw_apb_timer *timer)

- u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL);

- ctrl |= APBTMR_CONTROL_INT;

- apbt_writel(timer, ctrl, APBTMR_N_CONTROL);

- * dw_apb_clockevent_pause() - stop the clock_event_device from running

- * @dw_ced: The APB clock to stop generating events.

-void dw_apb_clockevent_pause(struct dw_apb_clock_event_device *dw_ced)

- disable_irq(dw_ced->timer.irq);

- apbt_disable_int(&dw_ced->timer);

- * dw_apb_clockevent_resume() - resume a clock that has been paused.

- * @dw_ced: The APB clock to resume.

-void dw_apb_clockevent_resume(struct dw_apb_clock_event_device *dw_ced)

- enable_irq(dw_ced->timer.irq);

- * dw_apb_clockevent_stop() - stop the clock_event_device and release the IRQ.

- * @dw_ced: The APB clock to stop generating the events.

-void dw_apb_clockevent_stop(struct dw_apb_clock_event_device *dw_ced)

- free_irq(dw_ced->timer.irq, &dw_ced->ced);

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index ef8cb1b71be4..e6a02e351d77 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c

- evt->set_state_shutdown(evt);

diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c
index 99177835cade..f00019b078a7 100644
--- a/drivers/clocksource/hyperv_timer.c
+++ b/drivers/clocksource/hyperv_timer.c

-#include <asm/hyperv-tlfs.h>

-static u64 hv_sched_clock_offset __ro_after_init;

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 110347707ff9..7907b740497a 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c

- if (mips_cm_revision() >= CM_REV_CM3 || !IS_ENABLED(CONFIG_CPU_FREQ)) {

diff --git a/drivers/clocksource/timer-armada-370-xp.c b/drivers/clocksource/timer-armada-370-xp.c
index 6ec565d6939a..54284c1c0651 100644
--- a/drivers/clocksource/timer-armada-370-xp.c
+++ b/drivers/clocksource/timer-armada-370-xp.c

- evt->set_state_shutdown(evt);

diff --git a/drivers/clocksource/timer-gxp.c b/drivers/clocksource/timer-gxp.c
index 57aa2e2cce53..48a73c101eb8 100644
--- a/drivers/clocksource/timer-gxp.c
+++ b/drivers/clocksource/timer-gxp.c

- ret = (int)PTR_ERR(clk);

diff --git a/drivers/clocksource/timer-qcom.c b/drivers/clocksource/timer-qcom.c
index eac4c95c6127..ddb1debe6a6b 100644
--- a/drivers/clocksource/timer-qcom.c
+++ b/drivers/clocksource/timer-qcom.c

- evt->set_state_shutdown(evt);

diff --git a/drivers/clocksource/timer-ralink.c b/drivers/clocksource/timer-ralink.c
new file mode 100644
index 000000000000..6ecdb4228f76
--- /dev/null
+++ b/drivers/clocksource/timer-ralink.c

diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index 0d229a9058da..6b48a9006444 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c

- .remove_new = sun5i_timer_remove,

diff --git a/drivers/clocksource/timer-tegra.c b/drivers/clocksource/timer-tegra.c
index e9635c25eef4..35b6ce9deffa 100644
--- a/drivers/clocksource/timer-tegra.c
+++ b/drivers/clocksource/timer-tegra.c

- to->clkevt.set_state_shutdown(&to->clkevt);

diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/timer-tegra186.c
index 304537dadf2c..5d4cf5237a11 100644
--- a/drivers/clocksource/timer-tegra186.c
+++ b/drivers/clocksource/timer-tegra186.c

- .remove_new = tegra186_timer_remove,

diff --git a/drivers/clocksource/timer-ti-dm-systimer.c b/drivers/clocksource/timer-ti-dm-systimer.c
index c2dcd8d68e45..985a6d08512b 100644
--- a/drivers/clocksource/timer-ti-dm-systimer.c
+++ b/drivers/clocksource/timer-ti-dm-systimer.c

- if (!of_property_read_bool(np, "assigned-clocks"))

- if (!of_property_read_bool(np, "assigned-clock-parents"))

- struct device_node *arm_timer;

- arm_timer = of_find_compatible_node(NULL, NULL, "arm,armv7-timer");

diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c
index b7a34b1a975e..e9e32df6b566 100644
--- a/drivers/clocksource/timer-ti-dm.c
+++ b/drivers/clocksource/timer-ti-dm.c

- if (timer->irq < 0)

- return timer->irq;

- .remove_new = omap_dm_timer_remove,

diff --git a/drivers/comedi/comedi_fops.c b/drivers/comedi/comedi_fops.c
index 1b481731df96..b9df9b19d4bd 100644
--- a/drivers/comedi/comedi_fops.c
+++ b/drivers/comedi/comedi_fops.c

diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
index 4a6868b8f58b..ce81fc4e1ae7 100644
--- a/drivers/counter/104-quad-8.c
+++ b/drivers/counter/104-quad-8.c

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c
index 3ee75e1a78cd..23fdf0caf712 100644
--- a/drivers/counter/counter-chrdev.c
+++ b/drivers/counter/counter-chrdev.c

-EXPORT_SYMBOL_NS_GPL(counter_push_event, COUNTER);

diff --git a/drivers/counter/counter-core.c b/drivers/counter/counter-core.c
index 893b4f0726d2..50bd30ba3d03 100644
--- a/drivers/counter/counter-core.c
+++ b/drivers/counter/counter-core.c

-EXPORT_SYMBOL_NS_GPL(counter_priv, COUNTER);

-EXPORT_SYMBOL_NS_GPL(counter_alloc, COUNTER);

-EXPORT_SYMBOL_NS_GPL(counter_put, COUNTER);

-EXPORT_SYMBOL_NS_GPL(counter_add, COUNTER);

-EXPORT_SYMBOL_NS_GPL(counter_unregister, COUNTER);

-EXPORT_SYMBOL_NS_GPL(devm_counter_alloc, COUNTER);

-EXPORT_SYMBOL_NS_GPL(devm_counter_add, COUNTER);

diff --git a/drivers/counter/ftm-quaddec.c b/drivers/counter/ftm-quaddec.c
index 200876f3ec04..c47741292ae1 100644
--- a/drivers/counter/ftm-quaddec.c
+++ b/drivers/counter/ftm-quaddec.c

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/i8254.c b/drivers/counter/i8254.c
index 6d74e8ef92f0..95ad928725ec 100644
--- a/drivers/counter/i8254.c
+++ b/drivers/counter/i8254.c

-EXPORT_SYMBOL_NS_GPL(devm_i8254_regmap_register, I8254);

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c
index af5942e66f7d..c49c178056f4 100644
--- a/drivers/counter/intel-qep.c
+++ b/drivers/counter/intel-qep.c

- ret = pcim_iomap_regions(pci, BIT(0), pci_name(pci));

- regs = pcim_iomap_table(pci)[0];

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/interrupt-cnt.c b/drivers/counter/interrupt-cnt.c
index 229473855c5b..949598d51575 100644
--- a/drivers/counter/interrupt-cnt.c
+++ b/drivers/counter/interrupt-cnt.c

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c
index b3e615cbd2ca..2f096a5b973d 100644
--- a/drivers/counter/microchip-tcb-capture.c
+++ b/drivers/counter/microchip-tcb-capture.c

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/rz-mtu3-cnt.c b/drivers/counter/rz-mtu3-cnt.c
index ee821493b166..e755d54dfece 100644
--- a/drivers/counter/rz-mtu3-cnt.c
+++ b/drivers/counter/rz-mtu3-cnt.c

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c
index 8439755559b2..cf73f65baf60 100644
--- a/drivers/counter/stm32-lptimer-cnt.c
+++ b/drivers/counter/stm32-lptimer-cnt.c

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
index 186e73d6ccb4..e75b69476a00 100644
--- a/drivers/counter/stm32-timer-cnt.c
+++ b/drivers/counter/stm32-timer-cnt.c

- if (!(cr1 & TIM_CR1_CEN))

- clk_enable(priv->clk);

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/ti-ecap-capture.c b/drivers/counter/ti-ecap-capture.c
index 675447315caf..3faaf7f60539 100644
--- a/drivers/counter/ti-ecap-capture.c
+++ b/drivers/counter/ti-ecap-capture.c

- clk_enable(ecap_dev->clk);

- .remove_new = ecap_cnt_remove,

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c
index 313b91456f26..bc586eff0dae 100644
--- a/drivers/counter/ti-eqep.c
+++ b/drivers/counter/ti-eqep.c

- .remove_new = ti_eqep_remove,

-MODULE_IMPORT_NS(COUNTER);

diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index 2561b215432a..d64b07ec48e5 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig

- tristate "Generic DT based cpufreq platdev driver"

diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 5f7e13e60c80..9e46960f6a86 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm

diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
index 58151ca56695..eb678fa5260a 100644
--- a/drivers/cpufreq/Kconfig.powerpc
+++ b/drivers/cpufreq/Kconfig.powerpc

-config CPU_FREQ_MAPLE

- bool "Support for Maple 970FX Evaluation Board"

- depends on PPC_MAPLE

- This adds support for frequency switching on Maple 970FX

- Evaluation Board and compatible boards (IBM JS2x blades).

diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 0f184031dd12..890fff99f37d 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile

-obj-$(CONFIG_CPU_FREQ_MAPLE) += maple-cpufreq.o

diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
index 0f04feb6cafa..463b69a2dff5 100644
--- a/drivers/cpufreq/acpi-cpufreq.c
+++ b/drivers/cpufreq/acpi-cpufreq.c

- rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);

- msr = lo | ((u64)hi << 32);

- rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);

- msr = lo | ((u64)hi << 32);

-static u64 get_max_boost_ratio(unsigned int cpu)

-static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; }

- u64 max_boost_ratio;

- max_boost_ratio = get_max_boost_ratio(cpu);

- unsigned int freq = freq_table[0].frequency;

- * Because the loop above sorts the freq_table entries in the

- * descending order, freq is the maximum frequency in the table.

- * Assume that it corresponds to the CPPC nominal frequency and

- * use it to set cpuinfo.max_freq.

- if (acpi_cpufreq_driver.set_boost) {

- set_boost(policy, acpi_cpufreq_driver.boost_enabled);

- policy->boost_enabled = acpi_cpufreq_driver.boost_enabled;

- .remove_new = acpi_cpufreq_remove,

diff --git a/drivers/cpufreq/airoha-cpufreq.c b/drivers/cpufreq/airoha-cpufreq.c
new file mode 100644
index 000000000000..4fe39eadd163
--- /dev/null
+++ b/drivers/cpufreq/airoha-cpufreq.c

diff --git a/drivers/cpufreq/amd-pstate-trace.h b/drivers/cpufreq/amd-pstate-trace.h
index 35f38ae67fb1..8d692415d905 100644
--- a/drivers/cpufreq/amd-pstate-trace.h
+++ b/drivers/cpufreq/amd-pstate-trace.h

- __field(bool, changed)

- __entry->changed = changed;

- TP_printk("amd_min_perf=%lu amd_des_perf=%lu amd_max_perf=%lu freq=%llu mperf=%llu aperf=%llu tsc=%llu cpu_id=%u changed=%s fast_switch=%s",

+ TP_printk("amd_min_perf=%lu amd_des_perf=%lu amd_max_perf=%lu freq=%llu mperf=%llu aperf=%llu tsc=%llu cpu_id=%u fast_switch=%s",

- (__entry->changed) ? "true" : "false",

diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c
index f66701514d90..3a0a380c3590 100644
--- a/drivers/cpufreq/amd-pstate-ut.c
+++ b/drivers/cpufreq/amd-pstate-ut.c

- u32 nominal_freq_khz;

- nominal_freq_khz = cpudata->nominal_freq*1000;

- if (!((cpudata->max_freq >= nominal_freq_khz) &&

- (nominal_freq_khz > cpudata->lowest_nonlinear_freq) &&

- __func__, cpu, cpudata->max_freq, nominal_freq_khz,

- if (cpudata->min_freq != policy->min) {

- pr_err("%s cpu%d cpudata_min_freq=%d policy_min=%d, they should be equal!\n",

- __func__, cpu, cpudata->min_freq, policy->min);

- (policy->max == nominal_freq_khz))

- nominal_freq_khz);

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 15e201d5e911..313550fa62d4 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c

-static s16 amd_pstate_get_epp(struct amd_cpudata *cpudata, u64 cppc_req_cached)

- if (cpu_feature_enabled(X86_FEATURE_CPPC)) {

- if (!cppc_req_cached) {

- epp = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ,

- &cppc_req_cached);

- epp = (cppc_req_cached >> 24) & 0xFF;

- ret = cppc_get_epp_perf(cpudata->cpu, &epp);

- pr_debug("Could not retrieve energy perf value (%d)\n", ret);

- return (s16)(epp & 0xff);

-static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata)

- int index = -EINVAL;

- epp = amd_pstate_get_epp(cpudata, 0);

- case AMD_CPPC_EPP_PERFORMANCE:

- index = EPP_INDEX_PERFORMANCE;

- case AMD_CPPC_EPP_BALANCE_PERFORMANCE:

- index = EPP_INDEX_BALANCE_PERFORMANCE;

- case AMD_CPPC_EPP_BALANCE_POWERSAVE:

- index = EPP_INDEX_BALANCE_POWERSAVE;

- case AMD_CPPC_EPP_POWERSAVE:

- index = EPP_INDEX_POWERSAVE;

-static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf,

- u32 des_perf, u32 max_perf, bool fast_switch)

- wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached));

- wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ,

- READ_ONCE(cpudata->cppc_req_cached));

-DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf);

-static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata,

- u32 max_perf, bool fast_switch)

- static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf,

- max_perf, fast_switch);

-static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp)

- struct cppc_perf_ctrls perf_ctrls;

- if (cpu_feature_enabled(X86_FEATURE_CPPC)) {

- u64 value = READ_ONCE(cpudata->cppc_req_cached);

- value &= ~GENMASK_ULL(31, 24);

- value |= (u64)epp << 24;

- WRITE_ONCE(cpudata->cppc_req_cached, value);

- ret = wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);

- cpudata->epp_cached = epp;

- amd_pstate_update_perf(cpudata, cpudata->min_limit_perf, 0U,

- cpudata->max_limit_perf, false);

- perf_ctrls.energy_perf = epp;

- ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1);

- pr_debug("failed to set energy perf value (%d)\n", ret);

- cpudata->epp_cached = epp;

-static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata,

- int epp = -EINVAL;

- if (epp == -EINVAL)

- ret = amd_pstate_set_epp(cpudata, epp);

-static inline int pstate_enable(bool enable)

-static int cppc_enable(bool enable)

-DEFINE_STATIC_CALL(amd_pstate_enable, pstate_enable);

-static inline int amd_pstate_enable(bool enable)

- return static_call(amd_pstate_enable)(enable);

-static int pstate_init_perf(struct amd_cpudata *cpudata)

- WRITE_ONCE(cpudata->highest_perf, AMD_CPPC_HIGHEST_PERF(cap1));

- WRITE_ONCE(cpudata->max_limit_perf, AMD_CPPC_HIGHEST_PERF(cap1));

-static int cppc_init_perf(struct amd_cpudata *cpudata)

- WRITE_ONCE(cpudata->highest_perf, cppc_perf.highest_perf);

- WRITE_ONCE(cpudata->max_limit_perf, cppc_perf.highest_perf);

-DEFINE_STATIC_CALL(amd_pstate_init_perf, pstate_init_perf);

-static void cppc_update_perf(struct amd_cpudata *cpudata,

- u32 min_perf, u32 des_perf,

- u32 max_perf, bool fast_switch)

- cppc_set_perf(cpudata->cpu, &perf_ctrls);

- u64 prev = READ_ONCE(cpudata->cppc_req_cached);

- min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,

- cpudata->max_limit_perf);

- max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,

- cpudata->max_limit_perf);

- value &= ~AMD_CPPC_MIN_PERF(~0L);

- value |= AMD_CPPC_MIN_PERF(min_perf);

- value &= ~AMD_CPPC_DES_PERF(~0L);

- value |= AMD_CPPC_DES_PERF(des_perf);

- value &= ~AMD_CPPC_MAX_PERF(~0L);

- value |= AMD_CPPC_MAX_PERF(max_perf);

- cpudata->cpu, (value != prev), fast_switch);

- if (value == prev)

- goto cpufreq_policy_put;

- WRITE_ONCE(cpudata->cppc_req_cached, value);

- amd_pstate_update_perf(cpudata, min_perf, des_perf,

- max_perf, fast_switch);

-cpufreq_policy_put:

-static int amd_pstate_verify(struct cpufreq_policy_data *policy)

- cpufreq_verify_within_cpu_limits(policy);

- u32 max_limit_perf, min_limit_perf, lowest_perf;

- max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);

- min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);

- lowest_perf = READ_ONCE(cpudata->lowest_perf);

- if (min_limit_perf < lowest_perf)

- min_limit_perf = lowest_perf;

- if (max_limit_perf < min_limit_perf)

- max_limit_perf = min_limit_perf;

- max_perf = cap_perf;

- struct cppc_perf_ctrls perf_ctrls;

- u32 highest_perf, nominal_perf, nominal_freq, max_freq;

- highest_perf = READ_ONCE(cpudata->highest_perf);

- nominal_perf = READ_ONCE(cpudata->nominal_perf);

- if (boot_cpu_has(X86_FEATURE_CPPC)) {

- u64 value = READ_ONCE(cpudata->cppc_req_cached);

- value &= ~GENMASK_ULL(7, 0);

- value |= on ? highest_perf : nominal_perf;

- WRITE_ONCE(cpudata->cppc_req_cached, value);

- wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);

- perf_ctrls.max_perf = on ? highest_perf : nominal_perf;

- ret = cppc_set_perf(cpudata->cpu, &perf_ctrls);

- cpufreq_cpu_release(policy);

- pr_debug("Failed to set max perf on CPU:%d. ret:%d\n",

- cpudata->cpu, ret);

- else if (policy->cpuinfo.max_freq > nominal_freq * 1000)

- policy->cpuinfo.max_freq = nominal_freq * 1000;

- mutex_lock(&amd_pstate_driver_lock);

- WRITE_ONCE(cpudata->boost_state, !ret ? state : false);

- policy->boost_enabled = !ret ? state : false;

- mutex_unlock(&amd_pstate_driver_lock);

- /* at least one CPU supports CPB, even if others fail later on to set up */

- current_pstate_driver->boost_enabled = true;

- sched_set_itmt_core_prio((int)READ_ONCE(cpudata->highest_perf), cpudata->cpu);

- struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);

- if (!amd_pstate_prefcore)

- mutex_lock(&amd_pstate_driver_lock);

- goto free_cpufreq_put;

- mutex_unlock(&amd_pstate_driver_lock);

- if (cpu_feature_enabled(X86_FEATURE_FAST_CPPC))

- u32 nominal_perf, nominal_freq;

- u32 boost_ratio, lowest_nonlinear_ratio;

- min_freq = quirks->lowest_freq * 1000;

- min_freq = cppc_perf.lowest_freq * 1000;

- nominal_freq = quirks->nominal_freq ;

- ret = amd_get_boost_ratio_numerator(cpudata->cpu, &numerator);

- boost_ratio = div_u64(numerator << SCHED_CAPACITY_SHIFT, nominal_perf);

- max_freq = (nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT) * 1000;

- lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT,

- lowest_nonlinear_freq = (nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT) * 1000;

- WRITE_ONCE(cpudata->min_freq, min_freq);

- WRITE_ONCE(cpudata->lowest_nonlinear_freq, lowest_nonlinear_freq);

- WRITE_ONCE(cpudata->nominal_freq, nominal_freq);

- WRITE_ONCE(cpudata->max_freq, max_freq);

- min_freq, max_freq, nominal_freq * 1000);

- if (lowest_nonlinear_freq <= min_freq || lowest_nonlinear_freq > nominal_freq * 1000) {

- lowest_nonlinear_freq, min_freq, nominal_freq * 1000);

- FREQ_QOS_MIN, policy->cpuinfo.min_freq);

- ret = amd_pstate_enable(true);

- ret = amd_pstate_enable(false);

- struct amd_cpudata *cpudata = policy->driver_data;

- mutex_lock(&amd_pstate_limits_lock);

- ret = amd_pstate_set_energy_pref_index(cpudata, ret);

- mutex_unlock(&amd_pstate_limits_lock);

- return ret ?: count;

- preference = amd_pstate_get_energy_pref_index(cpudata);

- if (preference < 0)

- return preference;

- amd_pstate_enable(false);

- if (mode == AMD_PSTATE_PASSIVE || mode == AMD_PSTATE_GUIDED)

- current_pstate_driver = &amd_pstate_driver;

- else if (mode == AMD_PSTATE_ACTIVE)

- current_pstate_driver = &amd_pstate_epp_driver;

- mutex_lock(&amd_pstate_driver_lock);

- ret = amd_pstate_show_status(buf);

- mutex_unlock(&amd_pstate_driver_lock);

- mutex_lock(&amd_pstate_driver_lock);

- mutex_unlock(&amd_pstate_driver_lock);

- cpudata->epp_policy = 0;

- cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata, 0);

- amd_pstate_acpi_pm_profile_undefined())

- u32 max_perf, min_perf, min_limit_perf, max_limit_perf;

- max_perf = READ_ONCE(cpudata->highest_perf);

- min_perf = READ_ONCE(cpudata->lowest_perf);

- max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);

- min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);

- if (min_limit_perf < min_perf)

- min_limit_perf = min_perf;

- if (max_limit_perf < min_limit_perf)

- max_limit_perf = min_limit_perf;

- WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);

- WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);

- max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,

- cpudata->max_limit_perf);

- min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,

- cpudata->max_limit_perf);

- value = READ_ONCE(cpudata->cppc_req_cached);

- if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)

- min_perf = max_perf;

- /* Initial min/max values for CPPC Performance Controls Register */

- value &= ~AMD_CPPC_MIN_PERF(~0L);

- value |= AMD_CPPC_MIN_PERF(min_perf);

- value &= ~AMD_CPPC_MAX_PERF(~0L);

- value |= AMD_CPPC_MAX_PERF(max_perf);

- /* CPPC EPP feature require to set zero to the desire perf bit */

- value &= ~AMD_CPPC_DES_PERF(~0L);

- value |= AMD_CPPC_DES_PERF(0);

- cpudata->epp_policy = cpudata->policy;

- /* Get BIOS pre-defined epp value */

- epp = amd_pstate_get_epp(cpudata, value);

- * This return value can only be negative for shared_memory

- * systems where EPP register read/write not supported.

- /* Set initial EPP value */

- if (cpu_feature_enabled(X86_FEATURE_CPPC)) {

- value &= ~GENMASK_ULL(31, 24);

- value |= (u64)epp << 24;

- WRITE_ONCE(cpudata->cppc_req_cached, value);

- return amd_pstate_set_epp(cpudata, epp);

-static void amd_pstate_epp_reenable(struct amd_cpudata *cpudata)

- struct cppc_perf_ctrls perf_ctrls;

- u64 value, max_perf;

- ret = amd_pstate_enable(true);

- value = READ_ONCE(cpudata->cppc_req_cached);

- if (cpu_feature_enabled(X86_FEATURE_CPPC)) {

- wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);

- perf_ctrls.max_perf = max_perf;

- perf_ctrls.energy_perf = AMD_CPPC_ENERGY_PERF_PREF(cpudata->epp_cached);

- cppc_set_perf(cpudata->cpu, &perf_ctrls);

- if (cppc_state == AMD_PSTATE_ACTIVE) {

- amd_pstate_epp_reenable(cpudata);

- cpudata->suspended = false;

-static void amd_pstate_epp_offline(struct cpufreq_policy *policy)

- struct amd_cpudata *cpudata = policy->driver_data;

- struct cppc_perf_ctrls perf_ctrls;

- min_perf = READ_ONCE(cpudata->lowest_perf);

- value = READ_ONCE(cpudata->cppc_req_cached);

- mutex_lock(&amd_pstate_limits_lock);

- if (cpu_feature_enabled(X86_FEATURE_CPPC)) {

- cpudata->epp_policy = CPUFREQ_POLICY_UNKNOWN;

- /* Set max perf same as min perf */

- value &= ~AMD_CPPC_MAX_PERF(~0L);

- value |= AMD_CPPC_MAX_PERF(min_perf);

- value &= ~AMD_CPPC_MIN_PERF(~0L);

- value |= AMD_CPPC_MIN_PERF(min_perf);

- wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, value);

- perf_ctrls.desired_perf = 0;

- perf_ctrls.max_perf = min_perf;

- perf_ctrls.energy_perf = AMD_CPPC_ENERGY_PERF_PREF(HWP_EPP_BALANCE_POWERSAVE);

- cppc_set_perf(cpudata->cpu, &perf_ctrls);

- mutex_unlock(&amd_pstate_limits_lock);

- pr_debug("AMD CPU Core %d going offline\n", cpudata->cpu);

- if (cppc_state == AMD_PSTATE_ACTIVE)

- amd_pstate_epp_offline(policy);

-static int amd_pstate_epp_verify_policy(struct cpufreq_policy_data *policy)

- cpufreq_verify_within_cpu_limits(policy);

- pr_debug("policy_max =%d, policy_min=%d\n", policy->max, policy->min);

- ret = amd_pstate_enable(false);

- mutex_lock(&amd_pstate_limits_lock);

- amd_pstate_epp_reenable(cpudata);

- mutex_unlock(&amd_pstate_limits_lock);

- .verify = amd_pstate_epp_verify_policy,

-static int __init amd_pstate_set_driver(int mode_idx)

- if (mode_idx >= AMD_PSTATE_DISABLE && mode_idx < AMD_PSTATE_MAX) {

- cppc_state = mode_idx;

- if (cppc_state == AMD_PSTATE_DISABLE)

- pr_info("driver is explicitly disabled\n");

- if (cppc_state == AMD_PSTATE_ACTIVE)

- current_pstate_driver = &amd_pstate_epp_driver;

- if (cppc_state == AMD_PSTATE_PASSIVE || cppc_state == AMD_PSTATE_GUIDED)

- current_pstate_driver = &amd_pstate_driver;

- * 2. Server platforms

- amd_pstate_acpi_pm_profile_server()) {

- switch (cppc_state) {

- case AMD_PSTATE_DISABLE:

- case AMD_PSTATE_PASSIVE:

- case AMD_PSTATE_ACTIVE:

- case AMD_PSTATE_GUIDED:

- ret = amd_pstate_set_driver(cppc_state);

- if (cppc_state != AMD_PSTATE_ACTIVE)

- current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;

- static_call_update(amd_pstate_enable, cppc_enable);

- static_call_update(amd_pstate_init_perf, cppc_init_perf);

- static_call_update(amd_pstate_update_perf, cppc_update_perf);

- /* enable amd pstate feature */

- ret = amd_pstate_enable(true);

- pr_err("failed to enable driver mode(%d)\n", cppc_state);

- ret = cpufreq_register_driver(current_pstate_driver);

- goto disable_driver;

- amd_pstate_enable(false);

diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h
index cd573bc6b6db..9747e3be6cee 100644
--- a/drivers/cpufreq/amd-pstate.h
+++ b/drivers/cpufreq/amd-pstate.h

- * @epp_policy: Last saved policy used to set energy-performance preference

diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c
index 4dcacab9b4bf..269b18c62d04 100644
--- a/drivers/cpufreq/apple-soc-cpufreq.c
+++ b/drivers/cpufreq/apple-soc-cpufreq.c

-#define APPLE_DVFS_CMD 0x20

-#define APPLE_DVFS_CMD_BUSY BIT(31)

-#define APPLE_DVFS_CMD_SET BIT(25)

-#define APPLE_DVFS_CMD_PS2 GENMASK(16, 12)

-#define APPLE_DVFS_CMD_PS1 GENMASK(4, 0)

-#define APPLE_DVFS_TRANSITION_TIMEOUT 100

- u64 reg = readq_relaxed(priv->reg_base + APPLE_DVFS_STATUS);

- reg &= ~(APPLE_DVFS_CMD_PS1 | APPLE_DVFS_CMD_PS2);

- reg |= FIELD_PREP(APPLE_DVFS_CMD_PS1, pstate);

- reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate);

- transition_latency = CPUFREQ_ETERNAL;

diff --git a/drivers/cpufreq/brcmstb-avs-cpufreq.c b/drivers/cpufreq/brcmstb-avs-cpufreq.c
index ea8438550b49..2fd0f6be6fa3 100644
--- a/drivers/cpufreq/brcmstb-avs-cpufreq.c
+++ b/drivers/cpufreq/brcmstb-avs-cpufreq.c

- return (magic == AVS_FIRMWARE_MAGIC) && ((rc != -ENOTSUPP) ||

- .remove_new = brcm_avs_cpufreq_remove,

diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index 2b8708475ac7..8f512448382f 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c

-struct cppc_workaround_oem_info {

- char oem_id[ACPI_OEM_ID_SIZE + 1];

- char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];

-static struct cppc_workaround_oem_info wa_info[] = {

- .oem_id = "HISI ",

- .oem_table_id = "HIP07 ",

- .oem_revision = 0,

- .oem_id = "HISI ",

- .oem_table_id = "HIP08 ",

- .oem_revision = 0,

-#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE

-static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu);

- kworker_fie = kthread_create_worker(0, "cppc_fie");

- policy->max = cppc_perf_to_khz(caps, caps->nominal_perf);

- policy->cpuinfo.max_freq = cppc_perf_to_khz(caps, caps->nominal_perf);

- /* Check to avoid divide-by zero and invalid delivered_perf */

- return cpu_data->perf_ctrls.desired_perf;

- ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t0);

- udelay(2); /* 2usec delay between sampling */

- ret = cppc_get_perf_ctrs(cpu, &fb_ctrs_t1);

- * HISI platform does not support delivered performance counter and

- * reference performance counter. It can calculate the performance using the

- * platform specific mechanism. We reuse the desired performance register to

- * store the real performance calculated by the platform.

-static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu)

- struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);

- struct cppc_cpudata *cpu_data;

- cpu_data = policy->driver_data;

- cpufreq_cpu_put(policy);

- ret = cppc_get_desired_perf(cpu, &desired_perf);

- return cppc_perf_to_khz(&cpu_data->perf_caps, desired_perf);

-static void cppc_check_hisi_workaround(void)

- struct acpi_table_header *tbl;

- acpi_status status = AE_OK;

- status = acpi_get_table(ACPI_SIG_PCCT, 0, &tbl);

- if (ACPI_FAILURE(status) || !tbl)

- for (i = 0; i < ARRAY_SIZE(wa_info); i++) {

- if (!memcmp(wa_info[i].oem_id, tbl->oem_id, ACPI_OEM_ID_SIZE) &&

- !memcmp(wa_info[i].oem_table_id, tbl->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&

- wa_info[i].oem_revision == tbl->oem_revision) {

- /* Overwrite the get() callback */

- cppc_cpufreq_driver.get = hisi_cppc_cpufreq_get_rate;

- fie_disabled = FIE_DISABLED;

- acpi_put_table(tbl);

- cppc_check_hisi_workaround();

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 18942bfe9c95..2aa00769cf09 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c

-MODULE_DESCRIPTION("Generic DT based cpufreq platdev driver");

-MODULE_LICENSE("GPL");

diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c
index 983443396f8f..3a7c3372bda7 100644
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c

- .remove_new = dt_cpufreq_remove,

diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index f98c9438760c..30ffbddc7ece 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c

- __func__, enable ? "enable" : "disable");

- __func__, enable ? "enabled" : "disabled");

- /* Let the per-policy boost flag mirror the cpufreq_driver boost during init */

- if (cpufreq_boost_enabled() && policy_has_boost_freq(policy))

- policy->boost_enabled = true;

- pr_info("%s: CPU%d: Running at unlisted initial frequency: %u KHz, changing to: %u KHz\n",

- * sugov_eas_rebuild_sd() is called, which will result

- __func__, state ? "enable" : "disable");

diff --git a/drivers/cpufreq/davinci-cpufreq.c b/drivers/cpufreq/davinci-cpufreq.c
index 7d2754411d8c..8736be3a06ce 100644
--- a/drivers/cpufreq/davinci-cpufreq.c
+++ b/drivers/cpufreq/davinci-cpufreq.c

- .remove_new = __exit_p(davinci_cpufreq_remove),

diff --git a/drivers/cpufreq/imx-cpufreq-dt.c b/drivers/cpufreq/imx-cpufreq-dt.c
index 577bb9e2f112..1492c92ffc1a 100644
--- a/drivers/cpufreq/imx-cpufreq-dt.c
+++ b/drivers/cpufreq/imx-cpufreq-dt.c

- .remove_new = imx_cpufreq_dt_remove,

diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index c20d3ecc5a81..f3c99f378ad6 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c

- .remove_new = imx6q_cpufreq_remove,

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index b0018f371ea3..9c4cc01fd51a 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c

-#define HYBRID_SCALING_FACTOR 78741

-static int hybrid_scaling_factor = HYBRID_SCALING_FACTOR;

- ret = cppc_get_perf_caps(cpu, &cppc_perf);

- * If the nominal frequency and the nominal performance are not

- * zero and the ratio between them is not 100, return the hybrid

- if (!ret && cppc_perf.nominal_perf && cppc_perf.nominal_freq &&

- cppc_perf.nominal_perf * 100 != cppc_perf.nominal_freq)

- return hybrid_scaling_factor;

-static void __hybrid_init_cpu_capacity_scaling(void)

-static void hybrid_init_cpu_capacity_scaling(void)

- bool disable_itmt = false;

- mutex_lock(&hybrid_capacity_lock);

- if (hybrid_max_perf_cpu) {

- __hybrid_init_cpu_capacity_scaling();

- disable_itmt = true;

- mutex_unlock(&hybrid_capacity_lock);

- * Disabling ITMT causes sched domains to be rebuilt to disable asym

- * packing and enable asym capacity.

- sched_clear_itmt_support();

- __hybrid_init_cpu_capacity_scaling();

- smp_call_function_single(cpu, hybrid_get_type, &cpu_type, 1);

- /* P-cores have a smaller perf level-to-freqency scaling factor. */

- if (cpu_type == 0x40)

- return hybrid_scaling_factor;

- /* Use default core scaling for E-cores */

- if (cpu_type == 0x20)

- * If reached here, this system is either non-hybrid (like Tiger

- * Lake) or hybrid-capable (like Alder Lake or Raptor Lake) with

- * no E cores (in which case CPUID for hybrid support is 0).

- * The CPPC nominal_frequency field is 0 for non-hybrid systems,

- * so the default core scaling will be used for them.

- cpu->epp_policy = 0;

- hybrid_init_cpu_capacity_scaling();

- X86_MATCH_VFM(INTEL_ARROWLAKE, HYBRID_SCALING_FACTOR_MTL),

diff --git a/drivers/cpufreq/kirkwood-cpufreq.c b/drivers/cpufreq/kirkwood-cpufreq.c
index fd20b986d1f2..312f2654d1d5 100644
--- a/drivers/cpufreq/kirkwood-cpufreq.c
+++ b/drivers/cpufreq/kirkwood-cpufreq.c

- .remove_new = kirkwood_cpufreq_remove,

diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
index 6a8e97896d38..ed1a6dbad638 100644
--- a/drivers/cpufreq/loongson2_cpufreq.c
+++ b/drivers/cpufreq/loongson2_cpufreq.c

- if (!ret && !nowait) {

diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson3_cpufreq.c
index 6b5e6798d9a2..bd34bf0fafa5 100644
--- a/drivers/cpufreq/loongson3_cpufreq.c
+++ b/drivers/cpufreq/loongson3_cpufreq.c

- for (i = 0; i < MAX_PACKAGES; i++)

- devm_mutex_init(&pdev->dev, &cpufreq_mutex[i]);

- .remove_new = loongson3_cpufreq_remove,

diff --git a/drivers/cpufreq/maple-cpufreq.c b/drivers/cpufreq/maple-cpufreq.c
deleted file mode 100644
index 690da85c4865..000000000000
--- a/drivers/cpufreq/maple-cpufreq.c
+++ /dev/null

-// SPDX-License-Identifier: GPL-2.0-only

- * and Markus Demleitner <msdemlei@cl.uni-heidelberg.de>

- * This driver adds basic cpufreq support for SMU & 970FX based G5 Macs,

- * that is iMac G5 and latest single CPU desktop.

-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

-#include <linux/module.h>

-#include <linux/types.h>

-#include <linux/errno.h>

-#include <linux/kernel.h>

-#include <linux/delay.h>

-#include <linux/sched.h>

-#include <linux/cpufreq.h>

-#include <linux/init.h>

-#include <linux/completion.h>

-#include <linux/mutex.h>

-#include <linux/time.h>

-#include <linux/of.h>

-#define DBG(fmt...) pr_debug(fmt)

-/* see 970FX user manual */

-#define SCOM_PCR 0x0aa001 /* PCR scom addr */

-#define PCR_HILO_SELECT 0x80000000U /* 1 = PCR, 0 = PCRH */

-#define PCR_SPEED_FULL 0x00000000U /* 1:1 speed value */

-#define PCR_SPEED_HALF 0x00020000U /* 1:2 speed value */

-#define PCR_SPEED_QUARTER 0x00040000U /* 1:4 speed value */

-#define PCR_SPEED_MASK 0x000e0000U /* speed mask */

-#define PCR_SPEED_SHIFT 17

-#define PCR_FREQ_REQ_VALID 0x00010000U /* freq request valid */

-#define PCR_VOLT_REQ_VALID 0x00008000U /* volt request valid */

-#define PCR_TARGET_TIME_MASK 0x00006000U /* target time */

-#define PCR_STATLAT_MASK 0x00001f00U /* STATLAT value */

-#define PCR_SNOOPLAT_MASK 0x000000f0U /* SNOOPLAT value */

-#define PCR_SNOOPACC_MASK 0x0000000fU /* SNOOPACC value */

-#define SCOM_PSR 0x408001 /* PSR scom addr */

-/* warning: PSR is a 64 bits register */

-#define PSR_CMD_RECEIVED 0x2000000000000000U /* command received */

-#define PSR_CMD_COMPLETED 0x1000000000000000U /* command completed */

-#define PSR_CUR_SPEED_MASK 0x0300000000000000U /* current speed */

-#define PSR_CUR_SPEED_SHIFT (56)

- * The G5 only supports two frequencies (Quarter speed is not supported)

-#define CPUFREQ_HIGH 0

-#define CPUFREQ_LOW 1

-static struct cpufreq_frequency_table maple_cpu_freqs[] = {

- {0, CPUFREQ_HIGH, 0},

- {0, CPUFREQ_LOW, 0},

- {0, 0, CPUFREQ_TABLE_END},

-/* Power mode data is an array of the 32 bits PCR values to use for

- * the various frequencies, retrieved from the device-tree

-static int maple_pmode_cur;

-static const u32 *maple_pmode_data;

-static int maple_pmode_max;

- * SCOM based frequency switching for 970FX rev3

-static int maple_scom_switch_freq(int speed_mode)

- unsigned long flags;

- local_irq_save(flags);

- /* Clear PCR high */

- scom970_write(SCOM_PCR, 0);

- /* Clear PCR low */

- scom970_write(SCOM_PCR, PCR_HILO_SELECT | 0);

- scom970_write(SCOM_PCR, PCR_HILO_SELECT |

- maple_pmode_data[speed_mode]);

- /* Wait for completion */

- for (to = 0; to < 10; to++) {

- unsigned long psr = scom970_read(SCOM_PSR);

- if ((psr & PSR_CMD_RECEIVED) == 0 &&

- (((psr >> PSR_CUR_SPEED_SHIFT) ^

- (maple_pmode_data[speed_mode] >> PCR_SPEED_SHIFT)) & 0x3)

- if (psr & PSR_CMD_COMPLETED)

- local_irq_restore(flags);

- maple_pmode_cur = speed_mode;

- ppc_proc_freq = maple_cpu_freqs[speed_mode].frequency * 1000ul;

-static int maple_scom_query_freq(void)

- unsigned long psr = scom970_read(SCOM_PSR);

- for (i = 0; i <= maple_pmode_max; i++)

- if ((((psr >> PSR_CUR_SPEED_SHIFT) ^

- (maple_pmode_data[i] >> PCR_SPEED_SHIFT)) & 0x3) == 0)

- * Common interface to the cpufreq core

-static int maple_cpufreq_target(struct cpufreq_policy *policy,

- unsigned int index)

- return maple_scom_switch_freq(index);

-static unsigned int maple_cpufreq_get_speed(unsigned int cpu)

- return maple_cpu_freqs[maple_pmode_cur].frequency;

-static int maple_cpufreq_cpu_init(struct cpufreq_policy *policy)

- cpufreq_generic_init(policy, maple_cpu_freqs, 12000);

-static struct cpufreq_driver maple_cpufreq_driver = {

- .flags = CPUFREQ_CONST_LOOPS,

- .init = maple_cpufreq_cpu_init,

- .verify = cpufreq_generic_frequency_table_verify,

- .target_index = maple_cpufreq_target,

- .get = maple_cpufreq_get_speed,

- .attr = cpufreq_generic_attr,

-static int __init maple_cpufreq_init(void)

- struct device_node *cpunode;

- unsigned int psize;

- unsigned long max_freq;

- * Behave here like powermac driver which checks machine compatibility

- * to ease merging of two drivers in future.

- if (!of_machine_is_compatible("Momentum,Maple") &&

- !of_machine_is_compatible("Momentum,Apache"))

- /* Get first CPU node */

- cpunode = of_cpu_device_node_get(0);

- if (cpunode == NULL) {

- pr_err("Can't find any CPU 0 node\n");

- goto bail_noprops;

- /* Check 970FX for now */

- /* we actually don't care on which CPU to access PVR */

- pvr_hi = PVR_VER(mfspr(SPRN_PVR));

- if (pvr_hi != 0x3c && pvr_hi != 0x44) {

- pr_err("Unsupported CPU version (%x)\n", pvr_hi);

- goto bail_noprops;

- /* Look for the powertune data in the device-tree */

- * On Maple this property is provided by PIBS in dual-processor config,

- * not provided by PIBS in CPU0 config and also not provided by SLOF,

- maple_pmode_data = of_get_property(cpunode, "power-mode-data", &psize);

- if (!maple_pmode_data) {

- DBG("No power-mode-data !\n");

- goto bail_noprops;

- maple_pmode_max = psize / sizeof(u32) - 1;

- * From what I see, clock-frequency is always the maximal frequency.

- * The current driver can not slew sysclk yet, so we really only deal

- * with powertune steps for now. We also only implement full freq and

- * half freq in this version. So far, I haven't yet seen a machine

- * supporting anything else.

- valp = of_get_property(cpunode, "clock-frequency", NULL);

- goto bail_noprops;

- max_freq = (*valp)/1000;

- maple_cpu_freqs[0].frequency = max_freq;

- maple_cpu_freqs[1].frequency = max_freq/2;

- /* Force apply current frequency to make sure everything is in

- * sync (voltage is right for example). Firmware may leave us with

- * a strange setting ...

- maple_pmode_cur = -1;

- maple_scom_switch_freq(maple_scom_query_freq());

- pr_info("Registering Maple CPU frequency driver\n");

- pr_info("Low: %d Mhz, High: %d Mhz, Cur: %d MHz\n",

- maple_cpu_freqs[1].frequency/1000,

- maple_cpu_freqs[0].frequency/1000,

- maple_cpu_freqs[maple_pmode_cur].frequency/1000);

- rc = cpufreq_register_driver(&maple_cpufreq_driver);

- of_node_put(cpunode);

-module_init(maple_cpufreq_init);

-MODULE_DESCRIPTION("cpufreq driver for Maple 970FX/970MP boards");

-MODULE_LICENSE("GPL");

diff --git a/drivers/cpufreq/mediatek-cpufreq-hw.c b/drivers/cpufreq/mediatek-cpufreq-hw.c
index 8925e096d5b9..9252ebd60373 100644
--- a/drivers/cpufreq/mediatek-cpufreq-hw.c
+++ b/drivers/cpufreq/mediatek-cpufreq-hw.c

- .remove_new = mtk_cpufreq_hw_driver_remove,

diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index de8be0a8932d..106220c0fd11 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c

- .remove_new = omap_cpufreq_remove,

diff --git a/drivers/cpufreq/pcc-cpufreq.c b/drivers/cpufreq/pcc-cpufreq.c
index 771efbf51a48..ac2e90a65f0c 100644
--- a/drivers/cpufreq/pcc-cpufreq.c
+++ b/drivers/cpufreq/pcc-cpufreq.c

- .remove_new = pcc_cpufreq_remove,

diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c
index 8de759247771..ae79d909943b 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c

- (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");

diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index 900d6844c43d..b2e7e89feaac 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c

-static unsigned int qcom_cpufreq_get_freq(unsigned int cpu)

- struct cpufreq_policy *policy;

- policy = cpufreq_cpu_get_raw(cpu);

-static unsigned int qcom_cpufreq_hw_get(unsigned int cpu)

- struct cpufreq_policy *policy;

- policy = cpufreq_cpu_get_raw(cpu);

- return qcom_cpufreq_get_freq(cpu);

- if (throttled_freq >= qcom_cpufreq_get_freq(cpu))

- data->policy = policy;

- return qcom_lmh_get_throttle_freq(data);

- .remove_new = qcom_cpufreq_hw_driver_remove,

diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index 703308fb891a..3a8ed723a23e 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c

- const char **genpd_names;

- struct device **virt_devs;

-static const char *generic_genpd_names[] = { "perf", NULL };

- .genpd_names = generic_genpd_names,

-static const char *qcs404_genpd_names[] = { "cpr", NULL };

- .genpd_names = qcs404_genpd_names,

-static void qcom_cpufreq_suspend_virt_devs(struct qcom_cpufreq_drv *drv, unsigned int cpu)

- const char * const *name = drv->data->genpd_names;

- if (!drv->cpus[cpu].virt_devs)

- for (i = 0; *name; i++, name++)

- device_set_awake_path(drv->cpus[cpu].virt_devs[i]);

-static void qcom_cpufreq_put_virt_devs(struct qcom_cpufreq_drv *drv, unsigned int cpu)

- const char * const *name = drv->data->genpd_names;

- if (!drv->cpus[cpu].virt_devs)

- for (i = 0; *name; i++, name++)

- pm_runtime_put(drv->cpus[cpu].virt_devs[i]);

- struct device **virt_devs = NULL;

- if (drv->data->genpd_names) {

- config.genpd_names = drv->data->genpd_names;

- config.virt_devs = &virt_devs;

- if (config.supported_hw || config.genpd_names) {

- const char * const *name = config.genpd_names;

- for (i = 0; *name; i++, name++) {

- ret = pm_runtime_resume_and_get(virt_devs[i]);

- dev_err(cpu_dev, "failed to resume %s: %d\n",

- /* Rollback previous PM runtime calls */

- name = config.genpd_names;

- for (j = 0; *name && j < i; j++, name++)

- pm_runtime_put(virt_devs[j]);

- drv->cpus[cpu].virt_devs = virt_devs;

- qcom_cpufreq_put_virt_devs(drv, cpu);

- qcom_cpufreq_suspend_virt_devs(drv, cpu);

- .remove_new = qcom_cpufreq_remove,

diff --git a/drivers/cpufreq/qoriq-cpufreq.c b/drivers/cpufreq/qoriq-cpufreq.c
index 3519bf34d397..a37ce051236c 100644
--- a/drivers/cpufreq/qoriq-cpufreq.c
+++ b/drivers/cpufreq/qoriq-cpufreq.c

- .remove_new = qoriq_cpufreq_remove,

diff --git a/drivers/cpufreq/raspberrypi-cpufreq.c b/drivers/cpufreq/raspberrypi-cpufreq.c
index e0705cc9a57d..5050932954e3 100644
--- a/drivers/cpufreq/raspberrypi-cpufreq.c
+++ b/drivers/cpufreq/raspberrypi-cpufreq.c

- .remove_new = raspberrypi_cpufreq_remove,

diff --git a/drivers/cpufreq/s3c64xx-cpufreq.c b/drivers/cpufreq/s3c64xx-cpufreq.c
index c6bdfc308e99..9cef71528076 100644
--- a/drivers/cpufreq/s3c64xx-cpufreq.c
+++ b/drivers/cpufreq/s3c64xx-cpufreq.c

- struct s3c64xx_dvfs *dvfs;

- unsigned int old_freq, new_freq;

- new_freq = s3c64xx_freq_table[index].frequency;

-#ifdef CONFIG_REGULATOR

diff --git a/drivers/cpufreq/scmi-cpufreq.c b/drivers/cpufreq/scmi-cpufreq.c
index 5892c73e129d..b8fe758aeb01 100644
--- a/drivers/cpufreq/scmi-cpufreq.c
+++ b/drivers/cpufreq/scmi-cpufreq.c

- goto out_free_opp;

diff --git a/drivers/cpufreq/scpi-cpufreq.c b/drivers/cpufreq/scpi-cpufreq.c
index 8d73e6e8be2a..cd89c1b9832c 100644
--- a/drivers/cpufreq/scpi-cpufreq.c
+++ b/drivers/cpufreq/scpi-cpufreq.c

- .remove_new = scpi_cpufreq_remove,

diff --git a/drivers/cpufreq/sparc-us2e-cpufreq.c b/drivers/cpufreq/sparc-us2e-cpufreq.c
index 8a0cd5312a59..15899dd77c08 100644
--- a/drivers/cpufreq/sparc-us2e-cpufreq.c
+++ b/drivers/cpufreq/sparc-us2e-cpufreq.c

- us2e_freq_table = kzalloc(NR_CPUS * sizeof(*us2e_freq_table),

diff --git a/drivers/cpufreq/sparc-us3-cpufreq.c b/drivers/cpufreq/sparc-us3-cpufreq.c
index b50f9d13e6d2..de50a2f3b124 100644
--- a/drivers/cpufreq/sparc-us3-cpufreq.c
+++ b/drivers/cpufreq/sparc-us3-cpufreq.c

- us3_freq_table = kzalloc(NR_CPUS * sizeof(*us3_freq_table),

diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
index 293921acec93..17d6a149f580 100644
--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c

- .remove_new = sun50i_cpufreq_nvmem_remove,

diff --git a/drivers/cpufreq/tegra186-cpufreq.c b/drivers/cpufreq/tegra186-cpufreq.c
index 7b8fcfa55038..c7761eb99f3c 100644
--- a/drivers/cpufreq/tegra186-cpufreq.c
+++ b/drivers/cpufreq/tegra186-cpufreq.c

- .remove_new = tegra186_cpufreq_remove,

diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c
index 07ea7ed61b68..9055dd398e7f 100644
--- a/drivers/cpufreq/tegra194-cpufreq.c
+++ b/drivers/cpufreq/tegra194-cpufreq.c

- .remove_new = tegra194_cpufreq_remove,

diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index ba621ce1cdda..5a5147277cd0 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c

- .rev_offset = 0x0014,

diff --git a/drivers/cpufreq/vexpress-spc-cpufreq.c b/drivers/cpufreq/vexpress-spc-cpufreq.c
index 3fadf536c429..0f86cdb7ec8a 100644
--- a/drivers/cpufreq/vexpress-spc-cpufreq.c
+++ b/drivers/cpufreq/vexpress-spc-cpufreq.c

- .remove_new = ve_spc_cpufreq_remove,

diff --git a/drivers/cpufreq/virtual-cpufreq.c b/drivers/cpufreq/virtual-cpufreq.c
new file mode 100644
index 000000000000..a050b3a6737f
--- /dev/null
+++ b/drivers/cpufreq/virtual-cpufreq.c

diff --git a/drivers/cpuidle/cpuidle-arm.c b/drivers/cpuidle/cpuidle-arm.c
index 7cfb980a357d..caba6f4bb1b7 100644
--- a/drivers/cpuidle/cpuidle-arm.c
+++ b/drivers/cpuidle/cpuidle-arm.c

diff --git a/drivers/cpuidle/cpuidle-kirkwood.c b/drivers/cpuidle/cpuidle-kirkwood.c
index 602c4dfdd7e2..5235e6e8f360 100644
--- a/drivers/cpuidle/cpuidle-kirkwood.c
+++ b/drivers/cpuidle/cpuidle-kirkwood.c

- .remove_new = kirkwood_cpuidle_remove,

diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c
index 146f97068022..5fb5228f6bf1 100644
--- a/drivers/cpuidle/cpuidle-psci-domain.c
+++ b/drivers/cpuidle/cpuidle-psci-domain.c

diff --git a/drivers/cpuidle/cpuidle-pseries.c b/drivers/cpuidle/cpuidle-pseries.c
index 14db9b7d985d..f68c65f1d023 100644
--- a/drivers/cpuidle/cpuidle-pseries.c
+++ b/drivers/cpuidle/cpuidle-pseries.c

diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c
index 1fc9968eae19..3ab240e0e122 100644
--- a/drivers/cpuidle/cpuidle-qcom-spm.c
+++ b/drivers/cpuidle/cpuidle-qcom-spm.c

- * if the SPM mode is not reset, then we may accidently power down the

diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c
index d228b4d18d56..0c92a628bbd4 100644
--- a/drivers/cpuidle/cpuidle-riscv-sbi.c
+++ b/drivers/cpuidle/cpuidle-riscv-sbi.c

- struct device_node *np, *pds_node;

- np = of_cpu_device_node_get(cpu);

- pr_info("idle driver registered for all CPUs\n");

-device_initcall(sbi_cpuidle_init);

diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 9e418aec1755..0835da449db8 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c

- /* Find lowest-power state that supports long-term idle */

- for (i = drv->state_count - 1; i >= 0; i--)

- return drv->states[i].enter_dead(dev, i);

- * this is hardware dependant. Actual time can be estimated with

diff --git a/drivers/cpuidle/driver.c b/drivers/cpuidle/driver.c
index cf5873cc45dc..9bbfa594c442 100644
--- a/drivers/cpuidle/driver.c
+++ b/drivers/cpuidle/driver.c

- * [un]register the driver from occuring at the same time.

- * to [un]register the driver from occuring at the same time. @drv has to

diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index f3c9d49f0f2a..28363bfa3e4c 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c

- * For the menu governor, there are 3 decision factors for picking a C

- * 2) Performance impact

- * 3) Latency tolerance (from pmqos infrastructure)

- * These three factors are treated independently.

- * Limiting Performance Impact

- * ---------------------------

- * C states, especially those with large exit latencies, can have a real

- * noticeable impact on workloads, which is not acceptable for most sysadmins,

- * and in addition, less performance has a power price of its own.

- * As a general rule of thumb, menu assumes that the following heuristic

- * The busier the system, the less impact of C states is acceptable

- * This rule-of-thumb is implemented using a performance-multiplier:

- * If the exit latency times the performance multiplier is longer than

- * the predicted duration, the C state is not considered a candidate

- * for selection due to a too high performance impact. So the higher

- * this multiplier is, the longer we need to be idle to pick a deep C

- * state, and thus the less likely a busy CPU will hit such a deep

- * Currently there is only one value determining the factor:

- * 10 points are added for each process that is waiting for IO on this CPU.

- * (This value was experimentally determined.)

- * Utilization is no longer a factor as it was shown that it never contributed

- * significantly to the performance multiplier in the first place.

-static inline int which_bucket(u64 duration_ns, unsigned int nr_iowaiters)

- * We keep two groups of stats; one with no

- * IO pending, one without.

- * This allows us to calculate

- * E(duration)|iowait

- bucket = BUCKETS/2;

- * Return a multiplier for the exit latency that is intended

- * to take performance requirements into account.

- * The more performance critical we estimate the system

- * to be, the higher this multiplier, and thus the higher

- * the barrier to go to an expensive C state.

-static inline int performance_multiplier(unsigned int nr_iowaiters)

- /* for IO wait tasks (per cpu!) we add 10x each */

- return 1 + 10 * nr_iowaiters;

- u64 interactivity_req;

- unsigned int nr_iowaiters;

- nr_iowaiters = nr_iowait_cpu(dev->cpu);

- data->bucket = which_bucket(data->next_timer_ns, nr_iowaiters);

- data->bucket = which_bucket(KTIME_MAX, nr_iowaiters);

- * Use the performance multiplier and the user-configurable

- * latency_req to determine the maximum exit latency.

- interactivity_req = div64_u64(predicted_ns,

- performance_multiplier(nr_iowaiters));

- if (latency_req > interactivity_req)

- latency_req = interactivity_req;

diff --git a/drivers/cpuidle/governors/teo.c b/drivers/cpuidle/governors/teo.c
index f2992f92d8db..8fe5e1b47ef9 100644
--- a/drivers/cpuidle/governors/teo.c
+++ b/drivers/cpuidle/governors/teo.c

- * timer events are two or more orders of magnitude more frequent than any

- * other interrupts, so they are likely to be the most significant cause of CPU

- * wakeups from idle states. Moreover, information about what happened in the

- * (relatively recent) past can be used to estimate whether or not the deepest

- * idle state with target residency within the (known) time till the closest

- * timer event, referred to as the sleep length, is likely to be suitable for

- * the upcoming CPU idle period and, if not, then which of the shallower idle

- * states to choose instead of it.

- * Of course, non-timer wakeup sources are more important in some use cases

- * which can be covered by taking a few most recent idle time intervals of the

- * CPU into account. However, even in that context it is not necessary to

- * consider idle duration values greater than the sleep length, because the

- * closest timer will ultimately wake up the CPU anyway unless it is woken up

- * Thus this governor estimates whether or not the prospective idle duration of

- * a CPU is likely to be significantly shorter than the sleep length and selects

- * an idle state for it accordingly.

- * situations in which the measured idle duration is so much shorter than the

- * sleep length that the bin it falls into corresponds to an idle state

- * shallower than the one whose bin is fallen into by the sleep length (these

- * situations are referred to as "intercepts" below).

- * 1. Find the deepest CPU idle state whose target residency does not exceed

- * the current sleep length (the candidate idle state) and compute 2 sums as

- * - The sum of the "hits" and "intercepts" metrics for the candidate state

- * and all of the deeper idle states (it represents the cases in which the

- * CPU was idle long enough to avoid being intercepted if the sleep length

- * had been equal to the current one).

- * - The sum of the "intercepts" metrics for all of the idle states shallower

- * than the candidate one (it represents the cases in which the CPU was not

- * idle long enough to avoid being intercepted if the sleep length had been

- * equal to the current one).

- * 2. If the second sum is greater than the first one the CPU is likely to wake

- * up early, so look for an alternative idle state to select.

- * - Traverse the idle states shallower than the candidate one in the

- * - If each of these sums that needs to be taken into account (because the

- * check related to it has indicated that the CPU is likely to wake up

- * early) is greater than a half of the corresponding sum computed in step

- * 1 (which means that the target residency of the state in question had

- * not exceeded the idle duration in over a half of the relevant cases),

- * select the given idle state instead of the candidate one.

- * 3. By default, select the candidate state.

- * @time_span_ns: Time between idle state selection and post-wakeup update.

- * @tick_hits: Number of "hits" after TICK_NSEC.

- unsigned int tick_hits;

- if (cpu_data->time_span_ns >= cpu_data->sleep_length_ns) {

- * One of the safety nets has triggered or the wakeup was close

- * enough to the closest timer event expected at the idle state

- * selection time to be discarded.

- * The computations below are to determine whether or not the

- * (saved) time till the next timer event and the measured idle

- * duration fall into the same "bin", so use last_residency_ns

- * for that instead of time_span_ns which includes the cpuidle

- if (measured_ns >= lat_ns)

- cpu_data->total = 0;

- cpu_data->total += bin->hits + bin->intercepts;

- * If the deepest state's target residency is below the tick length,

- * make a record of it to help teo_select() decide whether or not

- * to stop the tick. This effectively adds an extra hits-only bin

- * beyond the last state-related one.

- if (target_residency_ns < TICK_NSEC) {

- cpu_data->tick_hits -= cpu_data->tick_hits >> DECAY_SHIFT;

- cpu_data->total += cpu_data->tick_hits;

- if (TICK_NSEC <= cpu_data->sleep_length_ns) {

- idx_timer = drv->state_count;

- if (TICK_NSEC <= measured_ns) {

- cpu_data->tick_hits += PULSE;

- if (idx_timer == idx_duration)

- unsigned int tick_intercept_sum = 0;

- int prev_intercept_idx;

- cpu_data->time_span_ns = local_clock();

- * Set the expected sleep length to infinity in case of an early

- tick_intercept_sum = intercept_sum +

- cpu_data->state_bins[drv->state_count-1].intercepts;

- * all of the deeper states a shallower idle state is likely to be a

- prev_intercept_idx = idx;

- !dev->states_usage[i].disable)

- idx = first_suitable_idx;

- if (!teo_state_ok(i, drv)) {

- * The current state is too shallow, but if an

- * alternative candidate state has been found,

- * it may still turn out to be a better choice.

- if (first_suitable_idx != idx)

- first_suitable_idx = i;

- if (!idx && prev_intercept_idx) {

- * We have to query the sleep length here otherwise we don't

- * know after wakeup if our guess was correct.

- duration_ns = tick_nohz_get_sleep_length(&delta_tick);

- cpu_data->sleep_length_ns = duration_ns;

- * Skip the timers check if state 0 is the current candidate one,

- * because an immediate non-timer wakeup is expected in that case.

- * If state 0 is a polling one, check if the target residency of

- * the current candidate state is low enough and skip the timers

- * check in that case too.

- if ((drv->states[0].flags & CPUIDLE_FLAG_POLLING) &&

- drv->states[idx].target_residency_ns < RESIDENCY_THRESHOLD_NS)

- tick_intercept_sum > cpu_data->total / 2 + cpu_data->total / 8)

- * If the wakeup was not "natural", but triggered by one of the safety

- * nets, assume that the CPU might have been idle for the entire sleep

- cpu_data->time_span_ns = cpu_data->sleep_length_ns;

- cpu_data->time_span_ns = local_clock() - cpu_data->time_span_ns;

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 08b1238bcd7b..19ab145f912e 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig

-config CRYPTO_DEV_NIAGARA2

- tristate "Niagara2 Stream Processing Unit driver"

- select CRYPTO_LIB_DES

- select CRYPTO_SKCIPHER

- select CRYPTO_HASH

- select CRYPTO_SHA1

- select CRYPTO_SHA256

- depends on SPARC64

- Each core of a Niagara2 processor contains a Stream

- Processing Unit, which itself contains several cryptographic

- sub-units. One set provides the Modular Arithmetic Unit,

- used for SSL offload. The other set provides the Cipher

- Group, which can perform encryption, decryption, hashing,

- checksumming, and raw copies.

diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index ad4ccef67d12..fef18ffdb128 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile

-obj-$(CONFIG_CRYPTO_DEV_NIAGARA2) += n2_crypto.o

-n2_crypto-y := n2_core.o n2_asm.o

diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
index 890664bd5f0f..58a76e2ba64e 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c

- .remove_new = sun4i_ss_remove,

diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index e55e58e164db..ec1ffda9ea32 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c

- .remove_new = sun8i_ce_remove,

diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 0dbc0220146c..f45685707e0d 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c

- .remove_new = sun8i_ss_remove,

diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
index 6006703fb6d7..ec3ccfa60445 100644
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c

- iounmap(core_dev->dev->ce_base);

- kfree(core_dev->dev);

- struct resource res;

- rc = of_address_to_resource(ofdev->dev.of_node, 0, &res);

- core_dev = kzalloc(sizeof(struct crypto4xx_core_device), GFP_KERNEL);

- core_dev->dev = kzalloc(sizeof(struct crypto4xx_device), GFP_KERNEL);

- goto err_alloc_dev;

- mutex_init(&core_dev->rng_lock);

- core_dev->dev->ce_base = of_iomap(ofdev->dev.of_node, 0);

- if (!core_dev->dev->ce_base) {

- dev_err(dev, "failed to of_iomap\n");

- rc = request_irq(core_dev->irq, is_revb ?

- crypto4xx_ce_interrupt_handler_revb :

- crypto4xx_ce_interrupt_handler, 0,

- KBUILD_MODNAME, dev);

- goto err_request_irq;

- goto err_start_dev;

- free_irq(core_dev->irq, dev);

- irq_dispose_mapping(core_dev->irq);

- iounmap(core_dev->dev->ce_base);

- kfree(core_dev->dev);

- free_irq(core_dev->irq, dev);

- irq_dispose_mapping(core_dev->irq);

- mutex_destroy(&core_dev->rng_lock);

- .remove_new = crypto4xx_remove,

diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index f54ab0d0b1e8..1c18a5b8470e 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c

- if (IS_ERR(mc->base)) {

- err = PTR_ERR(mc->base);

- dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err);

- .remove_new = meson_crypto_remove,

diff --git a/drivers/crypto/aspeed/aspeed-acry.c b/drivers/crypto/aspeed/aspeed-acry.c
index b4613bd4ad96..8d1c79aaca07 100644
--- a/drivers/crypto/aspeed/aspeed-acry.c
+++ b/drivers/crypto/aspeed/aspeed-acry.c

- .sign = aspeed_acry_rsa_dec,

- .verify = aspeed_acry_rsa_enc,

- .remove_new = aspeed_acry_remove,

diff --git a/drivers/crypto/aspeed/aspeed-hace.c b/drivers/crypto/aspeed/aspeed-hace.c
index 062f2a66dd23..3fe644bfe037 100644
--- a/drivers/crypto/aspeed/aspeed-hace.c
+++ b/drivers/crypto/aspeed/aspeed-hace.c

- .remove_new = aspeed_hace_remove,

diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index 0dd90785db9a..14bf86957d31 100644
--- a/drivers/crypto/atmel-aes.c
+++ b/drivers/crypto/atmel-aes.c

- .remove_new = atmel_aes_remove,

diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index 590ea984c622..0d48e64d28b1 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c

- { "atecc508a", 0 },

diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
index 8cc57df25778..67a170608566 100644
--- a/drivers/crypto/atmel-sha.c
+++ b/drivers/crypto/atmel-sha.c

- .remove_new = atmel_sha_remove,

diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index a02d496f4c41..75bebec2c757 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c

- { "atsha204", 0 },

- { "atsha204a", 0 },

diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c
index dcc2380a5889..de9717e221e4 100644
--- a/drivers/crypto/atmel-tdes.c
+++ b/drivers/crypto/atmel-tdes.c

- return; /* DMA started. Not fininishing. */

- .remove_new = atmel_tdes_remove,

diff --git a/drivers/crypto/axis/artpec6_crypto.c b/drivers/crypto/axis/artpec6_crypto.c
index 75440ea6206e..1c1f57baef0e 100644
--- a/drivers/crypto/axis/artpec6_crypto.c
+++ b/drivers/crypto/axis/artpec6_crypto.c

- .remove_new = artpec6_crypto_remove,

diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c
index 1a3ecd44cbaf..9e6798efbfb7 100644
--- a/drivers/crypto/bcm/cipher.c
+++ b/drivers/crypto/bcm/cipher.c

- .remove_new = bcm_spu_remove,

diff --git a/drivers/crypto/bcm/spu.c b/drivers/crypto/bcm/spu.c
index 6283e8c6d51d..86c227caa722 100644
--- a/drivers/crypto/bcm/spu.c
+++ b/drivers/crypto/bcm/spu.c

- u8 *ptr = spu_hdr;

- ptr += sizeof(struct SPUHEADER);

- if (cipher_parms->key_len) {

- ptr += cipher_parms->key_len;

- ptr += cipher_parms->iv_len;

diff --git a/drivers/crypto/caam/blob_gen.c b/drivers/crypto/caam/blob_gen.c
index 87781c1534ee..079a22cc9f02 100644
--- a/drivers/crypto/caam/blob_gen.c
+++ b/drivers/crypto/caam/blob_gen.c

- moo = FIELD_GET(CSTA_MOO, rd_reg32(&ctrlpriv->ctrl->perfmon.status));

diff --git a/drivers/crypto/caam/caampkc.c b/drivers/crypto/caam/caampkc.c
index 887a5f2fb927..cb001aa1de66 100644
--- a/drivers/crypto/caam/caampkc.c
+++ b/drivers/crypto/caam/caampkc.c

-static void caam_rsa_set_priv_key_form(struct caam_rsa_ctx *ctx,

- caam_rsa_set_priv_key_form(ctx, &raw_key);

diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c
index 26eba7de3fb0..9fcdb64084ac 100644
--- a/drivers/crypto/caam/jr.c
+++ b/drivers/crypto/caam/jr.c

- .remove_new = caam_jr_remove,

diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index f6111ee9ed34..7701d00bcb3a 100644
--- a/drivers/crypto/caam/qi.c
+++ b/drivers/crypto/caam/qi.c

- struct device *ctrldev = &caam_pdev->dev, *qidev;

- ctrlpriv = dev_get_drvdata(ctrldev);

- err = devm_add_action_or_reset(qidev, caam_qi_shutdown, ctrlpriv);

diff --git a/drivers/crypto/cavium/cpt/cptpf_main.c b/drivers/crypto/cavium/cpt/cptpf_main.c
index 6872ac344001..54de869e5374 100644
--- a/drivers/crypto/cavium/cpt/cptpf_main.c
+++ b/drivers/crypto/cavium/cpt/cptpf_main.c

diff --git a/drivers/crypto/cavium/cpt/cptvf_reqmanager.c b/drivers/crypto/cavium/cpt/cptvf_reqmanager.c
index 153004bdfb5c..fb59bb282455 100644
--- a/drivers/crypto/cavium/cpt/cptvf_reqmanager.c
+++ b/drivers/crypto/cavium/cpt/cptvf_reqmanager.c

- /* lock commad queue */

- /* Create the CPT_INST_S type command for HW intrepretation */

diff --git a/drivers/crypto/cavium/nitrox/nitrox_lib.c b/drivers/crypto/cavium/nitrox/nitrox_lib.c
index a5cdc2b48bd6..068265207ddd 100644
--- a/drivers/crypto/cavium/nitrox/nitrox_lib.c
+++ b/drivers/crypto/cavium/nitrox/nitrox_lib.c

-/* packet inuput ring alignments */

diff --git a/drivers/crypto/ccp/dbc.c b/drivers/crypto/ccp/dbc.c
index 5b105a23f699..410084a9039c 100644
--- a/drivers/crypto/ccp/dbc.c
+++ b/drivers/crypto/ccp/dbc.c

- mutex_lock(&dbc_dev->ioctl_mutex);

- if (copy_from_user(dbc_dev->payload, argp, sizeof(struct dbc_user_nonce))) {

- if (copy_to_user(argp, dbc_dev->payload, sizeof(struct dbc_user_nonce))) {

- if (copy_from_user(dbc_dev->payload, argp, sizeof(struct dbc_user_setuid))) {

- if (copy_to_user(argp, dbc_dev->payload, sizeof(struct dbc_user_setuid))) {

- if (copy_from_user(dbc_dev->payload, argp, sizeof(struct dbc_user_param))) {

- if (copy_to_user(argp, dbc_dev->payload, sizeof(struct dbc_user_param))) {

- mutex_unlock(&dbc_dev->ioctl_mutex);

diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c
index af018afd9cd7..2e87ca0e292a 100644
--- a/drivers/crypto/ccp/sev-dev.c
+++ b/drivers/crypto/ccp/sev-dev.c

- revert_creds(old_cred);

diff --git a/drivers/crypto/ccp/sp-platform.c b/drivers/crypto/ccp/sp-platform.c
index ff6ceb4feee0..3933cac1694d 100644
--- a/drivers/crypto/ccp/sp-platform.c
+++ b/drivers/crypto/ccp/sp-platform.c

- .remove_new = sp_platform_remove,

diff --git a/drivers/crypto/ccree/cc_aead.c b/drivers/crypto/ccree/cc_aead.c
index 5ef39d682389..81533681f7fb 100644
--- a/drivers/crypto/ccree/cc_aead.c
+++ b/drivers/crypto/ccree/cc_aead.c

- //plaintext is not encryped with rfc4543

- //plaintext is not decryped with rfc4543

diff --git a/drivers/crypto/ccree/cc_cipher.c b/drivers/crypto/ccree/cc_cipher.c
index 3fb667a17bbb..d39c067672fd 100644
--- a/drivers/crypto/ccree/cc_cipher.c
+++ b/drivers/crypto/ccree/cc_cipher.c

- /* Alloc fallabck tfm or essiv when key size != 256 bit */

diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c
index 9177b54bb0f5..061e68a31c36 100644
--- a/drivers/crypto/ccree/cc_driver.c
+++ b/drivers/crypto/ccree/cc_driver.c

- .remove_new = ccree_remove,

diff --git a/drivers/crypto/ccree/cc_hash.c b/drivers/crypto/ccree/cc_hash.c
index f418162932fe..d0612bec4d58 100644
--- a/drivers/crypto/ccree/cc_hash.c
+++ b/drivers/crypto/ccree/cc_hash.c

- //Asynchronize hash template

diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c
index 177428480c7d..af37477ffd8d 100644
--- a/drivers/crypto/chelsio/chcr_algo.c
+++ b/drivers/crypto/chelsio/chcr_algo.c

- /*CTR mode counter overfloa*/

diff --git a/drivers/crypto/exynos-rng.c b/drivers/crypto/exynos-rng.c
index 0dd8baf16cb4..2aaa98f9b44e 100644
--- a/drivers/crypto/exynos-rng.c
+++ b/drivers/crypto/exynos-rng.c

- .remove_new = exynos_rng_remove,

diff --git a/drivers/crypto/gemini/sl3516-ce-core.c b/drivers/crypto/gemini/sl3516-ce-core.c
index 1d1a889599bb..f7e0e3fea15c 100644
--- a/drivers/crypto/gemini/sl3516-ce-core.c
+++ b/drivers/crypto/gemini/sl3516-ce-core.c

- .remove_new = sl3516_ce_remove,

diff --git a/drivers/crypto/geode-aes.c b/drivers/crypto/geode-aes.c
index fa5a9f207bc9..d933f26aeb3a 100644
--- a/drivers/crypto/geode-aes.c
+++ b/drivers/crypto/geode-aes.c

-MODULE_IMPORT_NS(CRYPTO_INTERNAL);

diff --git a/drivers/crypto/hisilicon/debugfs.c b/drivers/crypto/hisilicon/debugfs.c
index 1b9b7bccdeff..45e130b901eb 100644
--- a/drivers/crypto/hisilicon/debugfs.c
+++ b/drivers/crypto/hisilicon/debugfs.c

- memcpy(&sqc, qm->sqc + qp_id * sizeof(struct qm_sqc), sizeof(struct qm_sqc));

- memcpy(&cqc, qm->cqc + qp_id * sizeof(struct qm_cqc), sizeof(struct qm_cqc));

diff --git a/drivers/crypto/hisilicon/hpre/hpre.h b/drivers/crypto/hisilicon/hpre/hpre.h
index 9f0b94c8e03d..0f3ddbadbcf9 100644
--- a/drivers/crypto/hisilicon/hpre/hpre.h
+++ b/drivers/crypto/hisilicon/hpre/hpre.h

diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c
index c167dbd6c7d6..2a2910261210 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c

- .sign = hpre_rsa_dec,

- .verify = hpre_rsa_enc,

diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 6b536ad2ada5..f5b47e5ff48a 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c

- {HPRE_CLUSTER_NUM_CAP, 0x313c, 20, GENMASK(3, 0), 0x0, 0x4, 0x1},

-enum hpre_pre_store_cap_idx {

- HPRE_CLUSTER_NUM_CAP_IDX = 0x0,

- HPRE_CORE_ENABLE_BITMAP_CAP_IDX,

- HPRE_DRV_ALG_BITMAP_CAP_IDX,

- HPRE_DEV_ALG_BITMAP_CAP_IDX,

-static const u32 hpre_pre_store_caps[] = {

- HPRE_CLUSTER_NUM_CAP,

- HPRE_CORE_ENABLE_BITMAP_CAP,

- HPRE_DRV_ALG_BITMAP_CAP,

- HPRE_DEV_ALG_BITMAP_CAP,

- cap_val = qm->cap_tables.dev_cap_table[HPRE_DRV_ALG_BITMAP_CAP_IDX].cap_val;

- return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_HPRE_PF);

- unsigned long offset;

- cluster_core_mask = qm->cap_tables.dev_cap_table[HPRE_CORE_ENABLE_BITMAP_CAP_IDX].cap_val;

- clusters_num = qm->cap_tables.dev_cap_table[HPRE_CLUSTER_NUM_CAP_IDX].cap_val;

- val = readl(qm->io_base + HPRE_CLUSTER_DYN_CTL);

- val |= HPRE_CLUSTER_DYN_CTL_EN;

- writel(val, qm->io_base + HPRE_CLUSTER_DYN_CTL);

- val = readl_relaxed(qm->io_base + HPRE_CORE_SHB_CFG);

- val |= HPRE_CORE_GATE_EN;

- writel(val, qm->io_base + HPRE_CORE_SHB_CFG);

- val = readl(qm->io_base + HPRE_CLUSTER_DYN_CTL);

- val &= ~HPRE_CLUSTER_DYN_CTL_EN;

- writel(val, qm->io_base + HPRE_CLUSTER_DYN_CTL);

- val = readl_relaxed(qm->io_base + HPRE_CORE_SHB_CFG);

- val &= ~HPRE_CORE_GATE_EN;

- writel(val, qm->io_base + HPRE_CORE_SHB_CFG);

- clusters_num = qm->cap_tables.dev_cap_table[HPRE_CLUSTER_NUM_CAP_IDX].cap_val;

- size = ARRAY_SIZE(hpre_pre_store_caps);

- hpre_cap[i].type = hpre_pre_store_caps[i];

- hpre_cap[i].cap_val = hisi_qm_get_hw_info(qm, hpre_basic_info,

- hpre_pre_store_caps[i], qm->cap_ver);

- if (hpre_cap[HPRE_CLUSTER_NUM_CAP_IDX].cap_val > HPRE_CLUSTERS_NUM_MAX) {

- hpre_cap[HPRE_CLUSTER_NUM_CAP_IDX].cap_val, HPRE_CLUSTERS_NUM_MAX);

- qm->ver = pdev->revision;

- alg_msk = qm->cap_tables.dev_cap_table[HPRE_DEV_ALG_BITMAP_CAP_IDX].cap_val;

- clusters_num = qm->cap_tables.dev_cap_table[HPRE_CLUSTER_NUM_CAP_IDX].cap_val;

- nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver);

- writel(nfe, qm->io_base + HPRE_RAS_NFE_ENB);

- .log_dev_hw_err = hpre_log_hw_error,

diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
index 07983af9e3e2..d3f5d108b898 100644
--- a/drivers/crypto/hisilicon/qm.c
+++ b/drivers/crypto/hisilicon/qm.c

-#define QM_MB_CMD_DATA_SHIFT 32

-#define QM_MB_CMD_DATA_MASK GENMASK(31, 0)

-#define QM_VF_RESET_WAIT_US 20000

-#define QM_VF_RESET_WAIT_CNT 3000

-#define QM_DEV_ALG_MAX_LEN 256

-enum acc_err_result {

- ACC_ERR_NEED_RESET,

- ACC_ERR_RECOVERED,

-enum qm_pre_store_cap_idx {

- QM_EQ_IRQ_TYPE_CAP_IDX = 0x0,

- QM_AEQ_IRQ_TYPE_CAP_IDX,

- QM_ABN_IRQ_TYPE_CAP_IDX,

- QM_PF2VF_IRQ_TYPE_CAP_IDX,

-static const u32 qm_pre_store_caps[] = {

- QM_EQ_IRQ_TYPE_CAP,

- QM_AEQ_IRQ_TYPE_CAP,

- QM_ABN_IRQ_TYPE_CAP,

- QM_PF2VF_IRQ_TYPE_CAP,

- if (qm->fun_type == QM_HW_VF)

- val = qm_get_hw_error_status(qm) & qm->err_info.qm_shutdown_mask;

- dev_val = qm_get_dev_err_status(qm) & qm->err_info.dev_shutdown_mask;

- return val || dev_val;

- struct hisi_qm *pf_qm = pci_get_drvdata(pci_physfn(qm->pdev));

- if (qm_check_dev_error(pf_qm)) {

- qm->uacce->algs = algs;

- struct hisi_qm *pf_qm = pci_get_drvdata(pci_physfn(qm->pdev));

- if (qm_check_dev_error(pf_qm))

- u32 error_status, tmp;

- /* read err sts */

- tmp = readl(qm->io_base + QM_ABNORMAL_INT_STATUS);

- error_status = qm->error_mask & tmp;

- if (error_status) {

- if (error_status & qm->err_info.qm_reset_mask)

- ret = qm_get_mb_cmd(qm, &msg, vf_id);

- dev_err(dev, "failed to get msg from VF(%u)!\n", vf_id);

- cmd = msg & QM_MB_CMD_DATA_MASK;

- dev_err(dev, "unsupported cmd %u sent by VF(%u)!\n", cmd, vf_id);

-static int qm_ping_single_vf(struct hisi_qm *qm, u64 cmd, u32 fun_num)

- struct qm_mailbox mailbox;

- qm_mb_pre_init(&mailbox, QM_MB_CMD_SRC, cmd, fun_num, 0);

- mutex_lock(&qm->mailbox_lock);

- ret = qm_mb_nolock(qm, &mailbox);

- mutex_unlock(&qm->mailbox_lock);

-static int qm_ping_all_vfs(struct hisi_qm *qm, u64 cmd)

- struct qm_mailbox mailbox;

- qm_mb_pre_init(&mailbox, QM_MB_CMD_SRC, cmd, QM_MB_PING_ALL_VFS, 0);

- mutex_lock(&qm->mailbox_lock);

- /* PF sends command to all VFs by mailbox */

- ret = qm_mb_nolock(qm, &mailbox);

- dev_err(dev, "failed to send command to VFs!\n");

- mutex_unlock(&qm->mailbox_lock);

-static int qm_ping_pf(struct hisi_qm *qm, u64 cmd)

- struct qm_mailbox mailbox;

- qm_mb_pre_init(&mailbox, QM_MB_CMD_SRC, cmd, 0, 0);

- mutex_lock(&qm->mailbox_lock);

- ret = qm_mb_nolock(qm, &mailbox);

- dev_err(&qm->pdev->dev, "failed to send command to PF!\n");

- mutex_unlock(&qm->mailbox_lock);

- struct hisi_qm *pf_qm = pci_get_drvdata(pci_physfn(qm->pdev));

- if (qm_check_dev_error(pf_qm))

- if (qp_ctx.qc_type != 0 && qp_ctx.qc_type != 1)

- mb_cmd = QM_PF_SET_QOS | (u64)qos << QM_MB_CMD_DATA_SHIFT;

- ret = qm_ping_single_vf(qm, mb_cmd, fun_num);

- dev_err(dev, "failed to send cmd to VF(%u)!\n", fun_num);

- if (!qm->err_ini->get_dev_hw_err_status) {

- dev_err(&qm->pdev->dev, "Device doesn't support get hw error status!\n");

- /* get device hardware error status */

- err_sts = qm->err_ini->get_dev_hw_err_status(qm);

- if (err_sts & qm->err_info.ecc_2bits_mask)

- qm->err_status.is_dev_ecc_mbit = true;

- if (qm->err_ini->log_dev_hw_err)

- qm->err_ini->log_dev_hw_err(qm, err_sts);

- if (err_sts & qm->err_info.dev_reset_mask)

- return ACC_ERR_NEED_RESET;

- if (qm->err_ini->clear_dev_hw_err_status)

- qm->err_ini->clear_dev_hw_err_status(qm, err_sts);

- return ACC_ERR_RECOVERED;

-static int qm_try_stop_vfs(struct hisi_qm *qm, u64 cmd,

- pci_err(pdev, "failed to send cmd to all VFs before PF reset!\n");

-static int qm_try_start_vfs(struct hisi_qm *qm, enum qm_mb_cmd cmd)

- while (qm_check_dev_error(pf_qm)) {

- enum qm_mb_cmd cmd = QM_VF_PREPARE_DONE;

- enum qm_mb_cmd cmd = QM_VF_START_DONE;

- ret = qm_get_mb_cmd(qm, &msg, 0);

- dev_err(dev, "failed to get msg from PF in reset done!\n");

- cmd = msg & QM_MB_CMD_DATA_MASK;

- dev_err(dev, "the cmd(%u) is not reset done!\n", cmd);

- ret = qm_get_mb_cmd(qm, &msg, fun_num);

- dev_err(dev, "failed to get msg from source!\n");

- cmd = msg & QM_MB_CMD_DATA_MASK;

- qm->mb_qos = msg >> QM_MB_CMD_DATA_SHIFT;

- dev_err(dev, "unsupported cmd %u sent by function(%u)!\n", cmd, fun_num);

- val = qm->cap_tables.qm_cap_table[QM_ABN_IRQ_TYPE_CAP_IDX].cap_val;

- val = qm->cap_tables.qm_cap_table[QM_PF2VF_IRQ_TYPE_CAP_IDX].cap_val;

- val = qm->cap_tables.qm_cap_table[QM_AEQ_IRQ_TYPE_CAP_IDX].cap_val;

- val = qm->cap_tables.qm_cap_table[QM_EQ_IRQ_TYPE_CAP_IDX].cap_val;

-static int qm_pre_store_irq_type_caps(struct hisi_qm *qm)

- size = ARRAY_SIZE(qm_pre_store_caps);

- qm_cap[i].type = qm_pre_store_caps[i];

- qm_cap[i].cap_val = hisi_qm_get_hw_info(qm, qm_basic_info,

- qm_pre_store_caps[i], qm->cap_ver);

- /* Fetch and save the value of irq type related capability registers */

- return qm_pre_store_irq_type_caps(qm);

- hisi_qm_pre_init(qm);

diff --git a/drivers/crypto/hisilicon/sec/sec_drv.c b/drivers/crypto/hisilicon/sec/sec_drv.c
index 9bafcc5aa404..ef0cb733c92c 100644
--- a/drivers/crypto/hisilicon/sec/sec_drv.c
+++ b/drivers/crypto/hisilicon/sec/sec_drv.c

- .remove_new = sec_remove,

diff --git a/drivers/crypto/hisilicon/sec2/sec.h b/drivers/crypto/hisilicon/sec2/sec.h
index 410c83712e28..4b9970230822 100644
--- a/drivers/crypto/hisilicon/sec2/sec.h
+++ b/drivers/crypto/hisilicon/sec2/sec.h

-enum sec_cap_reg_record_idx {

- SEC_DRV_ALG_BITMAP_LOW_IDX = 0x0,

- SEC_DRV_ALG_BITMAP_HIGH_IDX,

- SEC_DEV_ALG_BITMAP_LOW_IDX,

- SEC_DEV_ALG_BITMAP_HIGH_IDX,

diff --git a/drivers/crypto/hisilicon/sec2/sec_crypto.c b/drivers/crypto/hisilicon/sec2/sec_crypto.c
index 0558f98e221f..66bc07da9eb6 100644
--- a/drivers/crypto/hisilicon/sec2/sec_crypto.c
+++ b/drivers/crypto/hisilicon/sec2/sec_crypto.c

- u8 *mac_out = req->out_mac;

- copy_size = sg_pcopy_to_buffer(sgl, sg_nents(sgl), mac_out,

- authsize, skip_size);

- if (unlikely(a_ctx->fallback_aead_tfm))

- return crypto_aead_setauthsize(a_ctx->fallback_aead_tfm, authsize);

- const enum sec_mac_len mac_len,

- ctx->a_ctx.mac_len = mac_len;

- if (unlikely(a_ctx->fallback_aead_tfm)) {

- ret = sec_aead_fallback_setkey(a_ctx, tfm, key, keylen);

- if ((ctx->a_ctx.mac_len & SEC_SQE_LEN_RATE_MASK) ||

- (ctx->a_ctx.a_key_len & SEC_SQE_LEN_RATE_MASK)) {

- dev_err(dev, "MAC or AUTH key length error!\n");

-#define GEN_SEC_AEAD_SETKEY_FUNC(name, aalg, calg, maclen, cmode) \

-static int sec_setkey_##name(struct crypto_aead *tfm, const u8 *key, \

- return sec_aead_setkey(tfm, key, keylen, aalg, calg, maclen, cmode);\

-GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha1, SEC_A_HMAC_SHA1,

- SEC_CALG_AES, SEC_HMAC_SHA1_MAC, SEC_CMODE_CBC)

-GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha256, SEC_A_HMAC_SHA256,

- SEC_CALG_AES, SEC_HMAC_SHA256_MAC, SEC_CMODE_CBC)

-GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha512, SEC_A_HMAC_SHA512,

- SEC_CALG_AES, SEC_HMAC_SHA512_MAC, SEC_CMODE_CBC)

-GEN_SEC_AEAD_SETKEY_FUNC(aes_ccm, 0, SEC_CALG_AES,

- SEC_HMAC_CCM_MAC, SEC_CMODE_CCM)

-GEN_SEC_AEAD_SETKEY_FUNC(aes_gcm, 0, SEC_CALG_AES,

- SEC_HMAC_GCM_MAC, SEC_CMODE_GCM)

-GEN_SEC_AEAD_SETKEY_FUNC(sm4_ccm, 0, SEC_CALG_SM4,

- SEC_HMAC_CCM_MAC, SEC_CMODE_CCM)

-GEN_SEC_AEAD_SETKEY_FUNC(sm4_gcm, 0, SEC_CALG_SM4,

- SEC_HMAC_GCM_MAC, SEC_CMODE_GCM)

- struct sec_cipher_req *c_req = &req->c_req;

- size_t authsize = ctx->a_ctx.mac_len;

- struct crypto_aead *tfm = crypto_aead_reqtfm(aead_req);

- size_t authsize = crypto_aead_authsize(tfm);

- struct sec_cipher_req *c_req = &req->c_req;

- ctx->a_ctx.mac_len = authsize;

- /* CCM 16Byte Auth_IV: {1B_AFlage,13B_IV,2B_Ptext_length} */

- /* GCM 12Byte Cipher_IV == Auth_IV */

- if (ctx->c_ctx.c_mode == SEC_CMODE_GCM) {

- ctx->a_ctx.mac_len = authsize;

- sec_sqe->type2.icvw_kmode |= cpu_to_le16((u16)ctx->mac_len);

- sqe3->c_icv_key |= cpu_to_le16((u16)ctx->mac_len << SEC_MAC_OFFSET_V3);

- sec_sqe->type2.mac_key_alg =

- cpu_to_le32(ctx->mac_len / SEC_SQE_LEN_RATE);

- cpu_to_le32((u32)(ctx->mac_len /

- size_t authsize = crypto_aead_authsize(tfm);

- sz = sg_pcopy_from_buffer(sgl, sg_nents(sgl),

- aead_req->out_mac,

- authsize, a_req->cryptlen +

- struct sec_auth_ctx *auth_ctx = &ctx->a_ctx;

- auth_ctx->hash_tfm = crypto_alloc_shash(hash_name, 0, 0);

- if (IS_ERR(auth_ctx->hash_tfm)) {

- return PTR_ERR(auth_ctx->hash_tfm);

- a_ctx->fallback = false;

- size_t authsize = crypto_aead_authsize(tfm);

- if (unlikely(req->cryptlen + req->assoclen > MAX_INPUT_DATA_LEN ||

- req->assoclen > SEC_MAX_AAD_LEN)) {

- dev_err(dev, "aead input spec error!\n");

- if (unlikely((c_mode == SEC_CMODE_GCM && authsize < DES_BLOCK_SIZE) ||

- (c_mode == SEC_CMODE_CCM && (authsize < MIN_MAC_LEN ||

- authsize & MAC_LEN_MASK)))) {

- dev_err(dev, "aead input mac length error!\n");

- sreq->c_req.c_len = req->cryptlen - authsize;

- req->cryptlen <= authsize))) {

- ctx->a_ctx.fallback = true;

- struct device *dev = ctx->dev;

- /* Kunpeng920 aead mode not support input 0 size */

- if (!a_ctx->fallback_aead_tfm) {

- dev_err(dev, "aead fallback tfm is NULL!\n");

- if (ctx->a_ctx.fallback)

- alg_mask = sec_get_alg_bitmap(qm, SEC_DRV_ALG_BITMAP_HIGH_IDX,

- SEC_DRV_ALG_BITMAP_LOW_IDX);

- alg_mask = sec_get_alg_bitmap(qm, SEC_DRV_ALG_BITMAP_HIGH_IDX,

- SEC_DRV_ALG_BITMAP_LOW_IDX);

diff --git a/drivers/crypto/hisilicon/sec2/sec_crypto.h b/drivers/crypto/hisilicon/sec2/sec_crypto.h
index 27a0ee5ad913..04725b514382 100644
--- a/drivers/crypto/hisilicon/sec2/sec_crypto.h
+++ b/drivers/crypto/hisilicon/sec2/sec_crypto.h

- SEC_HMAC_CCM_MAC = 16,

- SEC_HMAC_GCM_MAC = 16,

- SEC_HMAC_SM3_MAC = 32,

- SEC_HMAC_MD5_MAC = 16,

- SEC_HMAC_SHA1_MAC = 20,

- SEC_HMAC_SHA256_MAC = 32,

- SEC_HMAC_SHA512_MAC = 64,

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index c35533d8930b..72cf48d1f3ab 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c

-static const u32 sec_pre_store_caps[] = {

- SEC_DRV_ALG_BITMAP_LOW,

- SEC_DRV_ALG_BITMAP_HIGH,

- SEC_DEV_ALG_BITMAP_LOW,

- SEC_DEV_ALG_BITMAP_HIGH,

- return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_SEC_PF);

- nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver);

- writel(nfe, qm->io_base + SEC_RAS_NFE_REG);

- .log_dev_hw_err = sec_log_hw_error,

- size = ARRAY_SIZE(sec_pre_store_caps);

- sec_cap[i].type = sec_pre_store_caps[i];

- sec_cap[i].cap_val = hisi_qm_get_hw_info(qm, sec_basic_info,

- sec_pre_store_caps[i], qm->cap_ver);

- qm->ver = pdev->revision;

- alg_msk = sec_get_alg_bitmap(qm, SEC_DEV_ALG_BITMAP_HIGH_IDX, SEC_DEV_ALG_BITMAP_LOW_IDX);

diff --git a/drivers/crypto/hisilicon/trng/trng.c b/drivers/crypto/hisilicon/trng/trng.c
index 66c551ecdee8..ac74df4a9471 100644
--- a/drivers/crypto/hisilicon/trng/trng.c
+++ b/drivers/crypto/hisilicon/trng/trng.c

- .remove_new = hisi_trng_remove,

diff --git a/drivers/crypto/hisilicon/zip/Makefile b/drivers/crypto/hisilicon/zip/Makefile
index a936f099ee22..13de020b77d6 100644
--- a/drivers/crypto/hisilicon/zip/Makefile
+++ b/drivers/crypto/hisilicon/zip/Makefile

-hisi_zip-objs = zip_main.o zip_crypto.o

diff --git a/drivers/crypto/hisilicon/zip/dae_main.c b/drivers/crypto/hisilicon/zip/dae_main.c
new file mode 100644
index 000000000000..6f22e4c36e49
--- /dev/null
+++ b/drivers/crypto/hisilicon/zip/dae_main.c

diff --git a/drivers/crypto/hisilicon/zip/zip.h b/drivers/crypto/hisilicon/zip/zip.h
index f2e6da3240ae..9fb2a9c01132 100644
--- a/drivers/crypto/hisilicon/zip/zip.h
+++ b/drivers/crypto/hisilicon/zip/zip.h

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index d07e47b48be0..d8ba23b7cc7d 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c

-enum zip_pre_store_cap_idx {

- ZIP_CORE_NUM_CAP_IDX = 0x0,

- ZIP_CLUSTER_COMP_NUM_CAP_IDX,

- ZIP_CLUSTER_DECOMP_NUM_CAP_IDX,

- ZIP_DECOMP_ENABLE_BITMAP_IDX,

- ZIP_COMP_ENABLE_BITMAP_IDX,

- ZIP_DRV_ALG_BITMAP_IDX,

- ZIP_DEV_ALG_BITMAP_IDX,

-static const u32 zip_pre_store_caps[] = {

- ZIP_CLUSTER_COMP_NUM_CAP,

- ZIP_CLUSTER_DECOMP_NUM_CAP,

- ZIP_DECOMP_ENABLE_BITMAP,

- ZIP_COMP_ENABLE_BITMAP,

- ZIP_DRV_ALG_BITMAP,

- ZIP_DEV_ALG_BITMAP,

- return q_num_set(val, kp, PCI_DEVICE_ID_HUAWEI_ZIP_PF);

- cap_val = qm->cap_tables.dev_cap_table[ZIP_DRV_ALG_BITMAP_IDX].cap_val;

- dcomp_bm = qm->cap_tables.dev_cap_table[ZIP_DECOMP_ENABLE_BITMAP_IDX].cap_val;

- comp_bm = qm->cap_tables.dev_cap_table[ZIP_COMP_ENABLE_BITMAP_IDX].cap_val;

- u32 zip_comp_core_num = qm->cap_tables.dev_cap_table[ZIP_CLUSTER_COMP_NUM_CAP_IDX].cap_val;

- zip_core_num = qm->cap_tables.dev_cap_table[ZIP_CORE_NUM_CAP_IDX].cap_val;

- zip_comp_core_num = qm->cap_tables.dev_cap_table[ZIP_CLUSTER_COMP_NUM_CAP_IDX].cap_val;

- u32 zip_core_num = qm->cap_tables.dev_cap_table[ZIP_CORE_NUM_CAP_IDX].cap_val;

- zip_core_num = qm->cap_tables.dev_cap_table[ZIP_CORE_NUM_CAP_IDX].cap_val;

- zip_comp_core_num = qm->cap_tables.dev_cap_table[ZIP_CLUSTER_COMP_NUM_CAP_IDX].cap_val;

- nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver);

- writel(nfe, qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB);

- .log_dev_hw_err = hisi_zip_log_hw_error,

- size = ARRAY_SIZE(zip_pre_store_caps);

- zip_cap[i].type = zip_pre_store_caps[i];

- zip_cap[i].cap_val = hisi_qm_get_hw_info(qm, zip_basic_cap_info,

- zip_pre_store_caps[i], qm->cap_ver);

- qm->ver = pdev->revision;

- hisi_qm_uninit(qm);

- alg_msk = qm->cap_tables.dev_cap_table[ZIP_DEV_ALG_BITMAP_IDX].cap_val;

- hisi_qm_uninit(qm);

diff --git a/drivers/crypto/img-hash.c b/drivers/crypto/img-hash.c
index 7e93159c3b6b..1dc2378aa88b 100644
--- a/drivers/crypto/img-hash.c
+++ b/drivers/crypto/img-hash.c

- .remove_new = img_hash_remove,

diff --git a/drivers/crypto/inside-secure/safexcel.c b/drivers/crypto/inside-secure/safexcel.c
index f5c1912aa564..9ca80d082c4f 100644
--- a/drivers/crypto/inside-secure/safexcel.c
+++ b/drivers/crypto/inside-secure/safexcel.c

- .remove_new = safexcel_remove,

-MODULE_IMPORT_NS(CRYPTO_INTERNAL);

diff --git a/drivers/crypto/inside-secure/safexcel_hash.c b/drivers/crypto/inside-secure/safexcel_hash.c
index e17577b785c3..f44c08f5f5ec 100644
--- a/drivers/crypto/inside-secure/safexcel_hash.c
+++ b/drivers/crypto/inside-secure/safexcel_hash.c

- return PTR_ERR_OR_ZERO(ctx->aes);

diff --git a/drivers/crypto/intel/iaa/Makefile b/drivers/crypto/intel/iaa/Makefile
index b64b208d2344..55bda7770fac 100644
--- a/drivers/crypto/intel/iaa/Makefile
+++ b/drivers/crypto/intel/iaa/Makefile

-ccflags-y += -I $(srctree)/drivers/dma/idxd -DDEFAULT_SYMBOL_NAMESPACE=IDXD

diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/intel/iaa/iaa_crypto_main.c
index 237f87000070..c3776b0de51d 100644
--- a/drivers/crypto/intel/iaa/iaa_crypto_main.c
+++ b/drivers/crypto/intel/iaa/iaa_crypto_main.c

- async_mode = true;

-MODULE_IMPORT_NS(IDXD);

diff --git a/drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c b/drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c
index f8a77bff8844..fcc0cf4df637 100644
--- a/drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c
+++ b/drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c

- .remove_new = ixp_crypto_remove,

diff --git a/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c b/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c
index 9b2d098e5eb2..8a8f6c81e010 100644
--- a/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c
+++ b/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c

- .remove_new = kmb_ocs_aes_remove,

diff --git a/drivers/crypto/intel/keembay/keembay-ocs-ecc.c b/drivers/crypto/intel/keembay/keembay-ocs-ecc.c
index 5e24f2d8affc..59308926399d 100644
--- a/drivers/crypto/intel/keembay/keembay-ocs-ecc.c
+++ b/drivers/crypto/intel/keembay/keembay-ocs-ecc.c

- .remove_new = kmb_ocs_ecc_remove,

diff --git a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c
index e54c79890d44..95dc8979918d 100644
--- a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c
+++ b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c

- .remove_new = kmb_ocs_hcu_remove,

diff --git a/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c b/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c
index 78f0ea49254d..9faef33e54bd 100644
--- a/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c
+++ b/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c

- if (id < 0 || id > num_objs)

diff --git a/drivers/crypto/intel/qat/qat_420xx/adf_drv.c b/drivers/crypto/intel/qat/qat_420xx/adf_drv.c
index f49818a13013..9589d60fb281 100644
--- a/drivers/crypto/intel/qat/qat_420xx/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_420xx/adf_drv.c

- ret = pcim_iomap_regions_request_all(pdev, bar_mask, pci_name(pdev));

- dev_err(&pdev->dev, "Failed to map pci regions.\n");

- bar->virt_addr = pcim_iomap_table(pdev)[bar_nr];

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c
index 9fd7ec53b9f3..bbd92c017c28 100644
--- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c
+++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c

- if (id < 0 || id > num_objs)

diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c
index 659905e45950..d7de1cad1335 100644
--- a/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c

- ret = pcim_iomap_regions_request_all(pdev, bar_mask, pci_name(pdev));

- dev_err(&pdev->dev, "Failed to map pci regions.\n");

- bar->virt_addr = pcim_iomap_table(pdev)[bar_nr];

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c
index 4d18057745d4..caa53882fda6 100644
--- a/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_c3xxxvf/adf_drv.c b/drivers/crypto/intel/qat/qat_c3xxxvf/adf_drv.c
index f0023cfb234c..c622793e94a8 100644
--- a/drivers/crypto/intel/qat/qat_c3xxxvf/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_c3xxxvf/adf_drv.c

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_drv.c b/drivers/crypto/intel/qat/qat_c62x/adf_drv.c
index e6b5de55434e..b7398fee19ed 100644
--- a/drivers/crypto/intel/qat/qat_c62x/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_c62x/adf_drv.c

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_c62xvf/adf_drv.c b/drivers/crypto/intel/qat/qat_c62xvf/adf_drv.c
index 2bd5b0ff00e3..4840d44bbd5b 100644
--- a/drivers/crypto/intel/qat/qat_c62xvf/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_c62xvf/adf_drv.c

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile
index eac73cbfdd38..7acf9c576149 100644
--- a/drivers/crypto/intel/qat/qat_common/Makefile
+++ b/drivers/crypto/intel/qat/qat_common/Makefile

-ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=CRYPTO_QAT

diff --git a/drivers/crypto/intel/qat/qat_common/adf_aer.c b/drivers/crypto/intel/qat/qat_common/adf_aer.c
index ec7913ab00a2..4cb8bd83f570 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_aer.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_aer.c

- if (!device_sriov_wq)

diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h
index f7ecabdf7805..eaa6388a6678 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h
+++ b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h

-struct adf_accel_dev *adf_devmgr_get_first(void);

diff --git a/drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c b/drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c
index 70fa0f6497a9..48c62a14a6a7 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c

-MODULE_IMPORT_NS(CRYPTO_INTERNAL);

diff --git a/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c b/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c
index c42f5c25aabd..4c11ad1ebcf0 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c

- ret = debugfs_create_dir(name, NULL);

- if (IS_ERR_OR_NULL(ret))

- accel_dev->debugfs_dir = ret;

- if (!accel_dev->debugfs_dir)

diff --git a/drivers/crypto/intel/qat/qat_common/adf_dev_mgr.c b/drivers/crypto/intel/qat/qat_common/adf_dev_mgr.c
index 96ddd1c419c4..34b9f7731c78 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_dev_mgr.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_dev_mgr.c

-struct adf_accel_dev *adf_devmgr_get_first(void)

- struct adf_accel_dev *dev = NULL;

- if (!list_empty(&accel_table))

- dev = list_first_entry(&accel_table, struct adf_accel_dev,

diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c
index ee0b5079de3e..2e4095c4c12c 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c

-static struct pm_status_row pm_fuse_rows[] = {

-static struct pm_status_row pm_info_rows[] = {

-static struct pm_status_row pm_ssm_rows[] = {

-static struct pm_status_row pm_log_rows[] = {

-static struct pm_status_row pm_event_rows[ICP_QAT_NUMBER_OF_PM_EVENTS] = {

-static struct pm_status_row pm_csrs_rows[] = {

-static int pm_scnprint_table(char *buff, struct pm_status_row *table,

-static int pm_scnprint_table_upper_keys(char *buff, struct pm_status_row *table,

-static int pm_scnprint_table_lower_keys(char *buff, struct pm_status_row *table,

diff --git a/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c b/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c
index 65bd26b25abc..f93d9cca70ce 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c

- /* Reset arbiter configuration */

- for (i = 0; i < ADF_ARB_NUM; i++)

- WRITE_CSR_ARB_SARCONFIG(csr, arb_off, i, 0);

diff --git a/drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.c b/drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.c
index c8241f5a0a26..f20ae7e35a0d 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.c

-static int get_rp_index_from_file(const struct file *f, u8 *rp_id, u8 rp_num)

- ret = sscanf(f->f_path.dentry->d_name.name, ADF_TL_RP_REGS_FNAME, &alpha);

- index = ADF_TL_DBG_RP_INDEX_ALPHA(alpha);

- max_rp = GET_TL_DATA(accel_dev).max_rp;

- ret = get_rp_index_from_file(s->file, &rp_regs_index, max_rp);

- dev_dbg(&GET_DEV(accel_dev), "invalid RP data file name\n");

- max_rp = GET_TL_DATA(accel_dev).max_rp;

- ret = get_rp_index_from_file(file, &rp_regs_index, max_rp);

- dev_dbg(&GET_DEV(accel_dev), "invalid RP data file name\n");

- goto unlock_and_exit;

- debugfs_create_file(name, 0644, dir, accel_dev, &tl_rp_data_fops);

diff --git a/drivers/crypto/intel/qat/qat_common/qat_hal.c b/drivers/crypto/intel/qat/qat_common/qat_hal.c
index 317cafa9d11f..ef8a9cf74f0c 100644
--- a/drivers/crypto/intel/qat/qat_common/qat_hal.c
+++ b/drivers/crypto/intel/qat/qat_common/qat_hal.c

- /* Sets the accelaration engine context mode to either four or eight */

diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c
index 2a50cce41515..3137fc3b5cf6 100644
--- a/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/intel/qat/qat_dh895xccvf/adf_drv.c b/drivers/crypto/intel/qat/qat_dh895xccvf/adf_drv.c
index 7cb015b55122..7cd528ee31e7 100644
--- a/drivers/crypto/intel/qat/qat_dh895xccvf/adf_drv.c
+++ b/drivers/crypto/intel/qat/qat_dh895xccvf/adf_drv.c

-MODULE_IMPORT_NS(CRYPTO_QAT);

diff --git a/drivers/crypto/marvell/Kconfig b/drivers/crypto/marvell/Kconfig
index 78217577aa54..4c25a78ab3ed 100644
--- a/drivers/crypto/marvell/Kconfig
+++ b/drivers/crypto/marvell/Kconfig

- depends on PLAT_ORION || ARCH_MVEBU

diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 5fd31ba715c2..fa08f10e6f3f 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c

- const char *res_name = "sram";

- if (cesa->caps->nengines > 1) {

- res_name = "sram0";

- res_name = "sram1";

- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

- if (!res || resource_size(res) < cesa->sram_size)

- engine->sram = devm_ioremap_resource(cesa->dev, res);

- engine->clk = devm_clk_get(dev, res_name);

- engine->clk = devm_clk_get(dev, NULL);

- if (IS_ERR(engine->clk))

- engine->clk = NULL;

- engine->zclk = devm_clk_get(dev, res_name);

- if (IS_ERR(engine->zclk))

- engine->zclk = NULL;

- ret = clk_prepare_enable(engine->clk);

- ret = clk_prepare_enable(engine->zclk);

- for (i = 0; i < caps->nengines; i++) {

- clk_disable_unprepare(cesa->engines[i].zclk);

- clk_disable_unprepare(cesa->engines[i].clk);

- if (cesa->engines[i].irq > 0)

- irq_set_affinity_hint(cesa->engines[i].irq, NULL);

- for (i = 0; i < cesa->caps->nengines; i++) {

- clk_disable_unprepare(cesa->engines[i].zclk);

- clk_disable_unprepare(cesa->engines[i].clk);

- irq_set_affinity_hint(cesa->engines[i].irq, NULL);

- .remove_new = mv_cesa_remove,

diff --git a/drivers/crypto/marvell/cesa/cipher.c b/drivers/crypto/marvell/cesa/cipher.c
index 0f37dfd42d85..cf62db50f958 100644
--- a/drivers/crypto/marvell/cesa/cipher.c
+++ b/drivers/crypto/marvell/cesa/cipher.c

- struct mv_cesa_op_ctx tmpl;

diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 8d84ad45571c..f150861ceaf6 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c

- .cra_priority = 300,

diff --git a/drivers/crypto/marvell/octeontx2/cn10k_cpt.c b/drivers/crypto/marvell/octeontx2/cn10k_cpt.c
index 6bfc59e67747..5cae8fafa151 100644
--- a/drivers/crypto/marvell/octeontx2/cn10k_cpt.c
+++ b/drivers/crypto/marvell/octeontx2/cn10k_cpt.c

-EXPORT_SYMBOL_NS_GPL(cn10k_cptpf_lmtst_init, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(cn10k_cptvf_lmtst_init, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(cn10k_cpt_hw_ctx_clear, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(cn10k_cpt_hw_ctx_set, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(cn10k_cpt_hw_ctx_init, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(cn10k_cpt_ctx_flush, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(cptvf_hw_ops_get, CRYPTO_DEV_OCTEONTX2_CPT);

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c b/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c
index 5be0103c1fb8..b8b7c8a3c0ca 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_send_mbox_msg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_send_ready_msg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_send_af_reg_requests, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_add_write_af_reg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_read_af_reg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_write_af_reg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_detach_rsrcs_msg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_msix_offset_msg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_sync_mbox_msg, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cpt_lf_reset_msg, CRYPTO_DEV_OCTEONTX2_CPT);

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptlf.c b/drivers/crypto/marvell/octeontx2/otx2_cptlf.c
index b52728e3c0d1..b5d66afcc030 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptlf.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptlf.c

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_unregister_misc_interrupts,

- CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_unregister_done_interrupts,

- CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_register_misc_interrupts,

- CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_register_done_interrupts,

- CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_free_irqs_affinity, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_set_irqs_affinity, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_init, CRYPTO_DEV_OCTEONTX2_CPT);

-EXPORT_SYMBOL_NS_GPL(otx2_cptlf_shutdown, CRYPTO_DEV_OCTEONTX2_CPT);

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
index 400e36d9908f..12971300296d 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

- /* Map PF's configuration registers */

- err = pcim_iomap_regions_request_all(pdev, 1 << PCI_PF_REG_BAR_NUM,

- OTX2_CPT_DRV_NAME);

- dev_err(dev, "Couldn't get PCI resources 0x%x\n", err);

- cptpf->reg_base = pcim_iomap_table(pdev)[PCI_PF_REG_BAR_NUM];

-MODULE_IMPORT_NS(CRYPTO_DEV_OCTEONTX2_CPT);

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c
index 527d34cc258b..d84eebdf2fa8 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c

- /* Map VF's configuration registers */

- ret = pcim_iomap_regions_request_all(pdev, 1 << PCI_PF_REG_BAR_NUM,

- OTX2_CPTVF_DRV_NAME);

- cptvf->reg_base = pcim_iomap_table(pdev)[PCI_PF_REG_BAR_NUM];

-MODULE_IMPORT_NS(CRYPTO_DEV_OCTEONTX2_CPT);

diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index c82775dbb557..d94a26c3541a 100644
--- a/drivers/crypto/mxs-dcp.c
+++ b/drivers/crypto/mxs-dcp.c

- dma_addr_t key_phys = 0;

- dma_addr_t src_phys, dst_phys;

- if (!key_referenced) {

- ret = dma_mapping_error(sdcp->dev, key_phys);

- if (!key_referenced)

- .remove_new = mxs_dcp_remove,

diff --git a/drivers/crypto/n2_asm.S b/drivers/crypto/n2_asm.S
deleted file mode 100644
index 9a67dbf340f4..000000000000
--- a/drivers/crypto/n2_asm.S
+++ /dev/null

-/* SPDX-License-Identifier: GPL-2.0 */

-/* n2_asm.S: Hypervisor calls for NCS support.

-#include <linux/linkage.h>

-#include <asm/hypervisor.h>

-#include "n2_core.h"

- * o2: num entries in queue

- * o3: address of queue handle return

-ENTRY(sun4v_ncs_qconf)

- mov HV_FAST_NCS_QCONF, %o5

-ENDPROC(sun4v_ncs_qconf)

- /* %o0: queue handle

- * %o1: address of queue type return

- * %o2: address of queue base address return

- * %o3: address of queue num entries return

-ENTRY(sun4v_ncs_qinfo)

- mov HV_FAST_NCS_QINFO, %o5

-ENDPROC(sun4v_ncs_qinfo)

- /* %o0: queue handle

- * %o1: address of head offset return

-ENTRY(sun4v_ncs_gethead)

- mov HV_FAST_NCS_GETHEAD, %o5

-ENDPROC(sun4v_ncs_gethead)

- /* %o0: queue handle

- * %o1: address of tail offset return

-ENTRY(sun4v_ncs_gettail)

- mov HV_FAST_NCS_GETTAIL, %o5

-ENDPROC(sun4v_ncs_gettail)

- /* %o0: queue handle

- * %o1: new tail offset

-ENTRY(sun4v_ncs_settail)

- mov HV_FAST_NCS_SETTAIL, %o5

-ENDPROC(sun4v_ncs_settail)

- /* %o0: queue handle

- * %o1: address of devino return

-ENTRY(sun4v_ncs_qhandle_to_devino)

- mov HV_FAST_NCS_QHANDLE_TO_DEVINO, %o5

-ENDPROC(sun4v_ncs_qhandle_to_devino)

- /* %o0: queue handle

- * %o1: new head offset

-ENTRY(sun4v_ncs_sethead_marker)

- mov HV_FAST_NCS_SETHEAD_MARKER, %o5

-ENDPROC(sun4v_ncs_sethead_marker)

diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
deleted file mode 100644
index b11545cc5cb7..000000000000
--- a/drivers/crypto/n2_core.c
+++ /dev/null

-// SPDX-License-Identifier: GPL-2.0-only

-/* n2_core.c: Niagara2 Stream Processing Unit (SPU) crypto support.

-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

-#include <linux/kernel.h>

-#include <linux/module.h>

-#include <linux/of.h>

-#include <linux/of_address.h>

-#include <linux/platform_device.h>

-#include <linux/cpumask.h>

-#include <linux/slab.h>

-#include <linux/interrupt.h>

-#include <linux/crypto.h>

-#include <crypto/md5.h>

-#include <crypto/sha1.h>

-#include <crypto/sha2.h>

-#include <crypto/aes.h>

-#include <crypto/internal/des.h>

-#include <linux/mutex.h>

-#include <linux/delay.h>

-#include <linux/sched.h>

-#include <crypto/internal/hash.h>

-#include <crypto/internal/skcipher.h>

-#include <crypto/scatterwalk.h>

-#include <crypto/algapi.h>

-#include <asm/hypervisor.h>

-#include <asm/mdesc.h>

-#include "n2_core.h"

-#define DRV_MODULE_NAME "n2_crypto"

-#define DRV_MODULE_VERSION "0.2"

-#define DRV_MODULE_RELDATE "July 28, 2011"

-static const char version[] =

- DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";

-MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");

-MODULE_DESCRIPTION("Niagara2 Crypto driver");

-MODULE_LICENSE("GPL");

-MODULE_VERSION(DRV_MODULE_VERSION);

-#define N2_CRA_PRIORITY 200

-static DEFINE_MUTEX(spu_lock);

- cpumask_t sharing;

- unsigned long qhandle;

- unsigned long head;

- unsigned long tail;

- struct list_head jobs;

- unsigned long devino;

- char irq_name[32];

- struct list_head list;

- struct spu_queue *queue;

- unsigned long type;

-static struct spu_queue **cpu_to_cwq;

-static struct spu_queue **cpu_to_mau;

-static unsigned long spu_next_offset(struct spu_queue *q, unsigned long off)

- if (q->q_type == HV_NCS_QTYPE_MAU) {

- off += MAU_ENTRY_SIZE;

- if (off == (MAU_ENTRY_SIZE * MAU_NUM_ENTRIES))

- off += CWQ_ENTRY_SIZE;

- if (off == (CWQ_ENTRY_SIZE * CWQ_NUM_ENTRIES))

-struct n2_request_common {

- struct list_head entry;

- unsigned int offset;

-#define OFFSET_NOT_RUNNING (~(unsigned int)0)

-/* An async job request records the final tail value it used in

- * n2_request_common->offset, test to see if that offset is in

- * the range old_head, new_head, inclusive.

-static inline bool job_finished(struct spu_queue *q, unsigned int offset,

- unsigned long old_head, unsigned long new_head)

- if (old_head <= new_head) {

- if (offset > old_head && offset <= new_head)

- if (offset > old_head || offset <= new_head)

-/* When the HEAD marker is unequal to the actual HEAD, we get

- * a virtual device INO interrupt. We should process the

- * completed CWQ entries and adjust the HEAD marker to clear

-static irqreturn_t cwq_intr(int irq, void *dev_id)

- unsigned long off, new_head, hv_ret;

- struct spu_queue *q = dev_id;

- pr_err("CPU[%d]: Got CWQ interrupt for qhdl[%lx]\n",

- smp_processor_id(), q->qhandle);

- spin_lock(&q->lock);

- hv_ret = sun4v_ncs_gethead(q->qhandle, &new_head);

- pr_err("CPU[%d]: CWQ gethead[%lx] hv_ret[%lu]\n",

- smp_processor_id(), new_head, hv_ret);

- for (off = q->head; off != new_head; off = spu_next_offset(q, off)) {

- hv_ret = sun4v_ncs_sethead_marker(q->qhandle, new_head);

- if (hv_ret == HV_EOK)

- q->head = new_head;

- spin_unlock(&q->lock);

- return IRQ_HANDLED;

-static irqreturn_t mau_intr(int irq, void *dev_id)

- struct spu_queue *q = dev_id;

- unsigned long head, hv_ret;

- spin_lock(&q->lock);

- pr_err("CPU[%d]: Got MAU interrupt for qhdl[%lx]\n",

- smp_processor_id(), q->qhandle);

- hv_ret = sun4v_ncs_gethead(q->qhandle, &head);

- pr_err("CPU[%d]: MAU gethead[%lx] hv_ret[%lu]\n",

- smp_processor_id(), head, hv_ret);

- sun4v_ncs_sethead_marker(q->qhandle, head);

- spin_unlock(&q->lock);

- return IRQ_HANDLED;

-static void *spu_queue_next(struct spu_queue *q, void *cur)

- return q->q + spu_next_offset(q, cur - q->q);

-static int spu_queue_num_free(struct spu_queue *q)

- unsigned long head = q->head;

- unsigned long tail = q->tail;

- unsigned long end = (CWQ_ENTRY_SIZE * CWQ_NUM_ENTRIES);

- unsigned long diff;

- diff = head - tail;

- diff = (end - tail) + head;

- return (diff / CWQ_ENTRY_SIZE) - 1;

-static void *spu_queue_alloc(struct spu_queue *q, int num_entries)

- int avail = spu_queue_num_free(q);

- if (avail >= num_entries)

- return q->q + q->tail;

-static unsigned long spu_queue_submit(struct spu_queue *q, void *last)

- unsigned long hv_ret, new_tail;

- new_tail = spu_next_offset(q, last - q->q);

- hv_ret = sun4v_ncs_settail(q->qhandle, new_tail);

- if (hv_ret == HV_EOK)

- q->tail = new_tail;

-static u64 control_word_base(unsigned int len, unsigned int hmac_key_len,

- int enc_type, int auth_type,

- unsigned int hash_len,

- bool sfas, bool sob, bool eob, bool encrypt,

- u64 word = (len - 1) & CONTROL_LEN;

- word |= ((u64) opcode << CONTROL_OPCODE_SHIFT);

- word |= ((u64) enc_type << CONTROL_ENC_TYPE_SHIFT);

- word |= ((u64) auth_type << CONTROL_AUTH_TYPE_SHIFT);

- word |= CONTROL_STORE_FINAL_AUTH_STATE;

- word |= CONTROL_START_OF_BLOCK;

- word |= CONTROL_END_OF_BLOCK;

- word |= CONTROL_ENCRYPT;

- word |= ((u64) (hmac_key_len - 1)) << CONTROL_HMAC_KEY_LEN_SHIFT;

- word |= ((u64) (hash_len - 1)) << CONTROL_HASH_LEN_SHIFT;

-static inline bool n2_should_run_async(struct spu_queue *qp, int this_len)

- if (this_len >= 64 ||

- qp->head != qp->tail)

-struct n2_ahash_alg {

- struct list_head entry;

- const u8 *hash_zero;

- const u8 *hash_init;

- struct ahash_alg alg;

-static inline struct n2_ahash_alg *n2_ahash_alg(struct crypto_tfm *tfm)

- struct crypto_alg *alg = tfm->__crt_alg;

- struct ahash_alg *ahash_alg;

- ahash_alg = container_of(alg, struct ahash_alg, halg.base);

- return container_of(ahash_alg, struct n2_ahash_alg, alg);

-struct n2_hmac_alg {

- const char *child_alg;

- struct n2_ahash_alg derived;

-static inline struct n2_hmac_alg *n2_hmac_alg(struct crypto_tfm *tfm)

- struct crypto_alg *alg = tfm->__crt_alg;

- struct ahash_alg *ahash_alg;

- ahash_alg = container_of(alg, struct ahash_alg, halg.base);

- return container_of(ahash_alg, struct n2_hmac_alg, derived.alg);

-struct n2_hash_ctx {

- struct crypto_ahash *fallback_tfm;

-#define N2_HASH_KEY_MAX 32 /* HW limit for all HMAC requests */

-struct n2_hmac_ctx {

- struct n2_hash_ctx base;

- struct crypto_shash *child_shash;

- unsigned char hash_key[N2_HASH_KEY_MAX];

-struct n2_hash_req_ctx {

- struct md5_state md5;

- struct sha1_state sha1;

- struct sha256_state sha256;

- struct ahash_request fallback_req;

-static int n2_hash_async_init(struct ahash_request *req)

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);

- ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);

- rctx->fallback_req.base.flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;

- return crypto_ahash_init(&rctx->fallback_req);

-static int n2_hash_async_update(struct ahash_request *req)

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);

- ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);

- rctx->fallback_req.base.flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;

- rctx->fallback_req.nbytes = req->nbytes;

- rctx->fallback_req.src = req->src;

- return crypto_ahash_update(&rctx->fallback_req);

-static int n2_hash_async_final(struct ahash_request *req)

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);

- ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);

- rctx->fallback_req.base.flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;

- rctx->fallback_req.result = req->result;

- return crypto_ahash_final(&rctx->fallback_req);

-static int n2_hash_async_finup(struct ahash_request *req)

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);

- ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);

- rctx->fallback_req.base.flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;

- rctx->fallback_req.nbytes = req->nbytes;

- rctx->fallback_req.src = req->src;

- rctx->fallback_req.result = req->result;

- return crypto_ahash_finup(&rctx->fallback_req);

-static int n2_hash_async_noimport(struct ahash_request *req, const void *in)

-static int n2_hash_async_noexport(struct ahash_request *req, void *out)

-static int n2_hash_cra_init(struct crypto_tfm *tfm)

- const char *fallback_driver_name = crypto_tfm_alg_name(tfm);

- struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(ahash);

- struct crypto_ahash *fallback_tfm;

- fallback_tfm = crypto_alloc_ahash(fallback_driver_name, 0,

- CRYPTO_ALG_NEED_FALLBACK);

- if (IS_ERR(fallback_tfm)) {

- pr_warn("Fallback driver '%s' could not be loaded!\n",

- fallback_driver_name);

- err = PTR_ERR(fallback_tfm);

- crypto_ahash_set_reqsize(ahash, (sizeof(struct n2_hash_req_ctx) +

- crypto_ahash_reqsize(fallback_tfm)));

- ctx->fallback_tfm = fallback_tfm;

-static void n2_hash_cra_exit(struct crypto_tfm *tfm)

- struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(ahash);

- crypto_free_ahash(ctx->fallback_tfm);

-static int n2_hmac_cra_init(struct crypto_tfm *tfm)

- const char *fallback_driver_name = crypto_tfm_alg_name(tfm);

- struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);

- struct n2_hmac_ctx *ctx = crypto_ahash_ctx(ahash);

- struct n2_hmac_alg *n2alg = n2_hmac_alg(tfm);

- struct crypto_ahash *fallback_tfm;

- struct crypto_shash *child_shash;

- fallback_tfm = crypto_alloc_ahash(fallback_driver_name, 0,

- CRYPTO_ALG_NEED_FALLBACK);

- if (IS_ERR(fallback_tfm)) {

- pr_warn("Fallback driver '%s' could not be loaded!\n",

- fallback_driver_name);

- err = PTR_ERR(fallback_tfm);

- child_shash = crypto_alloc_shash(n2alg->child_alg, 0, 0);

- if (IS_ERR(child_shash)) {

- pr_warn("Child shash '%s' could not be loaded!\n",

- n2alg->child_alg);

- err = PTR_ERR(child_shash);

- goto out_free_fallback;

- crypto_ahash_set_reqsize(ahash, (sizeof(struct n2_hash_req_ctx) +

- crypto_ahash_reqsize(fallback_tfm)));

- ctx->child_shash = child_shash;

- ctx->base.fallback_tfm = fallback_tfm;

- crypto_free_ahash(fallback_tfm);

-static void n2_hmac_cra_exit(struct crypto_tfm *tfm)

- struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);

- struct n2_hmac_ctx *ctx = crypto_ahash_ctx(ahash);

- crypto_free_ahash(ctx->base.fallback_tfm);

- crypto_free_shash(ctx->child_shash);

-static int n2_hmac_async_setkey(struct crypto_ahash *tfm, const u8 *key,

- unsigned int keylen)

- struct n2_hmac_ctx *ctx = crypto_ahash_ctx(tfm);

- struct crypto_shash *child_shash = ctx->child_shash;

- struct crypto_ahash *fallback_tfm;

- fallback_tfm = ctx->base.fallback_tfm;

- err = crypto_ahash_setkey(fallback_tfm, key, keylen);

- bs = crypto_shash_blocksize(child_shash);

- ds = crypto_shash_digestsize(child_shash);

- BUG_ON(ds > N2_HASH_KEY_MAX);

- if (keylen > bs) {

- err = crypto_shash_tfm_digest(child_shash, key, keylen,

- } else if (keylen <= N2_HASH_KEY_MAX)

- memcpy(ctx->hash_key, key, keylen);

- ctx->hash_key_len = keylen;

-static unsigned long wait_for_tail(struct spu_queue *qp)

- unsigned long head, hv_ret;

- hv_ret = sun4v_ncs_gethead(qp->qhandle, &head);

- if (hv_ret != HV_EOK) {

- pr_err("Hypervisor error on gethead\n");

- if (head == qp->tail) {

-static unsigned long submit_and_wait_for_tail(struct spu_queue *qp,

- struct cwq_initial_entry *ent)

- unsigned long hv_ret = spu_queue_submit(qp, ent);

- if (hv_ret == HV_EOK)

- hv_ret = wait_for_tail(qp);

-static int n2_do_async_digest(struct ahash_request *req,

- unsigned int auth_type, unsigned int digest_size,

- unsigned int result_size, void *hash_loc,

- unsigned long auth_key, unsigned int auth_key_len)

- struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);

- struct cwq_initial_entry *ent;

- struct crypto_hash_walk walk;

- struct spu_queue *qp;

- unsigned long flags;

- int err = -ENODEV;

- /* The total effective length of the operation may not

- if (unlikely(req->nbytes > (1 << 16))) {

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);

- ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);

- rctx->fallback_req.base.flags =

- req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;

- rctx->fallback_req.nbytes = req->nbytes;

- rctx->fallback_req.src = req->src;

- rctx->fallback_req.result = req->result;

- return crypto_ahash_digest(&rctx->fallback_req);

- nbytes = crypto_hash_walk_first(req, &walk);

- qp = cpu_to_cwq[cpu];

- spin_lock_irqsave(&qp->lock, flags);

- /* XXX can do better, improve this later by doing a by-hand scatterlist

- ent = qp->q + qp->tail;

- ent->control = control_word_base(nbytes, auth_key_len, 0,

- auth_type, digest_size,

- false, true, false, false,

- OPCODE_INPLACE_BIT |

- ent->src_addr = __pa(walk.data);

- ent->auth_key_addr = auth_key;

- ent->auth_iv_addr = __pa(hash_loc);

- ent->final_auth_state_addr = 0UL;

- ent->enc_key_addr = 0UL;

- ent->enc_iv_addr = 0UL;

- ent->dest_addr = __pa(hash_loc);

- nbytes = crypto_hash_walk_done(&walk, 0);

- while (nbytes > 0) {

- ent = spu_queue_next(qp, ent);

- ent->control = (nbytes - 1);

- ent->src_addr = __pa(walk.data);

- ent->auth_key_addr = 0UL;

- ent->auth_iv_addr = 0UL;

- ent->final_auth_state_addr = 0UL;

- ent->enc_key_addr = 0UL;

- ent->enc_iv_addr = 0UL;

- ent->dest_addr = 0UL;

- nbytes = crypto_hash_walk_done(&walk, 0);

- ent->control |= CONTROL_END_OF_BLOCK;

- if (submit_and_wait_for_tail(qp, ent) != HV_EOK)

- spin_unlock_irqrestore(&qp->lock, flags);

- memcpy(req->result, hash_loc, result_size);

-static int n2_hash_async_digest(struct ahash_request *req)

- struct n2_ahash_alg *n2alg = n2_ahash_alg(req->base.tfm);

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- ds = n2alg->digest_size;

- if (unlikely(req->nbytes == 0)) {

- memcpy(req->result, n2alg->hash_zero, ds);

- memcpy(&rctx->u, n2alg->hash_init, n2alg->hw_op_hashsz);

- return n2_do_async_digest(req, n2alg->auth_type,

- n2alg->hw_op_hashsz, ds,

- &rctx->u, 0UL, 0);

-static int n2_hmac_async_digest(struct ahash_request *req)

- struct n2_hmac_alg *n2alg = n2_hmac_alg(req->base.tfm);

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);

- struct n2_hmac_ctx *ctx = crypto_ahash_ctx(tfm);

- ds = n2alg->derived.digest_size;

- if (unlikely(req->nbytes == 0) ||

- unlikely(ctx->hash_key_len > N2_HASH_KEY_MAX)) {

- struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);

- struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);

- ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);

- rctx->fallback_req.base.flags =

- req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;

- rctx->fallback_req.nbytes = req->nbytes;

- rctx->fallback_req.src = req->src;

- rctx->fallback_req.result = req->result;

- return crypto_ahash_digest(&rctx->fallback_req);

- memcpy(&rctx->u, n2alg->derived.hash_init,

- n2alg->derived.hw_op_hashsz);

- return n2_do_async_digest(req, n2alg->derived.hmac_type,

- n2alg->derived.hw_op_hashsz, ds,

- __pa(&ctx->hash_key),

- ctx->hash_key_len);

-struct n2_skcipher_context {

- u8 aes[AES_MAX_KEY_SIZE];

- u8 des[DES_KEY_SIZE];

- u8 des3[3 * DES_KEY_SIZE];

-#define N2_CHUNK_ARR_LEN 16

-struct n2_crypto_chunk {

- struct list_head entry;

- unsigned long iv_paddr : 44;

- unsigned long arr_len : 20;

- unsigned long dest_paddr;

- unsigned long dest_final;

- unsigned long src_paddr : 44;

- unsigned long src_len : 20;

- } arr[N2_CHUNK_ARR_LEN];

-struct n2_request_context {

- struct skcipher_walk walk;

- struct list_head chunk_list;

- struct n2_crypto_chunk chunk;

-/* The SPU allows some level of flexibility for partial cipher blocks

- * being specified in a descriptor.

- * It merely requires that every descriptor's length field is at least

- * as large as the cipher block size. This means that a cipher block

- * can span at most 2 descriptors. However, this does not allow a

- * partial block to span into the final descriptor as that would

- * violate the rule (since every descriptor's length must be at lest

- * the block size). So, for example, assuming an 8 byte block size:

- * 0xe --> 0xa --> 0x8

- * is a valid length sequence, whereas:

- * 0xe --> 0xb --> 0x7

- * is not a valid sequence.

-struct n2_skcipher_alg {

- struct list_head entry;

- struct skcipher_alg skcipher;

-static inline struct n2_skcipher_alg *n2_skcipher_alg(struct crypto_skcipher *tfm)

- struct skcipher_alg *alg = crypto_skcipher_alg(tfm);

- return container_of(alg, struct n2_skcipher_alg, skcipher);

-static int n2_aes_setkey(struct crypto_skcipher *skcipher, const u8 *key,

- unsigned int keylen)

- struct crypto_tfm *tfm = crypto_skcipher_tfm(skcipher);

- struct n2_skcipher_context *ctx = crypto_tfm_ctx(tfm);

- struct n2_skcipher_alg *n2alg = n2_skcipher_alg(skcipher);

- ctx->enc_type = (n2alg->enc_type & ENC_TYPE_CHAINING_MASK);

- case AES_KEYSIZE_128:

- ctx->enc_type |= ENC_TYPE_ALG_AES128;

- case AES_KEYSIZE_192:

- ctx->enc_type |= ENC_TYPE_ALG_AES192;

- case AES_KEYSIZE_256:

- ctx->enc_type |= ENC_TYPE_ALG_AES256;

- ctx->key_len = keylen;

- memcpy(ctx->key.aes, key, keylen);

-static int n2_des_setkey(struct crypto_skcipher *skcipher, const u8 *key,

- unsigned int keylen)

- struct crypto_tfm *tfm = crypto_skcipher_tfm(skcipher);

- struct n2_skcipher_context *ctx = crypto_tfm_ctx(tfm);

- struct n2_skcipher_alg *n2alg = n2_skcipher_alg(skcipher);

- err = verify_skcipher_des_key(skcipher, key);

- ctx->enc_type = n2alg->enc_type;

- ctx->key_len = keylen;

- memcpy(ctx->key.des, key, keylen);

-static int n2_3des_setkey(struct crypto_skcipher *skcipher, const u8 *key,

- unsigned int keylen)

- struct crypto_tfm *tfm = crypto_skcipher_tfm(skcipher);

- struct n2_skcipher_context *ctx = crypto_tfm_ctx(tfm);

- struct n2_skcipher_alg *n2alg = n2_skcipher_alg(skcipher);

- err = verify_skcipher_des3_key(skcipher, key);

- ctx->enc_type = n2alg->enc_type;

- ctx->key_len = keylen;

- memcpy(ctx->key.des3, key, keylen);

-static inline int skcipher_descriptor_len(int nbytes, unsigned int block_size)

- int this_len = nbytes;

- this_len -= (nbytes & (block_size - 1));

- return this_len > (1 << 16) ? (1 << 16) : this_len;

-static int __n2_crypt_chunk(struct crypto_skcipher *skcipher,

- struct n2_crypto_chunk *cp,

- struct spu_queue *qp, bool encrypt)

- struct n2_skcipher_context *ctx = crypto_skcipher_ctx(skcipher);

- struct cwq_initial_entry *ent;

- ent = spu_queue_alloc(qp, cp->arr_len);

- pr_info("queue_alloc() of %d fails\n",

- in_place = (cp->dest_paddr == cp->arr[0].src_paddr);

- ent->control = control_word_base(cp->arr[0].src_len,

- 0, ctx->enc_type, 0, 0,

- false, true, false, encrypt,

- (in_place ? OPCODE_INPLACE_BIT : 0));

- ent->src_addr = cp->arr[0].src_paddr;

- ent->auth_key_addr = 0UL;

- ent->auth_iv_addr = 0UL;

- ent->final_auth_state_addr = 0UL;

- ent->enc_key_addr = __pa(&ctx->key);

- ent->enc_iv_addr = cp->iv_paddr;

- ent->dest_addr = (in_place ? 0UL : cp->dest_paddr);

- for (i = 1; i < cp->arr_len; i++) {

- ent = spu_queue_next(qp, ent);

- ent->control = cp->arr[i].src_len - 1;

- ent->src_addr = cp->arr[i].src_paddr;

- ent->auth_key_addr = 0UL;

- ent->auth_iv_addr = 0UL;

- ent->final_auth_state_addr = 0UL;

- ent->enc_key_addr = 0UL;

- ent->enc_iv_addr = 0UL;

- ent->dest_addr = 0UL;

- ent->control |= CONTROL_END_OF_BLOCK;

- return (spu_queue_submit(qp, ent) != HV_EOK) ? -EINVAL : 0;

-static int n2_compute_chunks(struct skcipher_request *req)

- struct n2_request_context *rctx = skcipher_request_ctx(req);

- struct skcipher_walk *walk = &rctx->walk;

- struct n2_crypto_chunk *chunk;

- unsigned long dest_prev;

- unsigned int tot_len;

- bool prev_in_place;

- err = skcipher_walk_async(walk, req);

- INIT_LIST_HEAD(&rctx->chunk_list);

- chunk = &rctx->chunk;

- INIT_LIST_HEAD(&chunk->entry);

- chunk->iv_paddr = 0UL;

- chunk->arr_len = 0;

- chunk->dest_paddr = 0UL;

- prev_in_place = false;

- while ((nbytes = walk->nbytes) != 0) {

- unsigned long dest_paddr, src_paddr;

- src_paddr = (page_to_phys(walk->src.phys.page) +

- walk->src.phys.offset);

- dest_paddr = (page_to_phys(walk->dst.phys.page) +

- walk->dst.phys.offset);

- in_place = (src_paddr == dest_paddr);

- this_len = skcipher_descriptor_len(nbytes, walk->blocksize);

- if (chunk->arr_len != 0) {

- if (in_place != prev_in_place ||

- (!prev_in_place &&

- dest_paddr != dest_prev) ||

- chunk->arr_len == N2_CHUNK_ARR_LEN ||

- tot_len + this_len > (1 << 16)) {

- chunk->dest_final = dest_prev;

- list_add_tail(&chunk->entry,

- &rctx->chunk_list);

- chunk = kzalloc(sizeof(*chunk), GFP_ATOMIC);

- INIT_LIST_HEAD(&chunk->entry);

- if (chunk->arr_len == 0) {

- chunk->dest_paddr = dest_paddr;

- chunk->arr[chunk->arr_len].src_paddr = src_paddr;

- chunk->arr[chunk->arr_len].src_len = this_len;

- dest_prev = dest_paddr + this_len;

- prev_in_place = in_place;

- tot_len += this_len;

- err = skcipher_walk_done(walk, nbytes - this_len);

- if (!err && chunk->arr_len != 0) {

- chunk->dest_final = dest_prev;

- list_add_tail(&chunk->entry, &rctx->chunk_list);

-static void n2_chunk_complete(struct skcipher_request *req, void *final_iv)

- struct n2_request_context *rctx = skcipher_request_ctx(req);

- struct n2_crypto_chunk *c, *tmp;

- memcpy(rctx->walk.iv, final_iv, rctx->walk.blocksize);

- list_for_each_entry_safe(c, tmp, &rctx->chunk_list, entry) {

- list_del(&c->entry);

- if (unlikely(c != &rctx->chunk))

-static int n2_do_ecb(struct skcipher_request *req, bool encrypt)

- struct n2_request_context *rctx = skcipher_request_ctx(req);

- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);

- int err = n2_compute_chunks(req);

- struct n2_crypto_chunk *c, *tmp;

- unsigned long flags, hv_ret;

- struct spu_queue *qp;

- qp = cpu_to_cwq[get_cpu()];

- spin_lock_irqsave(&qp->lock, flags);

- list_for_each_entry_safe(c, tmp, &rctx->chunk_list, entry) {

- err = __n2_crypt_chunk(tfm, c, qp, encrypt);

- list_del(&c->entry);

- if (unlikely(c != &rctx->chunk))

- hv_ret = wait_for_tail(qp);

- if (hv_ret != HV_EOK)

- spin_unlock_irqrestore(&qp->lock, flags);

- n2_chunk_complete(req, NULL);

-static int n2_encrypt_ecb(struct skcipher_request *req)

- return n2_do_ecb(req, true);

-static int n2_decrypt_ecb(struct skcipher_request *req)

- return n2_do_ecb(req, false);

-static int n2_do_chaining(struct skcipher_request *req, bool encrypt)

- struct n2_request_context *rctx = skcipher_request_ctx(req);

- struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);

- unsigned long flags, hv_ret, iv_paddr;

- int err = n2_compute_chunks(req);

- struct n2_crypto_chunk *c, *tmp;

- struct spu_queue *qp;

- void *final_iv_addr;

- final_iv_addr = NULL;

- qp = cpu_to_cwq[get_cpu()];

- spin_lock_irqsave(&qp->lock, flags);

- iv_paddr = __pa(rctx->walk.iv);

- list_for_each_entry_safe(c, tmp, &rctx->chunk_list,

- c->iv_paddr = iv_paddr;

- err = __n2_crypt_chunk(tfm, c, qp, true);

- iv_paddr = c->dest_final - rctx->walk.blocksize;

- list_del(&c->entry);

- if (unlikely(c != &rctx->chunk))

- final_iv_addr = __va(iv_paddr);

- list_for_each_entry_safe_reverse(c, tmp, &rctx->chunk_list,

- if (c == &rctx->chunk) {

- iv_paddr = __pa(rctx->walk.iv);

- iv_paddr = (tmp->arr[tmp->arr_len-1].src_paddr +

- tmp->arr[tmp->arr_len-1].src_len -

- rctx->walk.blocksize);

- if (!final_iv_addr) {

- pa = (c->arr[c->arr_len-1].src_paddr +

- c->arr[c->arr_len-1].src_len -

- rctx->walk.blocksize);

- final_iv_addr = rctx->temp_iv;

- memcpy(rctx->temp_iv, __va(pa),

- rctx->walk.blocksize);

- c->iv_paddr = iv_paddr;

- err = __n2_crypt_chunk(tfm, c, qp, false);

- list_del(&c->entry);

- if (unlikely(c != &rctx->chunk))

- hv_ret = wait_for_tail(qp);

- if (hv_ret != HV_EOK)

- spin_unlock_irqrestore(&qp->lock, flags);

- n2_chunk_complete(req, err ? NULL : final_iv_addr);

-static int n2_encrypt_chaining(struct skcipher_request *req)

- return n2_do_chaining(req, true);

-static int n2_decrypt_chaining(struct skcipher_request *req)

- return n2_do_chaining(req, false);

-struct n2_skcipher_tmpl {

- const char *drv_name;

- struct skcipher_alg skcipher;

-static const struct n2_skcipher_tmpl skcipher_tmpls[] = {

- /* DES: ECB CBC and CFB are supported */

- { .name = "ecb(des)",

- .drv_name = "ecb-des",

- .block_size = DES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_DES |

- ENC_TYPE_CHAINING_ECB),

- .min_keysize = DES_KEY_SIZE,

- .max_keysize = DES_KEY_SIZE,

- .setkey = n2_des_setkey,

- .encrypt = n2_encrypt_ecb,

- .decrypt = n2_decrypt_ecb,

- { .name = "cbc(des)",

- .drv_name = "cbc-des",

- .block_size = DES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_DES |

- ENC_TYPE_CHAINING_CBC),

- .ivsize = DES_BLOCK_SIZE,

- .min_keysize = DES_KEY_SIZE,

- .max_keysize = DES_KEY_SIZE,

- .setkey = n2_des_setkey,

- .encrypt = n2_encrypt_chaining,

- .decrypt = n2_decrypt_chaining,

- /* 3DES: ECB CBC and CFB are supported */

- { .name = "ecb(des3_ede)",

- .drv_name = "ecb-3des",

- .block_size = DES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_3DES |

- ENC_TYPE_CHAINING_ECB),

- .min_keysize = 3 * DES_KEY_SIZE,

- .max_keysize = 3 * DES_KEY_SIZE,

- .setkey = n2_3des_setkey,

- .encrypt = n2_encrypt_ecb,

- .decrypt = n2_decrypt_ecb,

- { .name = "cbc(des3_ede)",

- .drv_name = "cbc-3des",

- .block_size = DES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_3DES |

- ENC_TYPE_CHAINING_CBC),

- .ivsize = DES_BLOCK_SIZE,

- .min_keysize = 3 * DES_KEY_SIZE,

- .max_keysize = 3 * DES_KEY_SIZE,

- .setkey = n2_3des_setkey,

- .encrypt = n2_encrypt_chaining,

- .decrypt = n2_decrypt_chaining,

- /* AES: ECB CBC and CTR are supported */

- { .name = "ecb(aes)",

- .drv_name = "ecb-aes",

- .block_size = AES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_AES128 |

- ENC_TYPE_CHAINING_ECB),

- .min_keysize = AES_MIN_KEY_SIZE,

- .max_keysize = AES_MAX_KEY_SIZE,

- .setkey = n2_aes_setkey,

- .encrypt = n2_encrypt_ecb,

- .decrypt = n2_decrypt_ecb,

- { .name = "cbc(aes)",

- .drv_name = "cbc-aes",

- .block_size = AES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_AES128 |

- ENC_TYPE_CHAINING_CBC),

- .ivsize = AES_BLOCK_SIZE,

- .min_keysize = AES_MIN_KEY_SIZE,

- .max_keysize = AES_MAX_KEY_SIZE,

- .setkey = n2_aes_setkey,

- .encrypt = n2_encrypt_chaining,

- .decrypt = n2_decrypt_chaining,

- { .name = "ctr(aes)",

- .drv_name = "ctr-aes",

- .block_size = AES_BLOCK_SIZE,

- .enc_type = (ENC_TYPE_ALG_AES128 |

- ENC_TYPE_CHAINING_COUNTER),

- .ivsize = AES_BLOCK_SIZE,

- .min_keysize = AES_MIN_KEY_SIZE,

- .max_keysize = AES_MAX_KEY_SIZE,

- .setkey = n2_aes_setkey,

- .encrypt = n2_encrypt_chaining,

- .decrypt = n2_encrypt_chaining,

-#define NUM_CIPHER_TMPLS ARRAY_SIZE(skcipher_tmpls)

-static LIST_HEAD(skcipher_algs);

-struct n2_hash_tmpl {

- const u8 *hash_zero;

- const u8 *hash_init;

-static const __le32 n2_md5_init[MD5_HASH_WORDS] = {

- cpu_to_le32(MD5_H0),

- cpu_to_le32(MD5_H1),

- cpu_to_le32(MD5_H2),

- cpu_to_le32(MD5_H3),

-static const u32 n2_sha1_init[SHA1_DIGEST_SIZE / 4] = {

- SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4,

-static const u32 n2_sha256_init[SHA256_DIGEST_SIZE / 4] = {

- SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3,

- SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7,

-static const u32 n2_sha224_init[SHA256_DIGEST_SIZE / 4] = {

- SHA224_H0, SHA224_H1, SHA224_H2, SHA224_H3,

- SHA224_H4, SHA224_H5, SHA224_H6, SHA224_H7,

-static const struct n2_hash_tmpl hash_tmpls[] = {

- .hash_zero = md5_zero_message_hash,

- .hash_init = (u8 *)n2_md5_init,

- .auth_type = AUTH_TYPE_MD5,

- .hmac_type = AUTH_TYPE_HMAC_MD5,

- .hw_op_hashsz = MD5_DIGEST_SIZE,

- .digest_size = MD5_DIGEST_SIZE,

- .statesize = sizeof(struct md5_state),

- .block_size = MD5_HMAC_BLOCK_SIZE },

- .hash_zero = sha1_zero_message_hash,

- .hash_init = (u8 *)n2_sha1_init,

- .auth_type = AUTH_TYPE_SHA1,

- .hmac_type = AUTH_TYPE_HMAC_SHA1,

- .hw_op_hashsz = SHA1_DIGEST_SIZE,

- .digest_size = SHA1_DIGEST_SIZE,

- .statesize = sizeof(struct sha1_state),

- .block_size = SHA1_BLOCK_SIZE },

- { .name = "sha256",

- .hash_zero = sha256_zero_message_hash,

- .hash_init = (u8 *)n2_sha256_init,

- .auth_type = AUTH_TYPE_SHA256,

- .hmac_type = AUTH_TYPE_HMAC_SHA256,

- .hw_op_hashsz = SHA256_DIGEST_SIZE,

- .digest_size = SHA256_DIGEST_SIZE,

- .statesize = sizeof(struct sha256_state),

- .block_size = SHA256_BLOCK_SIZE },

- { .name = "sha224",

- .hash_zero = sha224_zero_message_hash,

- .hash_init = (u8 *)n2_sha224_init,

- .auth_type = AUTH_TYPE_SHA256,

- .hmac_type = AUTH_TYPE_RESERVED,

- .hw_op_hashsz = SHA256_DIGEST_SIZE,

- .digest_size = SHA224_DIGEST_SIZE,

- .statesize = sizeof(struct sha256_state),

- .block_size = SHA224_BLOCK_SIZE },

-#define NUM_HASH_TMPLS ARRAY_SIZE(hash_tmpls)

-static LIST_HEAD(ahash_algs);

-static LIST_HEAD(hmac_algs);

-static int algs_registered;

-static void __n2_unregister_algs(void)

- struct n2_skcipher_alg *skcipher, *skcipher_tmp;

- struct n2_ahash_alg *alg, *alg_tmp;

- struct n2_hmac_alg *hmac, *hmac_tmp;

- list_for_each_entry_safe(skcipher, skcipher_tmp, &skcipher_algs, entry) {

- crypto_unregister_skcipher(&skcipher->skcipher);

- list_del(&skcipher->entry);

- list_for_each_entry_safe(hmac, hmac_tmp, &hmac_algs, derived.entry) {

- crypto_unregister_ahash(&hmac->derived.alg);

- list_del(&hmac->derived.entry);

- list_for_each_entry_safe(alg, alg_tmp, &ahash_algs, entry) {

- crypto_unregister_ahash(&alg->alg);

- list_del(&alg->entry);

-static int n2_skcipher_init_tfm(struct crypto_skcipher *tfm)

- crypto_skcipher_set_reqsize(tfm, sizeof(struct n2_request_context));

-static int __n2_register_one_skcipher(const struct n2_skcipher_tmpl *tmpl)

- struct n2_skcipher_alg *p = kzalloc(sizeof(*p), GFP_KERNEL);

- struct skcipher_alg *alg;

- alg = &p->skcipher;

- *alg = tmpl->skcipher;

- snprintf(alg->base.cra_name, CRYPTO_MAX_ALG_NAME, "%s", tmpl->name);

- snprintf(alg->base.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s-n2", tmpl->drv_name);

- alg->base.cra_priority = N2_CRA_PRIORITY;

- alg->base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | CRYPTO_ALG_ASYNC |

- CRYPTO_ALG_ALLOCATES_MEMORY;

- alg->base.cra_blocksize = tmpl->block_size;

- p->enc_type = tmpl->enc_type;

- alg->base.cra_ctxsize = sizeof(struct n2_skcipher_context);

- alg->base.cra_module = THIS_MODULE;

- alg->init = n2_skcipher_init_tfm;

- list_add(&p->entry, &skcipher_algs);

- err = crypto_register_skcipher(alg);

- pr_err("%s alg registration failed\n", alg->base.cra_name);

- list_del(&p->entry);

- pr_info("%s alg registered\n", alg->base.cra_name);

-static int __n2_register_one_hmac(struct n2_ahash_alg *n2ahash)

- struct n2_hmac_alg *p = kzalloc(sizeof(*p), GFP_KERNEL);

- struct ahash_alg *ahash;

- struct crypto_alg *base;

- p->child_alg = n2ahash->alg.halg.base.cra_name;

- memcpy(&p->derived, n2ahash, sizeof(struct n2_ahash_alg));

- INIT_LIST_HEAD(&p->derived.entry);

- ahash = &p->derived.alg;

- ahash->digest = n2_hmac_async_digest;

- ahash->setkey = n2_hmac_async_setkey;

- base = &ahash->halg.base;

- if (snprintf(base->cra_name, CRYPTO_MAX_ALG_NAME, "hmac(%s)",

- p->child_alg) >= CRYPTO_MAX_ALG_NAME)

- if (snprintf(base->cra_driver_name, CRYPTO_MAX_ALG_NAME, "hmac-%s-n2",

- p->child_alg) >= CRYPTO_MAX_ALG_NAME)

- base->cra_ctxsize = sizeof(struct n2_hmac_ctx);

- base->cra_init = n2_hmac_cra_init;

- base->cra_exit = n2_hmac_cra_exit;

- list_add(&p->derived.entry, &hmac_algs);

- err = crypto_register_ahash(ahash);

- pr_err("%s alg registration failed\n", base->cra_name);

- list_del(&p->derived.entry);

- pr_info("%s alg registered\n", base->cra_name);

-static int __n2_register_one_ahash(const struct n2_hash_tmpl *tmpl)

- struct n2_ahash_alg *p = kzalloc(sizeof(*p), GFP_KERNEL);

- struct hash_alg_common *halg;

- struct crypto_alg *base;

- struct ahash_alg *ahash;

- p->hash_zero = tmpl->hash_zero;

- p->hash_init = tmpl->hash_init;

- p->auth_type = tmpl->auth_type;

- p->hmac_type = tmpl->hmac_type;

- p->hw_op_hashsz = tmpl->hw_op_hashsz;

- p->digest_size = tmpl->digest_size;

- ahash->init = n2_hash_async_init;

- ahash->update = n2_hash_async_update;

- ahash->final = n2_hash_async_final;

- ahash->finup = n2_hash_async_finup;

- ahash->digest = n2_hash_async_digest;

- ahash->export = n2_hash_async_noexport;

- ahash->import = n2_hash_async_noimport;

- halg = &ahash->halg;

- halg->digestsize = tmpl->digest_size;

- halg->statesize = tmpl->statesize;

- base = &halg->base;

- snprintf(base->cra_name, CRYPTO_MAX_ALG_NAME, "%s", tmpl->name);

- snprintf(base->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s-n2", tmpl->name);

- base->cra_priority = N2_CRA_PRIORITY;

- base->cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |

- CRYPTO_ALG_NEED_FALLBACK;

- base->cra_blocksize = tmpl->block_size;

- base->cra_ctxsize = sizeof(struct n2_hash_ctx);

- base->cra_module = THIS_MODULE;

- base->cra_init = n2_hash_cra_init;

- base->cra_exit = n2_hash_cra_exit;

- list_add(&p->entry, &ahash_algs);

- err = crypto_register_ahash(ahash);

- pr_err("%s alg registration failed\n", base->cra_name);

- list_del(&p->entry);

- pr_info("%s alg registered\n", base->cra_name);

- if (!err && p->hmac_type != AUTH_TYPE_RESERVED)

- err = __n2_register_one_hmac(p);

-static int n2_register_algs(void)

- mutex_lock(&spu_lock);

- if (algs_registered++)

- for (i = 0; i < NUM_HASH_TMPLS; i++) {

- err = __n2_register_one_ahash(&hash_tmpls[i]);

- __n2_unregister_algs();

- for (i = 0; i < NUM_CIPHER_TMPLS; i++) {

- err = __n2_register_one_skcipher(&skcipher_tmpls[i]);

- __n2_unregister_algs();

- mutex_unlock(&spu_lock);

-static void n2_unregister_algs(void)

- mutex_lock(&spu_lock);

- if (!--algs_registered)

- __n2_unregister_algs();

- mutex_unlock(&spu_lock);

-/* To map CWQ queues to interrupt sources, the hypervisor API provides

- * a devino. This isn't very useful to us because all of the

- * interrupts listed in the device_node have been translated to

- * Linux virtual IRQ cookie numbers.

- * So we have to back-translate, going through the 'intr' and 'ino'

- * property tables of the n2cp MDESC node, matching it with the OF

- * 'interrupts' property entries, in order to figure out which

- * devino goes to which already-translated IRQ.

-static int find_devino_index(struct platform_device *dev, struct spu_mdesc_info *ip,

- unsigned long dev_ino)

- const unsigned int *dev_intrs;

- unsigned int intr;

- for (i = 0; i < ip->num_intrs; i++) {

- if (ip->ino_table[i].ino == dev_ino)

- if (i == ip->num_intrs)

- intr = ip->ino_table[i].intr;

- dev_intrs = of_get_property(dev->dev.of_node, "interrupts", NULL);

- for (i = 0; i < dev->archdata.num_irqs; i++) {

- if (dev_intrs[i] == intr)

-static int spu_map_ino(struct platform_device *dev, struct spu_mdesc_info *ip,

- const char *irq_name, struct spu_queue *p,

- irq_handler_t handler)

- unsigned long herr;

- herr = sun4v_ncs_qhandle_to_devino(p->qhandle, &p->devino);

- index = find_devino_index(dev, ip, p->devino);

- p->irq = dev->archdata.irqs[index];

- sprintf(p->irq_name, "%s-%d", irq_name, index);

- return request_irq(p->irq, handler, 0, p->irq_name, p);

-static struct kmem_cache *queue_cache[2];

-static void *new_queue(unsigned long q_type)

- return kmem_cache_zalloc(queue_cache[q_type - 1], GFP_KERNEL);

-static void free_queue(void *p, unsigned long q_type)

- kmem_cache_free(queue_cache[q_type - 1], p);

-static int queue_cache_init(void)

- if (!queue_cache[HV_NCS_QTYPE_MAU - 1])

- queue_cache[HV_NCS_QTYPE_MAU - 1] =

- kmem_cache_create("mau_queue",

- (MAU_NUM_ENTRIES *

- MAU_ENTRY_SIZE, 0, NULL);

- if (!queue_cache[HV_NCS_QTYPE_MAU - 1])

- if (!queue_cache[HV_NCS_QTYPE_CWQ - 1])

- queue_cache[HV_NCS_QTYPE_CWQ - 1] =

- kmem_cache_create("cwq_queue",

- (CWQ_NUM_ENTRIES *

- CWQ_ENTRY_SIZE, 0, NULL);

- if (!queue_cache[HV_NCS_QTYPE_CWQ - 1]) {

- kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_MAU - 1]);

- queue_cache[HV_NCS_QTYPE_MAU - 1] = NULL;

-static void queue_cache_destroy(void)

- kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_MAU - 1]);

- kmem_cache_destroy(queue_cache[HV_NCS_QTYPE_CWQ - 1]);

- queue_cache[HV_NCS_QTYPE_MAU - 1] = NULL;

- queue_cache[HV_NCS_QTYPE_CWQ - 1] = NULL;

-static long spu_queue_register_workfn(void *arg)

- struct spu_qreg *qr = arg;

- struct spu_queue *p = qr->queue;

- unsigned long q_type = qr->type;

- unsigned long hv_ret;

- hv_ret = sun4v_ncs_qconf(q_type, __pa(p->q),

- CWQ_NUM_ENTRIES, &p->qhandle);

- sun4v_ncs_sethead_marker(p->qhandle, 0);

- return hv_ret ? -EINVAL : 0;

-static int spu_queue_register(struct spu_queue *p, unsigned long q_type)

- int cpu = cpumask_any_and(&p->sharing, cpu_online_mask);

- struct spu_qreg qr = { .queue = p, .type = q_type };

- return work_on_cpu_safe(cpu, spu_queue_register_workfn, &qr);

-static int spu_queue_setup(struct spu_queue *p)

- p->q = new_queue(p->q_type);

- err = spu_queue_register(p, p->q_type);

- free_queue(p->q, p->q_type);

-static void spu_queue_destroy(struct spu_queue *p)

- unsigned long hv_ret;

- hv_ret = sun4v_ncs_qconf(p->q_type, p->qhandle, 0, &p->qhandle);

- free_queue(p->q, p->q_type);

-static void spu_list_destroy(struct list_head *list)

- struct spu_queue *p, *n;

- list_for_each_entry_safe(p, n, list, list) {

- for (i = 0; i < NR_CPUS; i++) {

- if (cpu_to_cwq[i] == p)

- cpu_to_cwq[i] = NULL;

- free_irq(p->irq, p);

- spu_queue_destroy(p);

- list_del(&p->list);

-/* Walk the backward arcs of a CWQ 'exec-unit' node,

- * gathering cpu membership information.

-static int spu_mdesc_walk_arcs(struct mdesc_handle *mdesc,

- struct platform_device *dev,

- u64 node, struct spu_queue *p,

- struct spu_queue **table)

- mdesc_for_each_arc(arc, mdesc, node, MDESC_ARC_TYPE_BACK) {

- u64 tgt = mdesc_arc_target(mdesc, arc);

- const char *name = mdesc_node_name(mdesc, tgt);

- if (strcmp(name, "cpu"))

- id = mdesc_get_property(mdesc, tgt, "id", NULL);

- if (table[*id] != NULL) {

- dev_err(&dev->dev, "%pOF: SPU cpu slot already set.\n",

- dev->dev.of_node);

- cpumask_set_cpu(*id, &p->sharing);

-/* Process an 'exec-unit' MDESC node of type 'cwq'. */

-static int handle_exec_unit(struct spu_mdesc_info *ip, struct list_head *list,

- struct platform_device *dev, struct mdesc_handle *mdesc,

- u64 node, const char *iname, unsigned long q_type,

- irq_handler_t handler, struct spu_queue **table)

- struct spu_queue *p;

- p = kzalloc(sizeof(struct spu_queue), GFP_KERNEL);

- dev_err(&dev->dev, "%pOF: Could not allocate SPU queue.\n",

- dev->dev.of_node);

- cpumask_clear(&p->sharing);

- spin_lock_init(&p->lock);

- p->q_type = q_type;

- INIT_LIST_HEAD(&p->jobs);

- list_add(&p->list, list);

- err = spu_mdesc_walk_arcs(mdesc, dev, node, p, table);

- err = spu_queue_setup(p);

- return spu_map_ino(dev, ip, iname, p, handler);

-static int spu_mdesc_scan(struct mdesc_handle *mdesc, struct platform_device *dev,

- struct spu_mdesc_info *ip, struct list_head *list,

- const char *exec_name, unsigned long q_type,

- irq_handler_t handler, struct spu_queue **table)

- mdesc_for_each_node_by_name(mdesc, node, "exec-unit") {

- type = mdesc_get_property(mdesc, node, "type", NULL);

- if (!type || strcmp(type, exec_name))

- err = handle_exec_unit(ip, list, dev, mdesc, node,

- exec_name, q_type, handler, table);

- spu_list_destroy(list);

-static int get_irq_props(struct mdesc_handle *mdesc, u64 node,

- struct spu_mdesc_info *ip)

- ino = mdesc_get_property(mdesc, node, "ino", &ino_len);

- printk("NO 'ino'\n");

- ip->num_intrs = ino_len / sizeof(u64);

- ip->ino_table = kzalloc((sizeof(struct ino_blob) *

- if (!ip->ino_table)

- for (i = 0; i < ip->num_intrs; i++) {

- struct ino_blob *b = &ip->ino_table[i];

-static int grab_mdesc_irq_props(struct mdesc_handle *mdesc,

- struct platform_device *dev,

- struct spu_mdesc_info *ip,

- const char *node_name)

- if (of_property_read_reg(dev->dev.of_node, 0, &reg, NULL) < 0)

- mdesc_for_each_node_by_name(mdesc, node, "virtual-device") {

- name = mdesc_get_property(mdesc, node, "name", NULL);

- if (!name || strcmp(name, node_name))

- chdl = mdesc_get_property(mdesc, node, "cfg-handle", NULL);

- if (!chdl || (*chdl != reg))

- ip->cfg_handle = *chdl;

- return get_irq_props(mdesc, node, ip);

-static unsigned long n2_spu_hvapi_major;

-static unsigned long n2_spu_hvapi_minor;

-static int n2_spu_hvapi_register(void)

- n2_spu_hvapi_major = 2;

- n2_spu_hvapi_minor = 0;

- err = sun4v_hvapi_register(HV_GRP_NCS,

- n2_spu_hvapi_major,

- &n2_spu_hvapi_minor);

- pr_info("Registered NCS HVAPI version %lu.%lu\n",

- n2_spu_hvapi_major,

- n2_spu_hvapi_minor);

-static void n2_spu_hvapi_unregister(void)

- sun4v_hvapi_unregister(HV_GRP_NCS);

-static int global_ref;

-static int grab_global_resources(void)

- mutex_lock(&spu_lock);

- err = n2_spu_hvapi_register();

- err = queue_cache_init();

- goto out_hvapi_release;

- cpu_to_cwq = kcalloc(NR_CPUS, sizeof(struct spu_queue *),

- goto out_queue_cache_destroy;

- cpu_to_mau = kcalloc(NR_CPUS, sizeof(struct spu_queue *),

- goto out_free_cwq_table;

- mutex_unlock(&spu_lock);

-out_free_cwq_table:

- kfree(cpu_to_cwq);

- cpu_to_cwq = NULL;

-out_queue_cache_destroy:

- queue_cache_destroy();

- n2_spu_hvapi_unregister();

-static void release_global_resources(void)

- mutex_lock(&spu_lock);

- if (!--global_ref) {

- kfree(cpu_to_cwq);

- cpu_to_cwq = NULL;

- kfree(cpu_to_mau);

- cpu_to_mau = NULL;

- queue_cache_destroy();

- n2_spu_hvapi_unregister();

- mutex_unlock(&spu_lock);

-static struct n2_crypto *alloc_n2cp(void)

- struct n2_crypto *np = kzalloc(sizeof(struct n2_crypto), GFP_KERNEL);

- INIT_LIST_HEAD(&np->cwq_list);

-static void free_n2cp(struct n2_crypto *np)

- kfree(np->cwq_info.ino_table);

- np->cwq_info.ino_table = NULL;

-static void n2_spu_driver_version(void)

- static int n2_spu_version_printed;

- if (n2_spu_version_printed++ == 0)

- pr_info("%s", version);

-static int n2_crypto_probe(struct platform_device *dev)

- struct mdesc_handle *mdesc;

- struct n2_crypto *np;

- n2_spu_driver_version();

- pr_info("Found N2CP at %pOF\n", dev->dev.of_node);

- np = alloc_n2cp();

- dev_err(&dev->dev, "%pOF: Unable to allocate n2cp.\n",

- dev->dev.of_node);

- err = grab_global_resources();

- dev_err(&dev->dev, "%pOF: Unable to grab global resources.\n",

- dev->dev.of_node);

- goto out_free_n2cp;

- mdesc = mdesc_grab();

- dev_err(&dev->dev, "%pOF: Unable to grab MDESC.\n",

- dev->dev.of_node);

- goto out_free_global;

- err = grab_mdesc_irq_props(mdesc, dev, &np->cwq_info, "n2cp");

- dev_err(&dev->dev, "%pOF: Unable to grab IRQ props.\n",

- dev->dev.of_node);

- mdesc_release(mdesc);

- goto out_free_global;

- err = spu_mdesc_scan(mdesc, dev, &np->cwq_info, &np->cwq_list,

- "cwq", HV_NCS_QTYPE_CWQ, cwq_intr,

- mdesc_release(mdesc);

- dev_err(&dev->dev, "%pOF: CWQ MDESC scan failed.\n",

- dev->dev.of_node);

- goto out_free_global;

- err = n2_register_algs();

- dev_err(&dev->dev, "%pOF: Unable to register algorithms.\n",

- dev->dev.of_node);

- goto out_free_spu_list;

- dev_set_drvdata(&dev->dev, np);

- spu_list_destroy(&np->cwq_list);

- release_global_resources();

-static void n2_crypto_remove(struct platform_device *dev)

- struct n2_crypto *np = dev_get_drvdata(&dev->dev);

- n2_unregister_algs();

- spu_list_destroy(&np->cwq_list);

- release_global_resources();

-static struct n2_mau *alloc_ncp(void)

- struct n2_mau *mp = kzalloc(sizeof(struct n2_mau), GFP_KERNEL);

- INIT_LIST_HEAD(&mp->mau_list);

-static void free_ncp(struct n2_mau *mp)

- kfree(mp->mau_info.ino_table);

- mp->mau_info.ino_table = NULL;

-static int n2_mau_probe(struct platform_device *dev)

- struct mdesc_handle *mdesc;

- struct n2_mau *mp;

- n2_spu_driver_version();

- pr_info("Found NCP at %pOF\n", dev->dev.of_node);

- dev_err(&dev->dev, "%pOF: Unable to allocate ncp.\n",

- dev->dev.of_node);

- err = grab_global_resources();

- dev_err(&dev->dev, "%pOF: Unable to grab global resources.\n",

- dev->dev.of_node);

- goto out_free_ncp;

- mdesc = mdesc_grab();

- dev_err(&dev->dev, "%pOF: Unable to grab MDESC.\n",

- dev->dev.of_node);

- goto out_free_global;

- err = grab_mdesc_irq_props(mdesc, dev, &mp->mau_info, "ncp");

- dev_err(&dev->dev, "%pOF: Unable to grab IRQ props.\n",

- dev->dev.of_node);

- mdesc_release(mdesc);

- goto out_free_global;

- err = spu_mdesc_scan(mdesc, dev, &mp->mau_info, &mp->mau_list,

- "mau", HV_NCS_QTYPE_MAU, mau_intr,

- mdesc_release(mdesc);

- dev_err(&dev->dev, "%pOF: MAU MDESC scan failed.\n",

- dev->dev.of_node);

- goto out_free_global;

- dev_set_drvdata(&dev->dev, mp);

- release_global_resources();

-static void n2_mau_remove(struct platform_device *dev)

- struct n2_mau *mp = dev_get_drvdata(&dev->dev);

- spu_list_destroy(&mp->mau_list);

- release_global_resources();

-static const struct of_device_id n2_crypto_match[] = {

- .compatible = "SUNW,n2-cwq",

- .compatible = "SUNW,vf-cwq",

- .compatible = "SUNW,kt-cwq",

-MODULE_DEVICE_TABLE(of, n2_crypto_match);

-static struct platform_driver n2_crypto_driver = {

- .of_match_table = n2_crypto_match,

- .probe = n2_crypto_probe,

- .remove_new = n2_crypto_remove,

-static const struct of_device_id n2_mau_match[] = {

- .compatible = "SUNW,n2-mau",

- .compatible = "SUNW,vf-mau",

- .compatible = "SUNW,kt-mau",

-MODULE_DEVICE_TABLE(of, n2_mau_match);

-static struct platform_driver n2_mau_driver = {

- .of_match_table = n2_mau_match,

- .probe = n2_mau_probe,

- .remove_new = n2_mau_remove,

-static struct platform_driver * const drivers[] = {

- &n2_crypto_driver,

-static int __init n2_init(void)

- return platform_register_drivers(drivers, ARRAY_SIZE(drivers));

-static void __exit n2_exit(void)

- platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));

-module_init(n2_init);

-module_exit(n2_exit);

diff --git a/drivers/crypto/n2_core.h b/drivers/crypto/n2_core.h
deleted file mode 100644
index 2406763b0306..000000000000
--- a/drivers/crypto/n2_core.h
+++ /dev/null

-/* SPDX-License-Identifier: GPL-2.0 */

-#ifndef __ASSEMBLY__

-struct spu_mdesc_info {

- struct ino_blob *ino_table;

- struct spu_mdesc_info cwq_info;

- struct list_head cwq_list;

- struct spu_mdesc_info mau_info;

- struct list_head mau_list;

-#define CWQ_ENTRY_SIZE 64

-#define CWQ_NUM_ENTRIES 64

-#define MAU_ENTRY_SIZE 64

-#define MAU_NUM_ENTRIES 64

-struct cwq_initial_entry {

- u64 auth_key_addr;

- u64 final_auth_state_addr;

-struct cwq_ext_entry {

-struct cwq_final_entry {

-#define CONTROL_LEN 0x000000000000ffffULL

-#define CONTROL_LEN_SHIFT 0

-#define CONTROL_HMAC_KEY_LEN 0x0000000000ff0000ULL

-#define CONTROL_HMAC_KEY_LEN_SHIFT 16

-#define CONTROL_ENC_TYPE 0x00000000ff000000ULL

-#define CONTROL_ENC_TYPE_SHIFT 24

-#define ENC_TYPE_ALG_RC4_STREAM 0x00ULL

-#define ENC_TYPE_ALG_RC4_NOSTREAM 0x04ULL

-#define ENC_TYPE_ALG_DES 0x08ULL

-#define ENC_TYPE_ALG_3DES 0x0cULL

-#define ENC_TYPE_ALG_AES128 0x10ULL

-#define ENC_TYPE_ALG_AES192 0x14ULL

-#define ENC_TYPE_ALG_AES256 0x18ULL

-#define ENC_TYPE_ALG_RESERVED 0x1cULL

-#define ENC_TYPE_ALG_MASK 0x1cULL

-#define ENC_TYPE_CHAINING_ECB 0x00ULL

-#define ENC_TYPE_CHAINING_CBC 0x01ULL

-#define ENC_TYPE_CHAINING_CFB 0x02ULL

-#define ENC_TYPE_CHAINING_COUNTER 0x03ULL

-#define ENC_TYPE_CHAINING_MASK 0x03ULL

-#define CONTROL_AUTH_TYPE 0x0000001f00000000ULL

-#define CONTROL_AUTH_TYPE_SHIFT 32

-#define AUTH_TYPE_RESERVED 0x00ULL

-#define AUTH_TYPE_MD5 0x01ULL

-#define AUTH_TYPE_SHA1 0x02ULL

-#define AUTH_TYPE_SHA256 0x03ULL

-#define AUTH_TYPE_CRC32 0x04ULL

-#define AUTH_TYPE_HMAC_MD5 0x05ULL

-#define AUTH_TYPE_HMAC_SHA1 0x06ULL

-#define AUTH_TYPE_HMAC_SHA256 0x07ULL

-#define AUTH_TYPE_TCP_CHECKSUM 0x08ULL

-#define AUTH_TYPE_SSL_HMAC_MD5 0x09ULL

-#define AUTH_TYPE_SSL_HMAC_SHA1 0x0aULL

-#define AUTH_TYPE_SSL_HMAC_SHA256 0x0bULL

-#define CONTROL_STRAND 0x000000e000000000ULL

-#define CONTROL_STRAND_SHIFT 37

-#define CONTROL_HASH_LEN 0x0000ff0000000000ULL

-#define CONTROL_HASH_LEN_SHIFT 40

-#define CONTROL_INTERRUPT 0x0001000000000000ULL

-#define CONTROL_STORE_FINAL_AUTH_STATE 0x0002000000000000ULL

-#define CONTROL_RESERVED 0x001c000000000000ULL

-#define CONTROL_HV_DONE 0x0004000000000000ULL

-#define CONTROL_HV_PROTOCOL_ERROR 0x0008000000000000ULL

-#define CONTROL_HV_HARDWARE_ERROR 0x0010000000000000ULL

-#define CONTROL_END_OF_BLOCK 0x0020000000000000ULL

-#define CONTROL_START_OF_BLOCK 0x0040000000000000ULL

-#define CONTROL_ENCRYPT 0x0080000000000000ULL

-#define CONTROL_OPCODE 0xff00000000000000ULL

-#define CONTROL_OPCODE_SHIFT 56

-#define OPCODE_INPLACE_BIT 0x80ULL

-#define OPCODE_SSL_KEYBLOCK 0x10ULL

-#define OPCODE_COPY 0x20ULL

-#define OPCODE_ENCRYPT 0x40ULL

-#define OPCODE_AUTH_MAC 0x41ULL

-#endif /* !(__ASSEMBLY__) */

-/* NCS v2.0 hypervisor interfaces */

-#define HV_NCS_QTYPE_MAU 0x01

-#define HV_NCS_QTYPE_CWQ 0x02

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_QCONF

- * ARG0: Queue type (HV_NCS_QTYPE_{MAU,CWQ})

- * ARG1: Real address of queue, or handle for unconfigure

- * ARG2: Number of entries in queue, zero for unconfigure

- * RET1: queue handle

- * Configure a queue in the stream processing unit.

- * The real address given as the base must be 64-byte

- * The queue size can range from a minimum of 2 to a maximum

- * of 64. The queue size must be a power of two.

- * To unconfigure a queue, specify a length of zero and place

- * the queue handle into ARG1.

- * On configure success the hypervisor will set the FIRST, HEAD,

- * and TAIL registers to the address of the first entry in the

- * queue. The LAST register will be set to point to the last

- * entry in the queue.

-#define HV_FAST_NCS_QCONF 0x111

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_QINFO

- * ARG0: Queue handle

- * RET1: Queue type (HV_NCS_QTYPE_{MAU,CWQ})

- * RET2: Queue base address

- * RET3: Number of entries

-#define HV_FAST_NCS_QINFO 0x112

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_GETHEAD

- * ARG0: Queue handle

- * RET1: queue head offset

-#define HV_FAST_NCS_GETHEAD 0x113

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_GETTAIL

- * ARG0: Queue handle

- * RET1: queue tail offset

-#define HV_FAST_NCS_GETTAIL 0x114

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_SETTAIL

- * ARG0: Queue handle

- * ARG1: New tail offset

-#define HV_FAST_NCS_SETTAIL 0x115

-/* ncs_qhandle_to_devino()

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_QHANDLE_TO_DEVINO

- * ARG0: Queue handle

-#define HV_FAST_NCS_QHANDLE_TO_DEVINO 0x116

-/* ncs_sethead_marker()

- * TRAP: HV_FAST_TRAP

- * FUNCTION: HV_FAST_NCS_SETHEAD_MARKER

- * ARG0: Queue handle

- * ARG1: New head offset

-#define HV_FAST_NCS_SETHEAD_MARKER 0x117

-#ifndef __ASSEMBLY__

-extern unsigned long sun4v_ncs_qconf(unsigned long queue_type,

- unsigned long queue_ra,

- unsigned long num_entries,

- unsigned long *qhandle);

-extern unsigned long sun4v_ncs_qinfo(unsigned long qhandle,

- unsigned long *queue_type,

- unsigned long *queue_ra,

- unsigned long *num_entries);

-extern unsigned long sun4v_ncs_gethead(unsigned long qhandle,

- unsigned long *head);

-extern unsigned long sun4v_ncs_gettail(unsigned long qhandle,

- unsigned long *tail);

-extern unsigned long sun4v_ncs_settail(unsigned long qhandle,

- unsigned long tail);

-extern unsigned long sun4v_ncs_qhandle_to_devino(unsigned long qhandle,

- unsigned long *devino);

-extern unsigned long sun4v_ncs_sethead_marker(unsigned long qhandle,

- unsigned long head);

-#endif /* !(__ASSEMBLY__) */

-#endif /* _N2_CORE_H */

diff --git a/drivers/crypto/nx/nx-common-pseries.c b/drivers/crypto/nx/nx-common-pseries.c
index 35f2d0d8507e..1660c5cf3641 100644
--- a/drivers/crypto/nx/nx-common-pseries.c
+++ b/drivers/crypto/nx/nx-common-pseries.c

-static DEFINE_SPINLOCK(devdata_mutex);

- spin_lock_irqsave(&devdata_mutex, flags);

- lockdep_is_held(&devdata_mutex));

- spin_unlock_irqrestore(&devdata_mutex, flags);

- spin_lock_irqsave(&devdata_mutex, flags);

- lockdep_is_held(&devdata_mutex));

- spin_unlock_irqrestore(&devdata_mutex, flags);

- spin_lock_irqsave(&devdata_mutex, flags);

- old_devdata = rcu_dereference_check(devdata,

- lockdep_is_held(&devdata_mutex));

- spin_unlock_irqrestore(&devdata_mutex, flags);

- spin_lock_irqsave(&devdata_mutex, flags);

- lockdep_is_held(&devdata_mutex));

- spin_unlock_irqrestore(&devdata_mutex, flags);

diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index bad1adacbc84..551dd32a8db0 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c

-#include <crypto/scatterwalk.h>

- scatterwalk_start(&dd->in_walk, dd->in_sg);

- scatterwalk_start(&dd->out_walk, dd->out_sg);

- BUG_ON(_calc_walked(in) > dd->in_sg->length);

- src = sg_virt(dd->in_sg) + _calc_walked(in);

- scatterwalk_advance(&dd->in_walk, 4);

- if (dd->in_sg->length == _calc_walked(in)) {

- scatterwalk_start(&dd->in_walk,

- src = sg_virt(dd->in_sg) +

- BUG_ON(_calc_walked(out) > dd->out_sg->length);

- dst = sg_virt(dd->out_sg) + _calc_walked(out);

- scatterwalk_advance(&dd->out_walk, 4);

- if (dd->out_sg->length == _calc_walked(out)) {

- scatterwalk_start(&dd->out_walk,

- dst = sg_virt(dd->out_sg) +

- _calc_walked(out);

- .remove_new = omap_aes_remove,

diff --git a/drivers/crypto/omap-aes.h b/drivers/crypto/omap-aes.h
index 0f35c9164764..41d67780fd45 100644
--- a/drivers/crypto/omap-aes.h
+++ b/drivers/crypto/omap-aes.h

-#define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)

- struct scatter_walk in_walk;

- struct scatter_walk out_walk;

diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c
index 209d3dc03a9b..a099460d5f21 100644
--- a/drivers/crypto/omap-des.c
+++ b/drivers/crypto/omap-des.c

-#include <crypto/scatterwalk.h>

-#define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)

- struct scatter_walk in_walk;

- struct scatter_walk out_walk;

- scatterwalk_start(&dd->in_walk, dd->in_sg);

- scatterwalk_start(&dd->out_walk, dd->out_sg);

- BUG_ON(_calc_walked(in) > dd->in_sg->length);

- src = sg_virt(dd->in_sg) + _calc_walked(in);

- scatterwalk_advance(&dd->in_walk, 4);

- if (dd->in_sg->length == _calc_walked(in)) {

- scatterwalk_start(&dd->in_walk,

- src = sg_virt(dd->in_sg) +

- BUG_ON(_calc_walked(out) > dd->out_sg->length);

- dst = sg_virt(dd->out_sg) + _calc_walked(out);

- scatterwalk_advance(&dd->out_walk, 4);

- if (dd->out_sg->length == _calc_walked(out)) {

- scatterwalk_start(&dd->out_walk,

- dst = sg_virt(dd->out_sg) +

- _calc_walked(out);

- .remove_new = omap_des_remove,

diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 5bcd9ab0f72a..7021481bf027 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c

- .remove_new = omap_sham_remove,

diff --git a/drivers/crypto/qce/aead.c b/drivers/crypto/qce/aead.c
index 7d811728f047..97b56e92ea33 100644
--- a/drivers/crypto/qce/aead.c
+++ b/drivers/crypto/qce/aead.c

- alg->base.cra_priority = 300;

diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
index 28b5fd823827..e95e84486d9a 100644
--- a/drivers/crypto/qce/core.c
+++ b/drivers/crypto/qce/core.c

-#include <linux/spinlock.h>

-static void qce_unregister_algs(struct qce_device *qce)

-static int qce_register_algs(struct qce_device *qce)

- int i, ret = -ENODEV;

- unsigned long flags;

- spin_lock_irqsave(&qce->lock, flags);

- ret = crypto_enqueue_request(&qce->queue, req);

- /* busy, do not dequeue request */

- spin_unlock_irqrestore(&qce->lock, flags);

- backlog = crypto_get_backlog(&qce->queue);

- async_req = crypto_dequeue_request(&qce->queue);

- qce->req = async_req;

- spin_unlock_irqrestore(&qce->lock, flags);

- spin_lock_bh(&qce->lock);

- crypto_request_complete(backlog, -EINPROGRESS);

- spin_unlock_bh(&qce->lock);

- tasklet_schedule(&qce->done_tasklet);

-static void qce_tasklet_req_done(unsigned long data)

- struct qce_device *qce = (struct qce_device *)data;

- unsigned long flags;

- spin_lock_irqsave(&qce->lock, flags);

- spin_unlock_irqrestore(&qce->lock, flags);

- tasklet_schedule(&qce->done_tasklet);

- qce->core = devm_clk_get_optional(qce->dev, "core");

- qce->iface = devm_clk_get_optional(qce->dev, "iface");

- qce->bus = devm_clk_get_optional(qce->dev, "bus");

- ret = clk_prepare_enable(qce->core);

- goto err_mem_path_disable;

- ret = clk_prepare_enable(qce->iface);

- goto err_clks_core;

- ret = clk_prepare_enable(qce->bus);

- goto err_clks_iface;

- ret = qce_dma_request(qce->dev, &qce->dma);

- ret = qce_check_version(qce);

- spin_lock_init(&qce->lock);

- tasklet_init(&qce->done_tasklet, qce_tasklet_req_done,

- (unsigned long)qce);

- ret = qce_register_algs(qce);

- qce_dma_release(&qce->dma);

- clk_disable_unprepare(qce->bus);

- clk_disable_unprepare(qce->iface);

- clk_disable_unprepare(qce->core);

-err_mem_path_disable:

- icc_set_bw(qce->mem_path, 0, 0);

-static void qce_crypto_remove(struct platform_device *pdev)

- struct qce_device *qce = platform_get_drvdata(pdev);

- tasklet_kill(&qce->done_tasklet);

- qce_unregister_algs(qce);

- qce_dma_release(&qce->dma);

- clk_disable_unprepare(qce->bus);

- clk_disable_unprepare(qce->iface);

- clk_disable_unprepare(qce->core);

- .remove_new = qce_crypto_remove,

diff --git a/drivers/crypto/qce/core.h b/drivers/crypto/qce/core.h
index 228fcd69ec51..eb6fa7a8b64a 100644
--- a/drivers/crypto/qce/core.h
+++ b/drivers/crypto/qce/core.h

- * @done_tasklet: done tasklet object

- struct tasklet_struct done_tasklet;

diff --git a/drivers/crypto/qce/dma.c b/drivers/crypto/qce/dma.c
index 46db5bf366b4..1dec7aea852d 100644
--- a/drivers/crypto/qce/dma.c
+++ b/drivers/crypto/qce/dma.c

-int qce_dma_request(struct device *dev, struct qce_dma_data *dma)

-void qce_dma_release(struct qce_dma_data *dma)

- dma_release_channel(dma->txchan);

- dma_release_channel(dma->rxchan);

- kfree(dma->result_buf);

diff --git a/drivers/crypto/qce/dma.h b/drivers/crypto/qce/dma.h
index 786402169360..31629185000e 100644
--- a/drivers/crypto/qce/dma.h
+++ b/drivers/crypto/qce/dma.h

-int qce_dma_request(struct device *dev, struct qce_dma_data *dma);

-void qce_dma_release(struct qce_dma_data *dma);

diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c
index fc72af8aa9a7..71b748183cfa 100644
--- a/drivers/crypto/qce/sha.c
+++ b/drivers/crypto/qce/sha.c

- base->cra_priority = 300;

diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c
index 5b493fdc1e74..ffb334eb5b34 100644
--- a/drivers/crypto/qce/skcipher.c
+++ b/drivers/crypto/qce/skcipher.c

- alg->base.cra_priority = 300;

diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c
index 09419e79e34c..0685ba122e8a 100644
--- a/drivers/crypto/qcom-rng.c
+++ b/drivers/crypto/qcom-rng.c

- .remove_new = qcom_rng_remove,

diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c
index f74b3c81ba6d..b77bdce8e7fc 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c

- .remove_new = rk_crypto_remove,

diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index 8b6e3f5c94de..57ab237e899e 100644
--- a/drivers/crypto/s5p-sss.c
+++ b/drivers/crypto/s5p-sss.c

- .remove_new = s5p_aes_remove,

diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c
index 461eca40e878..091612b066f1 100644
--- a/drivers/crypto/sa2ul.c
+++ b/drivers/crypto/sa2ul.c

- /* Iniialize the command update structure */

- .remove_new = sa_ul_remove,

diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.c
index 96d4af5d48a6..533080b0cddc 100644
--- a/drivers/crypto/sahara.c
+++ b/drivers/crypto/sahara.c

- .remove_new = sahara_remove,

diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c
index e4dfed7ee0b0..42114e9364f0 100644
--- a/drivers/crypto/starfive/jh7110-cryp.c
+++ b/drivers/crypto/starfive/jh7110-cryp.c

- goto err_algs_aes;

- crypto_engine_stop(cryp->engine);

- .remove_new = starfive_cryp_remove,

diff --git a/drivers/crypto/starfive/jh7110-rsa.c b/drivers/crypto/starfive/jh7110-rsa.c
index a778c4846025..d109c743f076 100644
--- a/drivers/crypto/starfive/jh7110-rsa.c
+++ b/drivers/crypto/starfive/jh7110-rsa.c

- .sign = starfive_rsa_dec,

- .verify = starfive_rsa_enc,

diff --git a/drivers/crypto/stm32/stm32-crc32.c b/drivers/crypto/stm32/stm32-crc32.c
index e0faddbf8990..de4d0402f133 100644
--- a/drivers/crypto/stm32/stm32-crc32.c
+++ b/drivers/crypto/stm32/stm32-crc32.c

- .remove_new = stm32_crc_remove,

diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c
index 937f6dab8955..14c6339c2e43 100644
--- a/drivers/crypto/stm32/stm32-cryp.c
+++ b/drivers/crypto/stm32/stm32-cryp.c

- .remove_new = stm32_cryp_remove,

diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c
index 351827372ea6..768b27de4737 100644
--- a/drivers/crypto/stm32/stm32-hash.c
+++ b/drivers/crypto/stm32/stm32-hash.c

- .remove_new = stm32_hash_remove,

diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 511ddcb0efd4..e8c0db687c57 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c

- .remove_new = talitos_remove,

diff --git a/drivers/crypto/tegra/tegra-se-aes.c b/drivers/crypto/tegra/tegra-se-aes.c
index ae7a0f8435fc..d734c9a56786 100644
--- a/drivers/crypto/tegra/tegra-se-aes.c
+++ b/drivers/crypto/tegra/tegra-se-aes.c

- tegra_cmac_init(req);

- rctx->task |= SHA_UPDATE | SHA_FINAL;

diff --git a/drivers/crypto/tegra/tegra-se-hash.c b/drivers/crypto/tegra/tegra-se-hash.c
index 4d4bd727f498..0b5cdd5676b1 100644
--- a/drivers/crypto/tegra/tegra-se-hash.c
+++ b/drivers/crypto/tegra/tegra-se-hash.c

- tegra_sha_init(req);

- rctx->task |= SHA_UPDATE | SHA_FINAL;

diff --git a/drivers/crypto/tegra/tegra-se-main.c b/drivers/crypto/tegra/tegra-se-main.c
index f94c0331b148..918c0b10614d 100644
--- a/drivers/crypto/tegra/tegra-se-main.c
+++ b/drivers/crypto/tegra/tegra-se-main.c

- crypto_engine_stop(se->engine);

- .remove_new = tegra_se_remove,

diff --git a/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c b/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c
index cb92b7fa99c6..48fee07b7e51 100644
--- a/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c
+++ b/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c

- case VIRTIO_CRYPTO_KEY_REJECTED:

- error = -EKEYREJECTED;

- if (vc_akcipher_req->opcode != VIRTIO_CRYPTO_AKCIPHER_VERIFY) {

- /* actuall length maybe less than dst buffer */

- akcipher_req->dst_len = len - sizeof(vc_req->status);

- sg_copy_from_buffer(akcipher_req->dst, sg_nents(akcipher_req->dst),

- vc_akcipher_req->dst_buf, akcipher_req->dst_len);

- bool verify = vc_akcipher_req->opcode == VIRTIO_CRYPTO_AKCIPHER_VERIFY;

- unsigned int src_len = verify ? req->src_len + req->dst_len : req->src_len;

- src_buf = kcalloc_node(src_len, 1, GFP_KERNEL, node);

- /* for verify operation, both src and dst data work as OUT direction */

- sg_copy_to_buffer(req->src, sg_nents(req->src), src_buf, src_len);

- sg_init_one(&srcdata_sg, src_buf, src_len);

- sgs[num_out++] = &srcdata_sg;

- sg_copy_to_buffer(req->src, sg_nents(req->src), src_buf, src_len);

- sg_init_one(&srcdata_sg, src_buf, src_len);

- sgs[num_out++] = &srcdata_sg;

- dst_buf = kcalloc_node(req->dst_len, 1, GFP_KERNEL, node);

- sg_init_one(&dstdata_sg, dst_buf, req->dst_len);

- sgs[num_out + num_in++] = &dstdata_sg;

-static int virtio_crypto_rsa_sign(struct akcipher_request *req)

- return virtio_crypto_rsa_req(req, VIRTIO_CRYPTO_AKCIPHER_SIGN);

-static int virtio_crypto_rsa_verify(struct akcipher_request *req)

- return virtio_crypto_rsa_req(req, VIRTIO_CRYPTO_AKCIPHER_VERIFY);

- .sign = virtio_crypto_rsa_sign,

- .verify = virtio_crypto_rsa_verify,

- .cra_name = "pkcs1pad(rsa,sha1)",

- .cra_driver_name = "virtio-pkcs1-rsa-with-sha1",

diff --git a/drivers/crypto/xilinx/zynqmp-aes-gcm.c b/drivers/crypto/xilinx/zynqmp-aes-gcm.c
index 7f0ec6887a39..6e72d9229410 100644
--- a/drivers/crypto/xilinx/zynqmp-aes-gcm.c
+++ b/drivers/crypto/xilinx/zynqmp-aes-gcm.c

- .remove_new = zynqmp_aes_aead_remove,

diff --git a/drivers/crypto/xilinx/zynqmp-sha.c b/drivers/crypto/xilinx/zynqmp-sha.c
index 1bcec6f46c9c..580649f9bff8 100644
--- a/drivers/crypto/xilinx/zynqmp-sha.c
+++ b/drivers/crypto/xilinx/zynqmp-sha.c

- .remove_new = zynqmp_sha_remove,

diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
index 29c192f20082..876469e23f7a 100644
--- a/drivers/cxl/Kconfig
+++ b/drivers/cxl/Kconfig

diff --git a/drivers/cxl/Makefile b/drivers/cxl/Makefile
index db321f48ba52..2caa90fa4bf2 100644
--- a/drivers/cxl/Makefile
+++ b/drivers/cxl/Makefile

-obj-$(CONFIG_CXL_PCI) += cxl_pci.o

-obj-$(CONFIG_CXL_MEM) += cxl_mem.o

-obj-$(CONFIG_CXL_PORT) += cxl_port.o

-cxl_port-y := port.o

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index 82b78e331d8e..cb14829bb9be 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c

-MODULE_IMPORT_NS(CXL);

-MODULE_IMPORT_NS(ACPI);

diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
index ef1621d40f05..8153f8d83a16 100644
--- a/drivers/cxl/core/cdat.c
+++ b/drivers/cxl/core/cdat.c

- "DSMAS: dpa: %#llx qos: %d read_bw: %d write_bw %d read_lat: %d write_lat: %d\n",

- dent->dpa_range.start, dpa_perf->qos_class,

- dev_dbg(dev, "no partition for dsmas dpa: %#llx\n",

- dent->dpa_range.start);

-EXPORT_SYMBOL_NS_GPL(cxl_endpoint_parse_cdat, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_switch_parse_cdat, CXL);

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
index 0c62b4069ba0..800466f96a68 100644
--- a/drivers/cxl/core/core.h
+++ b/drivers/cxl/core/core.h

diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index 3df10517a327..50e6a45b30ba 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_passthrough_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_hdm, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_dpa_debug, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_dpa_reserve, CXL);

- down_write(&cxl_dpa_rwsem);

- if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) {

- up_write(&cxl_dpa_rwsem);

-static int cxl_decoder_reset(struct cxl_decoder *cxld)

- if (port->commit_end != id) {

- port->commit_end--;

-EXPORT_SYMBOL_NS_GPL(devm_cxl_enumerate_decoders, CXL);

diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
index 5175138c4fb7..548564c770c0 100644
--- a/drivers/cxl/core/mbox.c
+++ b/drivers/cxl/core/mbox.c

-EXPORT_SYMBOL_NS_GPL(cxl_internal_send_cmd, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_enumerate_cmds, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_event_trace_record, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_mem_get_event_records, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_dev_state_identify, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_mem_create_range_info, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_set_timestamp, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_mem_get_poison, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_poison_state_init, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_mailbox_init, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_memdev_state_create, CXL);

diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
index 84fefb76dafa..ae3dfcbe8938 100644
--- a/drivers/cxl/core/memdev.c
+++ b/drivers/cxl/core/memdev.c

-EXPORT_SYMBOL_NS_GPL(cxl_trigger_poison_list, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_inject_poison, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_clear_poison, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_memdev_update_perf, CXL);

-EXPORT_SYMBOL_NS_GPL(is_cxl_memdev, CXL);

-EXPORT_SYMBOL_NS_GPL(set_exclusive_cxl_commands, CXL);

-EXPORT_SYMBOL_NS_GPL(clear_exclusive_cxl_commands, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_fw_upload, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_memdev, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_sanitize_setup_notifier, CXL);

diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 5b46bc46aaa9..013b869b66cb 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c

-EXPORT_SYMBOL_NS_GPL(devm_cxl_port_enumerate_dports, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_await_media_ready, CXL);

-static int dvsec_range_allowed(struct device *dev, void *arg)

- struct range *dev_range = arg;

-int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,

- struct pci_dev *pdev = to_pci_dev(dev);

- struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);

-EXPORT_SYMBOL_NS_GPL(cxl_dvsec_rr_decode, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, CXL);

-EXPORT_SYMBOL_NS_GPL(read_cdat_data, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_dport_init_ras_reporting, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_cor_error_detected, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_error_detected, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_endpoint_decoder_reset_detected, CXL);

diff --git a/drivers/cxl/core/pmem.c b/drivers/cxl/core/pmem.c
index c00f3a933164..8853415c106a 100644
--- a/drivers/cxl/core/pmem.c
+++ b/drivers/cxl/core/pmem.c

-EXPORT_SYMBOL_NS_GPL(to_cxl_nvdimm_bridge, CXL);

-bool is_cxl_nvdimm_bridge(struct device *dev)

- return dev->type == &cxl_nvdimm_bridge_type;

-EXPORT_SYMBOL_NS_GPL(is_cxl_nvdimm_bridge, CXL);

-static int match_nvdimm_bridge(struct device *dev, void *data)

- return is_cxl_nvdimm_bridge(dev);

- dev = device_find_child(&cxl_root->port.dev, NULL, match_nvdimm_bridge);

-EXPORT_SYMBOL_NS_GPL(cxl_find_nvdimm_bridge, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_nvdimm_bridge, CXL);

-EXPORT_SYMBOL_NS_GPL(is_cxl_nvdimm, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_nvdimm, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_nvdimm, CXL);

diff --git a/drivers/cxl/core/pmu.c b/drivers/cxl/core/pmu.c
index 5d8e06b0ba6e..b3136d7664ab 100644
--- a/drivers/cxl/core/pmu.c
+++ b/drivers/cxl/core/pmu.c

-EXPORT_SYMBOL_NS_GPL(devm_cxl_pmu_add, CXL);

diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
index e666ec6a9085..78a5c2c25982 100644
--- a/drivers/cxl/core/port.c
+++ b/drivers/cxl/core/port.c

-EXPORT_SYMBOL_NS_GPL(to_cxl_root_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(is_endpoint_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(is_root_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(is_switch_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_endpoint_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_switch_decoder, CXL);

-EXPORT_SYMBOL_NS_GPL(is_cxl_port, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_port, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_port, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_root, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_port_to_pci_bus, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_register_pci_bus, CXL);

-EXPORT_SYMBOL_NS_GPL(find_cxl_root, CXL);

-EXPORT_SYMBOL_NS_GPL(put_cxl_root, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_dport, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_add_rch_dport, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_endpoint_autoremove, CXL);

-EXPORT_SYMBOL_NS_GPL(devm_cxl_enumerate_ports, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_pci_find_port, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_mem_find_port, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_root_decoder_alloc, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_switch_decoder_alloc, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_endpoint_decoder_alloc, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_decoder_add_locked, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_decoder_add, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_decoder_autoremove, CXL);

-EXPORT_SYMBOL_NS_GPL(__cxl_driver_register, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_driver_unregister, CXL);

-static void cxl_bus_rescan_queue(struct work_struct *w)

- int rc = bus_rescan_devices(&cxl_bus_type);

- pr_debug("CXL bus rescan result: %d\n", rc);

-EXPORT_SYMBOL_NS_GPL(cxl_bus_rescan, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_bus_drain, CXL);

-EXPORT_SYMBOL_NS_GPL(schedule_cxl_memdev_detach, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_endpoint_get_perf_coordinates, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_bus_type, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_debugfs_create_dir, CXL);

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index e701e4b04032..e8d11a988fd9 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c

- dev_err(&cxlr->dev,

- "Failed to synchronize CPU cache state\n");

-static int cxl_region_decode_reset(struct cxl_region *cxlr, int count)

- * Before region teardown attempt to flush, and if the flush

- * fails cancel the region teardown for data consistency

- rc = cxl_region_invalidate_memregion(cxlr);

- rc = cxld->reset(cxld);

- rc = cxled->cxld.reset(&cxled->cxld);

- rc = cxl_region_decode_reset(cxlr, p->interleave_ways);

- * Revert to committed since there may still be active

- * decoders associated with this region, or move forward

- * to active to mark the reset successful

- p->state = CXL_CONFIG_COMMIT;

- p->state = CXL_CONFIG_ACTIVE;

-static int match_free_decoder(struct device *dev, void *data)

- /* enforce ordered allocation */

- if (cxld->id != *id)

- if (!cxld->region)

-static int match_auto_decoder(struct device *dev, void *data)

- struct cxl_region_params *p = data;

- dev = device_find_child(&port->dev, &id, match_free_decoder);

- * Passthrough decoders impose no distance requirements between

- if (cxl_rr->nr_targets == 1)

- distance = p->nr_targets / cxl_rr->nr_targets;

-static int match_switch_decoder_by_range(struct device *dev, void *data)

- struct range *r1, *r2 = data;

- * TODO: tear down all impacted regions if a device is

- * removed out of order

- rc = cxl_region_decode_reset(cxlr, p->interleave_ways);

-EXPORT_SYMBOL_NS_GPL(is_cxl_region, CXL);

-static ssize_t create_pmem_region_store(struct device *dev,

- struct device_attribute *attr,

- const char *buf, size_t len)

- cxlr = __create_region(cxlrd, CXL_DECODER_PMEM, id);

- struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);

- struct cxl_region *cxlr;

- rc = sscanf(buf, "region%d\n", &id);

- cxlr = __create_region(cxlrd, CXL_DECODER_RAM, id);

- return PTR_ERR(cxlr);

-EXPORT_SYMBOL_NS_GPL(is_cxl_pmem_region, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, CXL);

-EXPORT_SYMBOL_NS_GPL(to_cxl_dax_region, CXL);

-static int match_root_decoder_by_range(struct device *dev, void *data)

- struct range *r1, *r2 = data;

-static int match_region_by_range(struct device *dev, void *data)

- struct range *r = data;

-EXPORT_SYMBOL_NS_GPL(cxl_add_to_region, CXL);

-MODULE_IMPORT_NS(CXL);

-MODULE_IMPORT_NS(DEVMEM);

diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c
index e1082e749c69..117c2e94c761 100644
--- a/drivers/cxl/core/regs.c
+++ b/drivers/cxl/core/regs.c

-EXPORT_SYMBOL_NS_GPL(cxl_probe_component_regs, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_probe_device_regs, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_map_component_regs, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_map_device_regs, CXL);

- * cxl_find_regblock_instance() - Locate a register block by type / index

- * @pdev: The CXL PCI device to enumerate.

- * @type: Register Block Indicator id

- * @map: Enumeration output, clobbered on error

- * @index: Index into which particular instance of a regblock wanted in the

- * order found in register locator DVSEC.

- * Return: 0 if register block enumerated, negative error code otherwise

- * A CXL DVSEC may point to one or more register blocks, search for them

- * by @type and @index.

-int cxl_find_regblock_instance(struct pci_dev *pdev, enum cxl_regloc_type type,

- struct cxl_register_map *map, int index)

-EXPORT_SYMBOL_NS_GPL(cxl_find_regblock_instance, CXL);

- return cxl_find_regblock_instance(pdev, type, map, 0);

-EXPORT_SYMBOL_NS_GPL(cxl_find_regblock, CXL);

- * Return: count of matching regblocks.

- int rc, count = 0;

- rc = cxl_find_regblock_instance(pdev, type, &map, count);

-EXPORT_SYMBOL_NS_GPL(cxl_count_regblock, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_map_pmu_regs, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_setup_regs, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_rcd_component_reg_phys, CXL);

diff --git a/drivers/cxl/core/suspend.c b/drivers/cxl/core/suspend.c
index a5984d96ea1d..29aa5cc5e565 100644
--- a/drivers/cxl/core/suspend.c
+++ b/drivers/cxl/core/suspend.c

-EXPORT_SYMBOL_NS_GPL(cxl_mem_active_inc, CXL);

-EXPORT_SYMBOL_NS_GPL(cxl_mem_active_dec, CXL);

diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index 8672b42ee4d1..cea706b683b5 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h

- { CXL_EVENT_RECORD_FLAG_HW_REPLACE, "HARDWARE_REPLACEMENT_NEEDED" } \

- __field(u8, hdr_maint_op_class)

- __entry->hdr_maint_op_class = (hdr).maint_op_class

- "maint_op_class=%u : " fmt, \

- * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43

-#define show_mem_event_type(type) __print_symbolic(type, \

- { CXL_GMER_MEM_EVT_TYPE_ECC_ERROR, "ECC Error" }, \

- { CXL_GMER_MEM_EVT_TYPE_INV_ADDR, "Invalid Address" }, \

- { CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, "Data Path Error" } \

- { CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT, "Internal Media Management" } \

- { CXL_GMER_VALID_COMPONENT, "COMPONENT" } \

- "descriptor='%s' type='%s' transaction_type='%s' channel=%u rank=%u " \

- "device=%x comp_id=%s validity_flags='%s' " \

- "hpa=%llx region=%s region_uuid=%pUb",

- show_mem_event_type(__entry->type),

- __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),

- __entry->hpa, __get_str(region_name), &__entry->region_uuid

- * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44

-#define show_dram_valid_flags(flags) __print_flags(flags, "|", \

- { CXL_DER_VALID_CHANNEL, "CHANNEL" }, \

- { CXL_DER_VALID_RANK, "RANK" }, \

- { CXL_DER_VALID_NIBBLE, "NIBBLE" }, \

- { CXL_DER_VALID_BANK_GROUP, "BANK GROUP" }, \

- { CXL_DER_VALID_BANK, "BANK" }, \

- { CXL_DER_VALID_ROW, "ROW" }, \

- { CXL_DER_VALID_COLUMN, "COLUMN" }, \

- { CXL_DER_VALID_CORRECTION_MASK, "CORRECTION MASK" } \

- CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' descriptor='%s' type='%s' " \

- "hpa=%llx region=%s region_uuid=%pUb",

- show_mem_event_type(__entry->type),

- __entry->hpa, __get_str(region_name), &__entry->region_uuid

- * CXL res 3.0 section 8.2.9.2.1.3; Table 8-45

- { CXL_MMER_LSA_ERROR, "LSA Error" } \

- * CXL res 3.0 section 8.2.9.8.3.1; Table 8-100

- { CXL_DHI_HS_HW_REPLACEMENT_NEEDED, "REPLACEMENT_NEEDED" } \

- CXL_EVT_TP_printk("event_type='%s' health_status='%s' media_status='%s' " \

- "as_life_used=%s as_dev_temp=%s as_cor_vol_err_cnt=%s " \

- "dirty_shutdown_cnt=%u cor_vol_err_cnt=%u cor_per_err_cnt=%u",

- __entry->cor_per_err_cnt

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 0d8b810a51f0..bbbaa0d0a670 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h

- struct cxl_register_map *map, int index);

- int (*reset)(struct cxl_decoder *cxld);

-int cxl_dvsec_rr_decode(struct device *dev, struct cxl_port *port,

-bool is_cxl_nvdimm_bridge(struct device *dev);

diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
index a9fd5cd5a0d2..2f03a4d5606e 100644
--- a/drivers/cxl/mem.c
+++ b/drivers/cxl/mem.c

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 188412d45e0d..a96e54c6259e 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c

- struct cxl_register_map *map)

- struct cxl_dport *dport;

- if (rc && type == CXL_REGLOC_RBI_COMPONENT && is_cxl_restricted(pdev))

- rc = cxl_rcrb_get_comp_regs(pdev, map);

- rc = cxl_mem_alloc_event_buf(mds);

- int i, rc, pmu_count;

- rc = cxl_pci_ras_unmask(pdev);

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c
index d2d43a4fc053..f9c95996e937 100644
--- a/drivers/cxl/pmem.c
+++ b/drivers/cxl/pmem.c

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
index 861dde65768f..d2bfd1ff5492 100644
--- a/drivers/cxl/port.c
+++ b/drivers/cxl/port.c

- rc = cxl_dvsec_rr_decode(cxlds->dev, port, &info);

- struct bin_attribute *attr, int i)

-module_cxl_driver(cxl_port_driver);

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/dax/cxl.c b/drivers/dax/cxl.c
index 9b29e732b39a..13cd94d32ff7 100644
--- a/drivers/dax/cxl.c
+++ b/drivers/dax/cxl.c

-MODULE_IMPORT_NS(CXL);

diff --git a/drivers/dax/dax-private.h b/drivers/dax/dax-private.h
index 446617b73aea..0867115aeef2 100644
--- a/drivers/dax/dax-private.h
+++ b/drivers/dax/dax-private.h

- * @ranges: resource-span + pgoff tuples for the instance

- struct dev_dax_range {

- unsigned long pgoff;

- struct range range;

- struct dax_mapping *mapping;

diff --git a/drivers/dax/device.c b/drivers/dax/device.c
index 9c1a729cd77e..6d74e62bbee0 100644
--- a/drivers/dax/device.c
+++ b/drivers/dax/device.c

- ALIGN(vmf->address, fault_size));

diff --git a/drivers/dax/pmem/Makefile b/drivers/dax/pmem/Makefile
deleted file mode 100644
index 191c31f0d4f0..000000000000
--- a/drivers/dax/pmem/Makefile
+++ /dev/null

-# SPDX-License-Identifier: GPL-2.0-only

-obj-$(CONFIG_DEV_DAX_PMEM) += dax_pmem.o

-obj-$(CONFIG_DEV_DAX_PMEM) += dax_pmem_core.o

-dax_pmem-y := pmem.o

-dax_pmem_core-y := core.o

-dax_pmem_compat-y := compat.o

diff --git a/drivers/dax/pmem/pmem.c b/drivers/dax/pmem/pmem.c
deleted file mode 100644
index dfe91a2990fe..000000000000
--- a/drivers/dax/pmem/pmem.c
+++ /dev/null

-// SPDX-License-Identifier: GPL-2.0

-#include <linux/percpu-refcount.h>

-#include <linux/memremap.h>

-#include <linux/module.h>

-#include <linux/pfn_t.h>

-#include <linux/nd.h>

-#include "../bus.h"

diff --git a/drivers/devfreq/devfreq-event.c b/drivers/devfreq/devfreq-event.c
index 3ebac2496679..70219099c604 100644
--- a/drivers/devfreq/devfreq-event.c
+++ b/drivers/devfreq/devfreq-event.c

- of_node_put(node);

- return ERR_PTR(-ENODEV);

diff --git a/drivers/devfreq/event/exynos-nocp.c b/drivers/devfreq/event/exynos-nocp.c
index 5edc522f715c..6a3efd782ad0 100644
--- a/drivers/devfreq/event/exynos-nocp.c
+++ b/drivers/devfreq/event/exynos-nocp.c

- .remove_new = exynos_nocp_remove,

diff --git a/drivers/devfreq/event/exynos-ppmu.c b/drivers/devfreq/event/exynos-ppmu.c
index 7002df20a49e..88cd4dfe87e1 100644
--- a/drivers/devfreq/event/exynos-ppmu.c
+++ b/drivers/devfreq/event/exynos-ppmu.c

- .remove_new = exynos_ppmu_remove,

diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 7d06c476d8e9..b9ea7ad2e51b 100644
--- a/drivers/devfreq/exynos-bus.c
+++ b/drivers/devfreq/exynos-bus.c

-static int exynos_bus_parse_of(struct device_node *np,

- struct exynos_bus *bus)

- ret = exynos_bus_parse_of(np, bus);

diff --git a/drivers/devfreq/mtk-cci-devfreq.c b/drivers/devfreq/mtk-cci-devfreq.c
index 7ad5225b0381..22fe9e631f8a 100644
--- a/drivers/devfreq/mtk-cci-devfreq.c
+++ b/drivers/devfreq/mtk-cci-devfreq.c

- .remove_new = mtk_ccifreq_remove,

diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
index d405cee92c25..dbdce7636ca5 100644
--- a/drivers/devfreq/rk3399_dmc.c
+++ b/drivers/devfreq/rk3399_dmc.c

- .remove_new = rk3399_dmcfreq_remove,

diff --git a/drivers/devfreq/sun8i-a33-mbus.c b/drivers/devfreq/sun8i-a33-mbus.c
index bcf654f4ff96..7c6ae91ede1f 100644
--- a/drivers/devfreq/sun8i-a33-mbus.c
+++ b/drivers/devfreq/sun8i-a33-mbus.c

- .remove_new = sun8i_a33_mbus_remove,

diff --git a/drivers/dma-buf/Kconfig b/drivers/dma-buf/Kconfig
index b46eb8a552d7..fee04fdb0822 100644
--- a/drivers/dma-buf/Kconfig
+++ b/drivers/dma-buf/Kconfig

diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 8892bc701a66..5baa83b85515 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c

-static void __dma_buf_debugfs_list_del(struct file *file)

- but also allow SEEK_SET to maintain the idiomatic

- SEEK_END(0), SEEK_CUR(0) pattern */

- inode->i_ino = atomic64_add_return(1, &dmabuf_inode);

-EXPORT_SYMBOL_NS_GPL(dma_buf_export, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_fd, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_get, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_put, DMA_BUF);

- * before passing the sgt back to the exporter. */

-static struct sg_table * __map_dma_buf(struct dma_buf_attachment *attach,

-EXPORT_SYMBOL_NS_GPL(dma_buf_dynamic_attach, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_attach, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_detach, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_pin, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_unpin, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_map_attachment, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_map_attachment_unlocked, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_unmap_attachment, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_unmap_attachment_unlocked, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_move_notify, DMA_BUF);

- * void \*dma_buf_vmap(struct dma_buf \*dmabuf, struct iosys_map \*map)

- * void dma_buf_vunmap(struct dma_buf \*dmabuf, struct iosys_map \*map)

- * int dma_buf_mmap(struct dma_buf \*, struct vm_area_struct \*,

-EXPORT_SYMBOL_NS_GPL(dma_buf_begin_cpu_access, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_end_cpu_access, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_mmap, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_vmap, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_vmap_unlocked, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_vunmap, DMA_BUF);

-EXPORT_SYMBOL_NS_GPL(dma_buf_vunmap_unlocked, DMA_BUF);

- d = debugfs_create_file("bufinfo", S_IRUGO, dma_buf_debugfs_dir,

diff --git a/drivers/dma-buf/dma-fence-array.c b/drivers/dma-buf/dma-fence-array.c
index 8a08ffde31e7..6657d4b30af9 100644
--- a/drivers/dma-buf/dma-fence-array.c
+++ b/drivers/dma-buf/dma-fence-array.c

- if (atomic_read(&array->num_pending) > 0)

diff --git a/drivers/dma-buf/dma-fence-unwrap.c b/drivers/dma-buf/dma-fence-unwrap.c
index 628af51c81af..6345062731f1 100644
--- a/drivers/dma-buf/dma-fence-unwrap.c
+++ b/drivers/dma-buf/dma-fence-unwrap.c

- * This trashes the input fence array and uses it as position for the

- * following merge loop. This works because the dma_fence_merge()

- * wrapper macro is creating this temporary array on the stack together

- * with the iterators.

- for (i = 0; i < num_fences; ++i)

- fences[i] = dma_fence_unwrap_first(fences[i], &iter[i]);

- for (i = 0; i < num_fences; ++i) {

- struct dma_fence *next;

- while (fences[i] && dma_fence_is_signaled(fences[i]))

- fences[i] = dma_fence_unwrap_next(&iter[i]);

- * We can't guarantee that inpute fences are ordered by

- * context, but it is still quite likely when this

- * function is used multiple times. So attempt to order

- * the fences by context as we pass over them and merge

- * fences with the same context.

- if (!tmp || tmp->context > next->context) {

- } else if (tmp->context < next->context) {

- } else if (dma_fence_is_later(tmp, next)) {

- fences[i] = dma_fence_unwrap_next(&iter[i]);

- fences[sel] = dma_fence_unwrap_next(&iter[sel]);

- array[count++] = dma_fence_get(tmp);

- fences[sel] = dma_fence_unwrap_next(&iter[sel]);

- tmp = dma_fence_allocate_private_stub(ktime_get());

- result = dma_fence_array_create(count, array,

- dma_fence_context_alloc(1),

- return &result->base;

diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index 0393a9bba3a8..f0cdd3e99d36 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c

- /* ... and non-recursive readlock */

- lock_acquire(&dma_fence_lockdep_map, 0, 0, 1, 1, NULL, _RET_IP_);

- lock_acquire(&dma_fence_lockdep_map, 0, 0, 1, 1, NULL, _THIS_IP_);

diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c
index 93be88b805fe..9512d050563a 100644
--- a/drivers/dma-buf/heaps/cma_heap.c
+++ b/drivers/dma-buf/heaps/cma_heap.c

- void *vaddr = kmap_atomic(page);

- kunmap_atomic(vaddr);

- * has been killed by by SIGKILL

-static int __add_cma_heap(struct cma *cma, void *data)

-static int add_default_cma_heap(void)

diff --git a/drivers/dma-buf/heaps/system_heap.c b/drivers/dma-buf/heaps/system_heap.c
index d78cdb9d01e5..26d5dc89ea16 100644
--- a/drivers/dma-buf/heaps/system_heap.c
+++ b/drivers/dma-buf/heaps/system_heap.c

-static int system_heap_create(void)

diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.c
index c353029789cf..f5905d67dedb 100644
--- a/drivers/dma-buf/sw_sync.c
+++ b/drivers/dma-buf/sw_sync.c

-static bool timeline_fence_enable_signaling(struct dma_fence *fence)

- .enable_signaling = timeline_fence_enable_signaling,

diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dma-buf/udmabuf.c
index 047c3cd2ceff..cc7398cc17d6 100644
--- a/drivers/dma-buf/udmabuf.c
+++ b/drivers/dma-buf/udmabuf.c

- struct list_head unpin_list;

-struct udmabuf_folio {

- struct folio *folio;

- struct list_head list;

- unsigned long pfn;

- return vmf_insert_pfn(vma, vmf->address, pfn);

- struct page **pages;

- pages = kmalloc_array(ubuf->pagecount, sizeof(*pages), GFP_KERNEL);

- for (pg = 0; pg < ubuf->pagecount; pg++)

- pages[pg] = &ubuf->folios[pg]->page;

- vaddr = vm_map_ram(pages, ubuf->pagecount, -1);

-static void unpin_all_folios(struct list_head *unpin_list)

- struct udmabuf_folio *ubuf_folio;

- while (!list_empty(unpin_list)) {

- ubuf_folio = list_first_entry(unpin_list,

- struct udmabuf_folio, list);

- unpin_folio(ubuf_folio->folio);

- list_del(&ubuf_folio->list);

- kfree(ubuf_folio);

-static int add_to_unpin_list(struct list_head *unpin_list,

- struct folio *folio)

- struct udmabuf_folio *ubuf_folio;

- ubuf_folio = kzalloc(sizeof(*ubuf_folio), GFP_KERNEL);

- ubuf_folio->folio = folio;

- list_add_tail(&ubuf_folio->list, unpin_list);

- unpin_all_folios(&ubuf->unpin_list);

- kfree(ubuf->offsets);

- kfree(ubuf->folios);

-#define SEALS_DENIED (F_SEAL_WRITE)

-static int export_udmabuf(struct udmabuf *ubuf,

- struct miscdevice *device,

- struct dma_buf *buf;

- buf = dma_buf_export(&exp_info);

- return PTR_ERR(buf);

- return dma_buf_fd(buf, flags);

- pgoff_t pgoff, pgcnt, pglimit, pgbuf = 0;

- long nr_folios, ret = -EINVAL;

- struct file *memfd = NULL;

- struct folio **folios;

- u32 i, j, k, flags;

- INIT_LIST_HEAD(&ubuf->unpin_list);

- if (!IS_ALIGNED(list[i].offset, PAGE_SIZE))

- if (!IS_ALIGNED(list[i].size, PAGE_SIZE))

- ubuf->pagecount += list[i].size >> PAGE_SHIFT;

- if (ubuf->pagecount > pglimit)

- if (!ubuf->pagecount)

- ubuf->folios = kmalloc_array(ubuf->pagecount, sizeof(*ubuf->folios),

- if (!ubuf->folios) {

- ubuf->offsets = kcalloc(ubuf->pagecount, sizeof(*ubuf->offsets),

- if (!ubuf->offsets) {

- memfd = fget(list[i].memfd);

- ret = check_memfd_seals(memfd);

- pgcnt = list[i].size >> PAGE_SHIFT;

- folios = kmalloc_array(pgcnt, sizeof(*folios), GFP_KERNEL);

- end = list[i].offset + (pgcnt << PAGE_SHIFT) - 1;

- ret = memfd_pin_folios(memfd, list[i].offset, end,

- folios, pgcnt, &pgoff);

- pgoff >>= PAGE_SHIFT;

- for (j = 0, k = 0; j < pgcnt; j++) {

- ubuf->folios[pgbuf] = folios[k];

- ubuf->offsets[pgbuf] = pgoff << PAGE_SHIFT;

- if (j == 0 || ubuf->folios[pgbuf-1] != folios[k]) {

- ret = add_to_unpin_list(&ubuf->unpin_list,

- if (++pgoff == folio_nr_pages(folios[k])) {

- if (++k == nr_folios)

- ret = export_udmabuf(ubuf, device, flags);

- unpin_all_folios(&ubuf->unpin_list);

- kfree(ubuf->offsets);

- kfree(ubuf->folios);

diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index d9ec1e69e428..8afea2e23360 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig

- depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I

- default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)

-config LS2X_APB_DMA

- tristate "Loongson LS2X APB DMA support"

- depends on LOONGARCH || COMPILE_TEST

- select DMA_VIRTUAL_CHANNELS

- Support for the Loongson LS2X APB DMA controller driver. The

- DMA controller is having single DMA channel which can be

- configured for different peripherals like audio, nand, sdio

- etc which is in APB bus.

- This DMA controller transfers data from memory to peripheral fifo.

- It does not support memory to memory data transfer.

-source "drivers/dma/ptdma/Kconfig"

diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index ad6a03c052ec..19ba465011a6 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile

-obj-$(CONFIG_AMD_PTDMA) += ptdma/

-obj-$(CONFIG_LS2X_APB_DMA) += ls2x-apb-dma.o

diff --git a/drivers/dma/acpi-dma.c b/drivers/dma/acpi-dma.c
index a58a1600dd65..2abbe11e797e 100644
--- a/drivers/dma/acpi-dma.c
+++ b/drivers/dma/acpi-dma.c

-#include <linux/module.h>

-#include <linux/slab.h>

-#include <linux/ioport.h>

-#include <linux/acpi.h>

-#include <linux/acpi_dma.h>

-static void devm_acpi_dma_release(struct device *dev, void *res)

- res = devres_alloc(devm_acpi_dma_release, 0, GFP_KERNEL);

- devres_add(dev, res);

-EXPORT_SYMBOL_GPL(devm_acpi_dma_controller_register);

- * devm_acpi_dma_controller_free - resource managed acpi_dma_controller_free()

- * @dev: device that is unregistering as DMA controller

- * Unregister a DMA controller registered with

- * devm_acpi_dma_controller_register(). Normally this function will not need to

- * be called and the resource management code will ensure that the resource is

-void devm_acpi_dma_controller_free(struct device *dev)

- WARN_ON(devres_release(dev, devm_acpi_dma_release, NULL, NULL));

-EXPORT_SYMBOL_GPL(devm_acpi_dma_controller_free);

diff --git a/drivers/dma/altera-msgdma.c b/drivers/dma/altera-msgdma.c
index e6a6566b309e..a203fdd84950 100644
--- a/drivers/dma/altera-msgdma.c
+++ b/drivers/dma/altera-msgdma.c

- .remove_new = msgdma_remove,

diff --git a/drivers/dma/amd/Kconfig b/drivers/dma/amd/Kconfig
index 7d1f51d69675..00d874872a8f 100644
--- a/drivers/dma/amd/Kconfig
+++ b/drivers/dma/amd/Kconfig

diff --git a/drivers/dma/amd/Makefile b/drivers/dma/amd/Makefile
index 37212be9364f..11278c06374d 100644
--- a/drivers/dma/amd/Makefile
+++ b/drivers/dma/amd/Makefile

diff --git a/drivers/dma/amd/ae4dma/Makefile b/drivers/dma/amd/ae4dma/Makefile
new file mode 100644
index 000000000000..e918f85a80ec
--- /dev/null
+++ b/drivers/dma/amd/ae4dma/Makefile

diff --git a/drivers/dma/amd/ae4dma/ae4dma-dev.c b/drivers/dma/amd/ae4dma/ae4dma-dev.c
new file mode 100644
index 000000000000..8de3bef41b58
--- /dev/null
+++ b/drivers/dma/amd/ae4dma/ae4dma-dev.c

diff --git a/drivers/dma/amd/ae4dma/ae4dma-pci.c b/drivers/dma/amd/ae4dma/ae4dma-pci.c
new file mode 100644
index 000000000000..aad0dc4294a3
--- /dev/null
+++ b/drivers/dma/amd/ae4dma/ae4dma-pci.c

diff --git a/drivers/dma/amd/ae4dma/ae4dma.h b/drivers/dma/amd/ae4dma/ae4dma.h
new file mode 100644
index 000000000000..265c5d436008
--- /dev/null
+++ b/drivers/dma/amd/ae4dma/ae4dma.h

diff --git a/drivers/dma/ptdma/Makefile b/drivers/dma/amd/ptdma/Makefile
index ce5410268a9a..ce5410268a9a 100644
--- a/drivers/dma/ptdma/Makefile
+++ b/drivers/dma/amd/ptdma/Makefile

diff --git a/drivers/dma/ptdma/ptdma-debugfs.c b/drivers/dma/amd/ptdma/ptdma-debugfs.c
index c8307d3044a3..c7c90bbf6fd8 100644
--- a/drivers/dma/ptdma/ptdma-debugfs.c
+++ b/drivers/dma/amd/ptdma/ptdma-debugfs.c

- seq_printf(s, " # Queues: %d\n", 1);

- seq_printf(s, " # Cmds: %d\n", pt->cmd_count);

- regval = ioread32(cmd_q->reg_control + 0x000C);

- seq_puts(s, " Enabled Interrupts:");

- if (regval & INT_EMPTY_QUEUE)

- seq_puts(s, " EMPTY");

- if (regval & INT_QUEUE_STOPPED)

- seq_puts(s, " STOPPED");

- if (regval & INT_ERROR)

- seq_puts(s, " ERROR");

- if (regval & INT_COMPLETION)

- seq_puts(s, " COMPLETION");

- seq_puts(s, "\n");

- struct pt_cmd_queue *cmd_q;

- cmd_q = &pt->cmd_q;

- debugfs_q_instance =

- debugfs_create_dir("q", pt->dma_dev.dbg_dev_root);

- debugfs_create_file("stats", 0400, debugfs_q_instance, cmd_q,

- &pt_debugfs_queue_fops);

diff --git a/drivers/dma/ptdma/ptdma-dev.c b/drivers/dma/amd/ptdma/ptdma-dev.c
index a2bf13ff18b6..a2bf13ff18b6 100644
--- a/drivers/dma/ptdma/ptdma-dev.c
+++ b/drivers/dma/amd/ptdma/ptdma-dev.c

diff --git a/drivers/dma/ptdma/ptdma-dmaengine.c b/drivers/dma/amd/ptdma/ptdma-dmaengine.c
index f79240734807..35c84ec9608b 100644
--- a/drivers/dma/ptdma/ptdma-dmaengine.c
+++ b/drivers/dma/amd/ptdma/ptdma-dmaengine.c

-#include "../dmaengine.h"

-#include "../virt-dma.h"

-static int pt_dma_start_desc(struct pt_dma_desc *desc)

- cmd_q = &pt->cmd_q;

- pt_cmd->ret = pt_core_perform_passthru(cmd_q, pt_engine);

- ret = pt_dma_start_desc(desc);

- pt_cmd->pt = chan->pt;

- struct pt_device *pt = to_pt_chan(c)->pt;

- struct pt_cmd_queue *cmd_q = &pt->cmd_q;

- pt_check_status_trans(pt, cmd_q);

- pt_stop_queue(&chan->pt->cmd_q);

- pt_start_queue(&chan->pt->cmd_q);

- struct pt_cmd_queue *cmd_q = &chan->pt->cmd_q;

- iowrite32(SUPPORTED_INTERRUPTS, cmd_q->reg_control + 0x0010);

- struct pt_dma_chan *chan;

- char *cmd_cache_name;

- pt->pt_dma_chan = devm_kzalloc(pt->dev, sizeof(*pt->pt_dma_chan),

- chan = pt->pt_dma_chan;

- chan->vc.desc_free = pt_do_cleanup;

- vchan_init(&chan->vc, dma_dev);

diff --git a/drivers/dma/ptdma/ptdma-pci.c b/drivers/dma/amd/ptdma/ptdma-pci.c
index 22739ff0c3c5..22739ff0c3c5 100644
--- a/drivers/dma/ptdma/ptdma-pci.c
+++ b/drivers/dma/amd/ptdma/ptdma-pci.c

diff --git a/drivers/dma/ptdma/ptdma.h b/drivers/dma/amd/ptdma/ptdma.h
index 39bc37268235..0a7939105e51 100644
--- a/drivers/dma/ptdma/ptdma.h
+++ b/drivers/dma/amd/ptdma/ptdma.h

-#include "../virt-dma.h"

diff --git a/drivers/dma/amd/qdma/qdma.c b/drivers/dma/amd/qdma/qdma.c
index b0a1f3ad851b..8fb2d5e1df20 100644
--- a/drivers/dma/amd/qdma/qdma.c
+++ b/drivers/dma/amd/qdma/qdma.c

-#include <linux/dma-map-ops.h>

- enum qdma_ctxt_type h2c_types[] = { QDMA_CTXT_DESC_SW_H2C,

- QDMA_CTXT_DESC_HW_H2C,

- QDMA_CTXT_DESC_CR_H2C,

- QDMA_CTXT_PFTCH, };

- enum qdma_ctxt_type c2h_types[] = { QDMA_CTXT_DESC_SW_C2H,

- QDMA_CTXT_DESC_HW_C2H,

- QDMA_CTXT_DESC_CR_C2H,

- QDMA_CTXT_PFTCH, };

- enum qdma_ctxt_type *type;

- struct device *dev = &qdev->pdev->dev;

- while (dev && get_dma_ops(dev))

- dev = dev->parent;

- qdma_err(qdev, "dma device not found");

- set_dma_ops(&qdev->pdev->dev, get_dma_ops(dev));

- struct device *dev = qdev->dma_dev.dev;

- dma_free_coherent(dev, queue->ring_size * QDMA_MM_DESC_SIZE,

- queue->desc_base = dma_alloc_coherent(qdev->dma_dev.dev, size,

- dma_free_coherent(qdev->dma_dev.dev, size, queue->desc_base,

- u32 ctxt[QDMA_CTXT_REGMAP_LEN];

- ring->base = dmam_alloc_coherent(dev, QDMA_INTR_RING_SIZE,

- .remove_new = amd_qdma_remove,

diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c
index 9588773dd2eb..bd49f0374291 100644
--- a/drivers/dma/apple-admac.c
+++ b/drivers/dma/apple-admac.c

- ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE);

- ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE);

- dev_info(&pdev->dev, "imprint %x TX cache %u RX cache %u\n",

- readl_relaxed(ad->base + REG_IMPRINT), ad->txcache.size, ad->rxcache.size);

- .remove_new = admac_remove,

diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index baebddc740b0..2d147712cbc6 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c

- .remove_new = at_dma_remove,

diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 299396121e6d..ba25c23164e7 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c

- .remove_new = at_xdmac_remove,

diff --git a/drivers/dma/bcm-sba-raid.c b/drivers/dma/bcm-sba-raid.c
index cfa6e1167a1f..7f0e76439ce5 100644
--- a/drivers/dma/bcm-sba-raid.c
+++ b/drivers/dma/bcm-sba-raid.c

- .remove_new = sba_remove,

diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
index e1b92b4d7b05..20b10c15c696 100644
--- a/drivers/dma/bcm2835-dma.c
+++ b/drivers/dma/bcm2835-dma.c

- .remove_new = bcm2835_dma_remove,

diff --git a/drivers/dma/bestcomm/bestcomm.c b/drivers/dma/bestcomm/bestcomm.c
index 0bbaa7620bdd..6c4d655ffe77 100644
--- a/drivers/dma/bestcomm/bestcomm.c
+++ b/drivers/dma/bestcomm/bestcomm.c

- .remove_new = mpc52xx_bcom_remove,

diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index c9cfa341db51..100057603fd4 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c

- .remove_new = jz4780_dma_remove,

diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index fffafa86d964..b23536645ff7 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c

- .remove_new = dw_remove,

diff --git a/drivers/dma/dw/acpi.c b/drivers/dma/dw/acpi.c
index c510c109d2c3..b6452fffa657 100644
--- a/drivers/dma/dw/acpi.c
+++ b/drivers/dma/dw/acpi.c

diff --git a/drivers/dma/dw/internal.h b/drivers/dma/dw/internal.h
index 563ce73488db..f1bd06a20cd6 100644
--- a/drivers/dma/dw/internal.h
+++ b/drivers/dma/dw/internal.h

diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index ad2d4d012cf7..e8a0eb81726a 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c

- dw_dma_acpi_controller_register(chip->dw);

diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 47c58ad468cb..2606cf9cd429 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c

- .remove_new = dw_remove,

diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index 995427afe077..e424bb5c40e7 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c

- if (edmac->dma_cfg.port < EP93XX_DMA_I2S1 ||

- edmac->dma_cfg.port > EP93XX_DMA_IRDA)

@@ -1391,11 +1390,12 @@ static struct ep93xx_dma_engine *ep93xx_dma_of_probe(struct platform_device *pde

- return edmac->regs;

- snprintf(dma_clk_name, sizeof(dma_clk_name), "m2m%u", i);

- snprintf(dma_clk_name, sizeof(dma_clk_name), "m2p%u", i);

diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index b7f15ab96855..443b2430466c 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c

- if (fsl_chan->is_multi_fifo) {

- /* set mloff to support multiple fifo */

- burst = cfg->direction == DMA_DEV_TO_MEM ?

- cfg->src_maxburst : cfg->dst_maxburst;

- nbytes |= EDMA_V3_TCD_NBYTES_MLOFF(-(burst * 4));

- /* enable DMLOE/SMLOE */

- if (cfg->direction == DMA_MEM_TO_DEV) {

diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h
index ce37e1ee9c46..10a5565ddfd7 100644
--- a/drivers/dma/fsl-edma-common.h
+++ b/drivers/dma/fsl-edma-common.h

diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c
index f9f1eda79254..f989b6c9c0a9 100644
--- a/drivers/dma/fsl-edma-main.c
+++ b/drivers/dma/fsl-edma-main.c

- * Vybrid and Layerscape SoCs.

- struct device_link *link;

- link = device_link_add(dev, pd_chan, DL_FLAG_STATELESS |

- /* eDMAv3 mux register move to TCD area if ch_mux exist */

- if (drvdata->flags & FSL_EDMA_DRV_SPLIT_REG)

- drvdata->flags & FSL_EDMA_DRV_SPLIT_REG ? fsl_edma3_xlate : fsl_edma_xlate,

- .remove_new = fsl_edma_remove,

diff --git a/drivers/dma/fsl-qdma.c b/drivers/dma/fsl-qdma.c
index 5005e138fc23..823f5c6bc2e1 100644
--- a/drivers/dma/fsl-qdma.c
+++ b/drivers/dma/fsl-qdma.c

- .remove_new = fsl_qdma_remove,

diff --git a/drivers/dma/fsl_raid.c b/drivers/dma/fsl_raid.c
index 014ff523d5ec..6aa97e258a55 100644
--- a/drivers/dma/fsl_raid.c
+++ b/drivers/dma/fsl_raid.c

- .remove_new = fsl_re_remove,

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 18a6c4bf6275..b5e7d18b9766 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c

- .remove_new = fsldma_of_remove,

diff --git a/drivers/dma/idma64.c b/drivers/dma/idma64.c
index 3c648308a54a..d147353d47ab 100644
--- a/drivers/dma/idma64.c
+++ b/drivers/dma/idma64.c

- .remove_new = idma64_platform_remove,

diff --git a/drivers/dma/idxd/Makefile b/drivers/dma/idxd/Makefile
index 2b4a0d406e1e..9ff9d7b87b64 100644
--- a/drivers/dma/idxd/Makefile
+++ b/drivers/dma/idxd/Makefile

-ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=IDXD

diff --git a/drivers/dma/idxd/cdev.c b/drivers/dma/idxd/cdev.c
index 57f1bf2ab20b..ff94ee892339 100644
--- a/drivers/dma/idxd/cdev.c
+++ b/drivers/dma/idxd/cdev.c

-static DEFINE_MUTEX(ida_lock);

- mutex_lock(&ida_lock);

- mutex_unlock(&ida_lock);

- mutex_lock(&ida_lock);

- mutex_unlock(&ida_lock);

diff --git a/drivers/dma/idxd/compat.c b/drivers/dma/idxd/compat.c
index a4adb0c17995..eff9943f1a42 100644
--- a/drivers/dma/idxd/compat.c
+++ b/drivers/dma/idxd/compat.c

-MODULE_IMPORT_NS(IDXD);

diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c
index c41ef195eeb9..5cf419fe6b46 100644
--- a/drivers/dma/idxd/device.c
+++ b/drivers/dma/idxd/device.c

-EXPORT_SYMBOL_NS_GPL(idxd_wq_alloc_resources, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_wq_free_resources, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_wq_init_percpu_ref, IDXD);

-EXPORT_SYMBOL_NS_GPL(__idxd_wq_quiesce, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_wq_quiesce, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_drv_enable_wq, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_drv_disable_wq, IDXD);

diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
index d84e21daa991..214b8039439f 100644
--- a/drivers/dma/idxd/idxd.h
+++ b/drivers/dma/idxd/idxd.h

-int idxd_register_bus_type(void);

-void idxd_unregister_bus_type(void);

diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c
index 234c1c658ec7..b946f78f85e1 100644
--- a/drivers/dma/idxd/init.c
+++ b/drivers/dma/idxd/init.c

MODULE_DESCRIPTION("Intel Data Streaming Accelerator and In-Memory Analytics Accelerator common driver");

-MODULE_IMPORT_NS(IDXD);

-static int idxd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)

- struct device *dev = &pdev->dev;

- struct idxd_device *idxd;

- struct idxd_driver_data *data = (struct idxd_driver_data *)id->driver_data;

- rc = pci_enable_device(pdev);

- dev_dbg(dev, "Alloc IDXD context\n");

- idxd = idxd_alloc(pdev, data);

- goto err_idxd_alloc;

- dev_dbg(dev, "Mapping BARs\n");

- idxd->reg_base = pci_iomap(pdev, IDXD_MMIO_BAR, 0);

- if (!idxd->reg_base) {

- dev_dbg(dev, "Set DMA masks\n");

- rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));

- idxd->hw.version = ioread32(idxd->reg_base + IDXD_VER_OFFSET);

- rc = idxd_probe(idxd);

- dev_err(dev, "Intel(R) IDXD DMA Engine init failed\n");

- if (data->load_device_defaults) {

- rc = data->load_device_defaults(idxd);

- dev_warn(dev, "IDXD loading device defaults failed\n");

- rc = idxd_register_devices(idxd);

- dev_err(dev, "IDXD sysfs setup failed\n");

- goto err_dev_register;

- rc = idxd_device_init_debugfs(idxd);

- dev_warn(dev, "IDXD debugfs failed to setup\n");

- idxd->user_submission_safe = data->user_submission_safe;

diff --git a/drivers/dma/idxd/irq.c b/drivers/dma/idxd/irq.c
index fc049c9c9892..1107db3ce0a3 100644
--- a/drivers/dma/idxd/irq.c
+++ b/drivers/dma/idxd/irq.c

- union gensts_reg gensts;

- gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);

- if (gensts.state == IDXD_DEVICE_STATE_HALT) {

- idxd->state = IDXD_DEV_HALTED;

- if (gensts.reset_type == IDXD_DEVICE_RESET_SOFTWARE) {

- * If we need a software reset, we will throw the work

- * on a system workqueue in order to allow interrupts

- * for the device command completions.

- INIT_WORK(&idxd->work, idxd_device_reinit);

- queue_work(idxd->wq, &idxd->work);

- idxd->state = IDXD_DEV_HALTED;

- idxd_wqs_quiesce(idxd);

- idxd_wqs_unmap_portal(idxd);

- idxd_device_clear_state(idxd);

- dev_err(&idxd->pdev->dev,

- "idxd halted, need %s.\n",

- gensts.reset_type == IDXD_DEVICE_RESET_FLR ?

- "FLR" : "system reset");

diff --git a/drivers/dma/idxd/registers.h b/drivers/dma/idxd/registers.h
index e16dbf9ab324..006ba206ab1b 100644
--- a/drivers/dma/idxd/registers.h
+++ b/drivers/dma/idxd/registers.h

diff --git a/drivers/dma/idxd/submit.c b/drivers/dma/idxd/submit.c
index 94eca25ae9b9..6db1c5fcedc5 100644
--- a/drivers/dma/idxd/submit.c
+++ b/drivers/dma/idxd/submit.c

-EXPORT_SYMBOL_NS_GPL(idxd_alloc_desc, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_free_desc, IDXD);

-EXPORT_SYMBOL_NS_GPL(idxd_submit_desc, IDXD);

diff --git a/drivers/dma/idxd/sysfs.c b/drivers/dma/idxd/sysfs.c
index f706eae0e76b..6af493f6ba77 100644
--- a/drivers/dma/idxd/sysfs.c
+++ b/drivers/dma/idxd/sysfs.c

-int idxd_register_bus_type(void)

- return bus_register(&dsa_bus_type);

-void idxd_unregister_bus_type(void)

- bus_unregister(&dsa_bus_type);

diff --git a/drivers/dma/img-mdc-dma.c b/drivers/dma/img-mdc-dma.c
index 0532dd2640dc..4127c1bdcca7 100644
--- a/drivers/dma/img-mdc-dma.c
+++ b/drivers/dma/img-mdc-dma.c

- .remove_new = mdc_dma_remove,

diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index e913f0db99da..a651e0995ce8 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c

- .remove_new = imxdma_remove,

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 72299a08af44..3449006cd14b 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c

- .remove_new = sdma_remove,

diff --git a/drivers/dma/ioat/dca.c b/drivers/dma/ioat/dca.c
index 17f6b6367113..c9aba2304de7 100644
--- a/drivers/dma/ioat/dca.c
+++ b/drivers/dma/ioat/dca.c

- unsigned long cpuid_level_9;

- cpuid_level_9 = cpuid_eax(9);

- res = test_bit(0, &cpuid_level_9);

diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index 5de8c21d41e7..acc2983e28e0 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c

- .remove_new = k3_dma_remove,

diff --git a/drivers/dma/ls2x-apb-dma.c b/drivers/dma/loongson2-apb-dma.c
index 9652e8666722..c528f02b9f84 100644
--- a/drivers/dma/ls2x-apb-dma.c
+++ b/drivers/dma/loongson2-apb-dma.c

- * Driver for the Loongson LS2X APB DMA Controller

-#define LDMA_CONFIG_MASK GENMASK(4, 0) /* DMA controller config bits mask */

- .remove_new = ls2x_dma_remove,

-MODULE_DESCRIPTION("Loongson LS2X APB DMA Controller driver");

diff --git a/drivers/dma/mcf-edma-main.c b/drivers/dma/mcf-edma-main.c
index 0c5862bf26f8..9e1c6400c77b 100644
--- a/drivers/dma/mcf-edma-main.c
+++ b/drivers/dma/mcf-edma-main.c

- .remove_new = mcf_edma_remove,

diff --git a/drivers/dma/mediatek/mtk-cqdma.c b/drivers/dma/mediatek/mtk-cqdma.c
index b69eabf12a24..d5ddb4e30e71 100644
--- a/drivers/dma/mediatek/mtk-cqdma.c
+++ b/drivers/dma/mediatek/mtk-cqdma.c

- .remove_new = mtk_cqdma_remove,

diff --git a/drivers/dma/mediatek/mtk-hsdma.c b/drivers/dma/mediatek/mtk-hsdma.c
index 58c7961ab9ad..fa77bb24a430 100644
--- a/drivers/dma/mediatek/mtk-hsdma.c
+++ b/drivers/dma/mediatek/mtk-hsdma.c

- .remove_new = mtk_hsdma_remove,

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index 1bdc1500be40..08e15177427b 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c

- .remove_new = mtk_uart_apdma_remove,

diff --git a/drivers/dma/milbeaut-hdmac.c b/drivers/dma/milbeaut-hdmac.c
index 7b41c670970a..9a5ec247ed6d 100644
--- a/drivers/dma/milbeaut-hdmac.c
+++ b/drivers/dma/milbeaut-hdmac.c

- .remove_new = milbeaut_hdmac_remove,

diff --git a/drivers/dma/milbeaut-xdmac.c b/drivers/dma/milbeaut-xdmac.c
index 2cce529b448e..58d4fd6df0bf 100644
--- a/drivers/dma/milbeaut-xdmac.c
+++ b/drivers/dma/milbeaut-xdmac.c

- .remove_new = milbeaut_xdmac_remove,

diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index 136fcaeff8dd..a95d31103d30 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c

- .remove_new = mmp_pdma_remove,

diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index b76fe99e1151..c8dc504510f1 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c

- .remove_new = mmp_tdma_remove,

diff --git a/drivers/dma/moxart-dma.c b/drivers/dma/moxart-dma.c
index 66dc6d31b603..de09e1ab7767 100644
--- a/drivers/dma/moxart-dma.c
+++ b/drivers/dma/moxart-dma.c

- .remove_new = moxart_remove,

diff --git a/drivers/dma/mpc512x_dma.c b/drivers/dma/mpc512x_dma.c
index 68c247a46321..bf131cb5db66 100644
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c

- .remove_new = mpc_dma_remove,

diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index 43efce77bb57..fa6e4646fdc2 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c

- struct device_node *np;

- for_each_child_of_node(pdev->dev.of_node, np) {

diff --git a/drivers/dma/mv_xor_v2.c b/drivers/dma/mv_xor_v2.c
index c8c67f4d982c..cad4d4fb51ac 100644
--- a/drivers/dma/mv_xor_v2.c
+++ b/drivers/dma/mv_xor_v2.c

- /* write the DESQ address to the DMA enngine*/

- .remove_new = mv_xor_v2_remove,

diff --git a/drivers/dma/nbpfaxi.c b/drivers/dma/nbpfaxi.c
index 3b011a91d48e..0d6324c4e2be 100644
--- a/drivers/dma/nbpfaxi.c
+++ b/drivers/dma/nbpfaxi.c

- .remove_new = nbpf_remove,

diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c
index aa436f9e3571..57cec757d8f5 100644
--- a/drivers/dma/owl-dma.c
+++ b/drivers/dma/owl-dma.c

- .remove_new = owl_dma_remove,

diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
index 7b78759ac734..9d2a5a967a99 100644
--- a/drivers/dma/ppc4xx/adma.c
+++ b/drivers/dma/ppc4xx/adma.c

- .remove_new = ppc440spe_adma_remove,

diff --git a/drivers/dma/ptdma/Kconfig b/drivers/dma/ptdma/Kconfig
deleted file mode 100644
index b430edd709f9..000000000000
--- a/drivers/dma/ptdma/Kconfig
+++ /dev/null

-# SPDX-License-Identifier: GPL-2.0-only

- tristate "AMD PassThru DMA Engine"

- depends on X86_64 && PCI

- select DMA_VIRTUAL_CHANNELS

- Enable support for the AMD PTDMA controller. This controller

- provides DMA capabilities to perform high bandwidth memory to

- memory and IO copy operations. It performs DMA transfer through

- queue-based descriptor management. This DMA controller is intended

- to be used with AMD Non-Transparent Bridge devices and not for

- general purpose peripheral DMA.

diff --git a/drivers/dma/pxa_dma.c b/drivers/dma/pxa_dma.c
index 31f8da810c05..e50cf3357e5e 100644
--- a/drivers/dma/pxa_dma.c
+++ b/drivers/dma/pxa_dma.c

- .remove_new = pxad_remove,

diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
index d43a881e43b9..c14557efd577 100644
--- a/drivers/dma/qcom/bam_dma.c
+++ b/drivers/dma/qcom/bam_dma.c

- writel_relaxed(DEFAULT_CNT_THRSHLD,

- bam_addr(bdev, 0, BAM_DESC_CNT_TRSHLD));

- writel_relaxed(maxburst,

- bam_addr(bdev, 0, BAM_DESC_CNT_TRSHLD));

- if (!bdev->num_ees) {

- val = readl_relaxed(bam_addr(bdev, 0, BAM_REVISION));

- .remove_new = bam_dma_remove,

diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
index 52a7c8f2498f..b1f0001cc99c 100644
--- a/drivers/dma/qcom/gpi.c
+++ b/drivers/dma/qcom/gpi.c

- tre->dword[0] = lower_32_bits(address);

- tre->dword[1] = upper_32_bits(address);

- tre->dword[2] = u32_encode_bits(sg_dma_len(sgl), TRE_DMA_LEN);

- tre->dword[3] = u32_encode_bits(TRE_TYPE_DMA, TRE_FLAGS_TYPE);

- if (direction == DMA_MEM_TO_DEV)

- tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOT);

diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
index 4d2cd8d9ec74..c2b3e4452e71 100644
--- a/drivers/dma/qcom/hidma.c
+++ b/drivers/dma/qcom/hidma.c

- .remove_new = hidma_remove,

diff --git a/drivers/dma/qcom/qcom_adm.c b/drivers/dma/qcom/qcom_adm.c
index c1db398adc84..6be54fddcee1 100644
--- a/drivers/dma/qcom/qcom_adm.c
+++ b/drivers/dma/qcom/qcom_adm.c

- .remove_new = adm_dma_remove,

diff --git a/drivers/dma/sa11x0-dma.c b/drivers/dma/sa11x0-dma.c
index 01e656c69e6c..dc1a9a05252e 100644
--- a/drivers/dma/sa11x0-dma.c
+++ b/drivers/dma/sa11x0-dma.c

- .remove_new = sa11x0_dma_remove,

diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index 428473611115..7ad3c29be146 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c

- /* submit next trascatioin if possible */

- .remove_new = sf_pdma_remove,

diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig
index c0b2997ab7fd..6ea5a880b433 100644
--- a/drivers/dma/sh/Kconfig
+++ b/drivers/dma/sh/Kconfig

- tristate "Renesas RZ/{G2L,V2L} DMA Controller"

- depends on ARCH_RZG2L || COMPILE_TEST

- This driver supports the general purpose DMA controller found in the

- Renesas RZ/{G2L,V2L} SoC variants.

diff --git a/drivers/dma/sh/rcar-dmac.c b/drivers/dma/sh/rcar-dmac.c
index 1094a2f82164..0c45ce8c74aa 100644
--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c

- .remove_new = rcar_dmac_remove,

diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
index 65a27c5a7bce..9235db551026 100644
--- a/drivers/dma/sh/rz-dmac.c
+++ b/drivers/dma/sh/rz-dmac.c

- channel->src_per_address = config->src_addr;

- val = rz_dmac_ds_to_val_mapping(config->dst_addr_width);

- if (val == CHCFG_DS_INVALID)

- channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val);

- val = rz_dmac_ds_to_val_mapping(config->src_addr_width);

- if (val == CHCFG_DS_INVALID)

- channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val);

- dmac->rstc = devm_reset_control_array_get_exclusive(&pdev->dev);

- .remove_new = rz_dmac_remove,

diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
index 588c5f409a80..fdd41e1c2263 100644
--- a/drivers/dma/sh/shdma-base.c
+++ b/drivers/dma/sh/shdma-base.c

- /* Init descripter manage list */

diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
index 8ead0a1fd237..093e449e19ee 100644
--- a/drivers/dma/sh/shdmac.c
+++ b/drivers/dma/sh/shdmac.c

- .remove_new = sh_dmae_remove,

diff --git a/drivers/dma/sh/usb-dmac.c b/drivers/dma/sh/usb-dmac.c
index f7cd0cad056c..7e2b6c97fa2f 100644
--- a/drivers/dma/sh/usb-dmac.c
+++ b/drivers/dma/sh/usb-dmac.c

- /* Get a freed descritpor */

- .remove_new = usb_dmac_remove,

diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c
index 3f54ff37c5e0..187a090463ce 100644
--- a/drivers/dma/sprd-dma.c
+++ b/drivers/dma/sprd-dma.c

- .remove_new = sprd_dma_remove,

diff --git a/drivers/dma/st_fdma.c b/drivers/dma/st_fdma.c
index 8880b5e336f8..c65ee0c7bfbd 100644
--- a/drivers/dma/st_fdma.c
+++ b/drivers/dma/st_fdma.c

- .remove_new = st_fdma_remove,

diff --git a/drivers/dma/stm32/stm32-dma3.c b/drivers/dma/stm32/stm32-dma3.c
index 0be6e944df6f..0c6c4258b195 100644
--- a/drivers/dma/stm32/stm32-dma3.c
+++ b/drivers/dma/stm32/stm32-dma3.c

-static u32 stm32_dma3_get_max_burst(u32 len, enum dma_slave_buswidth dw, u32 chan_max_burst)

- dbl_max = min_t(u32, dbl_max, stm32_dma3_get_max_burst(len, ddw, chan->max_burst));

- sbl_max = stm32_dma3_get_max_burst(len, sdw, chan->max_burst);

- sbl_max = min_t(u32, sbl_max, stm32_dma3_get_max_burst(len, sdw, chan->max_burst));

- dbl_max = stm32_dma3_get_max_burst(len, ddw, chan->max_burst);

- sbl_max = stm32_dma3_get_max_burst(len, sdw, chan->max_burst);

- sbl_max = min_t(u32, init_bl_max,

- stm32_dma3_get_max_burst(len, sdw, chan->max_burst));

- dbl_max = stm32_dma3_get_max_burst(len, ddw, chan->max_burst);

- dbl_max = min_t(u32, init_bl_max,

- stm32_dma3_get_max_burst(len, ddw, chan->max_burst));

- count = DIV_ROUND_UP(len, STM32_DMA3_MAX_BLOCK_SIZE);

- for_each_sg(sgl, sg, sg_len, i) {

- len = sg_dma_len(sg);

- if (len > STM32_DMA3_MAX_BLOCK_SIZE)

- count += DIV_ROUND_UP(len, STM32_DMA3_MAX_BLOCK_SIZE) - 1;

- { .compatible = "st,stm32mp25-dma3", },

- .remove_new = stm32_dma3_remove,

diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c
index 2e7f9b07fdd2..24796aaaddfa 100644
--- a/drivers/dma/sun4i-dma.c
+++ b/drivers/dma/sun4i-dma.c

- DECLARE_BITMAP(pchans_used, SUN4I_DMA_NR_MAX_CHANNELS);

-static int convert_burst(u32 maxburst)

- * pchans 0-SUN4I_NDMA_NR_MAX_CHANNELS are normal, and

- * SUN4I_NDMA_NR_MAX_CHANNELS+ are dedicated ones

- i = SUN4I_NDMA_NR_MAX_CHANNELS;

- max = SUN4I_DMA_NR_MAX_CHANNELS;

- max = SUN4I_NDMA_NR_MAX_CHANNELS;

- ret = convert_burst(sconfig->src_maxburst);

- ret = convert_burst(sconfig->dst_maxburst);

- promise->cfg |= SUN4I_DMA_CFG_SRC_DATA_WIDTH(ret);

- promise->cfg |= SUN4I_DMA_CFG_DST_DATA_WIDTH(ret);

- ret = convert_burst(sconfig->src_maxburst);

- ret = convert_burst(sconfig->dst_maxburst);

- promise->cfg |= SUN4I_DMA_CFG_SRC_DATA_WIDTH(ret);

- promise->cfg |= SUN4I_DMA_CFG_DST_DATA_WIDTH(ret);

- sconfig->src_maxburst = 8;

- sconfig->dst_maxburst = 8;

- promise->cfg |= SUN4I_DMA_CFG_SRC_DRQ_TYPE(SUN4I_DDMA_DRQ_TYPE_SDRAM) |

- SUN4I_DMA_CFG_DST_DRQ_TYPE(SUN4I_DDMA_DRQ_TYPE_SDRAM);

- promise->cfg |= SUN4I_DMA_CFG_SRC_DRQ_TYPE(SUN4I_NDMA_DRQ_TYPE_SDRAM) |

- SUN4I_DMA_CFG_DST_DRQ_TYPE(SUN4I_NDMA_DRQ_TYPE_SDRAM);

- ram_type = SUN4I_DDMA_DRQ_TYPE_SDRAM;

- ram_type = SUN4I_NDMA_DRQ_TYPE_SDRAM;

- ram_type = SUN4I_DDMA_DRQ_TYPE_SDRAM;

- ram_type = SUN4I_NDMA_DRQ_TYPE_SDRAM;

- priv->pchans = devm_kcalloc(&pdev->dev, SUN4I_DMA_NR_MAX_CHANNELS,

- if (!priv->vchans || !priv->pchans)

- * [0..SUN4I_NDMA_NR_MAX_CHANNELS) are normal pchans, and

- * [SUN4I_NDMA_NR_MAX_CHANNELS..SUN4I_DMA_NR_MAX_CHANNELS) are

- for (i = 0; i < SUN4I_NDMA_NR_MAX_CHANNELS; i++)

- for (j = 0; i < SUN4I_DMA_NR_MAX_CHANNELS; i++, j++) {

- { .compatible = "allwinner,sun4i-a10-dma" },

- .remove_new = sun4i_dma_remove,

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 583bf49031cf..95ecb12caaa5 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c

- .remove_new = sun6i_dma_remove,

diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
index 3642508e88bb..4d6fe0efa76e 100644
--- a/drivers/dma/tegra186-gpc-dma.c
+++ b/drivers/dma/tegra186-gpc-dma.c

- .remove_new = tegra_dma_remove,

diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 7d1acda2d72b..14a61e53a41b 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c

- .remove_new = tegra_dma_remove,

diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
index 24ad7077c53b..6896da8ac7ef 100644
--- a/drivers/dma/tegra210-adma.c
+++ b/drivers/dma/tegra210-adma.c

- /* Clear any interrupts */

- tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);

- tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD);

- tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd);

- tdma->base_addr = devm_platform_ioremap_resource(pdev, 0);

- if (IS_ERR(tdma->base_addr))

- return PTR_ERR(tdma->base_addr);

- tdc->chan_addr = tdma->base_addr + cdata->ch_base_offset

- + (cdata->ch_reg_size * i);

- .remove_new = tegra_adma_remove,

diff --git a/drivers/dma/ti/cppi41.c b/drivers/dma/ti/cppi41.c
index a8bb70c2d109..8d8c3d6038fc 100644
--- a/drivers/dma/ti/cppi41.c
+++ b/drivers/dma/ti/cppi41.c

- .remove_new = cppi41_dma_remove,

diff --git a/drivers/dma/ti/edma.c b/drivers/dma/ti/edma.c
index 5f8d2e93ff3f..4ece125b2ae7 100644
--- a/drivers/dma/ti/edma.c
+++ b/drivers/dma/ti/edma.c

- struct device_node *node;

- for (i = 0;; i++) {

- if (ret || i == ecc->num_tc)

- ecc->tc_list[i].node = tc_args.np;

- .remove_new = edma_remove,

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 406ee199c2ac..7ed1956b4642 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c

- * PDMA must to close the packet when the channel is in packet mode.

- * For TR mode when the channel is not cyclic we also need PDMA to close

- * the packet otherwise the transfer will stall because PDMA holds on

- * the data it has received from the peripheral.

- if (uc->config.dir == DMA_DEV_TO_MEM &&

- d->static_tr.bstcnt > uc->ud->match_data->statictr_z_mask)

- "%s: StaticTR Z is limited to maximum 4095 (%u)\n",

- __func__, d->static_tr.bstcnt);

- cppi5_tr_csf_set(&tr_req[tr_idx].flags,

- CPPI5_TR_CSF_SUPR_EVT);

- "%s: StaticTR Z is limited to maximum 4095 (%u)\n",

- __func__, d->static_tr.bstcnt);

diff --git a/drivers/dma/ti/omap-dma.c b/drivers/dma/ti/omap-dma.c
index 6ab9bfbdc480..8c023c6e623a 100644
--- a/drivers/dma/ti/omap-dma.c
+++ b/drivers/dma/ti/omap-dma.c

- .remove_new = omap_dma_remove,

diff --git a/drivers/dma/timb_dma.c b/drivers/dma/timb_dma.c
index 7410025605e0..ecaf002558af 100644
--- a/drivers/dma/timb_dma.c
+++ b/drivers/dma/timb_dma.c

- .remove_new = td_remove,

diff --git a/drivers/dma/txx9dmac.c b/drivers/dma/txx9dmac.c
index 44ba377b4b5a..35d5221683b2 100644
--- a/drivers/dma/txx9dmac.c
+++ b/drivers/dma/txx9dmac.c

- .remove_new = txx9dmac_chan_remove,

- .remove_new = txx9dmac_remove,

diff --git a/drivers/dma/uniphier-mdmac.c b/drivers/dma/uniphier-mdmac.c
index ad7125f6e2ca..7a99f86ecb5a 100644
--- a/drivers/dma/uniphier-mdmac.c
+++ b/drivers/dma/uniphier-mdmac.c

- .remove_new = uniphier_mdmac_remove,

diff --git a/drivers/dma/uniphier-xdmac.c b/drivers/dma/uniphier-xdmac.c
index 3ce2dc2ad9de..ceeb6171c9d1 100644
--- a/drivers/dma/uniphier-xdmac.c
+++ b/drivers/dma/uniphier-xdmac.c

- .remove_new = uniphier_xdmac_remove,

diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index 275848a9c450..f64624ea44ad 100644
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c

- .remove_new = xgene_dma_remove,

diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c
index 718842fdaf98..0d88b1a670e1 100644
--- a/drivers/dma/xilinx/xdma.c
+++ b/drivers/dma/xilinx/xdma.c

- ret = regmap_write(xdev->rmap, xchan->base + XDMA_CHAN_CONTROL_W1C,

- CHAN_CTRL_RUN_STOP);

- .remove_new = xdma_remove,

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 5eb51ae93e89..108a7287f4cd 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c

- j = chan->desc_submitcount;

- reg = dma_read(chan, XILINX_DMA_REG_PARK_PTR);

- if (chan->direction == DMA_MEM_TO_DEV) {

- reg &= ~XILINX_DMA_PARK_PTR_RD_REF_MASK;

- reg |= j << XILINX_DMA_PARK_PTR_RD_REF_SHIFT;

- reg &= ~XILINX_DMA_PARK_PTR_WR_REF_MASK;

- reg |= j << XILINX_DMA_PARK_PTR_WR_REF_SHIFT;

- dma_write(chan, XILINX_DMA_REG_PARK_PTR, reg);

- .remove_new = xilinx_dma_remove,

diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c
index be87764af9e8..ee5d9fdbfd7f 100644
--- a/drivers/dma/xilinx/xilinx_dpdma.c
+++ b/drivers/dma/xilinx/xilinx_dpdma.c

- .remove_new = xilinx_dpdma_remove,

diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index 9ae46f1198fe..d05fc5fcc77d 100644
--- a/drivers/dma/xilinx/zynqmp_dma.c
+++ b/drivers/dma/xilinx/zynqmp_dma.c

- /* Clearing the interrupt account rgisters */

- .remove_new = zynqmp_dma_remove,

diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index fc0280dcddd1..c130f87147fa 100644
--- a/drivers/dpll/dpll_netlink.c
+++ b/drivers/dpll/dpll_netlink.c

diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 81af6c344d6b..2051a7c944a5 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig

- tristate "Cell Broadband Engine memory controller"

- depends on PPC_CELL_COMMON

- Support for error detection and correction on the

- Cell Broadband Engine internal memory controller

- on platform without a hypervisor

-config EDAC_AMD8131

- tristate "AMD8131 HyperTransport PCI-X Tunnel"

- depends on PCI && PPC_MAPLE

- Support for error detection and correction on the

- AMD8131 HyperTransport PCI-X Tunnel chip.

- Note, add more Kconfig dependency if it's adopted

- on some machine other than Maple.

-config EDAC_AMD8111

- tristate "AMD8111 HyperTransport I/O Hub"

- depends on PCI && PPC_MAPLE

- Support for error detection and correction on the

- AMD8111 HyperTransport I/O Hub chip.

- Note, add more Kconfig dependency if it's adopted

- on some machine other than Maple.

diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index faf310eec4a6..89789ba8275f 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile

-obj-$(CONFIG_EDAC_CELL) += cell_edac.o

-obj-$(CONFIG_EDAC_AMD8111) += amd8111_edac.o

-obj-$(CONFIG_EDAC_AMD8131) += amd8131_edac.o

diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index fe89f5c4837f..3e971f902363 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c

- .remove_new = altr_sdram_remove,

- .remove_new = altr_edac_device_remove,

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index ddfbdb66b794..8414ceb43e4a 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c

- u8 umc_en_mask = 0, ecc_en_mask = 0;

- u16 nid = pvt->mc_node_id;

- /* Only check enabled UMCs. */

- if (!(umc->sdp_ctrl & UMC_SDP_INIT))

- umc_en_mask |= BIT(i);

- if (umc->umc_cap_hi & UMC_ECC_ENABLED)

- ecc_en_mask |= BIT(i);

- /* Check whether at least one UMC is enabled: */

- ecc_en = umc_en_mask == ecc_en_mask;

- edac_dbg(0, "Node %d: No enabled UMCs.\n", nid);

- edac_dbg(3, "Node %d: DRAM ECC %s.\n", nid, (ecc_en ? "enabled" : "disabled"));

diff --git a/drivers/edac/amd8111_edac.c b/drivers/edac/amd8111_edac.c
deleted file mode 100644
index a6d3013d5823..000000000000
--- a/drivers/edac/amd8111_edac.c
+++ /dev/null

-// SPDX-License-Identifier: GPL-2.0-only

- * amd8111_edac.c, AMD8111 Hyper Transport chip EDAC kernel module

- * Authors: Cao Qingtao <qingtao.cao@windriver.com>

- * Benjamin Walsh <benjamin.walsh@windriver.com>

- * Hu Yongqi <yongqi.hu@windriver.com>

-#include <linux/module.h>

-#include <linux/init.h>

-#include <linux/interrupt.h>

-#include <linux/bitops.h>

-#include <linux/edac.h>

-#include <linux/pci_ids.h>

-#include <asm/io.h>

-#include "edac_module.h"

-#include "amd8111_edac.h"

-#define AMD8111_EDAC_REVISION " Ver: 1.0.0"

-#define AMD8111_EDAC_MOD_STR "amd8111_edac"

-#define PCI_DEVICE_ID_AMD_8111_PCI 0x7460

-enum amd8111_edac_devs {

-enum amd8111_edac_pcis {

-/* Wrapper functions for accessing PCI configuration space */

-static int edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)

- ret = pci_read_config_dword(dev, reg, val32);

- printk(KERN_ERR AMD8111_EDAC_MOD_STR

- " PCI Access Read Error at 0x%x\n", reg);

-static void edac_pci_read_byte(struct pci_dev *dev, int reg, u8 *val8)

- ret = pci_read_config_byte(dev, reg, val8);

- printk(KERN_ERR AMD8111_EDAC_MOD_STR

- " PCI Access Read Error at 0x%x\n", reg);

-static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32)

- ret = pci_write_config_dword(dev, reg, val32);

- printk(KERN_ERR AMD8111_EDAC_MOD_STR

- " PCI Access Write Error at 0x%x\n", reg);

-static void edac_pci_write_byte(struct pci_dev *dev, int reg, u8 val8)

- ret = pci_write_config_byte(dev, reg, val8);

- printk(KERN_ERR AMD8111_EDAC_MOD_STR

- " PCI Access Write Error at 0x%x\n", reg);

- * device-specific methods for amd8111 PCI Bridge Controller

- * Error Reporting and Handling for amd8111 chipset could be found

- * in its datasheet 3.1.2 section, P37

-static void amd8111_pci_bridge_init(struct amd8111_pci_info *pci_info)

- struct pci_dev *dev = pci_info->dev;

- /* First clear error detection flags on the host interface */

- /* Clear SSE/SMA/STA flags in the global status register*/

- edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32);

- if (val32 & PCI_STSCMD_CLEAR_MASK)

- edac_pci_write_dword(dev, REG_PCI_STSCMD, val32);

- /* Clear CRC and Link Fail flags in HT Link Control reg */

- edac_pci_read_dword(dev, REG_HT_LINK, &val32);

- if (val32 & HT_LINK_CLEAR_MASK)

- edac_pci_write_dword(dev, REG_HT_LINK, val32);

- /* Second clear all fault on the secondary interface */

- /* Clear error flags in the memory-base limit reg. */

- edac_pci_read_dword(dev, REG_MEM_LIM, &val32);

- if (val32 & MEM_LIMIT_CLEAR_MASK)

- edac_pci_write_dword(dev, REG_MEM_LIM, val32);

- /* Clear Discard Timer Expired flag in Interrupt/Bridge Control reg */

- edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32);

- if (val32 & PCI_INTBRG_CTRL_CLEAR_MASK)

- edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32);

- /* Last enable error detections */

- if (edac_op_state == EDAC_OPSTATE_POLL) {

- /* Enable System Error reporting in global status register */

- edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32);

- val32 |= PCI_STSCMD_SERREN;

- edac_pci_write_dword(dev, REG_PCI_STSCMD, val32);

- /* Enable CRC Sync flood packets to HyperTransport Link */

- edac_pci_read_dword(dev, REG_HT_LINK, &val32);

- val32 |= HT_LINK_CRCFEN;

- edac_pci_write_dword(dev, REG_HT_LINK, val32);

- /* Enable SSE reporting etc in Interrupt control reg */

- edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32);

- val32 |= PCI_INTBRG_CTRL_POLL_MASK;

- edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32);

-static void amd8111_pci_bridge_exit(struct amd8111_pci_info *pci_info)

- struct pci_dev *dev = pci_info->dev;

- if (edac_op_state == EDAC_OPSTATE_POLL) {

- /* Disable System Error reporting */

- edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32);

- val32 &= ~PCI_STSCMD_SERREN;

- edac_pci_write_dword(dev, REG_PCI_STSCMD, val32);

- /* Disable CRC flood packets */

- edac_pci_read_dword(dev, REG_HT_LINK, &val32);

- val32 &= ~HT_LINK_CRCFEN;

- edac_pci_write_dword(dev, REG_HT_LINK, val32);

- /* Disable DTSERREN/MARSP/SERREN in Interrupt Control reg */

- edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32);

- val32 &= ~PCI_INTBRG_CTRL_POLL_MASK;

- edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32);

-static void amd8111_pci_bridge_check(struct edac_pci_ctl_info *edac_dev)

- struct amd8111_pci_info *pci_info = edac_dev->pvt_info;

- struct pci_dev *dev = pci_info->dev;

- /* Check out PCI Bridge Status and Command Register */

- edac_pci_read_dword(dev, REG_PCI_STSCMD, &val32);

- if (val32 & PCI_STSCMD_CLEAR_MASK) {

- printk(KERN_INFO "Error(s) in PCI bridge status and command"

- "register on device %s\n", pci_info->ctl_name);

- printk(KERN_INFO "SSE: %d, RMA: %d, RTA: %d\n",

- (val32 & PCI_STSCMD_SSE) != 0,

- (val32 & PCI_STSCMD_RMA) != 0,

- (val32 & PCI_STSCMD_RTA) != 0);

- val32 |= PCI_STSCMD_CLEAR_MASK;

- edac_pci_write_dword(dev, REG_PCI_STSCMD, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

- /* Check out HyperTransport Link Control Register */

- edac_pci_read_dword(dev, REG_HT_LINK, &val32);

- if (val32 & HT_LINK_LKFAIL) {

- printk(KERN_INFO "Error(s) in hypertransport link control"

- "register on device %s\n", pci_info->ctl_name);

- printk(KERN_INFO "LKFAIL: %d\n",

- (val32 & HT_LINK_LKFAIL) != 0);

- val32 |= HT_LINK_LKFAIL;

- edac_pci_write_dword(dev, REG_HT_LINK, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

- /* Check out PCI Interrupt and Bridge Control Register */

- edac_pci_read_dword(dev, REG_PCI_INTBRG_CTRL, &val32);

- if (val32 & PCI_INTBRG_CTRL_DTSTAT) {

- printk(KERN_INFO "Error(s) in PCI interrupt and bridge control"

- "register on device %s\n", pci_info->ctl_name);

- printk(KERN_INFO "DTSTAT: %d\n",

- (val32 & PCI_INTBRG_CTRL_DTSTAT) != 0);

- val32 |= PCI_INTBRG_CTRL_DTSTAT;

- edac_pci_write_dword(dev, REG_PCI_INTBRG_CTRL, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

- /* Check out PCI Bridge Memory Base-Limit Register */

- edac_pci_read_dword(dev, REG_MEM_LIM, &val32);

- if (val32 & MEM_LIMIT_CLEAR_MASK) {

- "Error(s) in mem limit register on %s device\n",

- pci_info->ctl_name);

- printk(KERN_INFO "DPE: %d, RSE: %d, RMA: %d\n"

- "RTA: %d, STA: %d, MDPE: %d\n",

- (val32 & MEM_LIMIT_DPE) != 0,

- (val32 & MEM_LIMIT_RSE) != 0,

- (val32 & MEM_LIMIT_RMA) != 0,

- (val32 & MEM_LIMIT_RTA) != 0,

- (val32 & MEM_LIMIT_STA) != 0,

- (val32 & MEM_LIMIT_MDPE) != 0);

- val32 |= MEM_LIMIT_CLEAR_MASK;

- edac_pci_write_dword(dev, REG_MEM_LIM, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

-static struct resource *legacy_io_res;

-static int at_compat_reg_broken;

-#define LEGACY_NR_PORTS 1

-/* device-specific methods for amd8111 LPC Bridge device */

-static void amd8111_lpc_bridge_init(struct amd8111_dev_info *dev_info)

- struct pci_dev *dev = dev_info->dev;

- /* First clear REG_AT_COMPAT[SERR, IOCHK] if necessary */

- legacy_io_res = request_region(REG_AT_COMPAT, LEGACY_NR_PORTS,

- AMD8111_EDAC_MOD_STR);

- if (!legacy_io_res)

- printk(KERN_INFO "%s: failed to request legacy I/O region "

- "start %d, len %d\n", __func__,

- REG_AT_COMPAT, LEGACY_NR_PORTS);

- val8 = __do_inb(REG_AT_COMPAT);

- if (val8 == 0xff) { /* buggy port */

- printk(KERN_INFO "%s: port %d is buggy, not supported"

- " by hardware?\n", __func__, REG_AT_COMPAT);

- at_compat_reg_broken = 1;

- release_region(REG_AT_COMPAT, LEGACY_NR_PORTS);

- legacy_io_res = NULL;

- if (val8 & AT_COMPAT_SERR)

- out8 = AT_COMPAT_CLRSERR;

- if (val8 & AT_COMPAT_IOCHK)

- out8 |= AT_COMPAT_CLRIOCHK;

- __do_outb(out8, REG_AT_COMPAT);

- /* Second clear error flags on LPC bridge */

- edac_pci_read_byte(dev, REG_IO_CTRL_1, &val8);

- if (val8 & IO_CTRL_1_CLEAR_MASK)

- edac_pci_write_byte(dev, REG_IO_CTRL_1, val8);

-static void amd8111_lpc_bridge_exit(struct amd8111_dev_info *dev_info)

- if (legacy_io_res)

- release_region(REG_AT_COMPAT, LEGACY_NR_PORTS);

-static void amd8111_lpc_bridge_check(struct edac_device_ctl_info *edac_dev)

- struct amd8111_dev_info *dev_info = edac_dev->pvt_info;

- struct pci_dev *dev = dev_info->dev;

- edac_pci_read_byte(dev, REG_IO_CTRL_1, &val8);

- if (val8 & IO_CTRL_1_CLEAR_MASK) {

- "Error(s) in IO control register on %s device\n",

- dev_info->ctl_name);

- printk(KERN_INFO "LPC ERR: %d, PW2LPC: %d\n",

- (val8 & IO_CTRL_1_LPC_ERR) != 0,

- (val8 & IO_CTRL_1_PW2LPC) != 0);

- val8 |= IO_CTRL_1_CLEAR_MASK;

- edac_pci_write_byte(dev, REG_IO_CTRL_1, val8);

- edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);

- if (at_compat_reg_broken == 0) {

- val8 = __do_inb(REG_AT_COMPAT);

- if (val8 & AT_COMPAT_SERR)

- out8 = AT_COMPAT_CLRSERR;

- if (val8 & AT_COMPAT_IOCHK)

- out8 |= AT_COMPAT_CLRIOCHK;

- __do_outb(out8, REG_AT_COMPAT);

- edac_device_handle_ue(edac_dev, 0, 0,

- edac_dev->ctl_name);

-/* General devices represented by edac_device_ctl_info */

-static struct amd8111_dev_info amd8111_devices[] = {

- .err_dev = PCI_DEVICE_ID_AMD_8111_LPC,

- .ctl_name = "lpc",

- .init = amd8111_lpc_bridge_init,

- .exit = amd8111_lpc_bridge_exit,

- .check = amd8111_lpc_bridge_check,

-/* PCI controllers represented by edac_pci_ctl_info */

-static struct amd8111_pci_info amd8111_pcis[] = {

- .err_dev = PCI_DEVICE_ID_AMD_8111_PCI,

- .ctl_name = "AMD8111_PCI_Controller",

- .init = amd8111_pci_bridge_init,

- .exit = amd8111_pci_bridge_exit,

- .check = amd8111_pci_bridge_check,

-static int amd8111_dev_probe(struct pci_dev *dev,

- const struct pci_device_id *id)

- struct amd8111_dev_info *dev_info = &amd8111_devices[id->driver_data];

- int ret = -ENODEV;

- dev_info->dev = pci_get_device(PCI_VENDOR_ID_AMD,

- dev_info->err_dev, NULL);

- if (!dev_info->dev) {

- printk(KERN_ERR "EDAC device not found:"

- "vendor %x, device %x, name %s\n",

- PCI_VENDOR_ID_AMD, dev_info->err_dev,

- dev_info->ctl_name);

- if (pci_enable_device(dev_info->dev)) {

- printk(KERN_ERR "failed to enable:"

- "vendor %x, device %x, name %s\n",

- PCI_VENDOR_ID_AMD, dev_info->err_dev,

- dev_info->ctl_name);

- * we do not allocate extra private structure for

- * edac_device_ctl_info, but make use of existing

- dev_info->edac_idx = edac_device_alloc_index();

- dev_info->edac_dev =

- edac_device_alloc_ctl_info(0, dev_info->ctl_name, 1,

- NULL, 0, 0, dev_info->edac_idx);

- if (!dev_info->edac_dev) {

- dev_info->edac_dev->pvt_info = dev_info;

- dev_info->edac_dev->dev = &dev_info->dev->dev;

- dev_info->edac_dev->mod_name = AMD8111_EDAC_MOD_STR;

- dev_info->edac_dev->ctl_name = dev_info->ctl_name;

- dev_info->edac_dev->dev_name = dev_name(&dev_info->dev->dev);

- if (edac_op_state == EDAC_OPSTATE_POLL)

- dev_info->edac_dev->edac_check = dev_info->check;

- if (dev_info->init)

- dev_info->init(dev_info);

- if (edac_device_add_device(dev_info->edac_dev) > 0) {

- printk(KERN_ERR "failed to add edac_dev for %s\n",

- dev_info->ctl_name);

- goto err_edac_free_ctl;

- printk(KERN_INFO "added one edac_dev on AMD8111 "

- "vendor %x, device %x, name %s\n",

- PCI_VENDOR_ID_AMD, dev_info->err_dev,

- dev_info->ctl_name);

- edac_device_free_ctl_info(dev_info->edac_dev);

- pci_dev_put(dev_info->dev);

-static void amd8111_dev_remove(struct pci_dev *dev)

- struct amd8111_dev_info *dev_info;

- for (dev_info = amd8111_devices; dev_info->err_dev; dev_info++)

- if (dev_info->dev->device == dev->device)

- if (!dev_info->err_dev) /* should never happen */

- if (dev_info->edac_dev) {

- edac_device_del_device(dev_info->edac_dev->dev);

- edac_device_free_ctl_info(dev_info->edac_dev);

- if (dev_info->exit)

- dev_info->exit(dev_info);

- pci_dev_put(dev_info->dev);

-static int amd8111_pci_probe(struct pci_dev *dev,

- const struct pci_device_id *id)

- struct amd8111_pci_info *pci_info = &amd8111_pcis[id->driver_data];

- int ret = -ENODEV;

- pci_info->dev = pci_get_device(PCI_VENDOR_ID_AMD,

- pci_info->err_dev, NULL);

- if (!pci_info->dev) {

- printk(KERN_ERR "EDAC device not found:"

- "vendor %x, device %x, name %s\n",

- PCI_VENDOR_ID_AMD, pci_info->err_dev,

- pci_info->ctl_name);

- if (pci_enable_device(pci_info->dev)) {

- printk(KERN_ERR "failed to enable:"

- "vendor %x, device %x, name %s\n",

- PCI_VENDOR_ID_AMD, pci_info->err_dev,

- pci_info->ctl_name);

- * we do not allocate extra private structure for

- * edac_pci_ctl_info, but make use of existing

- pci_info->edac_idx = edac_pci_alloc_index();

- pci_info->edac_dev = edac_pci_alloc_ctl_info(0, pci_info->ctl_name);

- if (!pci_info->edac_dev) {

- pci_info->edac_dev->pvt_info = pci_info;

- pci_info->edac_dev->dev = &pci_info->dev->dev;

- pci_info->edac_dev->mod_name = AMD8111_EDAC_MOD_STR;

- pci_info->edac_dev->ctl_name = pci_info->ctl_name;

- pci_info->edac_dev->dev_name = dev_name(&pci_info->dev->dev);

- if (edac_op_state == EDAC_OPSTATE_POLL)

- pci_info->edac_dev->edac_check = pci_info->check;

- if (pci_info->init)

- pci_info->init(pci_info);

- if (edac_pci_add_device(pci_info->edac_dev, pci_info->edac_idx) > 0) {

- printk(KERN_ERR "failed to add edac_pci for %s\n",

- pci_info->ctl_name);

- goto err_edac_free_ctl;

- printk(KERN_INFO "added one edac_pci on AMD8111 "

- "vendor %x, device %x, name %s\n",

- PCI_VENDOR_ID_AMD, pci_info->err_dev,

- pci_info->ctl_name);

- edac_pci_free_ctl_info(pci_info->edac_dev);

- pci_dev_put(pci_info->dev);

-static void amd8111_pci_remove(struct pci_dev *dev)

- struct amd8111_pci_info *pci_info;

- for (pci_info = amd8111_pcis; pci_info->err_dev; pci_info++)

- if (pci_info->dev->device == dev->device)

- if (!pci_info->err_dev) /* should never happen */

- if (pci_info->edac_dev) {

- edac_pci_del_device(pci_info->edac_dev->dev);

- edac_pci_free_ctl_info(pci_info->edac_dev);

- if (pci_info->exit)

- pci_info->exit(pci_info);

- pci_dev_put(pci_info->dev);

-/* PCI Device ID talbe for general EDAC device */

-static const struct pci_device_id amd8111_edac_dev_tbl[] = {

- PCI_VEND_DEV(AMD, 8111_LPC),

- .subvendor = PCI_ANY_ID,

- .subdevice = PCI_ANY_ID,

- .driver_data = LPC_BRIDGE,

- } /* table is NULL-terminated */

-MODULE_DEVICE_TABLE(pci, amd8111_edac_dev_tbl);

-static struct pci_driver amd8111_edac_dev_driver = {

- .name = "AMD8111_EDAC_DEV",

- .probe = amd8111_dev_probe,

- .remove = amd8111_dev_remove,

- .id_table = amd8111_edac_dev_tbl,

-/* PCI Device ID table for EDAC PCI controller */

-static const struct pci_device_id amd8111_edac_pci_tbl[] = {

- PCI_VEND_DEV(AMD, 8111_PCI),

- .subvendor = PCI_ANY_ID,

- .subdevice = PCI_ANY_ID,

- .driver_data = PCI_BRIDGE,

- } /* table is NULL-terminated */

-MODULE_DEVICE_TABLE(pci, amd8111_edac_pci_tbl);

-static struct pci_driver amd8111_edac_pci_driver = {

- .name = "AMD8111_EDAC_PCI",

- .probe = amd8111_pci_probe,

- .remove = amd8111_pci_remove,

- .id_table = amd8111_edac_pci_tbl,

-static int __init amd8111_edac_init(void)

- printk(KERN_INFO "AMD8111 EDAC driver " AMD8111_EDAC_REVISION "\n");

- /* Only POLL mode supported so far */

- edac_op_state = EDAC_OPSTATE_POLL;

- val = pci_register_driver(&amd8111_edac_dev_driver);

- val |= pci_register_driver(&amd8111_edac_pci_driver);

-static void __exit amd8111_edac_exit(void)

- pci_unregister_driver(&amd8111_edac_pci_driver);

- pci_unregister_driver(&amd8111_edac_dev_driver);

-module_init(amd8111_edac_init);

-module_exit(amd8111_edac_exit);

-MODULE_LICENSE("GPL");

-MODULE_AUTHOR("Cao Qingtao <qingtao.cao@windriver.com>");

-MODULE_DESCRIPTION("AMD8111 HyperTransport I/O Hub EDAC kernel module");

diff --git a/drivers/edac/amd8111_edac.h b/drivers/edac/amd8111_edac.h
deleted file mode 100644
index 200cab1b3e42..000000000000
--- a/drivers/edac/amd8111_edac.h
+++ /dev/null

-/* SPDX-License-Identifier: GPL-2.0-only */

- * amd8111_edac.h, EDAC defs for AMD8111 hypertransport chip

- * Authors: Cao Qingtao <qingtao.cao@windriver.com>

- * Benjamin Walsh <benjamin.walsh@windriver.com>

- * Hu Yongqi <yongqi.hu@windriver.com>

-#ifndef _AMD8111_EDAC_H_

-#define _AMD8111_EDAC_H_

-/************************************************************

- * PCI Bridge Status and Command Register, DevA:0x04

- ************************************************************/

-#define REG_PCI_STSCMD 0x04

-enum pci_stscmd_bits {

- PCI_STSCMD_SSE = BIT(30),

- PCI_STSCMD_RMA = BIT(29),

- PCI_STSCMD_RTA = BIT(28),

- PCI_STSCMD_SERREN = BIT(8),

- PCI_STSCMD_CLEAR_MASK = (PCI_STSCMD_SSE |

-/************************************************************

- * PCI Bridge Memory Base-Limit Register, DevA:0x1c

- ************************************************************/

-#define REG_MEM_LIM 0x1c

-enum mem_limit_bits {

- MEM_LIMIT_DPE = BIT(31),

- MEM_LIMIT_RSE = BIT(30),

- MEM_LIMIT_RMA = BIT(29),

- MEM_LIMIT_RTA = BIT(28),

- MEM_LIMIT_STA = BIT(27),

- MEM_LIMIT_MDPE = BIT(24),

- MEM_LIMIT_CLEAR_MASK = (MEM_LIMIT_DPE |

-/************************************************************

- * HyperTransport Link Control Register, DevA:0xc4

- ************************************************************/

-#define REG_HT_LINK 0xc4

-enum ht_link_bits {

- HT_LINK_LKFAIL = BIT(4),

- HT_LINK_CRCFEN = BIT(1),

- HT_LINK_CLEAR_MASK = (HT_LINK_LKFAIL)

-/************************************************************

- * PCI Bridge Interrupt and Bridge Control, DevA:0x3c

- ************************************************************/

-#define REG_PCI_INTBRG_CTRL 0x3c

-enum pci_intbrg_ctrl_bits {

- PCI_INTBRG_CTRL_DTSERREN = BIT(27),

- PCI_INTBRG_CTRL_DTSTAT = BIT(26),

- PCI_INTBRG_CTRL_MARSP = BIT(21),

- PCI_INTBRG_CTRL_SERREN = BIT(17),

- PCI_INTBRG_CTRL_PEREN = BIT(16),

- PCI_INTBRG_CTRL_CLEAR_MASK = (PCI_INTBRG_CTRL_DTSTAT),

- PCI_INTBRG_CTRL_POLL_MASK = (PCI_INTBRG_CTRL_DTSERREN |

- PCI_INTBRG_CTRL_MARSP |

- PCI_INTBRG_CTRL_SERREN)

-/************************************************************

- * I/O Control 1 Register, DevB:0x40

- ************************************************************/

-#define REG_IO_CTRL_1 0x40

-enum io_ctrl_1_bits {

- IO_CTRL_1_NMIONERR = BIT(7),

- IO_CTRL_1_LPC_ERR = BIT(6),

- IO_CTRL_1_PW2LPC = BIT(1),

- IO_CTRL_1_CLEAR_MASK = (IO_CTRL_1_LPC_ERR | IO_CTRL_1_PW2LPC)

-/************************************************************

- * Legacy I/O Space Registers

- ************************************************************/

-#define REG_AT_COMPAT 0x61

-enum at_compat_bits {

- AT_COMPAT_SERR = BIT(7),

- AT_COMPAT_IOCHK = BIT(6),

- AT_COMPAT_CLRIOCHK = BIT(3),

- AT_COMPAT_CLRSERR = BIT(2),

-struct amd8111_dev_info {

- u16 err_dev; /* PCI Device ID */

- struct pci_dev *dev;

- int edac_idx; /* device index */

- struct edac_device_ctl_info *edac_dev;

- void (*init)(struct amd8111_dev_info *dev_info);

- void (*exit)(struct amd8111_dev_info *dev_info);

- void (*check)(struct edac_device_ctl_info *edac_dev);

-struct amd8111_pci_info {

- u16 err_dev; /* PCI Device ID */

- struct pci_dev *dev;

- int edac_idx; /* pci index */

- const char *ctl_name;

- struct edac_pci_ctl_info *edac_dev;

- void (*init)(struct amd8111_pci_info *dev_info);

- void (*exit)(struct amd8111_pci_info *dev_info);

- void (*check)(struct edac_pci_ctl_info *edac_dev);

-#endif /* _AMD8111_EDAC_H_ */

diff --git a/drivers/edac/amd8131_edac.c b/drivers/edac/amd8131_edac.c
deleted file mode 100644
index 28610ba514f4..000000000000
--- a/drivers/edac/amd8131_edac.c
+++ /dev/null

-// SPDX-License-Identifier: GPL-2.0-only

- * amd8131_edac.c, AMD8131 hypertransport chip EDAC kernel module

- * Authors: Cao Qingtao <qingtao.cao@windriver.com>

- * Benjamin Walsh <benjamin.walsh@windriver.com>

- * Hu Yongqi <yongqi.hu@windriver.com>

-#include <linux/module.h>

-#include <linux/init.h>

-#include <linux/interrupt.h>

-#include <linux/io.h>

-#include <linux/bitops.h>

-#include <linux/edac.h>

-#include <linux/pci_ids.h>

-#include "edac_module.h"

-#include "amd8131_edac.h"

-#define AMD8131_EDAC_REVISION " Ver: 1.0.0"

-#define AMD8131_EDAC_MOD_STR "amd8131_edac"

-/* Wrapper functions for accessing PCI configuration space */

-static void edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)

- ret = pci_read_config_dword(dev, reg, val32);

- printk(KERN_ERR AMD8131_EDAC_MOD_STR

- " PCI Access Read Error at 0x%x\n", reg);

-static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32)

- ret = pci_write_config_dword(dev, reg, val32);

- printk(KERN_ERR AMD8131_EDAC_MOD_STR

- " PCI Access Write Error at 0x%x\n", reg);

-/* Support up to two AMD8131 chipsets on a platform */

-static struct amd8131_dev_info amd8131_devices[] = {

- .devfn = DEVFN_PCIX_BRIDGE_NORTH_A,

- .ctl_name = "AMD8131_PCIX_NORTH_A",

- .devfn = DEVFN_PCIX_BRIDGE_NORTH_B,

- .ctl_name = "AMD8131_PCIX_NORTH_B",

- .devfn = DEVFN_PCIX_BRIDGE_SOUTH_A,

- .ctl_name = "AMD8131_PCIX_SOUTH_A",

- .devfn = DEVFN_PCIX_BRIDGE_SOUTH_B,

- .ctl_name = "AMD8131_PCIX_SOUTH_B",

- {.inst = NO_BRIDGE,},

-static void amd8131_pcix_init(struct amd8131_dev_info *dev_info)

- struct pci_dev *dev = dev_info->dev;

- /* First clear error detection flags */

- edac_pci_read_dword(dev, REG_MEM_LIM, &val32);

- if (val32 & MEM_LIMIT_MASK)

- edac_pci_write_dword(dev, REG_MEM_LIM, val32);

- /* Clear Discard Timer Timedout flag */

- edac_pci_read_dword(dev, REG_INT_CTLR, &val32);

- if (val32 & INT_CTLR_DTS)

- edac_pci_write_dword(dev, REG_INT_CTLR, val32);

- /* Clear CRC Error flag on link side A */

- edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);

- if (val32 & LNK_CTRL_CRCERR_A)

- edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);

- /* Clear CRC Error flag on link side B */

- edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);

- if (val32 & LNK_CTRL_CRCERR_B)

- edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);

- * Then enable all error detections.

- * Setup Discard Timer Sync Flood Enable,

- * System Error Enable and Parity Error Enable.

- edac_pci_read_dword(dev, REG_INT_CTLR, &val32);

- val32 |= INT_CTLR_PERR | INT_CTLR_SERR | INT_CTLR_DTSE;

- edac_pci_write_dword(dev, REG_INT_CTLR, val32);

- /* Enable overall SERR Error detection */

- edac_pci_read_dword(dev, REG_STS_CMD, &val32);

- val32 |= STS_CMD_SERREN;

- edac_pci_write_dword(dev, REG_STS_CMD, val32);

- /* Setup CRC Flood Enable for link side A */

- edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);

- val32 |= LNK_CTRL_CRCFEN;

- edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);

- /* Setup CRC Flood Enable for link side B */

- edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);

- val32 |= LNK_CTRL_CRCFEN;

- edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);

-static void amd8131_pcix_exit(struct amd8131_dev_info *dev_info)

- struct pci_dev *dev = dev_info->dev;

- /* Disable SERR, PERR and DTSE Error detection */

- edac_pci_read_dword(dev, REG_INT_CTLR, &val32);

- val32 &= ~(INT_CTLR_PERR | INT_CTLR_SERR | INT_CTLR_DTSE);

- edac_pci_write_dword(dev, REG_INT_CTLR, val32);

- /* Disable overall System Error detection */

- edac_pci_read_dword(dev, REG_STS_CMD, &val32);

- val32 &= ~STS_CMD_SERREN;

- edac_pci_write_dword(dev, REG_STS_CMD, val32);

- /* Disable CRC Sync Flood on link side A */

- edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);

- val32 &= ~LNK_CTRL_CRCFEN;

- edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);

- /* Disable CRC Sync Flood on link side B */

- edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);

- val32 &= ~LNK_CTRL_CRCFEN;

- edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);

-static void amd8131_pcix_check(struct edac_pci_ctl_info *edac_dev)

- struct amd8131_dev_info *dev_info = edac_dev->pvt_info;

- struct pci_dev *dev = dev_info->dev;

- /* Check PCI-X Bridge Memory Base-Limit Register for errors */

- edac_pci_read_dword(dev, REG_MEM_LIM, &val32);

- if (val32 & MEM_LIMIT_MASK) {

- printk(KERN_INFO "Error(s) in mem limit register "

- "on %s bridge\n", dev_info->ctl_name);

- printk(KERN_INFO "DPE: %d, RSE: %d, RMA: %d\n"

- "RTA: %d, STA: %d, MDPE: %d\n",

- val32 & MEM_LIMIT_DPE,

- val32 & MEM_LIMIT_RSE,

- val32 & MEM_LIMIT_RMA,

- val32 & MEM_LIMIT_RTA,

- val32 & MEM_LIMIT_STA,

- val32 & MEM_LIMIT_MDPE);

- val32 |= MEM_LIMIT_MASK;

- edac_pci_write_dword(dev, REG_MEM_LIM, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

- /* Check if Discard Timer timed out */

- edac_pci_read_dword(dev, REG_INT_CTLR, &val32);

- if (val32 & INT_CTLR_DTS) {

- printk(KERN_INFO "Error(s) in interrupt and control register "

- "on %s bridge\n", dev_info->ctl_name);

- printk(KERN_INFO "DTS: %d\n", val32 & INT_CTLR_DTS);

- val32 |= INT_CTLR_DTS;

- edac_pci_write_dword(dev, REG_INT_CTLR, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

- /* Check if CRC error happens on link side A */

- edac_pci_read_dword(dev, REG_LNK_CTRL_A, &val32);

- if (val32 & LNK_CTRL_CRCERR_A) {

- printk(KERN_INFO "Error(s) in link conf and control register "

- "on %s bridge\n", dev_info->ctl_name);

- printk(KERN_INFO "CRCERR: %d\n", val32 & LNK_CTRL_CRCERR_A);

- val32 |= LNK_CTRL_CRCERR_A;

- edac_pci_write_dword(dev, REG_LNK_CTRL_A, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

- /* Check if CRC error happens on link side B */

- edac_pci_read_dword(dev, REG_LNK_CTRL_B, &val32);

- if (val32 & LNK_CTRL_CRCERR_B) {

- printk(KERN_INFO "Error(s) in link conf and control register "

- "on %s bridge\n", dev_info->ctl_name);

- printk(KERN_INFO "CRCERR: %d\n", val32 & LNK_CTRL_CRCERR_B);

- val32 |= LNK_CTRL_CRCERR_B;

- edac_pci_write_dword(dev, REG_LNK_CTRL_B, val32);

- edac_pci_handle_npe(edac_dev, edac_dev->ctl_name);

-static struct amd8131_info amd8131_chipset = {

- .err_dev = PCI_DEVICE_ID_AMD_8131_APIC,

- .devices = amd8131_devices,

- .init = amd8131_pcix_init,

- .exit = amd8131_pcix_exit,

- .check = amd8131_pcix_check,

- * There are 4 PCIX Bridges on ATCA-6101 that share the same PCI Device ID,

- * so amd8131_probe() would be called by kernel 4 times, with different

- * address of pci_dev for each of them each time.

-static int amd8131_probe(struct pci_dev *dev, const struct pci_device_id *id)

- struct amd8131_dev_info *dev_info;

- for (dev_info = amd8131_chipset.devices; dev_info->inst != NO_BRIDGE;

- if (dev_info->devfn == dev->devfn)

- if (dev_info->inst == NO_BRIDGE) /* should never happen */

- * We can't call pci_get_device() as we are used to do because

- * there are 4 of them but pci_dev_get() instead.

- dev_info->dev = pci_dev_get(dev);

- if (pci_enable_device(dev_info->dev)) {

- pci_dev_put(dev_info->dev);

- printk(KERN_ERR "failed to enable:"

- "vendor %x, device %x, devfn %x, name %s\n",

- PCI_VENDOR_ID_AMD, amd8131_chipset.err_dev,

- dev_info->devfn, dev_info->ctl_name);

- * we do not allocate extra private structure for

- * edac_pci_ctl_info, but make use of existing

- dev_info->edac_idx = edac_pci_alloc_index();

- dev_info->edac_dev = edac_pci_alloc_ctl_info(0, dev_info->ctl_name);

- if (!dev_info->edac_dev)

- dev_info->edac_dev->pvt_info = dev_info;

- dev_info->edac_dev->dev = &dev_info->dev->dev;

- dev_info->edac_dev->mod_name = AMD8131_EDAC_MOD_STR;

- dev_info->edac_dev->ctl_name = dev_info->ctl_name;

- dev_info->edac_dev->dev_name = dev_name(&dev_info->dev->dev);

- if (edac_op_state == EDAC_OPSTATE_POLL)

- dev_info->edac_dev->edac_check = amd8131_chipset.check;

- if (amd8131_chipset.init)

- amd8131_chipset.init(dev_info);

- if (edac_pci_add_device(dev_info->edac_dev, dev_info->edac_idx) > 0) {

- printk(KERN_ERR "failed edac_pci_add_device() for %s\n",

- dev_info->ctl_name);

- edac_pci_free_ctl_info(dev_info->edac_dev);

- printk(KERN_INFO "added one device on AMD8131 "

- "vendor %x, device %x, devfn %x, name %s\n",

- PCI_VENDOR_ID_AMD, amd8131_chipset.err_dev,

- dev_info->devfn, dev_info->ctl_name);

-static void amd8131_remove(struct pci_dev *dev)

- struct amd8131_dev_info *dev_info;

- for (dev_info = amd8131_chipset.devices; dev_info->inst != NO_BRIDGE;

- if (dev_info->devfn == dev->devfn)

- if (dev_info->inst == NO_BRIDGE) /* should never happen */

- if (dev_info->edac_dev) {

- edac_pci_del_device(dev_info->edac_dev->dev);

- edac_pci_free_ctl_info(dev_info->edac_dev);

- if (amd8131_chipset.exit)

- amd8131_chipset.exit(dev_info);

- pci_dev_put(dev_info->dev);

-static const struct pci_device_id amd8131_edac_pci_tbl[] = {

- PCI_VEND_DEV(AMD, 8131_BRIDGE),

- .subvendor = PCI_ANY_ID,

- .subdevice = PCI_ANY_ID,

- } /* table is NULL-terminated */

-MODULE_DEVICE_TABLE(pci, amd8131_edac_pci_tbl);

-static struct pci_driver amd8131_edac_driver = {

- .name = AMD8131_EDAC_MOD_STR,

- .probe = amd8131_probe,

- .remove = amd8131_remove,

- .id_table = amd8131_edac_pci_tbl,

-static int __init amd8131_edac_init(void)

- printk(KERN_INFO "AMD8131 EDAC driver " AMD8131_EDAC_REVISION "\n");

- /* Only POLL mode supported so far */

- edac_op_state = EDAC_OPSTATE_POLL;

- return pci_register_driver(&amd8131_edac_driver);

-static void __exit amd8131_edac_exit(void)

- pci_unregister_driver(&amd8131_edac_driver);

-module_init(amd8131_edac_init);

-module_exit(amd8131_edac_exit);

-MODULE_LICENSE("GPL");

-MODULE_AUTHOR("Cao Qingtao <qingtao.cao@windriver.com>");

-MODULE_DESCRIPTION("AMD8131 HyperTransport PCI-X Tunnel EDAC kernel module");

diff --git a/drivers/edac/amd8131_edac.h b/drivers/edac/amd8131_edac.h
deleted file mode 100644
index 5f362abdaf12..000000000000
--- a/drivers/edac/amd8131_edac.h
+++ /dev/null

-/* SPDX-License-Identifier: GPL-2.0-only */

- * amd8131_edac.h, EDAC defs for AMD8131 hypertransport chip

- * Authors: Cao Qingtao <qingtao.cao@windriver.com>

- * Benjamin Walsh <benjamin.walsh@windriver.com>

- * Hu Yongqi <yongqi.hu@windriver.com>

-#ifndef _AMD8131_EDAC_H_

-#define _AMD8131_EDAC_H_

-#define DEVFN_PCIX_BRIDGE_NORTH_A 8

-#define DEVFN_PCIX_BRIDGE_NORTH_B 16

-#define DEVFN_PCIX_BRIDGE_SOUTH_A 24

-#define DEVFN_PCIX_BRIDGE_SOUTH_B 32

-/************************************************************

- * PCI-X Bridge Status and Command Register, DevA:0x04

- ************************************************************/

-#define REG_STS_CMD 0x04

-enum sts_cmd_bits {

- STS_CMD_SSE = BIT(30),

- STS_CMD_SERREN = BIT(8)

-/************************************************************

- * PCI-X Bridge Interrupt and Bridge Control Register,

- ************************************************************/

-#define REG_INT_CTLR 0x3c

-enum int_ctlr_bits {

- INT_CTLR_DTSE = BIT(27),

- INT_CTLR_DTS = BIT(26),

- INT_CTLR_SERR = BIT(17),

- INT_CTLR_PERR = BIT(16)

-/************************************************************

- * PCI-X Bridge Memory Base-Limit Register, DevA:0x1C

- ************************************************************/

-#define REG_MEM_LIM 0x1c

-enum mem_limit_bits {

- MEM_LIMIT_DPE = BIT(31),

- MEM_LIMIT_RSE = BIT(30),

- MEM_LIMIT_RMA = BIT(29),

- MEM_LIMIT_RTA = BIT(28),

- MEM_LIMIT_STA = BIT(27),

- MEM_LIMIT_MDPE = BIT(24),

- MEM_LIMIT_MASK = MEM_LIMIT_DPE|MEM_LIMIT_RSE|MEM_LIMIT_RMA|

- MEM_LIMIT_RTA|MEM_LIMIT_STA|MEM_LIMIT_MDPE

-/************************************************************

- * Link Configuration And Control Register, side A

- ************************************************************/

-#define REG_LNK_CTRL_A 0xc4

-/************************************************************

- * Link Configuration And Control Register, side B

- ************************************************************/

-#define REG_LNK_CTRL_B 0xc8

-enum lnk_ctrl_bits {

- LNK_CTRL_CRCERR_A = BIT(9),

- LNK_CTRL_CRCERR_B = BIT(8),

- LNK_CTRL_CRCFEN = BIT(1)

-enum pcix_bridge_inst {

-struct amd8131_dev_info {

- enum pcix_bridge_inst inst;

- struct pci_dev *dev;

- int edac_idx; /* pci device index */

- struct edac_pci_ctl_info *edac_dev;

- * AMD8131 chipset has two pairs of PCIX Bridge and related IOAPIC

- * Controller, and ATCA-6101 has two AMD8131 chipsets, so there are

- * four PCIX Bridges on ATCA-6101 altogether.

- * These PCIX Bridges share the same PCI Device ID and are all of

- * Function Zero, they could be discrimated by their pci_dev->devfn.

- * They share the same set of init/check/exit methods, and their

- * private structures are collected in the devices[] array.

-struct amd8131_info {

- u16 err_dev; /* PCI Device ID for AMD8131 APIC*/

- struct amd8131_dev_info *devices;

- void (*init)(struct amd8131_dev_info *dev_info);

- void (*exit)(struct amd8131_dev_info *dev_info);

- void (*check)(struct edac_pci_ctl_info *edac_dev);

-#endif /* _AMD8131_EDAC_H_ */

diff --git a/drivers/edac/armada_xp_edac.c b/drivers/edac/armada_xp_edac.c
index 589bc81f1249..d64248fcf4c0 100644
--- a/drivers/edac/armada_xp_edac.c
+++ b/drivers/edac/armada_xp_edac.c

- .remove_new = axp_mc_remove,

- .remove_new = aurora_l2_remove,

diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c
index 157a480eb761..dadb8acbee3d 100644
--- a/drivers/edac/aspeed_edac.c
+++ b/drivers/edac/aspeed_edac.c

- .remove_new = aspeed_remove

diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c
index 5b3164560648..4942a240c30f 100644
--- a/drivers/edac/bluefield_edac.c
+++ b/drivers/edac/bluefield_edac.c

- * Request MLNX_SIP_GET_DIMM_INFO

- * a0: MLNX_SIP_GET_DIMM_INFO

-#define MLNX_SIP_GET_DIMM_INFO 0x82000008

- writel(ecc_latch_select, priv->emi_base + MLXBF_ECC_LATCH_SEL);

- dram_syndrom = readl(priv->emi_base + MLXBF_SYNDROM);

- dram_additional_info = readl(priv->emi_base + MLXBF_ADD_INFO);

- edea0 = readl(priv->emi_base + MLXBF_ERR_ADDR_0);

- edea1 = readl(priv->emi_base + MLXBF_ERR_ADDR_1);

- ecc_count = readl(priv->emi_base + MLXBF_ECC_CNT);

- writel(ecc_error, priv->emi_base + MLXBF_ECC_ERR);

- int mem_ctrl_idx = mci->mc_idx;

- smc_info = smc_call1(MLNX_SIP_GET_DIMM_INFO, smc_arg);

- priv->emi_base = devm_ioremap_resource(dev, emi_res);

- if (IS_ERR(priv->emi_base)) {

- dev_err(dev, "failed to map EMI IO resource\n");

- ret = PTR_ERR(priv->emi_base);

- .remove_new = bluefield_edac_mc_remove,

diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c
deleted file mode 100644
index 2000f66fbf5c..000000000000
--- a/drivers/edac/cell_edac.c
+++ /dev/null

- * Cell MIC driver for ECC counting

- * <benh@kernel.crashing.org>

- * This file may be distributed under the terms of the

- * GNU General Public License.

-#include <linux/edac.h>

-#include <linux/module.h>

-#include <linux/init.h>

-#include <linux/platform_device.h>

-#include <linux/stop_machine.h>

-#include <linux/io.h>

-#include <linux/of_address.h>

-#include <asm/machdep.h>

-#include <asm/cell-regs.h>

-#include "edac_module.h"

-struct cell_edac_priv

- struct cbe_mic_tm_regs __iomem *regs;

-static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)

- struct cell_edac_priv *priv = mci->pvt_info;

- struct csrow_info *csrow = mci->csrows[0];

- unsigned long address, pfn, offset, syndrome;

- dev_dbg(mci->pdev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",

- priv->node, chan, ar);

- /* Address decoding is likely a bit bogus, to dbl check */

- address = (ar & 0xffffffffe0000000ul) >> 29;

- if (priv->chanmask == 0x3)

- address = (address << 1) | chan;

- pfn = address >> PAGE_SHIFT;

- offset = address & ~PAGE_MASK;

- syndrome = (ar & 0x000000001fe00000ul) >> 21;

- /* TODO: Decoding of the error address */

- edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,

- csrow->first_page + pfn, offset, syndrome,

- 0, chan, -1, "", "");

-static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)

- struct cell_edac_priv *priv = mci->pvt_info;

- struct csrow_info *csrow = mci->csrows[0];

- unsigned long address, pfn, offset;

- dev_dbg(mci->pdev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",

- priv->node, chan, ar);

- /* Address decoding is likely a bit bogus, to dbl check */

- address = (ar & 0xffffffffe0000000ul) >> 29;

- if (priv->chanmask == 0x3)

- address = (address << 1) | chan;

- pfn = address >> PAGE_SHIFT;

- offset = address & ~PAGE_MASK;

- /* TODO: Decoding of the error address */

- edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,

- csrow->first_page + pfn, offset, 0,

- 0, chan, -1, "", "");

-static void cell_edac_check(struct mem_ctl_info *mci)

- struct cell_edac_priv *priv = mci->pvt_info;

- u64 fir, addreg, clear = 0;

- fir = in_be64(&priv->regs->mic_fir);

- if (fir != priv->prev_fir) {

- dev_dbg(mci->pdev, "fir change : 0x%016lx\n", fir);

- priv->prev_fir = fir;

- if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_SINGLE_0_ERR)) {

- addreg = in_be64(&priv->regs->mic_df_ecc_address_0);

- clear |= CBE_MIC_FIR_ECC_SINGLE_0_RESET;

- cell_edac_count_ce(mci, 0, addreg);

- if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_SINGLE_1_ERR)) {

- addreg = in_be64(&priv->regs->mic_df_ecc_address_1);

- clear |= CBE_MIC_FIR_ECC_SINGLE_1_RESET;

- cell_edac_count_ce(mci, 1, addreg);

- if ((priv->chanmask & 0x1) && (fir & CBE_MIC_FIR_ECC_MULTI_0_ERR)) {

- addreg = in_be64(&priv->regs->mic_df_ecc_address_0);

- clear |= CBE_MIC_FIR_ECC_MULTI_0_RESET;

- cell_edac_count_ue(mci, 0, addreg);

- if ((priv->chanmask & 0x2) && (fir & CBE_MIC_FIR_ECC_MULTI_1_ERR)) {

- addreg = in_be64(&priv->regs->mic_df_ecc_address_1);

- clear |= CBE_MIC_FIR_ECC_MULTI_1_RESET;

- cell_edac_count_ue(mci, 1, addreg);

- /* The procedure for clearing FIR bits is a bit ... weird */

- fir &= ~(CBE_MIC_FIR_ECC_ERR_MASK | CBE_MIC_FIR_ECC_SET_MASK);

- fir |= CBE_MIC_FIR_ECC_RESET_MASK;

- out_be64(&priv->regs->mic_fir, fir);

- (void)in_be64(&priv->regs->mic_fir);

- mb(); /* sync up */

- fir = in_be64(&priv->regs->mic_fir);

- dev_dbg(mci->pdev, "fir clear : 0x%016lx\n", fir);

-static void cell_edac_init_csrows(struct mem_ctl_info *mci)

- struct csrow_info *csrow = mci->csrows[0];

- struct dimm_info *dimm;

- struct cell_edac_priv *priv = mci->pvt_info;

- struct device_node *np;

- for_each_node_by_name(np, "memory") {

- struct resource r;

- /* We "know" that the Cell firmware only creates one entry

- * in the "memory" nodes. If that changes, this code will

- * need to be adapted.

- if (of_address_to_resource(np, 0, &r))

- if (of_node_to_nid(np) != priv->node)

- csrow->first_page = r.start >> PAGE_SHIFT;

- nr_pages = resource_size(&r) >> PAGE_SHIFT;

- csrow->last_page = csrow->first_page + nr_pages - 1;

- for (j = 0; j < csrow->nr_channels; j++) {

- dimm = csrow->channels[j]->dimm;

- dimm->mtype = MEM_XDR;

- dimm->edac_mode = EDAC_SECDED;

- dimm->nr_pages = nr_pages / csrow->nr_channels;

- dev_dbg(mci->pdev,

- "Initialized on node %d, chanmask=0x%x,"

- " first_page=0x%lx, nr_pages=0x%x\n",

- priv->node, priv->chanmask,

- csrow->first_page, nr_pages);

-static int cell_edac_probe(struct platform_device *pdev)

- struct cbe_mic_tm_regs __iomem *regs;

- struct mem_ctl_info *mci;

- struct edac_mc_layer layers[2];

- struct cell_edac_priv *priv;

- int rc, chanmask, num_chans;

- regs = cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(pdev->id));

- edac_op_state = EDAC_OPSTATE_POLL;

- /* Get channel population */

- reg = in_be64(&regs->mic_mnt_cfg);

- dev_dbg(&pdev->dev, "MIC_MNT_CFG = 0x%016llx\n", reg);

- if (reg & CBE_MIC_MNT_CFG_CHAN_0_POP)

- if (reg & CBE_MIC_MNT_CFG_CHAN_1_POP)

- if (chanmask == 0) {

- dev_warn(&pdev->dev,

- "Yuck ! No channel populated ? Aborting !\n");

- dev_dbg(&pdev->dev, "Initial FIR = 0x%016llx\n",

- in_be64(&regs->mic_fir));

- /* Allocate & init EDAC MC data structure */

- num_chans = chanmask == 3 ? 2 : 1;

- layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;

- layers[0].size = 1;

- layers[0].is_virt_csrow = true;

- layers[1].type = EDAC_MC_LAYER_CHANNEL;

- layers[1].size = num_chans;

- layers[1].is_virt_csrow = false;

- mci = edac_mc_alloc(pdev->id, ARRAY_SIZE(layers), layers,

- sizeof(struct cell_edac_priv));

- priv = mci->pvt_info;

- priv->regs = regs;

- priv->node = pdev->id;

- priv->chanmask = chanmask;

- mci->pdev = &pdev->dev;

- mci->mtype_cap = MEM_FLAG_XDR;

- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;

- mci->edac_cap = EDAC_FLAG_EC | EDAC_FLAG_SECDED;

- mci->mod_name = "cell_edac";

- mci->ctl_name = "MIC";

- mci->dev_name = dev_name(&pdev->dev);

- mci->edac_check = cell_edac_check;

- cell_edac_init_csrows(mci);

- /* Register with EDAC core */

- rc = edac_mc_add_mc(mci);

- dev_err(&pdev->dev, "failed to register with EDAC core\n");

- edac_mc_free(mci);

-static void cell_edac_remove(struct platform_device *pdev)

- struct mem_ctl_info *mci = edac_mc_del_mc(&pdev->dev);

- edac_mc_free(mci);

-static struct platform_driver cell_edac_driver = {

- .name = "cbe-mic",

- .probe = cell_edac_probe,

- .remove_new = cell_edac_remove,

-static int __init cell_edac_init(void)

- /* Sanity check registers data structure */

- BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,

- mic_df_ecc_address_0) != 0xf8);

- BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,

- mic_df_ecc_address_1) != 0x1b8);

- BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,

- mic_df_config) != 0x218);

- BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,

- mic_fir) != 0x230);

- BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,

- mic_mnt_cfg) != 0x210);

- BUILD_BUG_ON(offsetof(struct cbe_mic_tm_regs,

- mic_exc) != 0x208);

- return platform_driver_register(&cell_edac_driver);

-static void __exit cell_edac_exit(void)

- platform_driver_unregister(&cell_edac_driver);

-module_init(cell_edac_init);

-module_exit(cell_edac_exit);

-MODULE_LICENSE("GPL");

-MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");

-MODULE_DESCRIPTION("ECC counting for Cell MIC");

diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c
index eb702bc3aa29..9c9e4369c041 100644
--- a/drivers/edac/cpc925_edac.c
+++ b/drivers/edac/cpc925_edac.c

- .remove_new = cpc925_remove,

diff --git a/drivers/edac/dmc520_edac.c b/drivers/edac/dmc520_edac.c
index 5e52d31db3b8..64a4d0a07032 100644
--- a/drivers/edac/dmc520_edac.c
+++ b/drivers/edac/dmc520_edac.c

- .remove_new = dmc520_edac_remove

diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index d6eed727b0cd..0959320fe51c 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c

- * Alocate and fill the csrow/channels structs

diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index 4200aec04831..0f338adf7d93 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c

-/* Create a CSROW object under specifed edac_mc_device */

-/* Create a DIMM object under specifed memory controller device */

diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c
index d148d262d0d4..e4eaec0aa81d 100644
--- a/drivers/edac/fsl_ddr_edac.c
+++ b/drivers/edac/fsl_ddr_edac.c

-static u32 orig_ddr_err_disable;

-static u32 orig_ddr_err_sbe;

-static bool little_endian;

-static inline u32 ddr_in32(void __iomem *addr)

- return little_endian ? ioread32(addr) : ioread32be(addr);

-static inline void ddr_out32(void __iomem *addr, u32 value)

- if (little_endian)

- ddr_in32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_HI));

- ddr_in32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_LO));

- ddr_in32(pdata->mc_vbase + FSL_MC_ECC_ERR_INJECT));

- ddr_out32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_HI, val);

- ddr_out32(pdata->mc_vbase + FSL_MC_DATA_ERR_INJECT_LO, val);

- ddr_out32(pdata->mc_vbase + FSL_MC_ECC_ERR_INJECT, val);

- err_detect = ddr_in32(pdata->mc_vbase + FSL_MC_ERR_DETECT);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, err_detect);

- syndrome = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_ECC);

- bus_width = (ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG) &

- ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_EXT_ADDRESS),

- ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_ADDRESS));

- cap_high = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_DATA_HI);

- cap_low = ddr_in32(pdata->mc_vbase + FSL_MC_CAPTURE_DATA_LO);

- if (bad_data_bit != -1)

- fsl_mc_printk(mci, KERN_ERR,

- "Faulty Data bit: %d\n", bad_data_bit);

- if (bad_ecc_bit != -1)

- fsl_mc_printk(mci, KERN_ERR,

- "Faulty ECC bit: %d\n", bad_ecc_bit);

- cap_high ^ (1 << (bad_data_bit - 32)),

- cap_low ^ (1 << bad_data_bit),

- syndrome ^ (1 << bad_ecc_bit));

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, err_detect);

- err_detect = ddr_in32(pdata->mc_vbase + FSL_MC_ERR_DETECT);

- sdram_ctl = ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG);

- cs_bnds = ddr_in32(pdata->mc_vbase + FSL_MC_CS_BNDS_0 +

- if (sdram_ctl & DSC_X32_EN)

- little_endian = of_property_read_bool(op->dev.of_node, "little-endian");

- sdram_ctl = ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG);

- if (!(sdram_ctl & DSC_ECC_EN)) {

- MEM_FLAG_DDR4 | MEM_FLAG_RDDR4;

- orig_ddr_err_disable = ddr_in32(pdata->mc_vbase + FSL_MC_ERR_DISABLE);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DISABLE, 0);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, ~0);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_INT_EN,

- orig_ddr_err_sbe = ddr_in32(pdata->mc_vbase +

- FSL_MC_ERR_SBE) & 0xff0000;

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_SBE, 0x10000);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_INT_EN, 0);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DISABLE,

- orig_ddr_err_disable);

- ddr_out32(pdata->mc_vbase + FSL_MC_ERR_SBE, orig_ddr_err_sbe);

diff --git a/drivers/edac/fsl_ddr_edac.h b/drivers/edac/fsl_ddr_edac.h
index c0994a2a003c..73618f79e587 100644
--- a/drivers/edac/fsl_ddr_edac.h
+++ b/drivers/edac/fsl_ddr_edac.h

diff --git a/drivers/edac/highbank_l2_edac.c b/drivers/edac/highbank_l2_edac.c
index 282ca6535f8f..24f163ff323f 100644
--- a/drivers/edac/highbank_l2_edac.c
+++ b/drivers/edac/highbank_l2_edac.c

- .remove_new = highbank_l2_err_remove,

diff --git a/drivers/edac/highbank_mc_edac.c b/drivers/edac/highbank_mc_edac.c
index 1c5b888ab11d..a8879d72d064 100644
--- a/drivers/edac/highbank_mc_edac.c
+++ b/drivers/edac/highbank_mc_edac.c

- .remove_new = highbank_mc_remove,

diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index e2a954de913b..f45d849d3f15 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c

- X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),

- X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),

- X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),

- X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),

- X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),

- X86_MATCH_VFM_STEPPINGS(INTEL_SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),

- X86_MATCH_VFM_STEPPINGS(INTEL_EMERALDRAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),

- X86_MATCH_VFM_STEPPINGS(INTEL_GRANITERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

- X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_CRESTMONT_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

- X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_CRESTMONT, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),

- u8 mc = 0, src_id = 0, node_id = 0;

- rc = skx_get_node_id(d, &node_id);

- edac_dbg(2, "src_id = %d node_id = %d\n", src_id, node_id);

- d->imc[i].src_id = src_id;

- d->imc[i].node_id = node_id;

diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 4b5a71f8739d..4a1bebc1ff14 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c

- u16 b0_mtr[NUM_MTRS]; /* Memory Technlogy Reg */

- u16 b0_ambpresent1; /* Brnach 0, Channel 1 */

- u16 b1_mtr[NUM_MTRS]; /* Memory Technlogy Reg */

- /* Only if we have 2 branchs (4 channels) */

diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index 9ef13570f2e5..4fc16922dc1a 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/edac/ie31200_edac.c

- * 5918: Xeon E3-1200 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers

-#define PCI_DEVICE_ID_INTEL_IE31200_HB_11 0x5918

diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 189a2fc29e74..fdf3a84fe698 100644
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c

- edac_op_state = EDAC_OPSTATE_NMI;

diff --git a/drivers/edac/layerscape_edac.c b/drivers/edac/layerscape_edac.c
index 0d42c1238908..a2caa7fc5412 100644
--- a/drivers/edac/layerscape_edac.c
+++ b/drivers/edac/layerscape_edac.c

- .remove_new = fsl_mc_err_remove,

diff --git a/drivers/edac/loongson_edac.c b/drivers/edac/loongson_edac.c
new file mode 100644
index 000000000000..38745800ed01
--- /dev/null
+++ b/drivers/edac/loongson_edac.c

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 8130c3dc64da..50d74d3bf0f5 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c

- u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);

- if (!rdmsr_safe(addr, &low, &high) &&

- (low & MCI_CONFIG_MCAX))

- if (m->status & MCI_STATUS_SYNDV)

- pr_cont(", Syndrome: 0x%016llx", m->synd);

diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index d0266cbcbeda..a45dc6b35ede 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c

- .remove_new = mpc85xx_pci_err_remove,

- .remove_new = mpc85xx_l2_err_remove,

- .remove_new = fsl_mc_err_remove,

diff --git a/drivers/edac/npcm_edac.c b/drivers/edac/npcm_edac.c
index 2e2133b784e9..e60a99eb8cfb 100644
--- a/drivers/edac/npcm_edac.c
+++ b/drivers/edac/npcm_edac.c

- .remove_new = edac_remove,

diff --git a/drivers/edac/octeon_edac-l2c.c b/drivers/edac/octeon_edac-l2c.c
index 2adb9c8093f8..e6b1595a3cb5 100644
--- a/drivers/edac/octeon_edac-l2c.c
+++ b/drivers/edac/octeon_edac-l2c.c

- .remove_new = octeon_l2c_remove,

diff --git a/drivers/edac/octeon_edac-lmc.c b/drivers/edac/octeon_edac-lmc.c
index 4112c2ee34b8..f7176b95b4fe 100644
--- a/drivers/edac/octeon_edac-lmc.c
+++ b/drivers/edac/octeon_edac-lmc.c

- .remove_new = octeon_lmc_edac_remove,

diff --git a/drivers/edac/octeon_edac-pc.c b/drivers/edac/octeon_edac-pc.c
index d9eeb40d2784..aa1219db0b17 100644
--- a/drivers/edac/octeon_edac-pc.c
+++ b/drivers/edac/octeon_edac-pc.c

- .remove_new = co_cache_error_remove,

diff --git a/drivers/edac/octeon_edac-pci.c b/drivers/edac/octeon_edac-pci.c
index 4d368af2c5f0..c4f3bc33a971 100644
--- a/drivers/edac/octeon_edac-pci.c
+++ b/drivers/edac/octeon_edac-pci.c

- .remove_new = octeon_pci_remove,

diff --git a/drivers/edac/qcom_edac.c b/drivers/edac/qcom_edac.c
index d3cd4cc54ace..04c42c83a2ba 100644
--- a/drivers/edac/qcom_edac.c
+++ b/drivers/edac/qcom_edac.c

- rc = qcom_llcc_core_setup(llcc_driv_data, llcc_driv_data->bcast_regmap);

- .remove_new = qcom_llcc_edac_remove,

diff --git a/drivers/edac/skx_base.c b/drivers/edac/skx_base.c
index 14cfd394b469..29897b21fb8e 100644
--- a/drivers/edac/skx_base.c
+++ b/drivers/edac/skx_base.c

- X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x0, 0xf), &skx_cfg),

- u8 mc = 0, src_id, node_id;

- rc = skx_get_node_id(d, &node_id);

- edac_dbg(2, "src_id=%d node_id=%d\n", src_id, node_id);

- d->imc[i].node_id = node_id;

diff --git a/drivers/edac/skx_common.c b/drivers/edac/skx_common.c
index 85713646957b..f7bd930e058f 100644
--- a/drivers/edac/skx_common.c
+++ b/drivers/edac/skx_common.c

-static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_mem)

- if (error_in_1st_level_mem) {

-int skx_get_src_id(struct skx_dev *d, int off, u8 *id)

- if (pci_read_config_dword(d->util_all, off, &reg)) {

- skx_printk(KERN_ERR, "Failed to read src id\n");

- *id = GET_BITFIELD(reg, 12, 14);

-EXPORT_SYMBOL_GPL(skx_get_src_id);

-int skx_get_node_id(struct skx_dev *d, u8 *id)

- if (pci_read_config_dword(d->util_all, 0xf4, &reg)) {

- skx_printk(KERN_ERR, "Failed to read node id\n");

- *id = GET_BITFIELD(reg, 0, 2);

-EXPORT_SYMBOL_GPL(skx_get_node_id);

- imc->node_id, imc->lmc);

-static bool skx_error_in_1st_level_mem(const struct mce *m)

- if (!skx_mem_cfg_2lm)

- errcode = GET_BITFIELD(m->status, 0, 15) & MCACOD_MEM_ERR_MASK;

- return errcode == MCACOD_EXT_MEM_ERR;

-static bool skx_error_in_mem(const struct mce *m)

- errcode = GET_BITFIELD(m->status, 0, 15) & MCACOD_MEM_ERR_MASK;

- return (errcode == MCACOD_MEM_CTL_ERR || errcode == MCACOD_EXT_MEM_ERR);

- if (!skx_error_in_mem(mce) || !(mce->status & MCI_STATUS_ADDRV))

- if (!(adxl_component_count && skx_adxl_decode(&res, skx_error_in_1st_level_mem(mce))))

diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h
index f945c1bf5ca4..b0845bdd4516 100644
--- a/drivers/edac/skx_common.h
+++ b/drivers/edac/skx_common.h

- u8 src_id, node_id;

-int skx_get_node_id(struct skx_dev *d, u8 *id);

diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index d7416166fd8a..5ed32a3299c4 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c

- .remove_new = mc_remove,

diff --git a/drivers/edac/ti_edac.c b/drivers/edac/ti_edac.c
index 29723c9592f7..39cc2ef9cac4 100644
--- a/drivers/edac/ti_edac.c
+++ b/drivers/edac/ti_edac.c

- .remove_new = ti_edac_remove,

diff --git a/drivers/edac/versal_edac.c b/drivers/edac/versal_edac.c
index a556d23e8261..5a43b5d43ca2 100644
--- a/drivers/edac/versal_edac.c
+++ b/drivers/edac/versal_edac.c

- .remove_new = mc_remove,

diff --git a/drivers/edac/xgene_edac.c b/drivers/edac/xgene_edac.c
index fd87f1b2c145..699c7d29d80c 100644
--- a/drivers/edac/xgene_edac.c
+++ b/drivers/edac/xgene_edac.c

- .remove_new = xgene_edac_remove,

diff --git a/drivers/edac/zynqmp_edac.c b/drivers/edac/zynqmp_edac.c
index c9dc78d8c824..cdffc9e4194d 100644
--- a/drivers/edac/zynqmp_edac.c
+++ b/drivers/edac/zynqmp_edac.c

- .remove_new = edac_remove,

diff --git a/drivers/extcon/extcon-adc-jack.c b/drivers/extcon/extcon-adc-jack.c
index 125016da7fde..46c40d85c2ac 100644
--- a/drivers/extcon/extcon-adc-jack.c
+++ b/drivers/extcon/extcon-adc-jack.c

- .remove_new = adc_jack_remove,

diff --git a/drivers/extcon/extcon-fsa9480.c b/drivers/extcon/extcon-fsa9480.c
index e458ce0c45ab..b11b43171063 100644
--- a/drivers/extcon/extcon-fsa9480.c
+++ b/drivers/extcon/extcon-fsa9480.c

diff --git a/drivers/extcon/extcon-intel-cht-wc.c b/drivers/extcon/extcon-intel-cht-wc.c
index 93552dc3c895..8131a3d7d562 100644
--- a/drivers/extcon/extcon-intel-cht-wc.c
+++ b/drivers/extcon/extcon-intel-cht-wc.c

- .remove_new = cht_wc_extcon_remove,

diff --git a/drivers/extcon/extcon-intel-mrfld.c b/drivers/extcon/extcon-intel-mrfld.c
index a1f737f13d49..9219f4328d70 100644
--- a/drivers/extcon/extcon-intel-mrfld.c
+++ b/drivers/extcon/extcon-intel-mrfld.c

- .remove_new = mrfld_extcon_remove,

diff --git a/drivers/extcon/extcon-max3355.c b/drivers/extcon/extcon-max3355.c
index e62ce7a8d131..b2ee4ff8b04d 100644
--- a/drivers/extcon/extcon-max3355.c
+++ b/drivers/extcon/extcon-max3355.c

- .remove_new = max3355_remove,

diff --git a/drivers/extcon/extcon-max77843.c b/drivers/extcon/extcon-max77843.c
index 9849e3b8327e..2ae9f7f1a67f 100644
--- a/drivers/extcon/extcon-max77843.c
+++ b/drivers/extcon/extcon-max77843.c

- .remove_new = max77843_muic_remove,

diff --git a/drivers/extcon/extcon-ptn5150.c b/drivers/extcon/extcon-ptn5150.c
index 4616da7e5430..78ad86c4a3be 100644
--- a/drivers/extcon/extcon-ptn5150.c
+++ b/drivers/extcon/extcon-ptn5150.c

diff --git a/drivers/extcon/extcon-rtk-type-c.c b/drivers/extcon/extcon-rtk-type-c.c
index 19a01e663733..82b60b927e41 100644
--- a/drivers/extcon/extcon-rtk-type-c.c
+++ b/drivers/extcon/extcon-rtk-type-c.c

- .remove_new = extcon_rtk_type_c_remove,

diff --git a/drivers/extcon/extcon-usb-gpio.c b/drivers/extcon/extcon-usb-gpio.c
index 9b61eb99b7dc..5e8ad21ad206 100644
--- a/drivers/extcon/extcon-usb-gpio.c
+++ b/drivers/extcon/extcon-usb-gpio.c

- .remove_new = usb_extcon_remove,

diff --git a/drivers/extcon/extcon-usbc-cros-ec.c b/drivers/extcon/extcon-usbc-cros-ec.c
index 805a47230689..1fb627ea8b50 100644
--- a/drivers/extcon/extcon-usbc-cros-ec.c
+++ b/drivers/extcon/extcon-usbc-cros-ec.c

- .remove_new = extcon_cros_ec_remove,

diff --git a/drivers/firewire/core-device.c b/drivers/firewire/core-device.c
index a99fe35f1f0d..ec3e21ad2025 100644
--- a/drivers/firewire/core-device.c
+++ b/drivers/firewire/core-device.c

-static int compare_configuration_rom(struct device *dev, void *data)

- found = device_find_child(card->device, (void *)device->config_rom,

diff --git a/drivers/firewire/core-topology.c b/drivers/firewire/core-topology.c
index 6adadb11962e..74a6aa7d8cc9 100644
--- a/drivers/firewire/core-topology.c
+++ b/drivers/firewire/core-topology.c

- * containted in a child tree, in which case the max hop count is just

diff --git a/drivers/firewire/core.h b/drivers/firewire/core.h
index 0ae2c84ecafe..9b298af1cac0 100644
--- a/drivers/firewire/core.h
+++ b/drivers/firewire/core.h

- * a bus reset happens, so driver need to reenable this after

diff --git a/drivers/firewire/device-attribute-test.c b/drivers/firewire/device-attribute-test.c
index 2f123c6b0a16..97478a96d1c9 100644
--- a/drivers/firewire/device-attribute-test.c
+++ b/drivers/firewire/device-attribute-test.c

diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 7ee55c2804de..edaedd156a6d 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c

- * This function apppends a packet to the DMA queue for transmission.

- "The debug parameter is superceded by tracepoints events, and deprecated.");

- * during the atomic update, even on litte endian

-static void ohci_resume_iso_dma(struct fw_ohci *ohci)

- err = pcim_iomap_regions(dev, 1 << 0, ohci_driver_name);

- ohci->registers = pcim_iomap_table(dev)[0];

-static int pci_suspend(struct pci_dev *dev, pm_message_t state)

- struct fw_ohci *ohci = pci_get_drvdata(dev);

- err = pci_save_state(dev);

- ohci_err(ohci, "pci_save_state failed\n");

- err = pci_set_power_state(dev, pci_choose_state(dev, state));

- ohci_err(ohci, "pci_set_power_state failed with %d\n", err);

- pmac_ohci_off(dev);

-static int pci_resume(struct pci_dev *dev)

- struct fw_ohci *ohci = pci_get_drvdata(dev);

- pmac_ohci_on(dev);

- pci_set_power_state(dev, PCI_D0);

- pci_restore_state(dev);

- err = pci_enable_device(dev);

- ohci_err(ohci, "pci_enable_device failed\n");

- .resume = pci_resume,

- .suspend = pci_suspend,

diff --git a/drivers/firewire/sbp2.c b/drivers/firewire/sbp2.c
index 827dee0f57dd..1a19828114cf 100644
--- a/drivers/firewire/sbp2.c
+++ b/drivers/firewire/sbp2.c

-static int sbp2_scsi_slave_alloc(struct scsi_device *sdev)

-static int sbp2_scsi_device_configure(struct scsi_device *sdev,

- struct queue_limits *lim)

- .slave_alloc = sbp2_scsi_slave_alloc,

- .device_configure = sbp2_scsi_device_configure,

diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index 71d8b26c4103..9f35f69e0f9e 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig

diff --git a/drivers/firmware/arm_ffa/bus.c b/drivers/firmware/arm_ffa/bus.c
index eb17d03b66fe..dfda5ffc14db 100644
--- a/drivers/firmware/arm_ffa/bus.c
+++ b/drivers/firmware/arm_ffa/bus.c

-struct ffa_device *ffa_device_register(const uuid_t *uuid, int vm_id,

- const struct ffa_ops *ops)

- ffa_dev->vm_id = vm_id;

- uuid_copy(&ffa_dev->uuid, uuid);

diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/driver.c
index 4d231bc375e0..2c2ec3c35f15 100644
--- a/drivers/firmware/arm_ffa/driver.c
+++ b/drivers/firmware/arm_ffa/driver.c

- .a0 = FFA_MSG_SEND_DIRECT_REQ2, .a1 = src_dst_ids,

- export_uuid((u8 *)&args.a2, uuid);

- memcpy(data, &ret.a4, sizeof(*data));

- import_uuid(&uuid, (u8 *)tpbuf->uuid);

- ffa_dev = ffa_device_register(&uuid, tpbuf->id, &ffa_drv_ops);

- ffa_dev->properties = tpbuf->properties;

diff --git a/drivers/firmware/arm_scmi/bus.c b/drivers/firmware/arm_scmi/bus.c
index 96b2e5f9a8ef..a3386bf36de5 100644
--- a/drivers/firmware/arm_scmi/bus.c
+++ b/drivers/firmware/arm_scmi/bus.c

-static int scmi_match_by_id_table(struct device *dev, void *data)

- struct scmi_device_id *id_table = data;

- kfree(to_scmi_dev(dev));

- kfree_const(scmi_dev->name);

diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h
index c4b8e7ff88aa..10ea7962323e 100644
--- a/drivers/firmware/arm_scmi/common.h
+++ b/drivers/firmware/arm_scmi/common.h

- * @max_msg_size: Maximum size of data per message that can be handled.

- struct scmi_chan_info *cinfo);

- struct scmi_xfer *xfer);

- size_t max_len, struct scmi_xfer *xfer);

- bool tx, struct resource *res);

- struct scmi_desc *desc;

- strans.desc = &(__desc); \

diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index 88c5c4ff4bb6..60050da54bf2 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c

- * @atomic_threshold: Optional system wide DT-configured threshold, expressed

- * in microseconds, for atomic operations.

- * Only SCMI synchronous commands reported by the platform

- * to have an execution latency lesser-equal to the threshold

- * should be considered for atomic mode operation: such

- * decision is finally left up to the SCMI drivers.

- unsigned int atomic_threshold;

- proto = scmi_vendor_protocol_lookup(protocol_id,

- version->vendor_id,

- version->sub_vendor_id,

- version->impl_ver);

- if (protocol_id >= SCMI_PROTOCOL_VENDOR_BASE)

- pr_info("Loaded SCMI Vendor Protocol 0x%x - %s %s %X\n",

- protocol_id, proto->vendor_id ?: "",

- proto->sub_vendor_id ?: "", proto->impl_ver);

- pr_debug("Registered SCMI Protocol 0x%x\n", proto->id);

- *atomic_threshold = info->atomic_threshold;

- &info->atomic_threshold);

- scmi_debugfs_common_cleanup, dbg)) {

- scmi_debugfs_common_cleanup(dbg);

- if (!trans || !trans->desc || !trans->supplier || !trans->core_ops)

- ret = of_property_read_u32(dev->of_node, "max-rx-timeout-ms",

- &trans->desc->max_rx_timeout_ms);

- dev_err(dev, "Malformed max-rx-timeout-ms DT property.\n");

- dev_info(dev, "SCMI max-rx-timeout: %dms\n",

- trans->desc->max_rx_timeout_ms);

- return trans->desc;

- /* System wide atomic threshold for atomic ops .. if any */

- if (!of_property_read_u32(np, "atomic-threshold-us",

- &info->atomic_threshold))

- "SCMI System wide atomic threshold set to %d us\n",

- info->atomic_threshold);

- .remove_new = scmi_remove,

diff --git a/drivers/firmware/arm_scmi/perf.c b/drivers/firmware/arm_scmi/perf.c
index 2d77b5f40ca7..c7e5a34b254b 100644
--- a/drivers/firmware/arm_scmi/perf.c
+++ b/drivers/firmware/arm_scmi/perf.c

- dev_warn(dev, "Failed to add opps_by_lvl at %d for %s - ret:%d\n",

- opp = &p->perf_dom->opp[st->desc_index + st->loop_idx];

- process_response_opp(ph->dev, p->perf_dom, opp, st->loop_idx,

- process_response_opp_v4(ph->dev, p->perf_dom, opp, st->loop_idx,

diff --git a/drivers/firmware/arm_scmi/raw_mode.c b/drivers/firmware/arm_scmi/raw_mode.c
index 9e89a6a763da..7cc0d616b8de 100644
--- a/drivers/firmware/arm_scmi/raw_mode.c
+++ b/drivers/firmware/arm_scmi/raw_mode.c

- const char *id_str = filp->f_path.dentry->d_parent->d_name.name;

- if (!kstrtou8(id_str, 16, &id))

- debugfs_create_file("message", 0600, chd, raw,

- debugfs_create_file("message_async", 0600, chd, raw,

diff --git a/drivers/firmware/arm_scmi/shmem.c b/drivers/firmware/arm_scmi/shmem.c
index 01d8a9398fe8..11c347bff766 100644
--- a/drivers/firmware/arm_scmi/shmem.c
+++ b/drivers/firmware/arm_scmi/shmem.c

- struct scmi_chan_info *cinfo)

- memcpy_toio(shmem->msg_payload, xfer->tx.buf, xfer->tx.len);

- struct scmi_xfer *xfer)

- memcpy_fromio(xfer->rx.buf, shmem->msg_payload + 4, xfer->rx.len);

- size_t max_len, struct scmi_xfer *xfer)

- memcpy_fromio(xfer->rx.buf, shmem->msg_payload, xfer->rx.len);

- struct resource *res)

diff --git a/drivers/firmware/arm_scmi/transports/Makefile b/drivers/firmware/arm_scmi/transports/Makefile
index 362a406f08e6..3ba3d3bee151 100644
--- a/drivers/firmware/arm_scmi/transports/Makefile
+++ b/drivers/firmware/arm_scmi/transports/Makefile

-scmi_transport_mailbox-objs := mailbox.o

-obj-$(CONFIG_ARM_SCMI_TRANSPORT_MAILBOX) += scmi_transport_mailbox.o

diff --git a/drivers/firmware/arm_scmi/transports/mailbox.c b/drivers/firmware/arm_scmi/transports/mailbox.c
index 1a754dee24f7..bd041c99b92b 100644
--- a/drivers/firmware/arm_scmi/transports/mailbox.c
+++ b/drivers/firmware/arm_scmi/transports/mailbox.c

- core->shmem->tx_prepare(smbox->shmem, m, smbox->cinfo);

- smbox->shmem = core->shmem->setup_iomap(cinfo, dev, tx, NULL);

- ret = mbox_send_message(smbox->chan, xfer);

- /* mbox_send_message returns non-negative value on success, so reset */

- * NOTE: we might prefer not to need the mailbox ticker to manage the

- * transfer queueing since the protocol layer queues things by itself.

- * Unfortunately, we have to kick the mailbox framework after we have

- * received our message.

- core->shmem->fetch_response(smbox->shmem, xfer);

- core->shmem->fetch_notification(smbox->shmem, max_len, xfer);

- .max_msg_size = 128,

diff --git a/drivers/firmware/arm_scmi/transports/optee.c b/drivers/firmware/arm_scmi/transports/optee.c
index 56fc63edf51e..3949a877e17d 100644
--- a/drivers/firmware/arm_scmi/transports/optee.c
+++ b/drivers/firmware/arm_scmi/transports/optee.c

-#define SCMI_OPTEE_MAX_MSG_SIZE 128

- param[2].u.memref.size = SCMI_OPTEE_MAX_MSG_SIZE;

- const size_t msg_size = SCMI_OPTEE_MAX_MSG_SIZE;

- channel->req.shmem = core->shmem->setup_iomap(cinfo, dev, true, NULL);

- core->shmem->tx_prepare(channel->req.shmem, xfer, cinfo);

- core->shmem->fetch_response(channel->req.shmem, xfer);

- .max_msg_size = SCMI_OPTEE_MAX_MSG_SIZE,

diff --git a/drivers/firmware/arm_scmi/transports/smc.c b/drivers/firmware/arm_scmi/transports/smc.c
index f8dd108777f9..21abb571e4f2 100644
--- a/drivers/firmware/arm_scmi/transports/smc.c
+++ b/drivers/firmware/arm_scmi/transports/smc.c

- scmi_info->shmem = core->shmem->setup_iomap(cinfo, dev, tx, &res);

- core->shmem->tx_prepare(scmi_info->shmem, xfer, cinfo);

- core->shmem->fetch_response(scmi_info->shmem, xfer);

- .max_msg_size = 128,

diff --git a/drivers/firmware/arm_scmi/transports/virtio.c b/drivers/firmware/arm_scmi/transports/virtio.c
index d349766bc0b2..cb934db9b2b4 100644
--- a/drivers/firmware/arm_scmi/transports/virtio.c
+++ b/drivers/firmware/arm_scmi/transports/virtio.c

-#define VIRTIO_SCMI_MAX_PDU_SIZE \

- (VIRTIO_SCMI_MAX_MSG_SIZE + SCMI_MSG_MAX_PROT_OVERHEAD)

- sg_init_one(&sg_in, msg->input, VIRTIO_SCMI_MAX_PDU_SIZE);

- msg->request = devm_kzalloc(dev,

- VIRTIO_SCMI_MAX_PDU_SIZE,

- msg->input = devm_kzalloc(dev, VIRTIO_SCMI_MAX_PDU_SIZE,

diff --git a/drivers/firmware/arm_scmi/vendors/imx/Kconfig b/drivers/firmware/arm_scmi/vendors/imx/Kconfig
index 2883ed24a84d..a01bf5e47301 100644
--- a/drivers/firmware/arm_scmi/vendors/imx/Kconfig
+++ b/drivers/firmware/arm_scmi/vendors/imx/Kconfig

diff --git a/drivers/firmware/arm_scmi/vendors/imx/imx-sm-bbm.c b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-bbm.c
index 17799eacf06c..aa176c1a5eef 100644
--- a/drivers/firmware/arm_scmi/vendors/imx/imx-sm-bbm.c
+++ b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-bbm.c

- .vendor_id = "NXP",

- .sub_vendor_id = "IMX",

diff --git a/drivers/firmware/arm_scmi/vendors/imx/imx-sm-misc.c b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-misc.c
index a86ab9b35953..83b69fc4fba5 100644
--- a/drivers/firmware/arm_scmi/vendors/imx/imx-sm-misc.c
+++ b/drivers/firmware/arm_scmi/vendors/imx/imx-sm-misc.c

- .vendor_id = "NXP",

- .sub_vendor_id = "IMX",

diff --git a/drivers/firmware/arm_scpi.c b/drivers/firmware/arm_scpi.c
index 94a6b4e667de..87c323de17b9 100644
--- a/drivers/firmware/arm_scpi.c
+++ b/drivers/firmware/arm_scpi.c

- .remove_new = scpi_remove,

diff --git a/drivers/firmware/arm_sdei.c b/drivers/firmware/arm_sdei.c
index 285fe7ad490d..3e8051fe8296 100644
--- a/drivers/firmware/arm_sdei.c
+++ b/drivers/firmware/arm_sdei.c

- cpuhp_remove_state(sdei_entry_point);

diff --git a/drivers/firmware/cirrus/Kconfig b/drivers/firmware/cirrus/Kconfig
index 3ccbe14e4b0c..0a883091259a 100644
--- a/drivers/firmware/cirrus/Kconfig
+++ b/drivers/firmware/cirrus/Kconfig

diff --git a/drivers/firmware/cirrus/Makefile b/drivers/firmware/cirrus/Makefile
index b91318ca0ff4..b32dfa869491 100644
--- a/drivers/firmware/cirrus/Makefile
+++ b/drivers/firmware/cirrus/Makefile

diff --git a/drivers/firmware/cirrus/cs_dsp.c b/drivers/firmware/cirrus/cs_dsp.c
index 419220fa42fd..5365e9a43000 100644
--- a/drivers/firmware/cirrus/cs_dsp.c
+++ b/drivers/firmware/cirrus/cs_dsp.c

-EXPORT_SYMBOL_NS_GPL(cs_dsp_mem_region_name, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_init_debugfs, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_cleanup_debugfs, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_init_debugfs, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_cleanup_debugfs, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_coeff_write_acked_control, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_coeff_write_ctrl, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_coeff_read_ctrl, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_get_ctl, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_find_alg_region, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_adsp1_init, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_adsp1_power_up, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_adsp1_power_down, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_set_dspclk, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_power_up, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_power_down, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_run, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_stop, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_adsp2_init, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_halo_init, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_remove, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_read_raw_data_block, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_read_data_word, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_write_data_word, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_remove_padding, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_adsp2_bus_error, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_halo_bus_error, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_halo_wdt_expire, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_chunk_write, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_chunk_flush, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_chunk_read, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_wseq_init, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_wseq_write, FW_CS_DSP);

-EXPORT_SYMBOL_NS_GPL(cs_dsp_wseq_multi_write, FW_CS_DSP);

diff --git a/drivers/firmware/cirrus/test/Makefile b/drivers/firmware/cirrus/test/Makefile
new file mode 100644
index 000000000000..7a24a6079ddc
--- /dev/null
+++ b/drivers/firmware/cirrus/test/Makefile

diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c b/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c
new file mode 100644
index 000000000000..49d84f7e59e6
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c b/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c
new file mode 100644
index 000000000000..161272e47bda
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_regmap.c b/drivers/firmware/cirrus/test/cs_dsp_mock_regmap.c
new file mode 100644
index 000000000000..fb8e4a5d189a
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_mock_regmap.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_utils.c b/drivers/firmware/cirrus/test/cs_dsp_mock_utils.c
new file mode 100644
index 000000000000..cbd0bf72b7de
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_mock_utils.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c b/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c
new file mode 100644
index 000000000000..5a3ac03ac37f
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_bin.c b/drivers/firmware/cirrus/test/cs_dsp_test_bin.c
new file mode 100644
index 000000000000..1e161bbc5b4a
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_bin.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c b/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c
new file mode 100644
index 000000000000..5dcf62f19faf
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_callbacks.c b/drivers/firmware/cirrus/test/cs_dsp_test_callbacks.c
new file mode 100644
index 000000000000..8a9b66a3b7d3
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_callbacks.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_control_cache.c b/drivers/firmware/cirrus/test/cs_dsp_test_control_cache.c
new file mode 100644
index 000000000000..83386cc978e3
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_control_cache.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_control_parse.c b/drivers/firmware/cirrus/test/cs_dsp_test_control_parse.c
new file mode 100644
index 000000000000..cb90964740ea
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_control_parse.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_control_rw.c b/drivers/firmware/cirrus/test/cs_dsp_test_control_rw.c
new file mode 100644
index 000000000000..bda00a95d4f9
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_control_rw.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_wmfw.c b/drivers/firmware/cirrus/test/cs_dsp_test_wmfw.c
new file mode 100644
index 000000000000..9e997c4ee2d6
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_wmfw.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_wmfw_error.c b/drivers/firmware/cirrus/test/cs_dsp_test_wmfw_error.c
new file mode 100644
index 000000000000..c309843261d7
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_test_wmfw_error.c

diff --git a/drivers/firmware/cirrus/test/cs_dsp_tests.c b/drivers/firmware/cirrus/test/cs_dsp_tests.c
new file mode 100644
index 000000000000..7b829a03ca52
--- /dev/null
+++ b/drivers/firmware/cirrus/test/cs_dsp_tests.c

diff --git a/drivers/firmware/efi/Kconfig b/drivers/firmware/efi/Kconfig
index 72f2537d90ca..5fe61b9ab5f9 100644
--- a/drivers/firmware/efi/Kconfig
+++ b/drivers/firmware/efi/Kconfig

- select HAVE_KERNEL_LZ4

- select HAVE_KERNEL_LZMA

- select HAVE_KERNEL_LZO

- select HAVE_KERNEL_XZ

- memory before executing it via LoadImage/StartImage EFI boot service

- calls. For compatibility with non-EFI loaders, the payload can be

- decompressed and executed by the loader as well, provided that the

- loader implements the decompression algorithm and that non-EFI boot

- is supported by the encapsulated image. (The compression algorithm

- used is described in the zboot image header)

diff --git a/drivers/firmware/efi/dev-path-parser.c b/drivers/firmware/efi/dev-path-parser.c
index 937be269fee8..13ea141c0def 100644
--- a/drivers/firmware/efi/dev-path-parser.c
+++ b/drivers/firmware/efi/dev-path-parser.c

-static int __init match_pci_dev(struct device *dev, void *data)

- unsigned int devfn = *(unsigned int *)data;

diff --git a/drivers/firmware/efi/efi-pstore.c b/drivers/firmware/efi/efi-pstore.c
index 552c78f5f059..a253b6144945 100644
--- a/drivers/firmware/efi/efi-pstore.c
+++ b/drivers/firmware/efi/efi-pstore.c

-MODULE_IMPORT_NS(EFIVAR);

diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c
index 70490bf2697b..8296bf985d1d 100644
--- a/drivers/firmware/efi/efi.c
+++ b/drivers/firmware/efi/efi.c

- if (IS_ENABLED(CONFIG_X86))

- str = efi_systab_show_arch(str);

- if (status != EFI_BUFFER_TOO_SMALL || !data_size)

- acpi_status ret = acpi_load_table(data, NULL);

- pr_err("failed to load table: %u\n", ret);

- pr_err("failed to get var data: 0x%lx\n", status);

- efivar_ssdt_load();

diff --git a/drivers/firmware/efi/embedded-firmware.c b/drivers/firmware/efi/embedded-firmware.c
index f5be8e22305b..b49a09d7e665 100644
--- a/drivers/firmware/efi/embedded-firmware.c
+++ b/drivers/firmware/efi/embedded-firmware.c

-EXPORT_SYMBOL_NS_GPL(efi_embedded_fw_list, TEST_FIRMWARE);

-EXPORT_SYMBOL_NS_GPL(efi_embedded_fw_checked, TEST_FIRMWARE);

diff --git a/drivers/firmware/efi/esrt.c b/drivers/firmware/efi/esrt.c
index 7a81c0ce4780..4bb7b0584bc9 100644
--- a/drivers/firmware/efi/esrt.c
+++ b/drivers/firmware/efi/esrt.c

- ssize_t (*store)(struct esre_entry *entry,

- const char *buf, size_t count);

diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile
index ed4e8ddbe76a..1141cd06011f 100644
--- a/drivers/firmware/efi/libstub/Makefile
+++ b/drivers/firmware/efi/libstub/Makefile

-cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \

diff --git a/drivers/firmware/efi/libstub/Makefile.zboot b/drivers/firmware/efi/libstub/Makefile.zboot
index 65ffd0b760b2..48842b5c106b 100644
--- a/drivers/firmware/efi/libstub/Makefile.zboot
+++ b/drivers/firmware/efi/libstub/Makefile.zboot

-comp-type-$(CONFIG_KERNEL_GZIP) := gzip

-comp-type-$(CONFIG_KERNEL_LZ4) := lz4

-comp-type-$(CONFIG_KERNEL_LZMA) := lzma

-comp-type-$(CONFIG_KERNEL_LZO) := lzo

-comp-type-$(CONFIG_KERNEL_XZ) := xzkern

-comp-type-$(CONFIG_KERNEL_ZSTD) := zstd22

-# So disregard it when calculating the payload size in the zimage header.

-zboot-method-y := $(comp-type-y)_with_size

-zboot-size-len-y := 4

-zboot-method-$(CONFIG_KERNEL_GZIP) := gzip

-zboot-size-len-$(CONFIG_KERNEL_GZIP) := 0

diff --git a/drivers/firmware/efi/libstub/efi-stub-helper.c b/drivers/firmware/efi/libstub/efi-stub-helper.c
index de659f6a815f..fd6dc790c5a8 100644
--- a/drivers/firmware/efi/libstub/efi-stub-helper.c
+++ b/drivers/firmware/efi/libstub/efi-stub-helper.c

- efi_bs_call(free_pool, buf);

- struct efistub_measured_event *evt;

- efi_bs_call(free_pool, evt);

-char *efi_convert_cmdline(efi_loaded_image_t *image, int *cmd_line_len)

- *cmd_line_len = options_bytes;

- if (initrd.size > 0 &&

- efi_measure_tagged_event(initrd.base, initrd.size,

- EFISTUB_EVT_INITRD) == EFI_SUCCESS)

- efi_info("Measured initrd data into PCR 9\n");

diff --git a/drivers/firmware/efi/libstub/efi-stub.c b/drivers/firmware/efi/libstub/efi-stub.c
index 958a680e0660..874f63b4a383 100644
--- a/drivers/firmware/efi/libstub/efi-stub.c
+++ b/drivers/firmware/efi/libstub/efi-stub.c

- efi_guid_t gop_proto = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;

- efi_status_t status;

- unsigned long size;

- void **gop_handle = NULL;

- struct screen_info *si = NULL;

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL,

- &gop_proto, NULL, &size, gop_handle);

- if (status == EFI_BUFFER_TOO_SMALL) {

- si = alloc_screen_info();

- status = efi_setup_gop(si, &gop_proto, size);

- if (status != EFI_SUCCESS) {

- free_screen_info(si);

- int cmdline_size = 0;

- cmdline = efi_convert_cmdline(image, &cmdline_size);

- if (IS_ENABLED(CONFIG_CMDLINE_EXTEND) ||

- IS_ENABLED(CONFIG_CMDLINE_FORCE) ||

- cmdline_size == 0) {

- status = efi_parse_options(CONFIG_CMDLINE);

- efi_err("Failed to parse options\n");

- goto fail_free_cmdline;

- if (!IS_ENABLED(CONFIG_CMDLINE_FORCE) && cmdline_size > 0) {

- status = efi_parse_options(cmdline);

- efi_err("Failed to parse options\n");

- goto fail_free_cmdline;

- *cmdline_ptr = cmdline;

- efi_bs_call(free_pool, cmdline_ptr);

diff --git a/drivers/firmware/efi/libstub/efistub.h b/drivers/firmware/efi/libstub/efistub.h
index 685098f9626f..d96d4494070d 100644
--- a/drivers/firmware/efi/libstub/efistub.h
+++ b/drivers/firmware/efi/libstub/efistub.h

-#define for_each_efi_handle(handle, array, size, i) \

- i < efi_get_handle_num(size) && \

- ((handle = efi_get_handle_at((array), i)) || true); \

-#define EFI_MMAP_NR_SLACK_SLOTS 8

- void *locate_handle_buffer;

-char *efi_convert_cmdline(efi_loaded_image_t *image, int *cmd_line_len);

-efi_status_t efi_setup_gop(struct screen_info *si, efi_guid_t *proto,

- unsigned long size);

diff --git a/drivers/firmware/efi/libstub/file.c b/drivers/firmware/efi/libstub/file.c
index d6a025df07dc..bd626d55dcbc 100644
--- a/drivers/firmware/efi/libstub/file.c
+++ b/drivers/firmware/efi/libstub/file.c

diff --git a/drivers/firmware/efi/libstub/gop.c b/drivers/firmware/efi/libstub/gop.c
index ea5da307d542..3785fb4986b4 100644
--- a/drivers/firmware/efi/libstub/gop.c
+++ b/drivers/firmware/efi/libstub/gop.c

- efi_status_t status;

- efi_graphics_output_mode_info_t *info;

- status = efi_call_proto(gop, query_mode, cmdline.mode,

- &info_size, &info);

- efi_bs_call(free_pool, info);

-static u32 choose_mode_res(efi_graphics_output_protocol_t *gop)

- efi_status_t status;

- efi_graphics_output_protocol_mode_t *mode;

- efi_graphics_output_mode_info_t *info;

- unsigned long info_size;

- u32 max_mode, cur_mode;

- efi_pixel_bitmask_t pi;

- mode = efi_table_attr(gop, mode);

- cur_mode = efi_table_attr(mode, mode);

- info = efi_table_attr(mode, info);

- pf = info->pixel_format;

- pi = info->pixel_information;

- w = info->horizontal_resolution;

- h = info->vertical_resolution;

- if (w == cmdline.res.width && h == cmdline.res.height &&

- (cmdline.res.format < 0 || cmdline.res.format == pf) &&

- (!cmdline.res.depth || cmdline.res.depth == pixel_bpp(pf, pi)))

- max_mode = efi_table_attr(mode, max_mode);

- for (m = 0; m < max_mode; m++) {

- if (m == cur_mode)

- status = efi_call_proto(gop, query_mode, m,

- &info_size, &info);

- if (status != EFI_SUCCESS)

- pf = info->pixel_format;

- pi = info->pixel_information;

- w = info->horizontal_resolution;

- h = info->vertical_resolution;

- efi_bs_call(free_pool, info);

- if (pf == PIXEL_BLT_ONLY || pf >= PIXEL_FORMAT_MAX)

- if (w == cmdline.res.width && h == cmdline.res.height &&

- (cmdline.res.format < 0 || cmdline.res.format == pf) &&

- (!cmdline.res.depth || cmdline.res.depth == pixel_bpp(pf, pi)))

- efi_err("Couldn't find requested mode\n");

- efi_status_t status;

- efi_graphics_output_protocol_mode_t *mode;

- efi_graphics_output_mode_info_t *info;

- unsigned long info_size;

- u32 max_mode, cur_mode, best_mode, area;

- efi_pixel_bitmask_t pi;

- mode = efi_table_attr(gop, mode);

- cur_mode = efi_table_attr(mode, mode);

- max_mode = efi_table_attr(mode, max_mode);

- info = efi_table_attr(mode, info);

- pf = info->pixel_format;

- pi = info->pixel_information;

- w = info->horizontal_resolution;

- h = info->vertical_resolution;

- best_mode = cur_mode;

- depth = pixel_bpp(pf, pi);

- for (m = 0; m < max_mode; m++) {

- if (m == cur_mode)

- status = efi_call_proto(gop, query_mode, m,

- &info_size, &info);

- if (status != EFI_SUCCESS)

- pf = info->pixel_format;

- pi = info->pixel_information;

- w = info->horizontal_resolution;

- h = info->vertical_resolution;

- efi_bs_call(free_pool, info);

- if (pf == PIXEL_BLT_ONLY || pf >= PIXEL_FORMAT_MAX)

- d = pixel_bpp(pf, pi);

- if (a > area || d > depth) {

- efi_status_t status;

- efi_graphics_output_protocol_mode_t *mode;

- efi_graphics_output_mode_info_t *info;

- unsigned long info_size;

- u32 max_mode, cur_mode;

- efi_pixel_bitmask_t pi;

- mode = efi_table_attr(gop, mode);

- cur_mode = efi_table_attr(mode, mode);

- max_mode = efi_table_attr(mode, max_mode);

- for (m = 0; m < max_mode; m++) {

- status = efi_call_proto(gop, query_mode, m,

- &info_size, &info);

- if (status != EFI_SUCCESS)

- pf = info->pixel_format;

- pi = info->pixel_information;

- w = info->horizontal_resolution;

- h = info->vertical_resolution;

- efi_bs_call(free_pool, info);

- valid = !(pf == PIXEL_BLT_ONLY || pf >= PIXEL_FORMAT_MAX);

- case PIXEL_RGB_RESERVED_8BIT_PER_COLOR:

- case PIXEL_BGR_RESERVED_8BIT_PER_COLOR:

- case PIXEL_BIT_MASK:

- d = pixel_bpp(pf, pi);

- case PIXEL_BLT_ONLY:

- efi_printk("Mode %3u %c%c: Resolution %ux%u-%s%.0hhu\n",

- m == cur_mode ? '*' : ' ',

- !valid ? '-' : ' ',

-static efi_graphics_output_protocol_t *

-find_gop(efi_guid_t *proto, unsigned long size, void **handles)

- for_each_efi_handle(h, handles, size, i) {

- efi_guid_t conout_proto = EFI_CONSOLE_OUT_DEVICE_GUID;

- status = efi_bs_call(handle_protocol, h, proto, (void **)&gop);

- status = efi_bs_call(handle_protocol, h, &conout_proto, &dummy);

-static efi_status_t setup_gop(struct screen_info *si, efi_guid_t *proto,

- unsigned long size, void **handles)

- efi_graphics_output_protocol_t *gop;

- gop = find_gop(proto, size, handles);

- /* Did we find any GOPs? */

- * See if we have Graphics Output Protocol

-efi_status_t efi_setup_gop(struct screen_info *si, efi_guid_t *proto,

- unsigned long size)

- efi_status_t status;

- void **gop_handle = NULL;

- status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, size,

- (void **)&gop_handle);

- if (status != EFI_SUCCESS)

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL, proto, NULL,

- &size, gop_handle);

- if (status != EFI_SUCCESS)

- status = setup_gop(si, proto, size, gop_handle);

- efi_bs_call(free_pool, gop_handle);

diff --git a/drivers/firmware/efi/libstub/kaslr.c b/drivers/firmware/efi/libstub/kaslr.c
index 6318c40bda38..4bc963e999eb 100644
--- a/drivers/firmware/efi/libstub/kaslr.c
+++ b/drivers/firmware/efi/libstub/kaslr.c

- struct efi_boot_memmap *map;

- efi_bs_call(free_pool, map);

diff --git a/drivers/firmware/efi/libstub/mem.c b/drivers/firmware/efi/libstub/mem.c
index 4f1fa302234d..9c82259eea81 100644
--- a/drivers/firmware/efi/libstub/mem.c
+++ b/drivers/firmware/efi/libstub/mem.c

- struct efi_boot_memmap *m, tmp;

- if (status != EFI_SUCCESS)

- goto uninstall_table;

- if (install_cfg_tbl)

- efi_bs_call(install_configuration_table, &tbl_guid, NULL);

- efi_bs_call(free_pool, m);

diff --git a/drivers/firmware/efi/libstub/pci.c b/drivers/firmware/efi/libstub/pci.c
index 99fb25d2bcf5..1dccf77958d3 100644
--- a/drivers/firmware/efi/libstub/pci.c
+++ b/drivers/firmware/efi/libstub/pci.c

- unsigned long pci_handle_size = 0;

- efi_handle_t *pci_handle = NULL;

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL, &pci_proto,

- NULL, &pci_handle_size, NULL);

- if (status != EFI_BUFFER_TOO_SMALL) {

- if (status != EFI_SUCCESS && status != EFI_NOT_FOUND)

- efi_err("Failed to locate PCI I/O handles'\n");

- status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, pci_handle_size,

- (void **)&pci_handle);

- efi_err("Failed to allocate memory for 'pci_handle'\n");

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL, &pci_proto,

- NULL, &pci_handle_size, pci_handle);

- if (status != EFI_SUCCESS) {

- efi_err("Failed to locate PCI I/O handles'\n");

- for_each_efi_handle(handle, pci_handle, pci_handle_size, i) {

- efi_bs_call(free_pool, pci_handle);

diff --git a/drivers/firmware/efi/libstub/randomalloc.c b/drivers/firmware/efi/libstub/randomalloc.c
index c41e7b2091cd..e5872e38d9a4 100644
--- a/drivers/firmware/efi/libstub/randomalloc.c
+++ b/drivers/firmware/efi/libstub/randomalloc.c

- struct efi_boot_memmap *map;

- efi_bs_call(free_pool, map);

diff --git a/drivers/firmware/efi/libstub/relocate.c b/drivers/firmware/efi/libstub/relocate.c
index d694bcfa1074..99b45d1cd624 100644
--- a/drivers/firmware/efi/libstub/relocate.c
+++ b/drivers/firmware/efi/libstub/relocate.c

- struct efi_boot_memmap *map;

- status = EFI_NOT_FOUND;

- efi_bs_call(free_pool, map);

diff --git a/drivers/firmware/efi/libstub/tpm.c b/drivers/firmware/efi/libstub/tpm.c
index 1fd6823248ab..a5c6c4f163fc 100644
--- a/drivers/firmware/efi/libstub/tpm.c
+++ b/drivers/firmware/efi/libstub/tpm.c

- int final_events_size = 0;

diff --git a/drivers/firmware/efi/libstub/x86-stub.c b/drivers/firmware/efi/libstub/x86-stub.c
index f8e465da344d..863910e9eefc 100644
--- a/drivers/firmware/efi/libstub/x86-stub.c
+++ b/drivers/firmware/efi/libstub/x86-stub.c

- struct pci_setup_rom *rom = NULL;

- efi_bs_call(free_pool, rom);

- void **pci_handle = NULL;

- unsigned long size = 0;

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL,

- &pci_proto, NULL, &size, pci_handle);

- if (status == EFI_BUFFER_TOO_SMALL) {

- status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, size,

- (void **)&pci_handle);

- if (status != EFI_SUCCESS) {

- efi_err("Failed to allocate memory for 'pci_handle'\n");

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL,

- &pci_proto, NULL, &size, pci_handle);

- for_each_efi_handle(h, pci_handle, size, i) {

- efi_bs_call(free_pool, pci_handle);

- * See if we have Universal Graphics Adapter (UGA) protocol

-static efi_status_t

-setup_uga(struct screen_info *si, efi_guid_t *uga_proto, unsigned long size)

- efi_status_t status;

- u32 width, height;

- void **uga_handle = NULL;

- efi_uga_draw_protocol_t *uga = NULL, *first_uga;

- efi_handle_t handle;

- status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, size,

- (void **)&uga_handle);

- if (status != EFI_SUCCESS)

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL,

- uga_proto, NULL, &size, uga_handle);

- if (status != EFI_SUCCESS)

- for_each_efi_handle(handle, uga_handle, size, i) {

- efi_guid_t pciio_proto = EFI_PCI_IO_PROTOCOL_GUID;

- u32 w, h, depth, refresh;

- status = efi_bs_call(handle_protocol, handle, uga_proto,

- if (status != EFI_SUCCESS)

- efi_bs_call(handle_protocol, handle, &pciio_proto, &pciio);

- status = efi_call_proto(uga, get_mode, &w, &h, &depth, &refresh);

- if (status == EFI_SUCCESS && (!first_uga || pciio)) {

- * Once we've found a UGA supporting PCIIO,

- * don't bother looking any further.

- if (!width && !height)

- /* EFI framebuffer */

- si->orig_video_isVGA = VIDEO_TYPE_EFI;

- si->lfb_depth = 32;

- si->lfb_width = width;

- si->lfb_height = height;

- si->green_size = 8;

- si->green_pos = 8;

- si->blue_size = 8;

- si->rsvd_size = 8;

- si->rsvd_pos = 24;

- efi_bs_call(free_pool, uga_handle);

- efi_guid_t graphics_proto = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;

- struct screen_info *si;

- efi_guid_t uga_proto = EFI_UGA_PROTOCOL_GUID;

- efi_status_t status;

- unsigned long size;

- void **gop_handle = NULL;

- void **uga_handle = NULL;

- si = &boot_params->screen_info;

- memset(si, 0, sizeof(*si));

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL,

- &graphics_proto, NULL, &size, gop_handle);

- if (status == EFI_BUFFER_TOO_SMALL)

- status = efi_setup_gop(si, &graphics_proto, size);

- if (status != EFI_SUCCESS) {

- status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL,

- &uga_proto, NULL, &size, uga_handle);

- if (status == EFI_BUFFER_TOO_SMALL)

- setup_uga(si, &uga_proto, size);

- int options_size = 0;

- cmdline_ptr = efi_convert_cmdline(image, &options_size);

- struct efi_boot_memmap *map;

- if (IS_ENABLED(CONFIG_UNACCEPTED_MEMORY) && status == EFI_SUCCESS)

- status = allocate_unaccepted_bitmap(nr_desc, map);

- efi_bs_call(free_pool, map);

diff --git a/drivers/firmware/efi/memattr.c b/drivers/firmware/efi/memattr.c
index 164203429fa7..c38b1a335590 100644
--- a/drivers/firmware/efi/memattr.c
+++ b/drivers/firmware/efi/memattr.c

- tbl_size = sizeof(*tbl) + tbl->num_entries * tbl->desc_size;

+ pr_warn(FW_BUG "Corrupted EFI Memory Attributes Table detected! (version == %u, desc_size == %u, num_entries == %u)\n",

diff --git a/drivers/firmware/efi/sysfb_efi.c b/drivers/firmware/efi/sysfb_efi.c
index cc807ed35aed..1e509595ac03 100644
--- a/drivers/firmware/efi/sysfb_efi.c
+++ b/drivers/firmware/efi/sysfb_efi.c

diff --git a/drivers/firmware/efi/tpm.c b/drivers/firmware/efi/tpm.c
index e8d69bd548f3..cdd431027065 100644
--- a/drivers/firmware/efi/tpm.c
+++ b/drivers/firmware/efi/tpm.c

- int event_size, size = 0;

- memblock_reserve(efi.tpm_log, tbl_size);

- tbl_size = tpm2_calc_event_log_size(events,

- final_tbl->nr_events,

- if (tbl_size < 0) {

- tbl_size + sizeof(*final_tbl));

- efi_tpm_final_log_size = tbl_size;

diff --git a/drivers/firmware/efi/vars.c b/drivers/firmware/efi/vars.c
index 4056ba7f3440..3700e9869767 100644
--- a/drivers/firmware/efi/vars.c
+++ b/drivers/firmware/efi/vars.c

-EXPORT_SYMBOL_NS_GPL(efivar_lock, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_trylock, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_unlock, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_get_variable, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_get_next_variable, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_set_variable_locked, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_set_variable, EFIVAR);

-EXPORT_SYMBOL_NS_GPL(efivar_query_variable_info, EFIVAR);

diff --git a/drivers/firmware/google/cbmem.c b/drivers/firmware/google/cbmem.c
index 66042160b361..773d05078e0a 100644
--- a/drivers/firmware/google/cbmem.c
+++ b/drivers/firmware/google/cbmem.c

- struct bin_attribute *bin_attr, char *buf, loff_t pos,

-static BIN_ATTR_ADMIN_RW(mem, 0);

-static struct bin_attribute *bin_attrs[] = {

- .bin_attrs = bin_attrs,

diff --git a/drivers/firmware/google/coreboot_table.c b/drivers/firmware/google/coreboot_table.c
index 208652a8087c..882db32e51be 100644
--- a/drivers/firmware/google/coreboot_table.c
+++ b/drivers/firmware/google/coreboot_table.c

- .remove_new = coreboot_table_remove,

diff --git a/drivers/firmware/google/framebuffer-coreboot.c b/drivers/firmware/google/framebuffer-coreboot.c
index daadd71d8ddd..c68c9f56370f 100644
--- a/drivers/firmware/google/framebuffer-coreboot.c
+++ b/drivers/firmware/google/framebuffer-coreboot.c

diff --git a/drivers/firmware/google/gsmi.c b/drivers/firmware/google/gsmi.c
index d304913314e4..e8fb00dcaf65 100644
--- a/drivers/firmware/google/gsmi.c
+++ b/drivers/firmware/google/gsmi.c

- struct bin_attribute *bin_attr,

-static struct bin_attribute eventlog_bin_attr = {

- .write = eventlog_write,

- return PTR_ERR(gsmi_dev.pdev);

- pr_info("gsmi: failed to load: %d\n", ret);

diff --git a/drivers/firmware/google/memconsole.c b/drivers/firmware/google/memconsole.c
index b9d99fe1ff0f..d957af6f9349 100644
--- a/drivers/firmware/google/memconsole.c
+++ b/drivers/firmware/google/memconsole.c

- struct bin_attribute *bin_attr, char *buf,

- .read = memconsole_read,

diff --git a/drivers/firmware/google/vpd.c b/drivers/firmware/google/vpd.c
index 1749529f63d4..254ac6545d68 100644
--- a/drivers/firmware/google/vpd.c
+++ b/drivers/firmware/google/vpd.c

- struct bin_attribute *bin_attr, char *buf,

- info->bin_attr.read = vpd_attrib_read;

- struct bin_attribute *bin_attr, char *buf,

- sec->bin_attr.read = vpd_section_read;

diff --git a/drivers/firmware/imx/Kconfig b/drivers/firmware/imx/Kconfig
index 477d3f32d99a..907cd149c40a 100644
--- a/drivers/firmware/imx/Kconfig
+++ b/drivers/firmware/imx/Kconfig

- depends on IMX_SCMI_MISC_EXT || COMPILE_TEST

diff --git a/drivers/firmware/imx/imx-dsp.c b/drivers/firmware/imx/imx-dsp.c
index 01c8ef14eaec..ed79e823157a 100644
--- a/drivers/firmware/imx/imx-dsp.c
+++ b/drivers/firmware/imx/imx-dsp.c

- .remove_new = imx_dsp_remove,

diff --git a/drivers/firmware/iscsi_ibft.c b/drivers/firmware/iscsi_ibft.c
index 6e9788324fea..371f24569b3b 100644
--- a/drivers/firmware/iscsi_ibft.c
+++ b/drivers/firmware/iscsi_ibft.c

- val = cpu_to_be32(~((1 << (32-nic->subnet_mask_prefix))-1));

diff --git a/drivers/firmware/memmap.c b/drivers/firmware/memmap.c
index 8e59be3782cb..55b9cfad8a04 100644
--- a/drivers/firmware/memmap.c
+++ b/drivers/firmware/memmap.c

-static struct kobj_type __refdata memmap_ktype = {

diff --git a/drivers/firmware/microchip/mpfs-auto-update.c b/drivers/firmware/microchip/mpfs-auto-update.c
index 9ca5ee58edbd..e194f7acb2a9 100644
--- a/drivers/firmware/microchip/mpfs-auto-update.c
+++ b/drivers/firmware/microchip/mpfs-auto-update.c

-#define AUTO_UPDATE_TIMEOUT_MS 60000

- struct completion programming_complete;

- struct mpfs_auto_update_priv *priv = fw_uploader->dd_handle;

- * There is no meaningful way to get the status of the programming while

- * it is in progress, so attempting anything other than waiting for it

- * to complete would be misplaced.

- ret = wait_for_completion_timeout(&priv->programming_complete,

- msecs_to_jiffies(AUTO_UPDATE_TIMEOUT_MS));

- return FW_UPLOAD_ERR_TIMEOUT;

- enum fw_upload_err err = FW_UPLOAD_ERR_NONE;

- reinit_completion(&priv->programming_complete);

- err = FW_UPLOAD_ERR_RW_ERROR;

- if (priv->cancel_request) {

- err = FW_UPLOAD_ERR_CANCELED;

- err = FW_UPLOAD_ERR_FW_INVALID;

- complete(&priv->programming_complete);

- * Bit 5 of byte 1 is "UL_Auto Update" & if it is set, Auto Update is

- if (response_msg[1] & AUTO_UPDATE_FEATURE_ENABLED)

- init_completion(&priv->programming_complete);

- .remove_new = mpfs_auto_update_remove,

diff --git a/drivers/firmware/mtk-adsp-ipc.c b/drivers/firmware/mtk-adsp-ipc.c
index a762302978de..2b79371c61c9 100644
--- a/drivers/firmware/mtk-adsp-ipc.c
+++ b/drivers/firmware/mtk-adsp-ipc.c

- ret = PTR_ERR(adsp_chan->ch);

- if (ret != -EPROBE_DEFER)

- dev_err(dev, "Failed to request mbox chan %s ret %d\n",

- adsp_mbox_ch_names[i], ret);

- .remove_new = mtk_adsp_ipc_remove,

diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index 2328ca58bba6..a1ebbe9b73b1 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c

diff --git a/drivers/firmware/qcom/qcom_scm-smc.c b/drivers/firmware/qcom/qcom_scm-smc.c
index 2b4c2826f572..574930729ddd 100644
--- a/drivers/firmware/qcom/qcom_scm-smc.c
+++ b/drivers/firmware/qcom/qcom_scm-smc.c

- struct qcom_tzmem_pool *mempool = qcom_scm_get_tzmem_pool();

diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
index 10986cb11ec0..f0569bb9411f 100644
--- a/drivers/firmware/qcom/qcom_scm.c
+++ b/drivers/firmware/qcom/qcom_scm.c

- return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0];

- return !!READ_ONCE(__scm);

- /* Let all above stores be available after this */

- if (irq != -ENXIO)

- return dev_err_probe(scm->dev, ret, "Failed to request qcom-scm irq\n");

- if (ret && ret != -ENODEV)

- return dev_err_probe(__scm->dev, ret,

- "Failed to setup the reserved memory region for TZ mem\n");

- return dev_err_probe(__scm->dev, ret,

- "Failed to enable the TrustZone memory allocator\n");

- if (IS_ERR(__scm->mempool))

- return dev_err_probe(__scm->dev, PTR_ERR(__scm->mempool),

- "Failed to create the SCM memory pool\n");

diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h
index 685b8f59e7a6..097369d38b84 100644
--- a/drivers/firmware/qcom/qcom_scm.h
+++ b/drivers/firmware/qcom/qcom_scm.h

diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 85c525745b31..d58da3e4500a 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c

- .remove_new = fw_cfg_sysfs_remove,

diff --git a/drivers/firmware/raspberrypi.c b/drivers/firmware/raspberrypi.c
index 18cc34987108..7ecde6921a0a 100644
--- a/drivers/firmware/raspberrypi.c
+++ b/drivers/firmware/raspberrypi.c

- .remove_new = rpi_firmware_remove,

diff --git a/drivers/firmware/smccc/smccc.c b/drivers/firmware/smccc/smccc.c
index d670635914ec..a74600d9f2d7 100644
--- a/drivers/firmware/smccc/smccc.c
+++ b/drivers/firmware/smccc/smccc.c

-u64 __ro_after_init smccc_has_sve_hint = false;

- if (IS_ENABLED(CONFIG_ARM64_SVE) &&

- smccc_version >= ARM_SMCCC_VERSION_1_3)

- smccc_has_sve_hint = true;

diff --git a/drivers/firmware/stratix10-rsu.c b/drivers/firmware/stratix10-rsu.c
index e20cee9c2d32..1ea39a0a76c7 100644
--- a/drivers/firmware/stratix10-rsu.c
+++ b/drivers/firmware/stratix10-rsu.c

- .remove_new = stratix10_rsu_remove,

diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c
index 528f37417aea..3c52cb73237a 100644
--- a/drivers/firmware/stratix10-svc.c
+++ b/drivers/firmware/stratix10-svc.c

- kthread_create_on_node(svc_normal_to_secure_thread,

- (void *)chan->ctrl,

- "svc_smc_hvc_thread");

- kthread_bind(chan->ctrl->task, cpu);

- wake_up_process(chan->ctrl->task);

- .remove_new = stratix10_svc_drv_remove,

diff --git a/drivers/firmware/sysfb.c b/drivers/firmware/sysfb.c
index a3df782fa687..7c5c03f274b9 100644
--- a/drivers/firmware/sysfb.c
+++ b/drivers/firmware/sysfb.c

diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c
index 2bee6e918f81..c3a1dc344961 100644
--- a/drivers/firmware/tegra/bpmp.c
+++ b/drivers/firmware/tegra/bpmp.c

-#include <linux/cleanup.h>

- struct device_node *np __free(device_node);

- return ERR_PTR(-ENODEV);

- return ERR_PTR(-EPROBE_DEFER);

diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 160968301b1f..806a975fff22 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c

- .of_match_table = of_match_ptr(ti_sci_of_match),

diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
index 5846c60220f5..053387d7baa0 100644
--- a/drivers/firmware/ti_sci.h
+++ b/drivers/firmware/ti_sci.h

diff --git a/drivers/firmware/turris-mox-rwtm.c b/drivers/firmware/turris-mox-rwtm.c
index f3bc0d427825..47fe6261f5a3 100644
--- a/drivers/firmware/turris-mox-rwtm.c
+++ b/drivers/firmware/turris-mox-rwtm.c

- /* board information */

- /* public key burned in eFuse */

diff --git a/drivers/firmware/xilinx/zynqmp-debug.c b/drivers/firmware/xilinx/zynqmp-debug.c
index 8528850af889..22853ae0efdf 100644
--- a/drivers/firmware/xilinx/zynqmp-debug.c
+++ b/drivers/firmware/xilinx/zynqmp-debug.c

- u64 pm_api_arg[4] = {0, 0, 0, 0};

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index add8acf66a9c..720fa8b5d8e9 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c

- if (module_id == TF_A_MODULE_ID)

- smc_arg[1] = (api_id & API_ID_MASK);

- ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, qdata.arg1, qdata.arg2,

-int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,

-int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)

- if (ret < PM_PINCTRL_PARAM_SET_VERSION)

- .remove_new = zynqmp_firmware_remove,

diff --git a/drivers/fpga/altera-fpga2sdram.c b/drivers/fpga/altera-fpga2sdram.c
index f4de3fea0b2d..e41492988dd6 100644
--- a/drivers/fpga/altera-fpga2sdram.c
+++ b/drivers/fpga/altera-fpga2sdram.c

- .remove_new = alt_fpga_bridge_remove,

diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera-freeze-bridge.c
index 44061cb16f87..594693ff786e 100644
--- a/drivers/fpga/altera-freeze-bridge.c
+++ b/drivers/fpga/altera-freeze-bridge.c

- .remove_new = altera_freeze_br_remove,

diff --git a/drivers/fpga/altera-hps2fpga.c b/drivers/fpga/altera-hps2fpga.c
index 6f8e24be19c6..f2f1250689cb 100644
--- a/drivers/fpga/altera-hps2fpga.c
+++ b/drivers/fpga/altera-hps2fpga.c

- .remove_new = alt_fpga_bridge_remove,

diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl-afu-dma-region.c
index 02b60fde0430..5aa7b8884374 100644
--- a/drivers/fpga/dfl-afu-dma-region.c
+++ b/drivers/fpga/dfl-afu-dma-region.c

-void afu_dma_region_init(struct dfl_feature_platform_data *pdata)

- struct dfl_afu *afu = dfl_fpga_pdata_get_private(pdata);

- * @pdata: feature device platform data

-static int afu_dma_pin_pages(struct dfl_feature_platform_data *pdata,

- struct device *dev = &pdata->dev->dev;

- * @pdata: feature device platform data

-static void afu_dma_unpin_pages(struct dfl_feature_platform_data *pdata,

- struct device *dev = &pdata->dev->dev;

- * @pdata: feature device platform data

- * Needs to be called with pdata->lock heold.

-static int afu_dma_region_add(struct dfl_feature_platform_data *pdata,

- struct dfl_afu *afu = dfl_fpga_pdata_get_private(pdata);

- dev_dbg(&pdata->dev->dev, "add region (iova = %llx)\n",

- * @pdata: feature device platform data

- * Needs to be called with pdata->lock heold.

-static void afu_dma_region_remove(struct dfl_feature_platform_data *pdata,

- dev_dbg(&pdata->dev->dev, "del region (iova = %llx)\n",

- afu = dfl_fpga_pdata_get_private(pdata);

- * @pdata: feature device platform data

- * Needs to be called with pdata->lock heold.

-void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata)

- struct dfl_afu *afu = dfl_fpga_pdata_get_private(pdata);

- dev_dbg(&pdata->dev->dev, "del region (iova = %llx)\n",

- dma_unmap_page(dfl_fpga_pdata_to_parent(pdata),

- afu_dma_unpin_pages(pdata, region);

- * @pdata: feature device platform data

- * Needs to be called with pdata->lock held.

-afu_dma_region_find(struct dfl_feature_platform_data *pdata, u64 iova, u64 size)

- struct dfl_afu *afu = dfl_fpga_pdata_get_private(pdata);

- struct device *dev = &pdata->dev->dev;

- * @pdata: feature device platform data

- * Needs to be called with pdata->lock held.

-afu_dma_region_find_iova(struct dfl_feature_platform_data *pdata, u64 iova)

- return afu_dma_region_find(pdata, iova, 0);

- * @pdata: feature device platform data

-int afu_dma_map_region(struct dfl_feature_platform_data *pdata,

- ret = afu_dma_pin_pages(pdata, region);

- dev_err(&pdata->dev->dev, "failed to pin memory region\n");

- dev_err(&pdata->dev->dev, "pages are not continuous\n");

- region->iova = dma_map_page(dfl_fpga_pdata_to_parent(pdata),

- if (dma_mapping_error(dfl_fpga_pdata_to_parent(pdata), region->iova)) {

- dev_err(&pdata->dev->dev, "failed to map for dma\n");

- mutex_lock(&pdata->lock);

- ret = afu_dma_region_add(pdata, region);

- mutex_unlock(&pdata->lock);

- dev_err(&pdata->dev->dev, "failed to add dma region\n");

- dma_unmap_page(dfl_fpga_pdata_to_parent(pdata),

- afu_dma_unpin_pages(pdata, region);

- * @pdata: feature device platform data

-int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova)

- mutex_lock(&pdata->lock);

- region = afu_dma_region_find_iova(pdata, iova);

- mutex_unlock(&pdata->lock);

- afu_dma_region_remove(pdata, region);

- mutex_unlock(&pdata->lock);

- dma_unmap_page(dfl_fpga_pdata_to_parent(pdata),

- afu_dma_unpin_pages(pdata, region);

diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl-afu-error.c
index ab7be6217368..0f392d1f6d45 100644
--- a/drivers/fpga/dfl-afu-error.c
+++ b/drivers/fpga/dfl-afu-error.c

-static void __afu_port_err_mask(struct device *dev, bool mask)

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- mutex_lock(&pdata->lock);

- __afu_port_err_mask(dev, mask);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- struct platform_device *pdev = to_platform_device(dev);

- base_err = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);

- base_hdr = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- ret = __afu_port_disable(pdev);

- __afu_port_err_mask(dev, true);

- __afu_port_err_mask(dev, false);

- enable_ret = __afu_port_enable(pdev);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- if (!dfl_get_feature_by_id(dev, PORT_FEATURE_ID_ERROR))

diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
index 6b97c073849e..3bf8e7338dbe 100644
--- a/drivers/fpga/dfl-afu-main.c
+++ b/drivers/fpga/dfl-afu-main.c

- * @pdev: port platform device.

-int __afu_port_enable(struct platform_device *pdev)

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- WARN_ON(!pdata->disable_count);

- if (--pdata->disable_count != 0)

- base = dfl_get_feature_ioaddr_by_id(&pdev->dev, PORT_FEATURE_ID_HEADER);

- dev_err(&pdev->dev, "timeout, failure to enable device\n");

- * @pdev: port platform device.

-int __afu_port_disable(struct platform_device *pdev)

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- if (pdata->disable_count++ != 0)

- base = dfl_get_feature_ioaddr_by_id(&pdev->dev, PORT_FEATURE_ID_HEADER);

- dev_err(&pdev->dev, "timeout, failure to disable device\n");

-static int __port_reset(struct platform_device *pdev)

- ret = __afu_port_disable(pdev);

- return __afu_port_enable(pdev);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- ret = __port_reset(pdev);

- mutex_unlock(&pdata->lock);

-static int port_get_id(struct platform_device *pdev)

- base = dfl_get_feature_ioaddr_by_id(&pdev->dev, PORT_FEATURE_ID_HEADER);

- int id = port_get_id(to_platform_device(dev));

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_AFU);

- mutex_lock(&pdata->lock);

- if (pdata->disable_count) {

- mutex_unlock(&pdata->lock);

- if (!dfl_get_feature_by_id(dev, PORT_FEATURE_ID_AFU))

- return afu_mmio_region_add(dev_get_platdata(&pdev->dev),

- struct platform_device *fdev = dfl_fpga_inode_to_feature_dev(inode);

- struct dfl_feature_platform_data *pdata;

- pdata = dev_get_platdata(&fdev->dev);

- if (WARN_ON(!pdata))

- mutex_lock(&pdata->lock);

- ret = dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL);

- dfl_feature_dev_use_count(pdata));

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata;

- pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- dfl_feature_dev_use_end(pdata);

- if (!dfl_feature_dev_use_count(pdata)) {

- dfl_fpga_dev_for_each_feature(pdata, feature)

- __port_reset(pdev);

- afu_dma_region_destroy(pdata);

- mutex_unlock(&pdata->lock);

-static long afu_ioctl_check_extension(struct dfl_feature_platform_data *pdata,

-afu_ioctl_get_info(struct dfl_feature_platform_data *pdata, void __user *arg)

- mutex_lock(&pdata->lock);

- afu = dfl_fpga_pdata_get_private(pdata);

- mutex_unlock(&pdata->lock);

-static long afu_ioctl_get_region_info(struct dfl_feature_platform_data *pdata,

- ret = afu_mmio_region_get_by_index(pdata, rinfo.index, &region);

-afu_ioctl_dma_map(struct dfl_feature_platform_data *pdata, void __user *arg)

- ret = afu_dma_map_region(pdata, map.user_addr, map.length, &map.iova);

- afu_dma_unmap_region(pdata, map.iova);

- dev_dbg(&pdata->dev->dev, "dma map: ua=%llx, len=%llx, iova=%llx\n",

-afu_ioctl_dma_unmap(struct dfl_feature_platform_data *pdata, void __user *arg)

- return afu_dma_unmap_region(pdata, unmap.iova);

- struct dfl_feature_platform_data *pdata;

- pdata = dev_get_platdata(&pdev->dev);

- return afu_ioctl_check_extension(pdata, arg);

- return afu_ioctl_get_info(pdata, (void __user *)arg);

- return afu_ioctl_get_region_info(pdata, (void __user *)arg);

- return afu_ioctl_dma_map(pdata, (void __user *)arg);

- return afu_ioctl_dma_unmap(pdata, (void __user *)arg);

- dfl_fpga_dev_for_each_feature(pdata, f)

- struct dfl_feature_platform_data *pdata;

- pdata = dev_get_platdata(&pdev->dev);

- ret = afu_mmio_region_get_by_offset(pdata, offset, size, &region);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- dfl_fpga_pdata_set_private(pdata, afu);

- afu_mmio_region_init(pdata);

- afu_dma_region_init(pdata);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- afu_mmio_region_destroy(pdata);

- afu_dma_region_destroy(pdata);

- dfl_fpga_pdata_set_private(pdata, NULL);

- mutex_unlock(&pdata->lock);

-static int port_enable_set(struct platform_device *pdev, bool enable)

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- ret = __afu_port_enable(pdev);

- ret = __afu_port_disable(pdev);

- mutex_unlock(&pdata->lock);

- .name = DFL_FPGA_FEATURE_DEV_PORT,

- .probe = afu_probe,

- .remove_new = afu_remove,

diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl-afu-region.c
index 2e7b41629406..b11a5b21e666 100644
--- a/drivers/fpga/dfl-afu-region.c
+++ b/drivers/fpga/dfl-afu-region.c

- * @pdata: afu platform device's pdata.

-void afu_mmio_region_init(struct dfl_feature_platform_data *pdata)

- struct dfl_afu *afu = dfl_fpga_pdata_get_private(pdata);

- * @pdata: afu platform device's pdata.

-int afu_mmio_region_add(struct dfl_feature_platform_data *pdata,

- region = devm_kzalloc(&pdata->dev->dev, sizeof(*region), GFP_KERNEL);

- mutex_lock(&pdata->lock);

- afu = dfl_fpga_pdata_get_private(pdata);

- mutex_unlock(&pdata->lock);

- devm_kfree(&pdata->dev->dev, region);

- * @pdata: afu platform device's pdata.

-void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata)

- struct dfl_afu *afu = dfl_fpga_pdata_get_private(pdata);

- devm_kfree(&pdata->dev->dev, region);

- * @pdata: afu platform device's pdata.

-int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata,

- mutex_lock(&pdata->lock);

- afu = dfl_fpga_pdata_get_private(pdata);

- mutex_unlock(&pdata->lock);

- * @pdata: afu platform device's pdata.

-int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata,

- mutex_lock(&pdata->lock);

- afu = dfl_fpga_pdata_get_private(pdata);

- mutex_unlock(&pdata->lock);

diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl-afu.h
index 7bef3e300aa2..03be4f0969c7 100644
--- a/drivers/fpga/dfl-afu.h
+++ b/drivers/fpga/dfl-afu.h

-/* hold pdata->lock when call __afu_port_enable/disable */

-int __afu_port_enable(struct platform_device *pdev);

-int __afu_port_disable(struct platform_device *pdev);

-void afu_mmio_region_init(struct dfl_feature_platform_data *pdata);

-int afu_mmio_region_add(struct dfl_feature_platform_data *pdata,

-void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata);

-int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata,

-int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata,

-void afu_dma_region_init(struct dfl_feature_platform_data *pdata);

-void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata);

-int afu_dma_map_region(struct dfl_feature_platform_data *pdata,

-int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova);

-afu_dma_region_find(struct dfl_feature_platform_data *pdata,

diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl-fme-br.c
index 0b01b3895277..28b0f9d062ac 100644
--- a/drivers/fpga/dfl-fme-br.c
+++ b/drivers/fpga/dfl-fme-br.c

- struct platform_device *port_pdev;

- if (!priv->port_pdev) {

- port_pdev = dfl_fpga_cdev_find_port(priv->pdata->cdev,

- &priv->pdata->port_id,

- dfl_fpga_check_port_id);

- priv->port_pdev = port_pdev;

- if (priv->port_pdev && !priv->port_ops) {

- ops = dfl_fpga_port_ops_get(priv->port_pdev);

- return priv->port_ops->enable_set(priv->port_pdev, enable);

- if (priv->port_pdev)

- put_device(&priv->port_pdev->dev);

- .name = DFL_FPGA_FME_BRIDGE,

- .probe = fme_br_probe,

- .remove_new = fme_br_remove,

diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl-fme-error.c
index 51c2892ec06d..f00d949efe69 100644
--- a/drivers/fpga/dfl-fme-error.c
+++ b/drivers/fpga/dfl-fme-error.c

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

- if (!dfl_get_feature_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR))

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c
index 864924f68f5e..8aca2fb20e87 100644
--- a/drivers/fpga/dfl-fme-main.c
+++ b/drivers/fpga/dfl-fme-main.c

- base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER);

-static long fme_hdr_ioctl_release_port(struct dfl_feature_platform_data *pdata,

- struct dfl_fpga_cdev *cdev = pdata->dfl_cdev;

-static long fme_hdr_ioctl_assign_port(struct dfl_feature_platform_data *pdata,

- struct dfl_fpga_cdev *cdev = pdata->dfl_cdev;

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- return fme_hdr_ioctl_release_port(pdata, arg);

- return fme_hdr_ioctl_assign_port(pdata, arg);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev->parent);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

-static long fme_ioctl_check_extension(struct dfl_feature_platform_data *pdata,

- struct platform_device *fdev = dfl_fpga_inode_to_feature_dev(inode);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&fdev->dev);

- if (WARN_ON(!pdata))

- mutex_lock(&pdata->lock);

- ret = dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL);

- dfl_feature_dev_use_count(pdata));

- filp->private_data = pdata;

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = filp->private_data;

- struct platform_device *pdev = pdata->dev;

- mutex_lock(&pdata->lock);

- dfl_feature_dev_use_end(pdata);

- if (!dfl_feature_dev_use_count(pdata))

- dfl_fpga_dev_for_each_feature(pdata, feature)

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = filp->private_data;

- struct platform_device *pdev = pdata->dev;

- return fme_ioctl_check_extension(pdata, arg);

- dfl_fpga_dev_for_each_feature(pdata, f) {

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- dfl_fpga_pdata_set_private(pdata, fme);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- dfl_fpga_pdata_set_private(pdata, NULL);

- mutex_unlock(&pdata->lock);

- .name = DFL_FPGA_FEATURE_DEV_FME,

- .probe = fme_probe,

- .remove_new = fme_remove,

diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c
index cdcf6dea4cc9..b878b260af38 100644
--- a/drivers/fpga/dfl-fme-pr.c
+++ b/drivers/fpga/dfl-fme-pr.c

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- fme_hdr = dfl_get_feature_ioaddr_by_id(&pdev->dev,

- FME_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- fme = dfl_fpga_pdata_get_private(pdata);

- mutex_unlock(&pdata->lock);

- * @pdata: fme platform_device's pdata

-dfl_fme_create_mgr(struct dfl_feature_platform_data *pdata,

- struct platform_device *mgr, *fme = pdata->dev;

- * @pdata: fme platform device's pdata

-static void dfl_fme_destroy_mgr(struct dfl_feature_platform_data *pdata)

- struct dfl_fme *priv = dfl_fpga_pdata_get_private(pdata);

- * @pdata: fme platform device's pdata

-dfl_fme_create_bridge(struct dfl_feature_platform_data *pdata, int port_id)

- struct device *dev = &pdata->dev->dev;

- br_pdata.cdev = pdata->dfl_cdev;

- * @pdata: fme platform device's pdata

-static void dfl_fme_destroy_bridges(struct dfl_feature_platform_data *pdata)

- struct dfl_fme *priv = dfl_fpga_pdata_get_private(pdata);

- * @pdata: fme platform device's pdata

-dfl_fme_create_region(struct dfl_feature_platform_data *pdata,

- struct device *dev = &pdata->dev->dev;

- * @pdata: fme platform device's pdata

-static void dfl_fme_destroy_regions(struct dfl_feature_platform_data *pdata)

- struct dfl_fme *priv = dfl_fpga_pdata_get_private(pdata);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- fme_hdr = dfl_get_feature_ioaddr_by_id(&pdev->dev,

- FME_FEATURE_ID_HEADER);

- mutex_lock(&pdata->lock);

- priv = dfl_fpga_pdata_get_private(pdata);

- mgr = dfl_fme_create_mgr(pdata, feature);

- fme_br = dfl_fme_create_bridge(pdata, i);

- fme_region = dfl_fme_create_region(pdata, mgr,

- mutex_unlock(&pdata->lock);

- dfl_fme_destroy_regions(pdata);

- dfl_fme_destroy_bridges(pdata);

- dfl_fme_destroy_mgr(pdata);

- mutex_unlock(&pdata->lock);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- dfl_fme_destroy_regions(pdata);

- dfl_fme_destroy_bridges(pdata);

- dfl_fme_destroy_mgr(pdata);

- mutex_unlock(&pdata->lock);

diff --git a/drivers/fpga/dfl-fme-region.c b/drivers/fpga/dfl-fme-region.c
index 71616f8b4982..c6cd63063c82 100644
--- a/drivers/fpga/dfl-fme-region.c
+++ b/drivers/fpga/dfl-fme-region.c

- .name = DFL_FPGA_FME_REGION,

- .probe = fme_region_probe,

- .remove_new = fme_region_remove,

diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index 80cac3a5f976..602807d6afcc 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c

-static void __iomem *cci_pci_ioremap_bar0(struct pci_dev *pcidev)

- if (pcim_iomap_regions(pcidev, BIT(0), DRV_NAME))

- return pcim_iomap_table(pcidev)[0];

- base = cci_pci_ioremap_bar0(pcidev);

- pcim_iounmap_regions(pcidev, BIT(0));

diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index c406b949026f..7022657243c0 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c

-static enum dfl_id_type feature_dev_id_type(struct platform_device *pdev)

- for (i = 0; i < ARRAY_SIZE(dfl_devs); i++)

- if (!strcmp(dfl_devs[i].name, pdev->name))

- return DFL_ID_MAX;

- * @pdev: platform device to match with associated port ops.

-struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pdev)

- if (!strcmp(pdev->name, ops->name)) {

- * @pdev: port platform device.

-int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id)

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- if (pdata->id != FEATURE_DEV_ID_UNUSED)

- return pdata->id == *(int *)pport_id;

- port_ops = dfl_fpga_port_ops_get(pdev);

- pdata->id = port_ops->get_id(pdev);

- return pdata->id == *(int *)pport_id;

-dfl_dev_add(struct dfl_feature_platform_data *pdata,

- struct platform_device *pdev = pdata->dev;

- ddev->type = feature_dev_id_type(pdev);

- ddev->cdev = pdata->dfl_cdev;

-static void dfl_devs_remove(struct dfl_feature_platform_data *pdata)

- dfl_fpga_dev_for_each_feature(pdata, feature) {

-static int dfl_devs_add(struct dfl_feature_platform_data *pdata)

- dfl_fpga_dev_for_each_feature(pdata, feature) {

- ddev = dfl_dev_add(pdata, feature);

- dfl_devs_remove(pdata);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- dfl_devs_remove(pdata);

- dfl_fpga_dev_for_each_feature(pdata, feature) {

- struct dfl_feature_platform_data *pdata,

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- dfl_fpga_dev_for_each_feature(pdata, feature) {

- ret = dfl_feature_instance_init(pdev, pdata,

- ret = dfl_devs_add(pdata);

- * @feature_dev: current feature device.

- struct platform_device *feature_dev;

-static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev,

- struct platform_device *port)

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&port->dev);

- list_add(&pdata->node, &cdev->port_dev_list);

- get_device(&pdata->dev->dev);

- * register current feature device, it is called when we need to switch to

- * another feature parsing or we have parsed all features on given device

-static int build_info_commit_dev(struct build_feature_devs_info *binfo)

- struct platform_device *fdev = binfo->feature_dev;

- struct dfl_feature_platform_data *pdata;

- enum dfl_id_type type;

- type = feature_dev_id_type(fdev);

- * we do not need to care for the memory which is associated with

- * the platform device. After calling platform_device_unregister(),

- * it will be automatically freed by device's release() callback,

- * platform_device_release().

- pdata = kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_KERNEL);

- pdata->dev = fdev;

- pdata->num = binfo->feature_num;

- pdata->dfl_cdev = binfo->cdev;

- pdata->id = FEATURE_DEV_ID_UNUSED;

- mutex_init(&pdata->lock);

- lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type],

- WARN_ON(pdata->disable_count);

- fdev->dev.platform_data = pdata;

- /* each sub feature has one MMIO resource */

- fdev->num_resources = binfo->feature_num;

- fdev->resource = kcalloc(binfo->feature_num, sizeof(*fdev->resource),

- if (!fdev->resource)

- struct dfl_feature *feature = &pdata->features[index++];

- feature->dev = fdev;

- return PTR_ERR(feature->ioaddr);

- fdev->resource[res_idx++] = finfo->mmio_res;

- ret = platform_device_add(binfo->feature_dev);

- if (type == PORT_ID)

- dfl_fpga_cdev_add_port_dev(binfo->cdev,

- binfo->feature_dev);

- binfo->cdev->fme_dev =

- get_device(&binfo->feature_dev->dev);

- * reset it to avoid build_info_free() freeing their resource.

- * The resource of successfully registered feature devices

- * will be freed by platform_device_unregister(). See the

- * comments in build_info_create_dev().

- binfo->feature_dev = NULL;

-build_info_create_dev(struct build_feature_devs_info *binfo,

- enum dfl_id_type type)

- if (type >= DFL_ID_MAX)

- * we use -ENODEV as the initialization indicator which indicates

- * whether the id need to be reclaimed

- fdev = platform_device_alloc(dfl_devs[type].name, -ENODEV);

- binfo->feature_dev = fdev;

- binfo->feature_num = 0;

- INIT_LIST_HEAD(&binfo->sub_features);

- fdev->id = dfl_id_alloc(type, &fdev->dev);

- fdev->dev.parent = &binfo->cdev->region->dev;

- fdev->dev.devt = dfl_get_devt(dfl_devs[type].devt_type, fdev->id);

- * it is a valid id, free it. See comments in

- * build_info_create_dev()

- if (binfo->feature_dev && binfo->feature_dev->id >= 0) {

- dfl_id_free(feature_dev_id_type(binfo->feature_dev),

- binfo->feature_dev->id);

- list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) {

- list_del(&finfo->node);

- platform_device_put(binfo->feature_dev);

- type = feature_dev_id_type(binfo->feature_dev);

-#define is_feature_dev_detected(binfo) (!!(binfo)->feature_dev)

- switch (feature_dev_id_type(binfo->feature_dev)) {

- dev_info(binfo->dev, "AFU belonging to FIU %s is not supported yet.\n",

- binfo->feature_dev->name);

- /* create platform device for dfl feature dev */

- ret = build_info_create_dev(binfo, dfh_id_to_type(id));

- struct platform_device *pdev = to_platform_device(dev);

- enum dfl_id_type type = feature_dev_id_type(pdev);

- int id = pdev->id;

- platform_device_unregister(pdev);

- dfl_id_free(type, id);

- struct dfl_feature_platform_data *pdata, *ptmp;

- list_for_each_entry_safe(pdata, ptmp, &cdev->port_dev_list, node) {

- struct platform_device *port_dev = pdata->dev;

- /* remove released ports */

- if (!device_is_registered(&port_dev->dev)) {

- dfl_id_free(feature_dev_id_type(port_dev),

- platform_device_put(port_dev);

- list_del(&pdata->node);

- put_device(&port_dev->dev);

- * __dfl_fpga_cdev_find_port - find a port under given container device

-struct platform_device *

-__dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,

- int (*match)(struct platform_device *, void *))

- struct dfl_feature_platform_data *pdata;

- struct platform_device *port_dev;

- list_for_each_entry(pdata, &cdev->port_dev_list, node) {

- port_dev = pdata->dev;

- if (match(port_dev, data) && get_device(&port_dev->dev))

-EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port);

- struct dfl_feature_platform_data *pdata;

- struct platform_device *port_pdev;

- port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,

- dfl_fpga_check_port_id);

- if (!device_is_registered(&port_pdev->dev)) {

- goto put_dev_exit;

- pdata = dev_get_platdata(&port_pdev->dev);

- mutex_lock(&pdata->lock);

- ret = dfl_feature_dev_use_begin(pdata, true);

- mutex_unlock(&pdata->lock);

- goto put_dev_exit;

- platform_device_del(port_pdev);

- put_device(&port_pdev->dev);

- struct dfl_feature_platform_data *pdata;

- struct platform_device *port_pdev;

- port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id,

- dfl_fpga_check_port_id);

- if (device_is_registered(&port_pdev->dev)) {

- goto put_dev_exit;

- ret = platform_device_add(port_pdev);

- goto put_dev_exit;

- pdata = dev_get_platdata(&port_pdev->dev);

- mutex_lock(&pdata->lock);

- dfl_feature_dev_use_end(pdata);

- mutex_unlock(&pdata->lock);

- put_device(&port_pdev->dev);

- base = dfl_get_feature_ioaddr_by_id(fme_dev, FME_FEATURE_ID_HEADER);

- struct dfl_feature_platform_data *pdata;

- list_for_each_entry(pdata, &cdev->port_dev_list, node) {

- if (device_is_registered(&pdata->dev->dev))

- config_port_pf_mode(cdev->fme_dev, pdata->id);

- struct dfl_feature_platform_data *pdata;

- list_for_each_entry(pdata, &cdev->port_dev_list, node) {

- if (device_is_registered(&pdata->dev->dev))

- config_port_vf_mode(cdev->fme_dev, pdata->id);

- struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev);

- mutex_lock(&pdata->lock);

- mutex_unlock(&pdata->lock);

diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 5063d73b0d82..95539f1213cb 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h

- int (*get_id)(struct platform_device *pdev);

- int (*enable_set)(struct platform_device *pdev, bool enable);

-struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pdev);

-int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id);

- * struct dfl_feature_platform_data - platform data for feature devices

- * @node: node to link feature devs to container device's port_dev_list.

- * @lock: mutex to protect platform data.

- * @cdev: cdev of feature dev.

- * @dev: ptr to platform device linked with this platform data.

- * @id: id used for this feature device.

- * @features: sub features of this feature dev.

-struct dfl_feature_platform_data {

- struct dfl_feature features[];

-int dfl_feature_dev_use_begin(struct dfl_feature_platform_data *pdata,

- if (pdata->excl_open)

- if (pdata->open_count)

- pdata->excl_open = true;

- pdata->open_count++;

-void dfl_feature_dev_use_end(struct dfl_feature_platform_data *pdata)

- pdata->excl_open = false;

- if (WARN_ON(pdata->open_count <= 0))

- pdata->open_count--;

-int dfl_feature_dev_use_count(struct dfl_feature_platform_data *pdata)

- return pdata->open_count;

-void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata,

- pdata->private = private;

-void *dfl_fpga_pdata_get_private(struct dfl_feature_platform_data *pdata)

- return pdata->private;

-struct platform_device *dfl_fpga_inode_to_feature_dev(struct inode *inode)

- return pdata->dev;

-#define dfl_fpga_dev_for_each_feature(pdata, feature) \

- for ((feature) = (pdata)->features; \

- (feature) < (pdata)->features + (pdata)->num; (feature)++)

-struct dfl_feature *dfl_get_feature_by_id(struct device *dev, u16 id)

- struct dfl_feature_platform_data *pdata = dev_get_platdata(dev);

- dfl_fpga_dev_for_each_feature(pdata, feature)

-void __iomem *dfl_get_feature_ioaddr_by_id(struct device *dev, u16 id)

- struct dfl_feature *feature = dfl_get_feature_by_id(dev, id);

-struct device *dfl_fpga_pdata_to_parent(struct dfl_feature_platform_data *pdata)

- return pdata->dev->dev.parent->parent;

- * need to drop the device reference with put_device() after use port platform

- * device returned by __dfl_fpga_cdev_find_port and dfl_fpga_cdev_find_port

-struct platform_device *

-__dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,

- int (*match)(struct platform_device *, void *));

-static inline struct platform_device *

-dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data,

- int (*match)(struct platform_device *, void *))

- struct platform_device *pdev;

- pdev = __dfl_fpga_cdev_find_port(cdev, data, match);

diff --git a/drivers/fpga/intel-m10-bmc-sec-update.c b/drivers/fpga/intel-m10-bmc-sec-update.c
index 7ac9f9f5af12..10f678b9ed36 100644
--- a/drivers/fpga/intel-m10-bmc-sec-update.c
+++ b/drivers/fpga/intel-m10-bmc-sec-update.c

- .remove_new = m10bmc_sec_remove,

-MODULE_IMPORT_NS(INTEL_M10_BMC_CORE);

diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c
index 8526a5a86f0c..43db4bb77138 100644
--- a/drivers/fpga/of-fpga-region.c
+++ b/drivers/fpga/of-fpga-region.c

- .remove_new = of_fpga_region_remove,

diff --git a/drivers/fpga/socfpga-a10.c b/drivers/fpga/socfpga-a10.c
index 4c03513b8f03..0165a3c86932 100644
--- a/drivers/fpga/socfpga-a10.c
+++ b/drivers/fpga/socfpga-a10.c

- .remove_new = socfpga_a10_fpga_remove,

diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c
index 2c0def7d7cbb..0a295ccf1644 100644
--- a/drivers/fpga/stratix10-soc.c
+++ b/drivers/fpga/stratix10-soc.c

- .remove_new = s10_remove,

diff --git a/drivers/fpga/xilinx-pr-decoupler.c b/drivers/fpga/xilinx-pr-decoupler.c
index 788dd2f63a65..822751fad18a 100644
--- a/drivers/fpga/xilinx-pr-decoupler.c
+++ b/drivers/fpga/xilinx-pr-decoupler.c

- .remove_new = xlnx_pr_decoupler_remove,

diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
index 4db3d80e10b0..f7e08f7ea9ef 100644
--- a/drivers/fpga/zynq-fpga.c
+++ b/drivers/fpga/zynq-fpga.c

- .remove_new = zynq_fpga_remove,

diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c
index 6f5e1bdf7e40..bff897f77fe5 100644
--- a/drivers/fsi/fsi-master-aspeed.c
+++ b/drivers/fsi/fsi-master-aspeed.c

- .remove_new = fsi_master_aspeed_remove,

diff --git a/drivers/fsi/fsi-master-ast-cf.c b/drivers/fsi/fsi-master-ast-cf.c
index a4c37ff8edd6..9f2fd444ceb6 100644
--- a/drivers/fsi/fsi-master-ast-cf.c
+++ b/drivers/fsi/fsi-master-ast-cf.c

- .remove_new = fsi_master_acf_remove,

diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c
index f761344f4873..69de0b5b9cbd 100644
--- a/drivers/fsi/fsi-master-gpio.c
+++ b/drivers/fsi/fsi-master-gpio.c

- .remove_new = fsi_master_gpio_remove,

diff --git a/drivers/fsi/fsi-occ.c b/drivers/fsi/fsi-occ.c
index a6d4c8f123a5..d3e6bf37878a 100644
--- a/drivers/fsi/fsi-occ.c
+++ b/drivers/fsi/fsi-occ.c

- .remove_new = occ_remove,

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index d93cd4f722b4..98b4d1633b25 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig

- prompt "Character device (/dev/gpiochipN) support" if EXPERT

- depends on OF_GPIO

- select OF_GPIO_MM_GPIOCHIP

- depends on (ARM || ARM64) && (ARCH_DAVINCI || ARCH_KEYSTONE || ARCH_K3)

- depends on OF_GPIO

- depends on PLAT_ORION || ARCH_MVEBU

- depends on OF_GPIO

- tristate "TI OMAP GPIO support" if ARCH_OMAP2PLUS || COMPILE_TEST

- default ARCH_TEGRA_186_SOC || ARCH_TEGRA_194_SOC

- depends on ARCH_TEGRA_186_SOC || ARCH_TEGRA_194_SOC || COMPILE_TEST

- Say yes here to support GPIO pins on NVIDIA Tegra186 SoCs.

- depends on OF_GPIO

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1429e8c0229b..af3ba4d81b58 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile

diff --git a/drivers/gpio/TODO b/drivers/gpio/TODO
index 189c3abe7e79..942d1cd2bd3c 100644
--- a/drivers/gpio/TODO
+++ b/drivers/gpio/TODO

- GPIO lines from the device tree. This can be tricky and often ivolves

- changing boardfiles, etc.

diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c
index 4df9becaf349..cf5a50102d49 100644
--- a/drivers/gpio/gpio-104-dio-48e.c
+++ b/drivers/gpio/gpio-104-dio-48e.c

-MODULE_IMPORT_NS(I8255);

-MODULE_IMPORT_NS(I8254);

diff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-16.c
index f03ccd0f534c..ffe7e1cb6b23 100644
--- a/drivers/gpio/gpio-104-idio-16.c
+++ b/drivers/gpio/gpio-104-idio-16.c

-MODULE_IMPORT_NS(GPIO_IDIO_16);

diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c
index 753e7be039e4..fca6cd2eb1dd 100644
--- a/drivers/gpio/gpio-74x164.c
+++ b/drivers/gpio/gpio-74x164.c

- mutex_init(&chip->lock);

- dev_err(&spi->dev, "Failed writing: %d\n", ret);

- goto exit_destroy;

- ret = gpiochip_add_data(&chip->gpio_chip, chip);

- mutex_destroy(&chip->lock);

- gpiochip_remove(&chip->gpio_chip);

- mutex_destroy(&chip->lock);

diff --git a/drivers/gpio/gpio-aggregator.c b/drivers/gpio/gpio-aggregator.c
index 38e0fff9afe7..65f41cc3eafc 100644
--- a/drivers/gpio/gpio-aggregator.c
+++ b/drivers/gpio/gpio-aggregator.c

- unsigned long *bitmap;

- bitmap = bitmap_alloc(AGGREGATOR_MAX_GPIOS, GFP_KERNEL);

- bitmap_free(bitmap);

diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c
index c2edfbb231fc..17ab039c7413 100644
--- a/drivers/gpio/gpio-altera.c
+++ b/drivers/gpio/gpio-altera.c

-#include <linux/gpio/driver.h>

-#include <linux/gpio/legacy-of-mm-gpiochip.h>

-* @mmchip : memory mapped chip structure.

-* @mapped_irq : kernel mapped irq number.

- struct of_mm_gpio_chip mmchip;

- struct altera_gpio_chip *altera_gc;

- struct of_mm_gpio_chip *mm_gc;

- altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));

- mm_gc = &altera_gc->mmchip;

- gpiochip_enable_irq(&mm_gc->gc, irqd_to_hwirq(d));

- intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

- writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

- struct altera_gpio_chip *altera_gc;

- struct of_mm_gpio_chip *mm_gc;

- altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));

- mm_gc = &altera_gc->mmchip;

- intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

- writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

- gpiochip_disable_irq(&mm_gc->gc, irqd_to_hwirq(d));

- struct altera_gpio_chip *altera_gc;

- altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d));

- struct of_mm_gpio_chip *mm_gc;

- mm_gc = to_of_mm_gpio_chip(gc);

- return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset));

- struct of_mm_gpio_chip *mm_gc;

- struct altera_gpio_chip *chip;

- mm_gc = to_of_mm_gpio_chip(gc);

- chip = gpiochip_get_data(gc);

- raw_spin_lock_irqsave(&chip->gpio_lock, flags);

- data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);

- writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);

- raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);

- struct of_mm_gpio_chip *mm_gc;

- struct altera_gpio_chip *chip;

- mm_gc = to_of_mm_gpio_chip(gc);

- chip = gpiochip_get_data(gc);

- raw_spin_lock_irqsave(&chip->gpio_lock, flags);

- gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);

- writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);

- raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);

- struct of_mm_gpio_chip *mm_gc;

- struct altera_gpio_chip *chip;

- mm_gc = to_of_mm_gpio_chip(gc);

- chip = gpiochip_get_data(gc);

- raw_spin_lock_irqsave(&chip->gpio_lock, flags);

- data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);

- writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);

- gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);

- writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);

- raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);

- struct altera_gpio_chip *altera_gc;

- struct of_mm_gpio_chip *mm_gc;

- struct irq_domain *irqdomain;

- altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));

- mm_gc = &altera_gc->mmchip;

- irqdomain = altera_gc->mmchip.gc.irq.domain;

- (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) &

- readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {

- writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP);

- for_each_set_bit(i, &status, mm_gc->gc.ngpio)

- struct altera_gpio_chip *altera_gc;

- struct of_mm_gpio_chip *mm_gc;

- struct irq_domain *irqdomain;

- altera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));

- mm_gc = &altera_gc->mmchip;

- irqdomain = altera_gc->mmchip.gc.irq.domain;

- status = readl(mm_gc->regs + ALTERA_GPIO_DATA);

- status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);

- for_each_set_bit(i, &status, mm_gc->gc.ngpio)

- struct device_node *node = pdev->dev.of_node;

- if (of_property_read_u32(node, "altr,ngpio", &reg))

- altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO;

- altera_gc->mmchip.gc.ngpio = reg;

- if (altera_gc->mmchip.gc.ngpio > ALTERA_GPIO_MAX_NGPIO) {

- altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO;

- altera_gc->mmchip.gc.direction_input = altera_gpio_direction_input;

- altera_gc->mmchip.gc.direction_output = altera_gpio_direction_output;

- altera_gc->mmchip.gc.get = altera_gpio_get;

- altera_gc->mmchip.gc.set = altera_gpio_set;

- altera_gc->mmchip.gc.owner = THIS_MODULE;

- altera_gc->mmchip.gc.parent = &pdev->dev;

- altera_gc->mapped_irq = platform_get_irq_optional(pdev, 0);

- if (altera_gc->mapped_irq < 0)

- if (of_property_read_u32(node, "altr,interrupt-type", &reg)) {

- girq = &altera_gc->mmchip.gc.irq;

- girq->parents[0] = altera_gc->mapped_irq;

- ret = of_mm_gpiochip_add_data(node, &altera_gc->mmchip, altera_gc);

- platform_set_drvdata(pdev, altera_gc);

-static void altera_gpio_remove(struct platform_device *pdev)

- struct altera_gpio_chip *altera_gc = platform_get_drvdata(pdev);

- of_mm_gpiochip_remove(&altera_gc->mmchip);

- .remove_new = altera_gpio_remove,

diff --git a/drivers/gpio/gpio-amdpt.c b/drivers/gpio/gpio-amdpt.c
index 0a2ea9db4682..b70036587d9c 100644
--- a/drivers/gpio/gpio-amdpt.c
+++ b/drivers/gpio/gpio-amdpt.c

- ret = gpiochip_add_data(&pt_gpio->gc, pt_gpio);

-static void pt_gpio_remove(struct platform_device *pdev)

- struct pt_gpio_chip *pt_gpio = platform_get_drvdata(pdev);

- gpiochip_remove(&pt_gpio->gc);

- .remove_new = pt_gpio_remove,

diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c
index 72755fee6478..34eb26298e32 100644
--- a/drivers/gpio/gpio-aspeed-sgpio.c
+++ b/drivers/gpio/gpio-aspeed-sgpio.c

- seq_printf(p, dev_name(gpio->dev));

diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index 04c03402db6d..40c1bd80f8b0 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c

- const char names[4][3];

- .names = { "A", "B", "C", "D" },

- .names = { "E", "F", "G", "H" },

- .names = { "I", "J", "K", "L" },

- .names = { "M", "N", "O", "P" },

- .names = { "Q", "R", "S", "T" },

- .names = { "U", "V", "W", "X" },

- .names = { "Y", "Z", "AA", "AB" },

- .names = { "AC", "", "", "" },

-static inline void __iomem *bank_reg(struct aspeed_gpio *gpio,

- const struct aspeed_gpio_bank *bank,

- const enum aspeed_gpio_reg reg)

-#define _GPIO_SET_DEBOUNCE(t, o, i) ((!!((t) & BIT(i))) << GPIO_OFFSET(o))

-#define GPIO_SET_DEBOUNCE1(t, o) _GPIO_SET_DEBOUNCE(t, o, 1)

-#define GPIO_SET_DEBOUNCE2(t, o) _GPIO_SET_DEBOUNCE(t, o, 0)

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- unsigned int group = GPIO_OFFSET(offset) / 8;

- return bank->names[group][0] != '\0' &&

- (!props || ((props->input | props->output) & GPIO_BIT(offset)));

-static void aspeed_gpio_change_cmd_source(struct aspeed_gpio *gpio,

- const struct aspeed_gpio_bank *bank,

- int bindex, int cmdsrc)

- void __iomem *c0 = bank_reg(gpio, bank, reg_cmdsrc0);

- void __iomem *c1 = bank_reg(gpio, bank, reg_cmdsrc1);

- * Each register controls 4 banks, so take the bottom 2

- * bits of the bank index, and use them to select the

- * right control bit (0, 8, 16 or 24).

- bit = BIT((bindex & 3) << 3);

- /* Source 1 first to avoid illegal 11 combination */

- reg = ioread32(c1);

- iowrite32(reg, c1);

- /* Then Source 0 */

- reg = ioread32(c0);

- iowrite32(reg, c0);

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- if (!copro_ops || !gpio->cf_copro_bankmap)

- if (!gpio->cf_copro_bankmap[offset >> 3])

- if (!copro_ops->request_access)

- /* Pause the coprocessor */

- copro_ops->request_access(copro_data);

- /* Change command source back to ARM */

- aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3, GPIO_CMDSRC_ARM);

- /* Update cache */

- gpio->dcache[GPIO_BANK(offset)] = ioread32(bank_reg(gpio, bank, reg_rdata));

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- if (!copro_ops || !gpio->cf_copro_bankmap)

- if (!gpio->cf_copro_bankmap[offset >> 3])

- if (!copro_ops->release_access)

- /* Change command source back to ColdFire */

- aspeed_gpio_change_cmd_source(gpio, bank, offset >> 3,

- GPIO_CMDSRC_COLDFIRE);

- /* Restart the coprocessor */

- copro_ops->release_access(copro_data);

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- return !!(ioread32(bank_reg(gpio, bank, reg_val)) & GPIO_BIT(offset));

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- void __iomem *addr;

- addr = bank_reg(gpio, bank, reg_val);

- reg = gpio->dcache[GPIO_BANK(offset)];

- reg |= GPIO_BIT(offset);

- reg &= ~GPIO_BIT(offset);

- gpio->dcache[GPIO_BANK(offset)] = reg;

- iowrite32(reg, addr);

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- void __iomem *addr = bank_reg(gpio, bank, reg_dir);

- reg = ioread32(addr);

- reg &= ~GPIO_BIT(offset);

- iowrite32(reg, addr);

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- void __iomem *addr = bank_reg(gpio, bank, reg_dir);

- reg = ioread32(addr);

- reg |= GPIO_BIT(offset);

- iowrite32(reg, addr);

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- val = ioread32(bank_reg(gpio, bank, reg_dir)) & GPIO_BIT(offset);

- const struct aspeed_gpio_bank **bank,

- u32 *bit, int *offset)

- *bank = to_bank(*offset);

- *bit = GPIO_BIT(*offset);

- const struct aspeed_gpio_bank *bank;

- void __iomem *status_addr;

- rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);

- status_addr = bank_reg(gpio, bank, reg_irq_status);

- iowrite32(bit, status_addr);

- const struct aspeed_gpio_bank *bank;

- void __iomem *addr;

- rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);

- addr = bank_reg(gpio, bank, reg_irq_enable);

- reg = ioread32(addr);

- iowrite32(reg, addr);

- const struct aspeed_gpio_bank *bank;

- void __iomem *addr;

- rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);

- addr = bank_reg(gpio, bank, reg_irq_type0);

- reg = ioread32(addr);

- reg = (reg & ~bit) | type0;

- iowrite32(reg, addr);

- addr = bank_reg(gpio, bank, reg_irq_type1);

- reg = ioread32(addr);

- reg = (reg & ~bit) | type1;

- iowrite32(reg, addr);

- addr = bank_reg(gpio, bank, reg_irq_type2);

- reg = ioread32(addr);

- reg = (reg & ~bit) | type2;

- iowrite32(reg, addr);

- struct aspeed_gpio *data = gpiochip_get_data(gc);

- const struct aspeed_gpio_bank *bank = &aspeed_gpio_banks[i];

- reg = ioread32(bank_reg(data, bank, reg_irq_status));

- void __iomem *treg;

- treg = bank_reg(gpio, to_bank(offset), reg_tolerance);

- val = readl(treg);

- val |= GPIO_BIT(offset);

- val &= ~GPIO_BIT(offset);

- writel(val, treg);

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- const u32 mask = GPIO_BIT(offset);

- void __iomem *addr;

- addr = bank_reg(gpio, bank, reg_debounce_sel1);

- val = ioread32(addr);

- iowrite32((val & ~mask) | GPIO_SET_DEBOUNCE1(timer, offset), addr);

- addr = bank_reg(gpio, bank, reg_debounce_sel2);

- val = ioread32(addr);

- iowrite32((val & ~mask) | GPIO_SET_DEBOUNCE2(timer, offset), addr);

- for (i = 1; i < ARRAY_SIZE(debounce_timers); i++) {

- cycles = ioread32(gpio->base + debounce_timers[i]);

- if (i == ARRAY_SIZE(debounce_timers)) {

- "Debounce timers exhausted, cannot debounce for period %luus\n",

- iowrite32(requested_cycles, gpio->base + debounce_timers[i]);

- aspeed_gpio_change_cmd_source(gpio, bank, bindex,

- const struct aspeed_gpio_bank *bank = to_bank(offset);

- aspeed_gpio_change_cmd_source(gpio, bank, bindex,

- const struct aspeed_gpio_bank *bank;

- rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset);

- seq_printf(p, dev_name(gpio->dev));

- { .nr_gpios = 220, .props = ast2400_bank_props, };

- { .nr_gpios = 232, .props = ast2500_bank_props, };

- { .nr_gpios = 208, .props = ast2600_bank_props, };

-static int __init aspeed_gpio_probe(struct platform_device *pdev)

- gpio->clk = of_clk_get(pdev->dev.of_node, 0);

- /* Allocate a cache of the output registers */

- banks = DIV_ROUND_UP(gpio->chip.ngpio, 32);

- gpio->dcache = devm_kcalloc(&pdev->dev,

- banks, sizeof(u32), GFP_KERNEL);

- if (!gpio->dcache)

- * Populate it with initial values read from the HW and switch

- * all command sources to the ARM by default

- for (i = 0; i < banks; i++) {

- const struct aspeed_gpio_bank *bank = &aspeed_gpio_banks[i];

- void __iomem *addr = bank_reg(gpio, bank, reg_rdata);

- gpio->dcache[i] = ioread32(addr);

- aspeed_gpio_change_cmd_source(gpio, bank, 0, GPIO_CMDSRC_ARM);

- aspeed_gpio_change_cmd_source(gpio, bank, 1, GPIO_CMDSRC_ARM);

- aspeed_gpio_change_cmd_source(gpio, bank, 2, GPIO_CMDSRC_ARM);

- aspeed_gpio_change_cmd_source(gpio, bank, 3, GPIO_CMDSRC_ARM);

-module_platform_driver_probe(aspeed_gpio_driver, aspeed_gpio_probe);

diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index 5762e517338e..491b529d25f8 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c

- .remove_new = brcmstb_gpio_remove,

diff --git a/drivers/gpio/gpio-cadence.c b/drivers/gpio/gpio-cadence.c
index 1b8ffd0ddab6..e9dd2564c54f 100644
--- a/drivers/gpio/gpio-cadence.c
+++ b/drivers/gpio/gpio-cadence.c

- .remove_new = cdns_gpio_remove,

diff --git a/drivers/gpio/gpio-cgbc.c b/drivers/gpio/gpio-cgbc.c
new file mode 100644
index 000000000000..9213faa11522
--- /dev/null
+++ b/drivers/gpio/gpio-cgbc.c

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 76b58c70b257..8c033e8cf3c9 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c

-#include <linux/of.h>

- struct device_node *dn = dev_of_node(dev);

- ret = of_property_read_u32(dn, "ti,ngpio", &ngpio);

- ret = of_property_read_u32(dn, "ti,davinci-gpio-unbanked",

- .of_match_table = of_match_ptr(davinci_gpio_ids),

diff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c
index 7ead1f51128a..596da59d4b13 100644
--- a/drivers/gpio/gpio-dln2.c
+++ b/drivers/gpio/gpio-dln2.c

- .remove_new = dln2_gpio_remove,

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 798235791f70..43b667b41f5d 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c

- struct fwnode_handle *fwnode;

- device_for_each_child_node(dev, fwnode) {

- fwnode_handle_put(fwnode);

diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
index 2dd0e46c42ad..d4bf8d187e16 100644
--- a/drivers/gpio/gpio-eic-sprd.c
+++ b/drivers/gpio/gpio-eic-sprd.c

-#include <linux/of.h>

- pdata = of_device_get_match_data(dev);

diff --git a/drivers/gpio/gpio-elkhartlake.c b/drivers/gpio/gpio-elkhartlake.c
index 887c0fe99d39..95de52d2cc63 100644
--- a/drivers/gpio/gpio-elkhartlake.c
+++ b/drivers/gpio/gpio-elkhartlake.c

-MODULE_IMPORT_NS(GPIO_TANGIER);

diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index ab798c848215..58d2464c07bc 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c

- seq_printf(p, dev_name(gc->parent));

diff --git a/drivers/gpio/gpio-exar.c b/drivers/gpio/gpio-exar.c
index 5170fe7599cd..d5909a4f0433 100644
--- a/drivers/gpio/gpio-exar.c
+++ b/drivers/gpio/gpio-exar.c

- regmap_set_bits(exar_gpio->regmap, addr, BIT(bit));

- regmap_clear_bits(exar_gpio->regmap, addr, BIT(bit));

diff --git a/drivers/gpio/gpio-ftgpio010.c b/drivers/gpio/gpio-ftgpio010.c
index 97d345b59352..c35eaa2851d8 100644
--- a/drivers/gpio/gpio-ftgpio010.c
+++ b/drivers/gpio/gpio-ftgpio010.c

- g->clk = devm_clk_get(dev, NULL);

- if (!IS_ERR(g->clk)) {

- ret = clk_prepare_enable(g->clk);

- } else if (PTR_ERR(g->clk) == -EPROBE_DEFER) {

- dev_err(dev, "unable to init generic GPIO\n");

- if (!girq->parents) {

- ret = devm_gpiochip_add_data(dev, &g->gc, g);

- platform_set_drvdata(pdev, g);

- dev_info(dev, "FTGPIO010 @%p registered\n", g->base);

- clk_disable_unprepare(g->clk);

-static void ftgpio_gpio_remove(struct platform_device *pdev)

- struct ftgpio_gpio *g = platform_get_drvdata(pdev);

- clk_disable_unprepare(g->clk);

- .remove_new = ftgpio_gpio_remove,

diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c
index 43d823a56e59..fb7c510bf2fa 100644
--- a/drivers/gpio/gpio-gpio-mm.c
+++ b/drivers/gpio/gpio-gpio-mm.c

-MODULE_IMPORT_NS(I8255);

diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c
index f2e911a3d2ca..ad6a045fd3d2 100644
--- a/drivers/gpio/gpio-graniterapids.c
+++ b/drivers/gpio/gpio-graniterapids.c

-#define GNR_CFG_BAR 0x00

-#define GNR_GPI_STATUS_OFFSET 0x20

-#define GNR_CFG_DW_RX_MASK GENMASK(25, 22)

- return priv->reg_base + gpio * sizeof(u32);

- reg &= ~BIT(bit_idx);

- irq_hw_number_t pin = irqd_to_hwirq(d);

- u32 mask = GNR_CFG_DW_RX_MASK;

- return gnr_gpio_configure_line(gc, pin, mask, set);

- priv->reg_base = regs + readl(regs + GNR_CFG_BAR);

- girq->chip->name = dev_name(dev);

diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c
index 017c7170eb57..169f33c41c59 100644
--- a/drivers/gpio/gpio-grgpio.c
+++ b/drivers/gpio/gpio-grgpio.c

-#include <linux/kernel.h>

-#include <linux/module.h>

-#include <linux/init.h>

-#include <linux/platform_device.h>

-#include <linux/spinlock.h>

-#include <linux/io.h>

-#include <linux/of.h>

-#include <linux/gpio/driver.h>

-#include <linux/slab.h>

-#include <linux/bitops.h>

- priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL);

- err = bgpio_init(gc, &ofdev->dev, 4, regs + GRGPIO_DATA,

- dev_err(&ofdev->dev, "bgpio_init() failed\n");

- priv->dev = &ofdev->dev;

- gc->label = devm_kasprintf(&ofdev->dev, GFP_KERNEL, "%pOF", np);

- dev_dbg(&ofdev->dev,

- "No or invalid nbits property: assume %d\n", gc->ngpio);

- dev_err(&ofdev->dev,

- dev_err(&ofdev->dev, "Could not add irq domain\n");

- platform_set_drvdata(ofdev, priv);

- err = gpiochip_add_data(gc, priv);

- dev_err(&ofdev->dev, "Could not add gpiochip\n");

- irq_domain_remove(priv->domain);

- dev_info(&ofdev->dev, "regs=0x%p, base=%d, ngpio=%d, irqs=%s\n",

-static void grgpio_remove(struct platform_device *ofdev)

- struct grgpio_priv *priv = platform_get_drvdata(ofdev);

- gpiochip_remove(&priv->gc);

- irq_domain_remove(priv->domain);

- .remove_new = grgpio_remove,

diff --git a/drivers/gpio/gpio-hlwd.c b/drivers/gpio/gpio-hlwd.c
index 1bcfc1835dae..0580f6712bea 100644
--- a/drivers/gpio/gpio-hlwd.c
+++ b/drivers/gpio/gpio-hlwd.c

- seq_printf(p, dev_name(hlwd->dev));

diff --git a/drivers/gpio/gpio-i8255.c b/drivers/gpio/gpio-i8255.c
index 64ab80fc4a1e..953018bfa2b1 100644
--- a/drivers/gpio/gpio-i8255.c
+++ b/drivers/gpio/gpio-i8255.c

-EXPORT_SYMBOL_NS_GPL(devm_i8255_regmap_register, I8255);

diff --git a/drivers/gpio/gpio-idio-16.c b/drivers/gpio/gpio-idio-16.c
index 53b1eb876a12..0103be977c66 100644
--- a/drivers/gpio/gpio-idio-16.c
+++ b/drivers/gpio/gpio-idio-16.c

-#define DEFAULT_SYMBOL_NAMESPACE GPIO_IDIO_16

diff --git a/drivers/gpio/gpio-ljca.c b/drivers/gpio/gpio-ljca.c
index dfec9fbfc7a9..817ecb12d550 100644
--- a/drivers/gpio/gpio-ljca.c
+++ b/drivers/gpio/gpio-ljca.c

- mutex_init(&ljca_gpio->irq_lock);

- mutex_init(&ljca_gpio->trans_lock);

- mutex_destroy(&ljca_gpio->irq_lock);

- mutex_destroy(&ljca_gpio->trans_lock);

- mutex_destroy(&ljca_gpio->irq_lock);

- mutex_destroy(&ljca_gpio->trans_lock);

-MODULE_IMPORT_NS(LJCA);

diff --git a/drivers/gpio/gpio-loongson-64bit.c b/drivers/gpio/gpio-loongson-64bit.c
index 6749d4dd6d64..7f4d78fd800e 100644
--- a/drivers/gpio/gpio-loongson-64bit.c
+++ b/drivers/gpio/gpio-loongson-64bit.c

- .conf_offset = 0x84,

- .in_offset = 0x88,

- .out_offset = 0x80,

diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c
index e7c0ef6e54fa..2cf9fb4637a2 100644
--- a/drivers/gpio/gpio-lpc18xx.c
+++ b/drivers/gpio/gpio-lpc18xx.c

- .remove_new = lpc18xx_gpio_remove,

diff --git a/drivers/gpio/gpio-max730x.c b/drivers/gpio/gpio-max730x.c
index 701795b9d329..e688c13c8cc3 100644
--- a/drivers/gpio/gpio-max730x.c
+++ b/drivers/gpio/gpio-max730x.c

- mutex_init(&ts->lock);

- goto exit_destroy;

- ret = gpiochip_add_data(&ts->chip, ts);

- mutex_destroy(&ts->lock);

- gpiochip_remove(&ts->chip);

- mutex_destroy(&ts->lock);

diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c
index ccbb63c21d6f..7ee891ef6905 100644
--- a/drivers/gpio/gpio-mb86s7x.c
+++ b/drivers/gpio/gpio-mb86s7x.c

- .remove_new = mb86s70_gpio_remove,

diff --git a/drivers/gpio/gpio-menz127.c b/drivers/gpio/gpio-menz127.c
index a035a9bcb57c..ebe5da4933bc 100644
--- a/drivers/gpio/gpio-menz127.c
+++ b/drivers/gpio/gpio-menz127.c

- if (IS_ERR(men_z127_gpio->mem)) {

- dev_err(dev, "failed to request device memory");

- return PTR_ERR(men_z127_gpio->mem);

- men_z127_gpio->reg_base = ioremap(men_z127_gpio->mem->start,

- resource_size(men_z127_gpio->mem));

- if (men_z127_gpio->reg_base == NULL) {

- ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio);

- dev_err(dev, "failed to register MEN 16Z127 GPIO controller");

- dev_info(dev, "MEN 16Z127 GPIO driver registered");

- iounmap(men_z127_gpio->reg_base);

- mcb_release_mem(men_z127_gpio->mem);

-static void men_z127_remove(struct mcb_device *mdev)

- struct men_z127_gpio *men_z127_gpio = mcb_get_drvdata(mdev);

- gpiochip_remove(&men_z127_gpio->gc);

- iounmap(men_z127_gpio->reg_base);

- mcb_release_mem(men_z127_gpio->mem);

- .remove = men_z127_remove,

-MODULE_IMPORT_NS(MCB);

diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c
index 421d7e3a6c66..4335a5d8e4f6 100644
--- a/drivers/gpio/gpio-merrifield.c
+++ b/drivers/gpio/gpio-merrifield.c

- retval = pcim_iomap_regions(pdev, BIT(1) | BIT(0), pci_name(pdev));

- return dev_err_probe(dev, retval, "I/O memory mapping error\n");

- base = pcim_iomap_table(pdev)[1];

- pcim_iounmap_regions(pdev, BIT(1));

- priv->reg_base = pcim_iomap_table(pdev)[0];

-MODULE_IMPORT_NS(GPIO_TANGIER);

diff --git a/drivers/gpio/gpio-mlxbf2.c b/drivers/gpio/gpio-mlxbf2.c
index 6abe01bc39c3..6f3dda6b635f 100644
--- a/drivers/gpio/gpio-mlxbf2.c
+++ b/drivers/gpio/gpio-mlxbf2.c

- seq_printf(p, dev_name(gs->dev));

diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c
index e855c68c981b..14ae25783438 100644
--- a/drivers/gpio/gpio-mm-lantiq.c
+++ b/drivers/gpio/gpio-mm-lantiq.c

- .remove_new = ltq_mm_remove,

diff --git a/drivers/gpio/gpio-mpc5200.c b/drivers/gpio/gpio-mpc5200.c
index a199dce3394a..091d96f2d682 100644
--- a/drivers/gpio/gpio-mpc5200.c
+++ b/drivers/gpio/gpio-mpc5200.c

- .remove_new = mpc52xx_gpiochip_remove,

diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 685ec31db409..0cd4c36ae8aa 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c

-#include <linux/of.h>

- struct device_node *np = pdev->dev.of_node;

- struct mpc8xxx_gpio_chip *mpc8xxx_gc;

- struct gpio_chip *gc;

- mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL);

- gc->parent = &pdev->dev;

- if (device_property_read_bool(&pdev->dev, "little-endian")) {

- ret = bgpio_init(gc, &pdev->dev, 4,

- mpc8xxx_gc->regs + GPIO_DAT,

- mpc8xxx_gc->regs + GPIO_DIR, NULL,

- BGPIOF_BIG_ENDIAN);

- dev_dbg(&pdev->dev, "GPIO registers are LITTLE endian\n");

- ret = bgpio_init(gc, &pdev->dev, 4,

- mpc8xxx_gc->regs + GPIO_DAT,

- mpc8xxx_gc->regs + GPIO_DIR, NULL,

- dev_dbg(&pdev->dev, "GPIO registers are BIG endian\n");

- devtype = device_get_match_data(&pdev->dev);

- fwnode = dev_fwnode(&pdev->dev);

- if (of_device_is_compatible(np, "fsl,qoriq-gpio") ||

- of_device_is_compatible(np, "fsl,ls1028a-gpio") ||

- of_device_is_compatible(np, "fsl,ls1088a-gpio") ||

- ret = devm_gpiochip_add_data(&pdev->dev, gc, mpc8xxx_gc);

- dev_err(&pdev->dev,

- ret = devm_request_irq(&pdev->dev, mpc8xxx_gc->irqn,

- dev_err(&pdev->dev,

- "failed to devm_request_irq(%d), ret = %d\n",

- device_init_wakeup(&pdev->dev, true);

- .remove_new = mpc8xxx_remove,

diff --git a/drivers/gpio/gpio-mpfs.c b/drivers/gpio/gpio-mpfs.c
new file mode 100644
index 000000000000..561a961c97a6
--- /dev/null
+++ b/drivers/gpio/gpio-mpfs.c

diff --git a/drivers/gpio/gpio-mpsse.c b/drivers/gpio/gpio-mpsse.c
new file mode 100644
index 000000000000..3ea32c5e33d1
--- /dev/null
+++ b/drivers/gpio/gpio-mpsse.c

diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 8cfd3a89c018..5ffb332e9849 100644
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c

- int ret = of_property_read_u32(dev->of_node,

- "marvell,pwm-offset", &offset);

- if (of_property_read_u32(pdev->dev.of_node, "offset", &mvchip->offset))

- if (of_property_read_u32(pdev->dev.of_node, "ngpios", &ngpios)) {

diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 4cb455b2bdee..619b6fb9d833 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c

- port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 76d5d87e9681..54c4bfdccf56 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c

- seq_printf(p, dev_name(bank->dev));

- .remove_new = omap_gpio_remove,

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 3f2d33ee20cc..d63c1030e6ac 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c

- seq_printf(p, dev_name(gc->parent));

- if (chip->driver_data & PCA_PCAL) {

- /* Read the current interrupt status from the device */

- ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);

- /* Check latched inputs and clear interrupt status */

- ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);

- /* Apply filter for rising/falling edge selection */

- bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);

- bitmap_and(pending, new_stat, trigger, gc->ngpio);

- return !bitmap_empty(pending, gc->ngpio);

- return PTR_ERR(reset_gpio);

diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c
index 44c0a21b1d1d..476cea1b5ed7 100644
--- a/drivers/gpio/gpio-pci-idio-16.c
+++ b/drivers/gpio/gpio-pci-idio-16.c

- const char *const name = pci_name(pdev);

- dev_err(dev, "Failed to enable PCI device (%d)\n", err);

- err = pcim_iomap_regions(pdev, BIT(pci_bar_index), name);

- dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err);

- regs = pcim_iomap_table(pdev)[pci_bar_index];

-MODULE_IMPORT_NS(GPIO_IDIO_16);

diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c
index 7f7f95ad4343..80c0ba0afa67 100644
--- a/drivers/gpio/gpio-pcie-idio-24.c
+++ b/drivers/gpio/gpio-pcie-idio-24.c

- dev_err(dev, "Failed to enable PCI device (%d)\n", err);

- err = pcim_iomap_regions(pdev, BIT(pci_plx_bar_index) | BIT(pci_bar_index), name);

- dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err);

- pex8311_regs = pcim_iomap_table(pdev)[pci_plx_bar_index];

- idio_24_regs = pcim_iomap_table(pdev)[pci_bar_index];

diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index a211a02d4b4a..1c273727ffa3 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c

- seq_printf(p, dev_name(gc->parent));

diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 6159fda38d5d..2ecee3269a0c 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c

- .remove_new = gpio_rcar_remove,

diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c
index 71684dee2ca5..05f8781b5204 100644
--- a/drivers/gpio/gpio-regmap.c
+++ b/drivers/gpio/gpio-regmap.c

diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index 365ab947983c..01a3b3dac58b 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c

-#define GPIO_TYPE_V2 (0x01000C2B) /* GPIO Version ID 0x01000C2B */

-#define GPIO_TYPE_V2_1 (0x0101157C) /* GPIO Version ID 0x0101157C */

- if (!of_property_read_bool(bank->of_node, "gpio-ranges")) {

- /* If not gpio v2, that is default to v1. */

- if (id == GPIO_TYPE_V2 || id == GPIO_TYPE_V2_1) {

- .remove_new = rockchip_gpio_remove,

diff --git a/drivers/gpio/gpio-sim.c b/drivers/gpio/gpio-sim.c
index dcca1d7f173e..b6c230fab840 100644
--- a/drivers/gpio/gpio-sim.c
+++ b/drivers/gpio/gpio-sim.c

-static int gpio_sim_dev_match_fwnode(struct device *dev, void *data)

- return device_match_fwnode(dev, data);

- chip->dev = device_find_child(dev, swnode, gpio_sim_dev_match_fwnode);

- struct fwnode_handle *swnode;

- device_for_each_child_node(dev, swnode) {

- fwnode_handle_put(swnode);

- guard(mutex)(&dev->lock);

- if (live == gpio_sim_device_is_live(dev))

- ret = gpio_sim_device_activate(dev);

- gpio_sim_device_deactivate(dev);

diff --git a/drivers/gpio/gpio-sloppy-logic-analyzer.c b/drivers/gpio/gpio-sloppy-logic-analyzer.c
index 07e0d7180579..8cf3b171c599 100644
--- a/drivers/gpio/gpio-sloppy-logic-analyzer.c
+++ b/drivers/gpio/gpio-sloppy-logic-analyzer.c

- devm_mutex_init(dev, &priv->blob_lock);

- .remove_new = gpio_la_poll_remove,

diff --git a/drivers/gpio/gpio-tangier.c b/drivers/gpio/gpio-tangier.c
index 4b29abafecf6..a415e6d36173 100644
--- a/drivers/gpio/gpio-tangier.c
+++ b/drivers/gpio/gpio-tangier.c

-EXPORT_SYMBOL_NS_GPL(devm_tng_gpio_probe, GPIO_TANGIER);

diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c
index e8c1485b9c73..b6335cde455f 100644
--- a/drivers/gpio/gpio-tb10x.c
+++ b/drivers/gpio/gpio-tb10x.c

- .remove_new = tb10x_gpio_remove,

diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 6d3a39a03f58..9ad286adf263 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c

- seq_printf(s, dev_name(chip->parent));

diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c
index 1ecb733a5e88..6895b65c86af 100644
--- a/drivers/gpio/gpio-tegra186.c
+++ b/drivers/gpio/gpio-tegra186.c

- seq_printf(p, dev_name(gc->parent));

diff --git a/drivers/gpio/gpio-tps65219.c b/drivers/gpio/gpio-tps65219.c
index cd1f17041f8c..526640c39a11 100644
--- a/drivers/gpio/gpio-tps65219.c
+++ b/drivers/gpio/gpio-tps65219.c

-#define TPS65219_GPIO_DIR_IN 1

-#define TPS65219_GPIO_DIR_OUT 0

- if (tps65219_gpio_get_direction(gc, offset) == TPS65219_GPIO_DIR_OUT)

- if (tps65219_gpio_get_direction(gc, offset) == TPS65219_GPIO_DIR_IN)

- return tps65219_gpio_change_direction(gc, offset, TPS65219_GPIO_DIR_IN);

- if (tps65219_gpio_get_direction(gc, offset) == TPS65219_GPIO_DIR_OUT)

- return tps65219_gpio_change_direction(gc, offset, TPS65219_GPIO_DIR_OUT);

diff --git a/drivers/gpio/gpio-tqmx86.c b/drivers/gpio/gpio-tqmx86.c
index f2e7e8754d95..18f523a15b3c 100644
--- a/drivers/gpio/gpio-tqmx86.c
+++ b/drivers/gpio/gpio-tqmx86.c

-#define TQMX86_GPII_NONE 0

-#define TQMX86_GPII_FALLING BIT(0)

-#define TQMX86_GPII_RISING BIT(1)

-/* Stored in irq_type as a trigger type, but not actually valid as a register

- * value, so the name doesn't use "GPII"

-#define TQMX86_INT_BOTH (BIT(0) | BIT(1))

-#define TQMX86_GPII_MASK (BIT(0) | BIT(1))

-#define TQMX86_GPII_BITS 2

- u8 irq_type[TQMX86_NGPI];

- unsigned long flags;

- raw_spin_lock_irqsave(&gpio->spinlock, flags);

- __assign_bit(offset, gpio->output, value);

- tqmx86_gpio_write(gpio, bitmap_get_value8(gpio->output, 0), TQMX86_GPIOD);

- raw_spin_unlock_irqrestore(&gpio->spinlock, flags);

- /* Direction cannot be changed. Validate is an input. */

- if (BIT(offset) & TQMX86_DIR_INPUT_MASK)

- /* Direction cannot be changed, validate is an output */

- if (BIT(offset) & TQMX86_DIR_INPUT_MASK)

- tqmx86_gpio_set(chip, offset, value);

- if (TQMX86_DIR_INPUT_MASK & BIT(offset))

- return GPIO_LINE_DIRECTION_IN;

- return GPIO_LINE_DIRECTION_OUT;

-static void tqmx86_gpio_irq_config(struct tqmx86_gpio_data *gpio, int offset)

- u8 type = TQMX86_GPII_NONE, gpiic;

- if (gpio->irq_type[offset] & TQMX86_INT_UNMASKED) {

- type = gpio->irq_type[offset] & TQMX86_GPII_MASK;

- if (type == TQMX86_INT_BOTH)

- type = tqmx86_gpio_get(&gpio->chip, offset + TQMX86_NGPO)

- ? TQMX86_GPII_FALLING

- : TQMX86_GPII_RISING;

- gpiic = tqmx86_gpio_read(gpio, TQMX86_GPIIC);

- gpiic &= ~(TQMX86_GPII_MASK << (offset * TQMX86_GPII_BITS));

- gpiic |= type << (offset * TQMX86_GPII_BITS);

- tqmx86_gpio_write(gpio, gpiic, TQMX86_GPIIC);

- unsigned int offset = (data->hwirq - TQMX86_NGPO);

- unsigned long flags;

- raw_spin_lock_irqsave(&gpio->spinlock, flags);

- gpio->irq_type[offset] &= ~TQMX86_INT_UNMASKED;

- tqmx86_gpio_irq_config(gpio, offset);

- raw_spin_unlock_irqrestore(&gpio->spinlock, flags);

- unsigned int offset = (data->hwirq - TQMX86_NGPO);

- unsigned long flags;

- raw_spin_lock_irqsave(&gpio->spinlock, flags);

- gpio->irq_type[offset] |= TQMX86_INT_UNMASKED;

- tqmx86_gpio_irq_config(gpio, offset);

- raw_spin_unlock_irqrestore(&gpio->spinlock, flags);

- unsigned int offset = (data->hwirq - TQMX86_NGPO);

- unsigned long flags;

- new_type = TQMX86_GPII_RISING;

- new_type = TQMX86_GPII_FALLING;

- new_type = TQMX86_INT_BOTH;

- raw_spin_lock_irqsave(&gpio->spinlock, flags);

- gpio->irq_type[offset] &= ~TQMX86_GPII_MASK;

- gpio->irq_type[offset] |= new_type;

- tqmx86_gpio_irq_config(gpio, offset);

- raw_spin_unlock_irqrestore(&gpio->spinlock, flags);

- unsigned long irq_bits, flags;

- raw_spin_lock_irqsave(&gpio->spinlock, flags);

- for_each_set_bit(i, &irq_bits, TQMX86_NGPI) {

- * Edge-both triggers are implemented by flipping the edge

- * trigger after each interrupt, as the controller only supports

- * either rising or falling edge triggers, but not both.

- * Internally, the TQMx86 GPIO controller has separate status

- * registers for rising and falling edge interrupts. GPIIC

- * configures which bits from which register are visible in the

- * interrupt status register GPIIS and defines what triggers the

- * parent IRQ line. Writing to GPIIS always clears both rising

- * and falling interrupt flags internally, regardless of the

- * currently configured trigger.

- * In consequence, we can cleanly implement the edge-both

- * trigger in software by first clearing the interrupt and then

- * setting the new trigger based on the current GPIO input in

- * tqmx86_gpio_irq_config() - even if an edge arrives between

- * reading the input and setting the trigger, we will have a new

- * interrupt pending.

- if ((gpio->irq_type[i] & TQMX86_GPII_MASK) == TQMX86_INT_BOTH)

- tqmx86_gpio_irq_config(gpio, i);

- raw_spin_unlock_irqrestore(&gpio->spinlock, flags);

- seq_printf(p, gc->label);

diff --git a/drivers/gpio/gpio-ts4900.c b/drivers/gpio/gpio-ts4900.c
index 0f6397b77c9d..5c806140fdf0 100644
--- a/drivers/gpio/gpio-ts4900.c
+++ b/drivers/gpio/gpio-ts4900.c

-#include <linux/of.h>

- if (of_property_read_u32(client->dev.of_node, "ngpios", &ngpio))

- priv->input_bit = (uintptr_t)of_device_get_match_data(&client->dev);

diff --git a/drivers/gpio/gpio-ts5500.c b/drivers/gpio/gpio-ts5500.c
index 90f8e9e9915e..61cbec5c06a7 100644
--- a/drivers/gpio/gpio-ts5500.c
+++ b/drivers/gpio/gpio-ts5500.c

- .remove_new = ts5500_dio_remove,

diff --git a/drivers/gpio/gpio-twl6040.c b/drivers/gpio/gpio-twl6040.c
index 6c3fbf382dba..b9171bf66168 100644
--- a/drivers/gpio/gpio-twl6040.c
+++ b/drivers/gpio/gpio-twl6040.c

- struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent);

- ret = devm_gpiochip_add_data(&pdev->dev, &twl6040gpo_chip, NULL);

diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c
index da99ba13e82d..d738da8718f9 100644
--- a/drivers/gpio/gpio-uniphier.c
+++ b/drivers/gpio/gpio-uniphier.c

- .remove_new = uniphier_gpio_remove,

diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 27eff741fe9a..c4f34a347cb6 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c

-#include <linux/platform_device.h>

-#include <linux/of.h>

-#include <linux/of_irq.h>

- port->sdata = of_device_get_match_data(dev);

diff --git a/drivers/gpio/gpio-virtuser.c b/drivers/gpio/gpio-virtuser.c
index 91b6352c957c..e89f299f2140 100644
--- a/drivers/gpio/gpio-virtuser.c
+++ b/drivers/gpio/gpio-virtuser.c

- unsigned int i = 0;

- lookup->con_id, i, entry->flags);

- fwnode_remove_software_node(swnode);

- return PTR_ERR(pdev);

- platform_device_unregister(pdev);

- fwnode_remove_software_node(swnode);

- gpiod_remove_lookup_table(dev->lookup_table);

- kfree(dev->lookup_table);

- guard(mutex)(&dev->lock);

- if (live == gpio_virtuser_device_is_live(dev))

- ret = gpio_virtuser_device_activate(dev);

- gpio_virtuser_device_deactivate(dev);

diff --git a/drivers/gpio/gpio-visconti.c b/drivers/gpio/gpio-visconti.c
index ebc71ecdb6cf..5bd965c18a46 100644
--- a/drivers/gpio/gpio-visconti.c
+++ b/drivers/gpio/gpio-visconti.c

- seq_printf(p, dev_name(priv->dev));

diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index bd5befa807c3..48b829733b15 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c

-#include <linux/module.h>

-#include <linux/acpi.h>

-/* Common property names */

-#define XGENE_NIRQ_PROPERTY "apm,nr-irqs"

-#define XGENE_NGPIO_PROPERTY "apm,nr-gpios"

-#define XGENE_IRQ_START_PROPERTY "apm,irq-start"

- if (!device_property_read_u32(&pdev->dev,

- XGENE_IRQ_START_PROPERTY, &val32))

- if (!device_property_read_u32(&pdev->dev, XGENE_NIRQ_PROPERTY, &val32))

- if (!device_property_read_u32(&pdev->dev, XGENE_NGPIO_PROPERTY, &val32))

- {.compatible = "apm,xgene-gpio-sb", },

- .acpi_match_table = ACPI_PTR(xgene_gpio_sb_acpi_match),

- .remove_new = xgene_gpio_sb_remove,

diff --git a/drivers/gpio/gpio-xgs-iproc.c b/drivers/gpio/gpio-xgs-iproc.c
index d445eea03687..93544e98ccbd 100644
--- a/drivers/gpio/gpio-xgs-iproc.c
+++ b/drivers/gpio/gpio-xgs-iproc.c

- seq_printf(p, dev_name(chip->dev));

- .remove_new = iproc_gpio_remove,

diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index afcf432a1573..792d94c49077 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c

-#include <linux/of.h>

- spinlock_t gpio_lock; /* For serializing operations */

- spin_lock_irqsave(&chip->gpio_lock, flags);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);

- spin_lock_irqsave(&chip->gpio_lock, flags);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);

- spin_lock_irqsave(&chip->gpio_lock, flags);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);

- spin_lock_irqsave(&chip->gpio_lock, flags);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);

- spin_lock_irqsave(&chip->gpio_lock, flags);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);

- spin_lock_irqsave(&chip->gpio_lock, flags);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);

- spin_lock(&chip->gpio_lock);

- spin_unlock(&chip->gpio_lock);

- struct device_node *np = pdev->dev.of_node;

- chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);

- of_property_read_u32(np, "xlnx,is-dual", &is_dual);

- of_property_read_u32(np, "xlnx,dout-default", &state[0]);

- of_property_read_u32(np, "xlnx,dout-default-2", &state[1]);

- of_property_read_u32(np, "xlnx,tri-default", &dir[0]);

- of_property_read_u32(np, "xlnx,tri-default-2", &dir[1]);

- if (of_property_read_u32(np, "xlnx,gpio-width", &width[0]))

- if (is_dual && of_property_read_u32(np, "xlnx,gpio2-width", &width[1]))

- spin_lock_init(&chip->gpio_lock);

- chip->gc.parent = &pdev->dev;

- chip->gc.label = dev_name(&pdev->dev);

- dev_err(&pdev->dev, "failed to ioremap memory resource\n");

- chip->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);

- return dev_err_probe(&pdev->dev, PTR_ERR(chip->clk), "input clock not found.\n");

- pm_runtime_get_noresume(&pdev->dev);

- pm_runtime_set_active(&pdev->dev);

- pm_runtime_enable(&pdev->dev);

- girq->parents = devm_kcalloc(&pdev->dev, 1,

- sizeof(*girq->parents),

- status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);

- dev_err(&pdev->dev, "failed to add GPIO chip\n");

- pm_runtime_put(&pdev->dev);

- pm_runtime_disable(&pdev->dev);

- pm_runtime_put_noidle(&pdev->dev);

- .remove_new = xgpio_remove,

diff --git a/drivers/gpio/gpio-zevio.c b/drivers/gpio/gpio-zevio.c
index 2de61337ad3b..d7230fd83f5d 100644
--- a/drivers/gpio/gpio-zevio.c
+++ b/drivers/gpio/gpio-zevio.c

diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 1a42336dfc1d..be81fa2b17ab 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c

- .remove_new = zynq_gpio_remove,

diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index 78ecd56123a3..1f9fe50bba00 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c

- struct fwnode_handle *fwnode;

- device_for_each_child_node(chip->parent, fwnode) {

- fwnode_handle_put(fwnode);

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 78c9d9ed3d68..40f76a90fd7d 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c

-#include <linux/kernel.h>

-#include <linux/rbtree.h>

- assign_bit(FLAG_ACTIVE_LOW, flagsp,

- assign_bit(FLAG_OPEN_DRAIN, flagsp,

- assign_bit(FLAG_OPEN_SOURCE, flagsp,

- assign_bit(FLAG_PULL_UP, flagsp,

- assign_bit(FLAG_PULL_DOWN, flagsp,

- assign_bit(FLAG_BIAS_DISABLE, flagsp,

- ret = gpiod_direction_output(desc, val);

- ret = gpiod_direction_input(desc);

- ret = gpiod_direction_output(desc, val);

- ret = gpiod_direction_input(desc);

- * @node: to store the object in supinfo_tree if supplemental

- * @debounce_period_us: the debounce period in microseconds

- struct rb_node node;

- * linereq_set_config_unlocked(), which are themselves mutually

- * debounce_period_us is accessed by debounce_irq_handler() and

- * process_hw_ts() which are disabled when modified by

- * debounce_setup(), edge_detector_setup() or edge_detector_stop()

- * or can live with a stale version when updated by

- * edge_detector_update().

- * The modifying functions are themselves mutually exclusive.

- unsigned int debounce_period_us;

- * a rbtree of the struct lines containing supplemental info.

- * Used to populate gpio_v2_line_info with cdev specific fields not contained

- * in the struct gpio_desc.

- * A line is determined to contain supplemental information by

- * line_has_supinfo().

-static struct rb_root supinfo_tree = RB_ROOT;

-/* covers supinfo_tree */

-static DEFINE_SPINLOCK(supinfo_lock);

- * of configuration, particularly multi-step accesses to desc flags and

- * changes to supinfo status.

-static void supinfo_insert(struct line *line)

- struct rb_node **new = &(supinfo_tree.rb_node), *parent = NULL;

- struct line *entry;

- guard(spinlock)(&supinfo_lock);

- entry = container_of(*new, struct line, node);

- if (line->desc < entry->desc) {

- new = &((*new)->rb_left);

- } else if (line->desc > entry->desc) {

- new = &((*new)->rb_right);

- /* this should never happen */

- WARN(1, "duplicate line inserted");

- rb_link_node(&line->node, parent, new);

- rb_insert_color(&line->node, &supinfo_tree);

-static void supinfo_erase(struct line *line)

- guard(spinlock)(&supinfo_lock);

- rb_erase(&line->node, &supinfo_tree);

-static struct line *supinfo_find(struct gpio_desc *desc)

- struct rb_node *node = supinfo_tree.rb_node;

- struct line *line;

- line = container_of(node, struct line, node);

- if (desc < line->desc)

- node = node->rb_left;

- else if (desc > line->desc)

- node = node->rb_right;

-static void supinfo_to_lineinfo(struct gpio_desc *desc,

- struct gpio_v2_line_info *info)

- struct gpio_v2_line_attribute *attr;

- struct line *line;

- guard(spinlock)(&supinfo_lock);

- line = supinfo_find(desc);

- attr = &info->attrs[info->num_attrs];

- attr->id = GPIO_V2_LINE_ATTR_ID_DEBOUNCE;

- attr->debounce_period_us = READ_ONCE(line->debounce_period_us);

- info->num_attrs++;

-static inline bool line_has_supinfo(struct line *line)

- return READ_ONCE(line->debounce_period_us);

- * Checks line_has_supinfo() before and after the change to avoid unnecessary

- * supinfo_tree access.

- * Called indirectly by linereq_create() or linereq_set_config() so line

- * is already protected from concurrent changes.

-static void line_set_debounce_period(struct line *line,

- unsigned int debounce_period_us)

- bool was_suppl = line_has_supinfo(line);

- WRITE_ONCE(line->debounce_period_us, debounce_period_us);

- /* if supinfo status is unchanged then we're done */

- if (line_has_supinfo(line) == was_suppl)

- /* supinfo status has changed, so update the tree */

- supinfo_erase(line);

- supinfo_insert(line);

- usecs_to_jiffies(READ_ONCE(line->debounce_period_us)));

- /* try hardware */

- ret = gpiod_set_debounce(line->desc, debounce_period_us);

- line_set_debounce_period(line, debounce_period_us);

- line_set_debounce_period(line, 0);

- line_set_debounce_period(line, debounce_period_us);

- (READ_ONCE(line->debounce_period_us) == debounce_period_us))

- line_set_debounce_period(line, debounce_period_us);

- if (memchr_inv(lc->padding, 0, sizeof(lc->padding)))

-static void gpio_v2_line_config_flags_to_desc_flags(u64 flags,

- assign_bit(FLAG_ACTIVE_LOW, flagsp,

- flags & GPIO_V2_LINE_FLAG_ACTIVE_LOW);

- if (flags & GPIO_V2_LINE_FLAG_OUTPUT)

- set_bit(FLAG_IS_OUT, flagsp);

- else if (flags & GPIO_V2_LINE_FLAG_INPUT)

- clear_bit(FLAG_IS_OUT, flagsp);

- assign_bit(FLAG_EDGE_RISING, flagsp,

- flags & GPIO_V2_LINE_FLAG_EDGE_RISING);

- assign_bit(FLAG_EDGE_FALLING, flagsp,

- flags & GPIO_V2_LINE_FLAG_EDGE_FALLING);

- assign_bit(FLAG_OPEN_DRAIN, flagsp,

- flags & GPIO_V2_LINE_FLAG_OPEN_DRAIN);

- assign_bit(FLAG_OPEN_SOURCE, flagsp,

- flags & GPIO_V2_LINE_FLAG_OPEN_SOURCE);

- assign_bit(FLAG_PULL_UP, flagsp,

- flags & GPIO_V2_LINE_FLAG_BIAS_PULL_UP);

- assign_bit(FLAG_PULL_DOWN, flagsp,

- flags & GPIO_V2_LINE_FLAG_BIAS_PULL_DOWN);

- assign_bit(FLAG_BIAS_DISABLE, flagsp,

- flags & GPIO_V2_LINE_FLAG_BIAS_DISABLED);

- assign_bit(FLAG_EVENT_CLOCK_REALTIME, flagsp,

- flags & GPIO_V2_LINE_FLAG_EVENT_CLOCK_REALTIME);

- assign_bit(FLAG_EVENT_CLOCK_HTE, flagsp,

- flags & GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE);

- ret = gpiod_direction_output(desc, val);

- ret = gpiod_direction_input(desc);

- struct line *line;

- line = &lr->lines[i];

- edge_detector_stop(line);

- if (line_has_supinfo(line))

- supinfo_erase(line);

- gpiod_free(line->desc);

- if (memchr_inv(ulr.padding, 0, sizeof(ulr.padding)))

- ret = gpiod_direction_output(desc, val);

- ret = gpiod_direction_input(desc);

- struct gpio_v2_line_info *info)

- test_bit(FLAG_USED_AS_IRQ, &dflags) ||

- !gpiochip_line_is_valid(guard.gc, info->offset) ||

- !pinctrl_gpio_can_use_line(guard.gc, info->offset))

- gpio_desc_to_lineinfo(desc, &lineinfo_v2);

- if (memchr_inv(lineinfo.padding, 0, sizeof(lineinfo.padding)))

- gpio_desc_to_lineinfo(desc, &lineinfo);

- supinfo_to_lineinfo(desc, &lineinfo);

- struct gpio_v2_line_info_changed chg;

- memset(&chg, 0, sizeof(chg));

- chg.event_type = action;

- chg.timestamp_ns = ktime_get_ns();

- gpio_desc_to_lineinfo(desc, &chg.info);

- supinfo_to_lineinfo(desc, &chg.info);

- ret = kfifo_in_spinlocked(&cdev->events, &chg, 1, &cdev->wait.lock);

- wake_up_poll(&cdev->wait, EPOLLIN);

- pr_debug_ratelimited("lineinfo event FIFO is full - event dropped\n");

- ret = blocking_notifier_chain_register(&gdev->line_state_notifier,

- &cdev->lineinfo_changed_nb);

- blocking_notifier_chain_unregister(&gdev->line_state_notifier,

- &cdev->lineinfo_changed_nb);

- blocking_notifier_chain_unregister(&gdev->line_state_notifier,

- &cdev->lineinfo_changed_nb);

diff --git a/drivers/gpio/gpiolib-legacy.c b/drivers/gpio/gpiolib-legacy.c
index 28f1046fb670..aeae6df8bec9 100644
--- a/drivers/gpio/gpiolib-legacy.c
+++ b/drivers/gpio/gpiolib-legacy.c

- if (flags & GPIOF_ACTIVE_LOW)

- set_bit(FLAG_ACTIVE_LOW, &desc->flags);

diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 880f1efcaca5..2e537ee979f3 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c

- of_property_read_bool(np, "cs-gpios")) {

diff --git a/drivers/gpio/gpiolib-swnode.c b/drivers/gpio/gpiolib-swnode.c
index 2b2dd7e92211..f21dbc28cf2c 100644
--- a/drivers/gpio/gpiolib-swnode.c
+++ b/drivers/gpio/gpiolib-swnode.c

-EXPORT_SYMBOL_NS_GPL(swnode_gpio_undefined, GPIO_SWNODE);

diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index 17ed229412af..1acfa43bf1ab 100644
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c

- mutex_lock(&data->mutex);

- gpiod_get_direction(desc);

- value = !!test_bit(FLAG_IS_OUT, &desc->flags);

- mutex_unlock(&data->mutex);

- mutex_lock(&data->mutex);

- mutex_unlock(&data->mutex);

- mutex_lock(&data->mutex);

- status = gpiod_get_value_cansleep(desc);

- mutex_unlock(&data->mutex);

- mutex_lock(&data->mutex);

- if (!test_bit(FLAG_IS_OUT, &desc->flags)) {

- } else if (status == 0) {

- gpiod_set_value_cansleep(desc, value);

- mutex_unlock(&data->mutex);

- if (flags & GPIO_IRQF_TRIGGER_FALLING)

- if (flags & GPIO_IRQF_TRIGGER_RISING)

- mutex_lock(&data->mutex);

- flags = data->irq_flags;

- mutex_unlock(&data->mutex);

- mutex_lock(&data->mutex);

- if (flags == data->irq_flags) {

- status = gpio_sysfs_request_irq(dev, flags);

- mutex_unlock(&data->mutex);

- mutex_lock(&data->mutex);

- value = !!test_bit(FLAG_ACTIVE_LOW, &desc->flags);

- mutex_unlock(&data->mutex);

- mutex_lock(&data->mutex);

- status = gpio_sysfs_set_active_low(dev, value);

- mutex_unlock(&data->mutex);

- return status ? : size;

- pr_warn("%s: invalid GPIO %ld\n", __func__, gpio);

- pr_warn("%s: GPIO %ld masked\n", __func__, gpio);

- pr_warn("%s: invalid GPIO %ld\n", __func__, gpio);

-static struct class gpio_class = {

- .class_groups = gpio_class_groups,

- const char *ioname = NULL;

- int status, offset;

- mutex_lock(&sysfs_lock);

- offset = gpio_chip_hwgpio(desc);

- if (guard.gc->names && guard.gc->names[offset])

- ioname = guard.gc->names[offset];

- ioname ? ioname : "gpio%u",

- desc_to_gpio(desc));

- mutex_unlock(&sysfs_lock);

- mutex_lock(&sysfs_lock);

- if (!test_bit(FLAG_EXPORT, &desc->flags))

- dev = class_find_device(&gpio_class, NULL, desc, match_export);

- data = dev_get_drvdata(dev);

- clear_bit(FLAG_EXPORT, &desc->flags);

- device_unregister(dev);

- * Release irq after deregistration to prevent race with edge_store.

- if (data->irq_flags)

- gpio_sysfs_free_irq(dev);

- mutex_unlock(&sysfs_lock);

- mutex_lock(&sysfs_lock);

- mutex_unlock(&sysfs_lock);

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index d5952ab7752c..679ed764cb14 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c

-#include <linux/spinlock.h>

- for (desc_index = 0; desc_index < gc->ngpio; desc_index++)

- gdev->descs[desc_index].gdev = gdev;

- BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier);

- * Not yet but in the future the spinlock below will become a mutex.

- * Annotate this function before anyone tries to use it in interrupt

- * context like it happened with gpiochip_find().

- gpiod_line_state_notify(desc, GPIOLINE_CHANGED_RELEASED);

-static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,

- unsigned long config)

- if (!gc->set_config)

- return gc->set_config(gc, offset, config);

- CLASS(gpio_chip_guard, guard)(desc);

- return gpio_do_set_config(guard.gc, gpio_chip_hwgpio(desc), config);

- return gpio_set_config_with_argument_optional(desc,

- PIN_CONFIG_INPUT_DEBOUNCE,

-EXPORT_SYMBOL_GPL(gpiod_direction_input);

- return gpiod_direction_output_raw_commit(desc, value);

- unsigned long flags;

- ret = gpiod_direction_input(desc);

-EXPORT_SYMBOL_GPL(gpiod_direction_output);

- CLASS(gpio_chip_guard, guard)(desc);

- return gpio_do_set_config(guard.gc, gpio_chip_hwgpio(desc), config);

- return desc_set_label(desc, name);

- blocking_notifier_call_chain(&desc->gdev->line_state_notifier,

- gpiod_line_state_notify(desc, GPIOLINE_CHANGED_REQUESTED);

- ret = gpiod_direction_output(desc,

- ret = gpiod_direction_input(desc);

- seq_printf(s, "%s%s: (dangling chip)",

- priv->newline ? "\n" : "",

- dev_name(&gdev->dev));

- seq_printf(s, "%s%s: GPIOs %u-%u", priv->newline ? "\n" : "",

- dev_name(&gdev->dev),

- gdev->base, gdev->base + gdev->ngpio - 1);

diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 067197d61d57..83690f72f7e5 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h

- struct blocking_notifier_head line_state_notifier;

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 1cb5a4f19293..fbef3f471bd0 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig

- select DRM_KMS_HELPER if DRM_FBDEV_EMULATION

- select FB_CORE if DRM_FBDEV_EMULATION

- select FB_SYSMEM_HELPERS_DEFERRED if DRM_FBDEV_EMULATION

-config DRM_FBDEV_EMULATION

- bool "Enable legacy fbdev support for your modesetting driver"

- select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE

- Choose this option if you have a need for the legacy fbdev

- support. Note that this support also provides the linux console

- support on top of your modesetting driver.

- If in doubt, say "Y".

-config DRM_FBDEV_OVERALLOC

- int "Overallocation of the fbdev buffer"

- depends on DRM_FBDEV_EMULATION

- Defines the fbdev buffer overallocation in percent. Default

- is 100. Typical values for double buffering will be 200,

- triple buffering 300.

-config DRM_FBDEV_LEAK_PHYS_SMEM

- bool "Shamelessly allow leaking of fbdev physical address (DANGEROUS)"

- depends on DRM_FBDEV_EMULATION && EXPERT

- In order to keep user-space compatibility, we want in certain

- use-cases to keep leaking the fbdev physical address to the

- user-space program handling the fbdev buffer.

- This affects, not only, Amlogic, Allwinner or Rockchip devices

- with ARM Mali GPUs using an userspace Blob.

- This option is not supported by upstream developers and should be

- removed as soon as possible and be considered as a broken and

- legacy behaviour from a modern fbdev device driver.

- Please send any bug reports when using this to your proprietary

- software vendor that requires this.

- If in doubt, say "N" or spread the word to your closed source

- select FB_DMAMEM_HELPERS if DRM_FBDEV_EMULATION

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 784229d4504d..19fb370fbc56 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile

- drm_client_modeset.o \

diff --git a/drivers/gpu/drm/amd/amdgpu/Kconfig b/drivers/gpu/drm/amd/amdgpu/Kconfig
index 0051fb1b437f..1a11cab741ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/Kconfig
+++ b/drivers/gpu/drm/amd/amdgpu/Kconfig

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index c7b18c52825d..5b21674b07fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile

- umc_v6_0.o umc_v6_1.o umc_v6_7.o umc_v8_7.o umc_v8_10.o umc_v12_0.o

diff --git a/drivers/gpu/drm/amd/amdgpu/aldebaran.c b/drivers/gpu/drm/amd/amdgpu/aldebaran.c
index b0f95a7649bf..e13fbd974141 100644
--- a/drivers/gpu/drm/amd/amdgpu/aldebaran.c
+++ b/drivers/gpu/drm/amd/amdgpu/aldebaran.c

- r = adev->ip_blocks[i].version->funcs->suspend(adev);

- dev_err(adev->dev,

- "suspend of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = false;

- r = cmn_block->version->funcs->resume(adev);

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- dev_err(adev->dev,

- "resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = true;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 9b1e0ede05a4..69895fccb474 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h

-#define GFX_SLICE_PERIOD msecs_to_jiffies(250)

- /* delayed reset_func for XGMI configuration if necessary */

- struct delayed_work delayed_reset_work;

- bool pending_reset;

-bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,

- /* indicate amdgpu suspension status */

- bool suspend_complete;

-bool amdgpu_atpx_dgpu_req_power_for_displays(void);

-static inline bool amdgpu_atpx_dgpu_req_power_for_displays(void) { return false; }

-#if defined(CONFIG_VGA_SWITCHEROO) && defined(CONFIG_ACPI)

-void *amdgpu_atpx_get_dhandle(void);

-static inline void *amdgpu_atpx_get_dhandle(void) { return NULL; }

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
index 2ca127173135..9d6345146495 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c

- if (start + count >= max_count)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
index 5ef6b745f222..f3289d289913 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index bf6c4a0d0525..deb0785350e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c

-static int acp_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int acp_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

- * @handle: handle used to pass amdgpu_device pointer

-static int acp_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- const struct amdgpu_ip_block *ip_block =

- amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ACP);

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

- * @handle: handle used to pass amdgpu_device pointer

-static int acp_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

-static int acp_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false);

-static int acp_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);

-static int acp_early_init(void *handle)

-static int acp_wait_for_idle(void *handle)

-static int acp_soft_reset(void *handle)

-static int acp_set_clockgating_state(void *handle,

-static int acp_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);

- .early_init = acp_early_init,

- .late_init = NULL,

- .wait_for_idle = acp_wait_for_idle,

- .soft_reset = acp_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index f85ace0384d2..b8d4e07d2043 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

- /* Fail only if calling the method fails and ATIF is supported */

- if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {

- kfree(buffer.pointer);

- return buffer.pointer;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 4f08b153cb66..2c1b38c5cfc6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

- amdgpu_bo_reserve(*bo, true);

- if (IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 11 &&

- ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) {

- adev->ip_blocks[AMD_IP_BLOCK_TYPE_GFX].version->funcs->set_powergating_state((void *)adev, state);

- if (kiq_ring->sched.ready && !adev->job_hang)

- r = amdgpu_ring_test_helper(kiq_ring);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
index f9d119448442..8af67f18500a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

+static inline bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c
index 9435af2e6bdc..9abf29b58ac7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

- drm_sched_start(&ring->sched);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 3bc0cbf45bc5..441568163e20 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

- * @wave_cnt: Output parameter updated with number of waves in flight

- * @vmid: Output parameter updated with VMID of queue whose wave count

- * is being collected

- if (!adev->debug_exp_resets &&

- !adev->gfx.num_gfx_rings)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index ce5ca304dba9..1e998f972c30 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

- ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);

- amdgpu_bo_reserve(bo[i], true);

- amdgpu_vm_bo_unmap(adev, bo_va, entry->va);

- amdgpu_vm_clear_freed(adev, vm, &bo_va->last_pt_update);

- amdgpu_sync_fence(sync, bo_va->last_pt_update);

- *ef = dma_fence_get(&vm->process_info->eviction_fence->base);

- amdgpu_bo_reserve(bo, true);

- queue_delayed_work(system_freezable_wq,

- &process_info->restore_userptr_work,

- msecs_to_jiffies(AMDGPU_USERPTR_RESTORE_DELAY_MS));

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index 0c8975ac5af9..093141ad6ed0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

-void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,

- u32 eng_clock, u32 mem_clock)

- amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
index 0811474e8fd3..0e16432d9a72 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h

-void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,

- u32 eng_clock, u32 mem_clock);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
index 375f02002579..3893e6fc2f03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

-bool amdgpu_atpx_dgpu_req_power_for_displays(void)

- return amdgpu_atpx_priv.atpx.dgpu_req_power_for_displays;

-#if defined(CONFIG_ACPI)

-void *amdgpu_atpx_get_dhandle(void)

- return amdgpu_atpx_priv.dhandle;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
index 45affc02548c..423fd2eebe1e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

-static bool check_atom_bios(uint8_t *bios, size_t size)

- DRM_INFO("vbios mem is null or mem size is wrong\n");

- DRM_INFO("BIOS signature incorrect %x %x\n", bios[0], bios[1]);

- DRM_INFO("Can't locate bios header\n");

- DRM_INFO("BIOS header is broken\n");

- DRM_DEBUG("ATOMBIOS detected\n");

- if (!check_atom_bios(adev->bios, size)) {

- if (!check_atom_bios(adev->bios, len)) {

- if (!check_atom_bios(adev->bios, romlen))

- if (!check_atom_bios(adev->bios, size)) {

- if (!check_atom_bios(adev->bios, vhdr->ImageLength)) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 16153d275d7a..68bce6a6d09d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

- err = amdgpu_ucode_request(adev, &adev->pm.fw, "%s", fw_name);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 1e475eb01417..5cc5f59e3018 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

- if (p->gang_size > 1 && !p->adev->vm_manager.concurrent_flush) {

- amdgpu_vm_bo_invalidate(adev, bo, false);

- amdgpu_bo_placement_from_domain(*bo, (*bo)->allowed_domains);

- for (i = 0; i < (*bo)->placement.num_placement; i++)

- (*bo)->placements[i].flags |= TTM_PL_FLAG_CONTIGUOUS;

- r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index cbef720de779..49ca8c814455 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

- if (size & 0x3 || *pos & 0x3)

- S_IFREG | 0444, root,

- debugfs_create_file("amdgpu_evict_vram", 0444, root, adev,

- debugfs_create_file("amdgpu_evict_gtt", 0444, root, adev,

- debugfs_create_file("amdgpu_test_ib", 0444, root, adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
index 5ac59b62020c..824f9da5b6ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c

- if (coredump->adev->ip_blocks[i].version->funcs->print_ip_state) {

- drm_printf(&p, "IP: %s\n",

- coredump->adev->ip_blocks[i]

- .version->funcs->name);

- coredump->adev->ip_blocks[i]

- .version->funcs->print_ip_state(

- (void *)coredump->adev, &p);

- if (job && job->vm) {

- struct amdgpu_vm *vm = job->vm;

- ti = amdgpu_vm_get_task_info_vm(vm);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index c2394c8b4d6b..d100bb7a137c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

-#include <drm/drm_aperture.h>

-#include <drm/drm_fb_helper.h>

- * of PCIe replays (NAKs)

- * number of replays as a sum of the NAKs generated and NAKs received

- * 1 if the device supporte BACO;

- * 3 if the device support MACO (only works if BACO is supported)

- * amdgpu_device_aper_access - access vram by vram aperature

- * we know that the reset is not running in paralell.

- /* force vPost if error occured */

- if (adev->gmc.xgmi.pending_reset)

- (void *)adev, state);

- r = adev->ip_blocks[i].version->funcs->wait_for_idle((void *)adev);

- * amdgpu_device_ip_is_idle - is the hardware IP idle

- * Check if the hardware IP is idle or not.

- * Returns true if it the IP is idle, false if not.

-bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,

- enum amd_ip_block_type block_type)

- if (!adev->ip_blocks[i].status.valid)

- return adev->ip_blocks[i].version->funcs->is_idle((void *)adev);

- DRM_INFO("add ip block number %d <%s>\n", adev->num_ip_blocks,

- ip_block_version->funcs->name);

- * the user and configues the virtual display configuration (number of

- * firmware and makes them availale to the driver for use in configuring

- * Should be droped when DAL no longer needs it.

- if (adev->ip_blocks[i].version->funcs->early_init) {

- r = adev->ip_blocks[i].version->funcs->early_init((void *)adev);

- if (r == -ENOENT) {

- adev->ip_blocks[i].status.valid = false;

- DRM_ERROR("early_init of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.valid = true;

- r = adev->ip_blocks[i].version->funcs->hw_init(adev);

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- DRM_ERROR("resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- r = adev->ip_blocks[i].version->funcs->hw_init(adev);

- adev->ip_blocks[i].status.hw = true;

- r = adev->ip_blocks[i].version->funcs->sw_init((void *)adev);

- DRM_ERROR("sw_init of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev);

- r = amdgpu_ras_recovery_init(adev);

- if (!adev->gmc.xgmi.pending_reset) {

- * GPU reset, VRAM has not been lost. Some GPU resets may destry VRAM contents.

- r = adev->ip_blocks[i].version->funcs->set_clockgating_state((void *)adev,

- r = adev->ip_blocks[i].version->funcs->set_powergating_state((void *)adev,

- r = adev->ip_blocks[i].version->funcs->late_init((void *)adev);

- if (!amdgpu_in_reset(adev))

- r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);

- /* XXX handle errors */

- DRM_DEBUG("hw_fini of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = false;

- r = adev->ip_blocks[i].version->funcs->early_fini((void *)adev);

- /* Workaroud for ASICs need to disable SMC first */

- r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);

- /* XXX handle errors */

- DRM_DEBUG("hw_fini of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = false;

- r = adev->ip_blocks[i].version->funcs->sw_fini((void *)adev);

- /* XXX handle errors */

- DRM_DEBUG("sw_fini of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].version->funcs->late_fini((void *)adev);

- if (!amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true))

- r = adev->ip_blocks[i].version->funcs->suspend(adev);

- /* XXX handle errors */

- DRM_ERROR("suspend of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = false;

- if (adev->gmc.xgmi.pending_reset &&

- !(adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC ||

- adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC ||

- adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||

- adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH)) {

- adev->ip_blocks[i].status.hw = false;

- r = adev->ip_blocks[i].version->funcs->suspend(adev);

- /* XXX handle errors */

- DRM_ERROR("suspend of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- r = block->version->funcs->hw_init(adev);

- DRM_INFO("RE-INIT-early: %s %s\n", block->version->funcs->name, r?"failed":"succeeded");

- struct amdgpu_ip_block *block;

- for (j = 0; j < adev->num_ip_blocks; j++) {

- block = &adev->ip_blocks[j];

- if (block->version->type != ip_order[i] ||

- !block->status.valid ||

- if (block->version->type == AMD_IP_BLOCK_TYPE_SMC)

- r = block->version->funcs->resume(adev);

- r = block->version->funcs->hw_init(adev);

- DRM_INFO("RE-INIT-late: %s %s\n", block->version->funcs->name, r?"failed":"succeeded");

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- DRM_ERROR("resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = true;

- * First resume function for hardware IPs. The list of all the hardware

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- DRM_ERROR("resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = true;

- * (if any) and intitialized to use reset sem and in_gpu reset flag

- r = drm_aperture_remove_conflicting_pci_framebuffers(adev->pdev, &amdgpu_kms_driver);

- adev->gmc.xgmi.pending_reset = true;

- /* Only need to init necessary block for SMU to handle the reset */

- for (i = 0; i < adev->num_ip_blocks; i++) {

- if (!adev->ip_blocks[i].status.valid)

- if (!(adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC ||

- adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||

- adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH ||

- adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC)) {

- DRM_DEBUG("IP %s disabled for hw_init.\n",

- adev->ip_blocks[i].version->funcs->name);

- adev->ip_blocks[i].status.hw = true;

- if (!adev->gmc.xgmi.pending_reset) {

- if (adev->gmc.xgmi.pending_reset)

- queue_delayed_work(system_wq, &mgpu_info.delayed_reset_work,

- msecs_to_jiffies(AMDGPU_RESUME_MS));

- amdgpu_fence_driver_sw_fini(adev);

- /* No need to evict vram on APUs for suspend to ram or s2idle */

- if ((adev->in_s3 || adev->in_s0ix) && (adev->flags & AMD_IS_APU))

+ drm_warn(adev_to_drm(adev), "Failed to evict resources, freeze active processes if problems occur: %d\n", r);

- r = adev->ip_blocks[i].version->funcs->prepare_suspend((void *)adev);

- adev->in_s0ix = adev->in_s3 = false;

- * @fbcon : notify the fbdev of suspend

-int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)

- drm_fb_helper_set_suspend_unlocked(adev_to_drm(adev)->fb_helper, true);

- * @fbcon : notify the fbdev of resume

-int amdgpu_device_resume(struct drm_device *dev, bool fbcon)

- amdgpu_fence_driver_hw_init(adev);

- drm_fb_helper_set_suspend_unlocked(adev_to_drm(adev)->fb_helper, false);

- adev->ip_blocks[i].version->funcs->check_soft_reset(adev);

- r = adev->ip_blocks[i].version->funcs->pre_soft_reset(adev);

- r = adev->ip_blocks[i].version->funcs->soft_reset(adev);

- r = adev->ip_blocks[i].version->funcs->post_soft_reset(adev);

- amdgpu_ras_set_fed(adev, false);

- * amdgpu_device_has_job_running - check if there is any job in mirror list

- * check if there is any job in mirror list

- struct drm_sched_job *job;

- spin_lock(&ring->sched.job_list_lock);

- job = list_first_entry_or_null(&ring->sched.pending_list,

- struct drm_sched_job, list);

- spin_unlock(&ring->sched.job_list_lock);

- ->dump_ip_state((void *)tmp_adev);

-int amdgpu_do_asic_reset(struct list_head *device_list_handle,

- struct amdgpu_reset_context *reset_context)

- struct amdgpu_device *tmp_adev = NULL;

- bool need_full_reset, skip_hw_reset, vram_lost = false;

- /* Try reset handler method first */

- tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device,

- reset_context->reset_device_list = device_list_handle;

- r = amdgpu_reset_perform_reset(tmp_adev, reset_context);

- /* If reset handler not implemented, continue; otherwise return */

- if (r == -EOPNOTSUPP)

- /* Reset handler not implemented, use the default method */

- test_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);

- skip_hw_reset = test_bit(AMDGPU_SKIP_HW_RESET, &reset_context->flags);

- * ASIC reset has to be done on all XGMI hive nodes ASAP

- * to allow proper links negotiation in FW (within 1 sec)

- if (!skip_hw_reset && need_full_reset) {

- list_for_each_entry(tmp_adev, device_list_handle, reset_list) {

- /* For XGMI run all resets in parallel to speed up the process */

- if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {

- tmp_adev->gmc.xgmi.pending_reset = false;

- if (!queue_work(system_unbound_wq, &tmp_adev->xgmi_reset_work))

- r = amdgpu_asic_reset(tmp_adev);

- dev_err(tmp_adev->dev, "ASIC reset failed with error, %d for drm dev, %s",

- r, adev_to_drm(tmp_adev)->unique);

- /* For XGMI wait for all resets to complete before proceed */

- list_for_each_entry(tmp_adev, device_list_handle, reset_list) {

- if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) {

- flush_work(&tmp_adev->xgmi_reset_work);

- r = tmp_adev->asic_reset_res;

- if (!r && amdgpu_ras_intr_triggered()) {

- list_for_each_entry(tmp_adev, device_list_handle, reset_list) {

- amdgpu_ras_reset_error_count(tmp_adev, AMDGPU_RAS_BLOCK__MMHUB);

- amdgpu_ras_intr_cleared();

- if (need_full_reset) {

- amdgpu_ras_set_fed(tmp_adev, false);

- drm_fb_helper_set_suspend_unlocked(adev_to_drm(tmp_adev)->fb_helper, false);

- need_full_reset = true;

- if (need_full_reset)

- * Mark these ASICs to be reseted as untracked first

- drm_fb_helper_set_suspend_unlocked(adev_to_drm(tmp_adev)->fb_helper, true);

- drm_sched_start(&ring->sched);

- * Fetchs and stores in the driver the PCIE capabilities (gen speed

- struct pci_dev *pdev;

- enum pcie_link_width platform_link_width;

- pdev = adev->pdev;

- speed_cap = pcie_get_speed_cap(pdev);

- adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);

- adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);

- adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);

- adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);

- adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);

- adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 |

- CAIL_PCIE_LINK_WIDTH_SUPPORT_X1);

- adev->pm.pcie_mlw_mask = CAIL_PCIE_LINK_WIDTH_SUPPORT_X1;

- drm_sched_start(&ring->sched);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 4bd61c169ca8..949d74eff294 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

- adev->vcn.vcn_config[adev->vcn.num_vcn_inst] =

- adev->vcn.vcn_codec_disable_mask[v] =

- if (!adev->mman.discovery_bin) {

- dev_err(adev->dev,

- "fetch mem range failed, ip discovery uninitialized\n");

- bhdr = (struct binary_header *)adev->mman.discovery_bin;

- offset = le16_to_cpu(bhdr->table_list[NPS_INFO].offset);

- /* If verification fails, return as if NPS table doesn't exist */

- if (amdgpu_discovery_verify_npsinfo(adev, bhdr))

- nps_info = (union nps_info *)(adev->mman.discovery_bin + offset);

- mem_ranges = kvzalloc(

- *range_cnt * sizeof(struct amdgpu_gmc_memrange),

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h
index f5d36525ec3e..b44d56465c5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index b119d27271c1..35c778426a7c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 9d19940f73c8..dfa0d642ac16 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

#define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))

#define amdgpu_display_backlight_set_level(adev, e, l) (adev)->mode_info.funcs->backlight_set_level((e), (l))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index 8e81a83d37d8..9f627caedc3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c

- amdgpu_vm_bo_invalidate(adev, bo, false);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 81d9877c8735..dce9323fb410 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

-#define KMS_DRIVER_MINOR 59

-static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);

- .delayed_reset_work = __DELAYED_WORK_INITIALIZER(

- mgpu_info.delayed_reset_work,

- amdgpu_drv_delayed_reset_work_handler, 0),

- * The default is -1 (Use 1/2 RAM, minimum value is 3GB).

* the kernel log for the list of IPs on the asic. The default is 0xffffffff (enable all blocks on a device).

-module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);

-module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);

* Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disabled except SRIOV).

-module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);

* Set value 1 to enable emulation mode. This is only needed when running on an emulator. The default is 0 (disabled).

-module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);

-module_param_named(force_asic_type, amdgpu_force_asic_type, int, 0444);

-module_param(sched_policy, int, 0444);

"Scheduling policy (0 = HWS (Default), 1 = HWS without over-subscription, 2 = Non-HWS (Used for debugging only)");

-module_param(halt_if_hws_hang, int, 0644);

-module_param(hws_gws_support, bool, 0444);

MODULE_PARM_DESC(hws_gws_support, "Assume MEC2 FW supports GWS barriers (false = rely on FW version check (Default), true = force supported)");

MODULE_PARM_DESC(no_queue_eviction_on_vm_fault, "No queue eviction on VM fault (0 = queue eviction, 1 = no queue eviction)");

-module_param_named(no_queue_eviction_on_vm_fault, amdgpu_no_queue_eviction_on_vm_fault, int, 0444);

+module_param_named_unsafe(no_queue_eviction_on_vm_fault, amdgpu_no_queue_eviction_on_vm_fault, int, 0444);

MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (0 = MTYPE_RW (default), 1 = MTYPE_NC, 2 = MTYPE_CC)");

-module_param_named(mtype_local, amdgpu_mtype_local, int, 0444);

- * Defaults to -1, or disabled. Userspace can only override this level after

MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco/bamaco)");

-module_param_named(reset_method, amdgpu_reset_method, int, 0644);

-module_param_named(debug_mask, amdgpu_debug_mask, uint, 0444);

- drm_fbdev_ttm_setup(adev_to_drm(adev), 8);

- drm_fbdev_ttm_setup(adev_to_drm(adev), 32);

- * amdgpu_drv_delayed_reset_work_handler - work handler for reset

- * @work: work_struct.

-static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work)

- struct list_head device_list;

- struct amdgpu_device *adev;

- struct amdgpu_reset_context reset_context;

- memset(&reset_context, 0, sizeof(reset_context));

- mutex_lock(&mgpu_info.mutex);

- if (mgpu_info.pending_reset == true) {

- mutex_unlock(&mgpu_info.mutex);

- mgpu_info.pending_reset = true;

- mutex_unlock(&mgpu_info.mutex);

- /* Use a common context, just need to make sure full reset is done */

- reset_context.method = AMD_RESET_METHOD_NONE;

- set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);

- for (i = 0; i < mgpu_info.num_dgpu; i++) {

- adev = mgpu_info.gpu_ins[i].adev;

- reset_context.reset_req_dev = adev;

- r = amdgpu_device_pre_asic_reset(adev, &reset_context);

- dev_err(adev->dev, "GPU pre asic reset failed with err, %d for drm dev, %s ",

- r, adev_to_drm(adev)->unique);

- if (!queue_work(system_unbound_wq, &adev->xgmi_reset_work))

- for (i = 0; i < mgpu_info.num_dgpu; i++) {

- adev = mgpu_info.gpu_ins[i].adev;

- flush_work(&adev->xgmi_reset_work);

- adev->gmc.xgmi.pending_reset = false;

- /* reset function will rebuild the xgmi hive info , clear it now */

- for (i = 0; i < mgpu_info.num_dgpu; i++)

- amdgpu_xgmi_remove_device(mgpu_info.gpu_ins[i].adev);

- INIT_LIST_HEAD(&device_list);

- for (i = 0; i < mgpu_info.num_dgpu; i++)

- list_add_tail(&mgpu_info.gpu_ins[i].adev->reset_list, &device_list);

- /* unregister the GPU first, reset function will add them back */

- list_for_each_entry(adev, &device_list, reset_list)

- amdgpu_unregister_gpu_instance(adev);

- /* Use a common context, just need to make sure full reset is done */

- set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags);

- set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);

- r = amdgpu_do_asic_reset(&device_list, &reset_context);

- DRM_ERROR("reinit gpus failure");

- for (i = 0; i < mgpu_info.num_dgpu; i++) {

- adev = mgpu_info.gpu_ins[i].adev;

- if (!adev->kfd.init_complete) {

- kgd2kfd_init_zone_device(adev);

- amdgpu_amdkfd_device_init(adev);

- amdgpu_amdkfd_drm_client_create(adev);

- amdgpu_ttm_set_buffer_funcs_status(adev, true);

- adev->suspend_complete = false;

- adev->suspend_complete = true;

- adev->in_s4 = true;

- .date = DRIVER_DATE,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h
index 5bc2cb661af7..2d86cc6f7f4d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h

-#define DRIVER_DATE "20150101"

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
index 35fee3e8cde2..8cd69836dd99 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c

- read ? "read" : "write", EEPROM_OFFSET_SIZE);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
index c7df7fa3459f..91d638098889 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c

- struct amdgpu_mem_stats stats;

- unsigned int hw_ip;

- memset(&stats, 0, sizeof(stats));

- ret = amdgpu_bo_reserve(vm->root.bo, false);

- amdgpu_vm_get_memory(vm, &stats);

- amdgpu_bo_unreserve(vm->root.bo);

- drm_printf(p, "drm-memory-vram:\t%llu KiB\n", stats.vram/1024UL);

- drm_printf(p, "drm-memory-gtt: \t%llu KiB\n", stats.gtt/1024UL);

- drm_printf(p, "drm-memory-cpu: \t%llu KiB\n", stats.cpu/1024UL);

- drm_printf(p, "amd-memory-visible-vram:\t%llu KiB\n",

- stats.visible_vram/1024UL);

- stats.evicted_vram/1024UL);

- drm_printf(p, "amd-evicted-visible-vram:\t%llu KiB\n",

- stats.evicted_visible_vram/1024UL);

- stats.requested_vram/1024UL);

- drm_printf(p, "amd-requested-visible-vram:\t%llu KiB\n",

- stats.requested_visible_vram/1024UL);

- stats.requested_gtt/1024UL);

- drm_printf(p, "drm-shared-vram:\t%llu KiB\n", stats.vram_shared/1024UL);

- drm_printf(p, "drm-shared-gtt:\t%llu KiB\n", stats.gtt_shared/1024UL);

- drm_printf(p, "drm-shared-cpu:\t%llu KiB\n", stats.cpu_shared/1024UL);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
index ceb5163480f4..09c9194d5bd5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c

- if (!is_fru_eeprom_supported(adev, NULL) || !adev->fru_info)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.h
index bc58dca18035..98f3196599ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c
index 2d4b67175b55..328a1b963548 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 256b95232de5..b2033f8352f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c

- adev->dummy_page_addr = dma_map_page(&adev->pdev->dev, dummy_page, 0,

- PAGE_SIZE, DMA_BIDIRECTIONAL);

- dma_unmap_page(&adev->pdev->dev, adev->dummy_page_addr, PAGE_SIZE,

- DMA_BIDIRECTIONAL);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 1a5df8b94661..69429df09477 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

- amdgpu_hmm_unregister(aobj);

- ttm_bo_put(&aobj->tbo);

- struct amdgpu_device *adev = drm_to_adev(dev);

- amdgpu_vm_bo_invalidate(adev, robj, true);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 83e54697f0ee..784b03abb3a4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

-void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,

- int *me, int *pipe, int *queue)

- *queue = bit % adev->gfx.me.num_queue_per_pipe;

- *pipe = (bit / adev->gfx.me.num_queue_per_pipe)

- % adev->gfx.me.num_pipe_per_me;

- *me = (bit / adev->gfx.me.num_queue_per_pipe)

- / adev->gfx.me.num_pipe_per_me;

- kiq->mqd_backup = kmalloc(mqd_size, GFP_KERNEL);

- adev->gfx.me.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL);

- adev->gfx.mec.mqd_backup[j] = kmalloc(mqd_size, GFP_KERNEL);

- * This is workaround: only skip kiq_ring test

- * during ras recovery in suspend stage for gfx9.4.3

- if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)) &&

- amdgpu_ras_in_recovery(adev)) {

- spin_unlock(&kiq->ring_lock);

- if (kiq_ring->sched.ready && !adev->job_hang)

- r = amdgpu_ring_test_helper(kiq_ring);

- spin_lock(&kiq->ring_lock);

- if (adev->gfx.kiq[0].ring.sched.ready && !adev->job_hang)

- spin_unlock(&kiq->ring_lock);

- AMD_IP_BLOCK_TYPE_GFX, true))

- !amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false)) {

- char *supported_partition;

- switch (NUM_XCC(adev->gfx.xcc_mask)) {

- supported_partition = "SPX, DPX, QPX, CPX";

- supported_partition = "SPX, TPX, CPX";

- supported_partition = "SPX, DPX, CPX";

- /* this seems only existing in emulation phase */

- supported_partition = "SPX, CPX";

- supported_partition = "Not supported";

- return sysfs_emit(buf, "%s\n", supported_partition);

-int amdgpu_gfx_sysfs_init(struct amdgpu_device *adev)

- r = device_create_file(adev->dev, &dev_attr_available_compute_partition);

-void amdgpu_gfx_sysfs_fini(struct amdgpu_device *adev)

- device_remove_file(adev->dev, &dev_attr_available_compute_partition);

-int amdgpu_gfx_sysfs_isolation_shader_init(struct amdgpu_device *adev)

- if (!amdgpu_sriov_vf(adev)) {

- r = device_create_file(adev->dev, &dev_attr_enforce_isolation);

- r = device_create_file(adev->dev, &dev_attr_run_cleaner_shader);

-void amdgpu_gfx_sysfs_isolation_shader_fini(struct amdgpu_device *adev)

- if (!amdgpu_sriov_vf(adev))

- device_remove_file(adev->dev, &dev_attr_enforce_isolation);

- device_remove_file(adev->dev, &dev_attr_run_cleaner_shader);

- GFX_SLICE_PERIOD);

- amdgpu_gfx_kfd_sch_ctrl(adev, idx, false);

- amdgpu_gfx_kfd_sch_ctrl(adev, idx, true);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 5644e10a86a9..8b5bd63b5773 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

-void amdgpu_gfx_bit_to_me_queue(struct amdgpu_device *adev, int bit,

- int *me, int *pipe, int *queue);

-int amdgpu_gfx_sysfs_isolation_shader_init(struct amdgpu_device *adev);

-void amdgpu_gfx_sysfs_isolation_shader_fini(struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 17a19d49d30a..1c19a65e6553 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

- * amdgpu_gmc_vram_cpu_pa - calculate vram buffer object's physical address

- * @adev: amdgpu_device pointer

- * @bo: amdgpu buffer object

-uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)

- return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;

- case AMDGPU_NPS1_PARTITION_MODE:

- return sysfs_emit(buf, "NPS1\n");

- case AMDGPU_NPS2_PARTITION_MODE:

- return sysfs_emit(buf, "NPS2\n");

- case AMDGPU_NPS3_PARTITION_MODE:

- return sysfs_emit(buf, "NPS3\n");

- case AMDGPU_NPS4_PARTITION_MODE:

- return sysfs_emit(buf, "NPS4\n");

- case AMDGPU_NPS6_PARTITION_MODE:

- return sysfs_emit(buf, "NPS6\n");

- case AMDGPU_NPS8_PARTITION_MODE:

- return sysfs_emit(buf, "NPS8\n");

-static DEVICE_ATTR_RO(current_memory_partition);

- if (range_cnt != exp_ranges) {

- exp_ranges, nps_type, range_cnt);

- for (i = 0; i < exp_ranges; ++i) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 4d951a1baefa..459a30fe239f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

- bool pending_reset;

-uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c
index 00d6211e0fbf..f0765ccde668 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

-/* Add the default buses */

-void amdgpu_i2c_init(struct amdgpu_device *adev)

- if (amdgpu_hw_i2c)

- DRM_INFO("hw_i2c forced on, you may experience display detection problems!\n");

- amdgpu_atombios_i2c_init(adev);

-/* Add additional buses */

-void amdgpu_i2c_add(struct amdgpu_device *adev,

- const struct amdgpu_i2c_bus_rec *rec,

- struct drm_device *dev = adev_to_drm(adev);

- for (i = 0; i < AMDGPU_MAX_I2C_BUS; i++) {

- if (!adev->i2c_bus[i]) {

- adev->i2c_bus[i] = amdgpu_i2c_create(dev, rec, name);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h
index 63c2ff7499e1..21e3d1dad0a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.h

-void amdgpu_i2c_init(struct amdgpu_device *adev);

-void amdgpu_i2c_add(struct amdgpu_device *adev,

- const struct amdgpu_i2c_bus_rec *rec,

- const char *name);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 8b512dc28df8..2ea98ec60220 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c

- * @adev: amdgpu_device pointer

-void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib,

- struct dma_fence *f)

- amdgpu_sa_bo_free(adev, &ib->sa_bo, f);

- (amdgpu_sriov_vf(adev) && need_ctx_switch) ||

- amdgpu_vm_need_pipeline_sync(ring, job))) {

- if (vm && ring->funcs->emit_switch_buffer)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
index 92d27d32de41..8e712a11aba5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c

- * @fence: fence to wait for if no id could be grabbed

- struct amdgpu_vmid **id,

- struct dma_fence **fence)

- r = amdgpu_vmid_grab_used(vm, ring, job, &id, fence);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
index f3b0aaf3ebc6..901f8b12c672 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
index 508f02eb0cf8..7d4395a5d8ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
index 4766e99dd98f..732744488b03 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c

-static int isp_sw_init(void *handle)

-static int isp_sw_fini(void *handle)

- * @handle: handle for amdgpu_device pointer

-static int isp_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- const struct amdgpu_ip_block *ip_block =

- amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ISP);

- * @handle: handle for amdgpu_device pointer

-static int isp_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- struct amdgpu_isp *isp = &adev->isp;

-static int isp_suspend(void *handle)

-static int isp_resume(void *handle)

- r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix);

-static int isp_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int isp_wait_for_idle(void *handle)

-static int isp_soft_reset(void *handle)

-static int isp_set_clockgating_state(void *handle,

-static int isp_set_powergating_state(void *handle,

- .late_init = NULL,

- .sw_init = isp_sw_init,

- .sw_fini = isp_sw_fini,

- .suspend = isp_suspend,

- .resume = isp_resume,

- .wait_for_idle = isp_wait_for_idle,

- .soft_reset = isp_soft_reset,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 16f2605ac50b..100f04475943 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

- ->dump_ip_state((void *)adev);

- adev->job_hang = true;

- drm_sched_start(&ring->sched);

- adev->job_hang = false;

- * Initialize the scheduler to at least some ring so that we always

- * have a pointer to adev.

- (*job)->base.sched = &adev->rings[0]->sched;

- struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched);

- amdgpu_ib_free(ring->adev, &job->ibs[i], f);

- if (!fence && job->gang_submit)

- while (!fence && job->vm && !job->vmid) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
index 6df99cb00d9a..b6d2eb049f54 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

- if (adev->jpeg.harvest_config & (1 << i))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
index f9cdd873ac9b..d9cb343a8708 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h

-#define AMDGPU_MAX_JPEG_RINGS 8

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 016a6f6c4267..98528ee94c15 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

- uint32_t pcie_gen_mask;

- pcie_gen_mask = adev->pm.pcie_gen_mask & (adev->pm.pcie_gen_mask >> 16);

- adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 ? 32 :

- adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 ? 16 :

- adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 ? 12 :

- adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 ? 8 :

- adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 ? 4 :

- adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 ? 2 : 1;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
index 18ee60378727..3ca03b5e0f91 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

static int amdgpu_mca_smu_get_mca_set(struct amdgpu_device *adev, enum amdgpu_mca_error_type type, struct mca_bank_set *mca_set,

- amdgpu_mca_smu_mca_bank_dump(adev, i, &entry, qctx);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 10b61ff63802..32b27a1658e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

- AMDGPU_GEM_DOMAIN_GTT,

- r = amdgpu_device_wb_get(adev, &adev->mes.read_val_offs);

- dev_err(adev->dev,

- "(%d) read_val_offs alloc failed\n", r);

- adev->mes.read_val_gpu_addr =

- adev->wb.gpu_addr + (adev->mes.read_val_offs * 4);

- adev->mes.read_val_ptr =

- (uint32_t *)&adev->wb.wb[adev->mes.read_val_offs];

- if (adev->mes.read_val_ptr)

- amdgpu_device_wb_free(adev, adev->mes.read_val_offs);

- if (adev->mes.read_val_ptr)

- amdgpu_device_wb_free(adev, adev->mes.read_val_offs);

- queue_input.mqd_addr = amdgpu_bo_gpu_offset(ring->mqd_obj);

- op_input.read_reg.buffer_addr = adev->mes.read_val_gpu_addr;

- val = *(adev->mes.read_val_ptr);

- amdgpu_mes_unlock(&adev->mes);

- r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], "%s", fw_name);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 96788c0f42f1..2df2444ee892 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h

- uint32_t read_val_offs;

- uint64_t read_val_gpu_addr;

- uint32_t *read_val_ptr;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
index f61d117b0caf..79c2f807b9fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 44819cdba7fb..96f4b8904e9a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

- if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)

- struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);

- amdgpu_vm_bo_invalidate(adev, abo, evict);

-void amdgpu_bo_get_memory(struct amdgpu_bo *bo,

- struct amdgpu_mem_stats *stats)

- struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);

- struct ttm_resource *res = bo->tbo.resource;

- uint64_t size = amdgpu_bo_size(bo);

- struct drm_gem_object *obj;

- /* Abort if the BO doesn't currently have a backing store */

- obj = &bo->tbo.base;

- shared = drm_gem_object_is_shared_for_memory_stats(obj);

- switch (res->mem_type) {

- stats->vram += size;

- if (amdgpu_res_cpu_visible(adev, res))

- stats->visible_vram += size;

- stats->vram_shared += size;

- stats->gtt += size;

- stats->gtt_shared += size;

- case TTM_PL_SYSTEM:

- stats->cpu += size;

- stats->cpu_shared += size;

- if (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) {

- stats->requested_vram += size;

- if (bo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)

- stats->requested_visible_vram += size;

- if (res->mem_type != TTM_PL_VRAM) {

- stats->evicted_vram += size;

- if (bo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)

- stats->evicted_visible_vram += size;

- } else if (bo->preferred_domains & AMDGPU_GEM_DOMAIN_GTT) {

- stats->requested_gtt += size;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 717e47b46167..375448627f7b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

-struct amdgpu_mem_stats {

- /* current VRAM usage, includes visible VRAM */

- /* current shared VRAM usage, includes visible VRAM */

- uint64_t vram_shared;

- /* current visible VRAM usage */

- uint64_t visible_vram;

- /* current GTT usage */

- /* current shared GTT usage */

- uint64_t gtt_shared;

- /* current system memory usage */

- /* current shared system memory usage */

- uint64_t cpu_shared;

- /* sum of evicted buffers, includes visible VRAM */

- uint64_t evicted_vram;

- /* sum of evicted buffers due to CPU access */

- uint64_t evicted_visible_vram;

- /* how much userspace asked for, includes vis.VRAM */

- uint64_t requested_vram;

- /* how much userspace asked for */

- uint64_t requested_visible_vram;

- /* how much userspace asked for */

- uint64_t requested_gtt;

-void amdgpu_bo_get_memory(struct amdgpu_bo *bo,

- struct amdgpu_mem_stats *stats);

-void amdgpu_sa_bo_free(struct amdgpu_device *adev,

- struct drm_suballoc **sa_bo,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.c
index e8adfd0a570a..34b5e22b44e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.c

- device_remove_file(adev->dev, &dev_attr_mem_info_preempt_used);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 0b28b2cf1517..babe94ade247 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

-static int psp_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int psp_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int psp_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC)

-static int psp_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * This sequence is just used on hw_init only once, no need on

-static int psp_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int psp_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int psp_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- err = amdgpu_ucode_request(adev, &adev->psp.asd_fw, "amdgpu/%s_asd.bin", chip_name);

- err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, "amdgpu/%s_toc.bin", chip_name);

- err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, "amdgpu/%s_sos.bin", chip_name);

- err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, "amdgpu/%s_ta.bin", chip_name);

- err = amdgpu_ucode_request(adev, &adev->psp.cap_fw, "amdgpu/%s_cap.bin", chip_name);

-static int psp_set_clockgating_state(void *handle,

- enum amd_clockgating_state state)

-static int psp_set_powergating_state(void *handle,

- if (!adev->ip_blocks[AMD_IP_BLOCK_TYPE_PSP].status.late_initialized) {

- ret = amdgpu_ucode_request(adev, &usbc_pd_fw, "amdgpu/%s", buf);

- struct bin_attribute *attr,

- .late_init = NULL,

- .check_soft_reset = NULL,

- .wait_for_idle = NULL,

- .soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index e8abbbcb4326..8d5acc415d38 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 1a1395c5fff1..f0924aa3f4e4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

- err_data.err_addr_cnt);

static void amdgpu_rasmgr_error_data_statistic_update(struct ras_manager *obj, struct ras_err_data *err_data)

- if (adev->in_suspend || amdgpu_in_reset(adev))

- if (error_query_mode == AMDGPU_RAS_DIRECT_ERROR_QUERY) {

- amdgpu_rasmgr_error_data_statistic_update(obj, &err_data);

- amdgpu_ras_error_generate_report(adev, info, &err_data, &qctx);

- struct eeprom_table_record *bps, int pages)

- if (amdgpu_ras_check_bad_page_unlock(con,

- bps[i].retired_page << AMDGPU_GPU_PAGE_SHIFT))

- if (!data->space_left &&

- amdgpu_ras_realloc_eh_data_space(adev, data, 256)) {

- amdgpu_ras_reserve_page(adev, bps[i].retired_page);

- memcpy(&data->bps[data->count], &bps[i], sizeof(*data->bps));

- data->space_left--;

- save_count = data->count - control->ras_num_recs;

- *new_cnt = save_count / adev->umc.retire_unit;

- if (amdgpu_ras_eeprom_append(control,

- &data->bps[control->ras_num_recs],

- dev_err(adev->dev, "Failed to save EEPROM table data!");

- ret = amdgpu_ras_add_bad_pages(adev, bps, control->ras_num_recs);

-int amdgpu_ras_recovery_init(struct amdgpu_device *adev)

- /* Todo: During test the SMU might fail to read the eeprom through I2C

- * when the GPU is pending on XGMI reset during probe time

- * (Mostly after second bus reset), skip it now

- if (adev->gmc.xgmi.pending_reset)

- ret = amdgpu_ras_eeprom_init(&con->eeprom_control);

- * This calling fails when is_rma is true or

- if (amdgpu_ras_is_rma(adev) || ret)

- if (con->eeprom_control.ras_num_recs) {

- ret = amdgpu_ras_load_bad_pages(adev);

- amdgpu_dpm_send_hbm_bad_pages_num(adev, con->eeprom_control.ras_num_recs);

- if (con->update_channel_flag == true) {

- amdgpu_dpm_send_hbm_bad_channel_flag(adev, con->eeprom_control.bad_channel_bitmap);

- con->update_channel_flag = false;

- if (!amdgpu_in_reset(adev)) {

- if (adev->in_suspend || amdgpu_in_reset(adev)) {

- if (adev->in_suspend || amdgpu_in_reset(adev))

- if (amdgpu_in_reset(adev)) {

- if (amdgpu_sriov_vf(adev))

- return atomic_read(&ras->fed);

- atomic_set(&ras->fed, !!status);

- if (atomic_cmpxchg(&ras->in_recovery, 0, 1) == 0)

- if ((smu_funcs && smu_funcs->set_debug_mode) || (mca_funcs && mca_funcs->mca_set_debug_mode))

+ } else if ((smu_funcs && smu_funcs->set_debug_mode) || (mca_funcs && mca_funcs->mca_set_debug_mode)) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index 669720a9c60a..82db986c36a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

- AMDGPU_RAS_BLOCK__LAST

- /* Fatal error detected flag */

-int amdgpu_ras_recovery_init(struct amdgpu_device *adev);

- struct eeprom_table_record *bps, int pages);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index f28f6b4ba765..52c16bfeccaa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

- amdgpu_dpm_send_hbm_bad_pages_num(adev, control->ras_num_recs);

- con->eeprom_control.ras_num_recs, con->bad_page_cnt_threshold);

- control->ras_num_recs >= ras->bad_page_cnt_threshold) {

- control->ras_num_recs, ras->bad_page_cnt_threshold);

- control->ras_num_recs < ras->bad_page_cnt_threshold)

- control->ras_num_recs) * 100) /

- control->ras_num_recs);

- if (10 * control->ras_num_recs >= 9 * ras->bad_page_cnt_threshold)

- control->ras_num_recs,

- DRM_ERROR("RAS Table incorrect checksum or error:%d\n",

- if (ras->bad_page_cnt_threshold > control->ras_num_recs) {

- control->ras_num_recs,

- control->ras_num_recs, ras->bad_page_cnt_threshold);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
index b9ebda577797..81d55cb7b397 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
index 66c1a868c0e1..dabfbdf6f1ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
index 1cb920abc2fe..4d9b9701139b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 690976665cf6..a6e28fe3f8d6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

- for (i = 0; i < count; i++)

- amdgpu_ring_write(ring, ring->funcs->nop);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index f93f51002201..dee5a1b4e572 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

- volatile uint32_t *ring;

- volatile u32 *set_q_mode_ptr;

- if (ring->count_dw <= 0)

- DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");

- if (unlikely(ring->count_dw < count_dw))

- DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");

- dst = (void *)&ring->ring[occupied];

- memcpy(dst, src, chunk1);

- dst = (void *)ring->ring;

- memcpy(dst, src, chunk2);

-void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib,

- struct dma_fence *f);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 10df731998b2..39070b2a4c04 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c

-void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct drm_suballoc **sa_bo,

- struct dma_fence *fence)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
index b0a8abc7a8ec..341beec59537 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c

- struct fd f = fdget(fd);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 183a976ba29d..174badca27e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
index 087ce0f6fa07..5f60736051d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 74adb983ab03..01ae2f88dec8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

-MODULE_IMPORT_NS(DMA_BUF);

- uint32_t num_type, data_format, max_com;

- AMDGPU_COPY_FLAGS_SET(DATA_FORMAT, data_format));

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 138d80017f35..208b7d1d8a27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

-#include "amdgpu.h"

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 4c7b53648a50..cf700824b960 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

- const char *fmt, ...)

@@ -1456,16 +1457,24 @@ int amdgpu_ucode_request(struct amdgpu_device *adev, const struct firmware **fw,

- r = request_firmware(fw, fname, adev->dev);

- release_firmware(*fw);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index 4e23419b92d4..4eedd92f000b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h

- const char *fmt, ...);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
index bb7b9b2eaac1..eafe20d8fe0b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c

- err_data.err_addr_cnt);

- err_data->err_addr_cnt);

- amdgpu_dpm_send_hbm_bad_pages_num(adev, con->eeprom_control.ras_num_recs);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
index ce4179db2a6d..a4a7e61817aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
index 6162582d0aa2..dde15c6a96e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c

- r = amdgpu_ucode_request(adev, &adev->umsch_mm.fw, "%s", fw_name);

-static int umsch_mm_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int umsch_mm_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int umsch_mm_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int umsch_mm_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int umsch_mm_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int umsch_mm_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int umsch_mm_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return umsch_mm_hw_fini(adev);

-static int umsch_mm_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return umsch_mm_hw_init(adev);

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 31fd30dcd593..74758b5ffc6c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

- r = amdgpu_ucode_request(adev, &adev->uvd.fw, "%s", fw_name);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 74fdbf71d95b..b9060bcd4806 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c

- r = amdgpu_ucode_request(adev, &adev->vce.fw, "%s", fw_name);

- amdgpu_bo_free_kernel(&adev->vce.vcpu_bo, &adev->vce.gpu_addr,

- (void **)&adev->vce.cpu_addr);

- amdgpu_ib_free(ring->adev, &ib_msg, f);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 43f44cc201cb..83faf6e6788a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

- r = amdgpu_ucode_request(adev, &adev->vcn.fw[i], "amdgpu/%s_%d.bin", ucode_prefix, i);

- r = amdgpu_ucode_request(adev, &adev->vcn.fw[i], "amdgpu/%s.bin", ucode_prefix);

- amdgpu_ucode_release(&adev->vcn.fw[i]);

- hdr = (const struct common_firmware_header *)adev->vcn.fw[0]->data;

- amdgpu_ucode_release(&adev->vcn.fw[j]);

bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev, enum vcn_ring_type type, uint32_t vcn_instance)

- int vcn_config = adev->vcn.vcn_config[vcn_instance];

-int amdgpu_vcn_suspend(struct amdgpu_device *adev)

- bool in_ras_intr = amdgpu_ras_intr_triggered();

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- /* err_event_athub will corrupt VCPU buffer, so we need to

- * restore fw data and clear buffer in amdgpu_vcn_resume() */

- hdr = (const struct common_firmware_header *)adev->vcn.fw[i]->data;

- adev->vcn.fw[i]->data + offset,

- amdgpu_ib_free(adev, ib_msg, f);

- amdgpu_ib_free(adev, &ib, fence);

- if (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(4, 0, 3)) {

- hdr = (const struct common_firmware_header *)adev->vcn.fw[i]->data;

- adev->firmware.ucode[idx].fw = adev->vcn.fw[i];

- IP_VERSION(4, 0, 3))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index 2a1f3dbb14d3..adaf4388ad28 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

- bool video_range, aon_range; \

- const struct firmware *fw[AMDGPU_MAX_VCN_INSTANCES]; /* VCN firmware */

- uint8_t vcn_config[AMDGPU_MAX_VCN_INSTANCES];

- uint32_t vcn_codec_disable_mask[AMDGPU_MAX_VCN_INSTANCES];

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index b6397d3229e1..0af469ec6fcc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index b650a2032c42..5381b8d596e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
index d4c2afafbb73..03308261f894 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c

-static int amdgpu_vkms_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int amdgpu_vkms_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int amdgpu_vkms_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int amdgpu_vkms_hw_fini(void *handle)

-static int amdgpu_vkms_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return amdgpu_vkms_hw_fini(handle);

-static int amdgpu_vkms_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vkms_hw_init(handle);

- return drm_mode_config_helper_resume(adev_to_drm(adev));

-static int amdgpu_vkms_wait_for_idle(void *handle)

-static int amdgpu_vkms_soft_reset(void *handle)

-static int amdgpu_vkms_set_clockgating_state(void *handle,

-static int amdgpu_vkms_set_powergating_state(void *handle,

- .early_init = NULL,

- .late_init = NULL,

- .wait_for_idle = amdgpu_vkms_wait_for_idle,

- .soft_reset = amdgpu_vkms_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6005280f5f38..5c07777d3239 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

- if (adev->gfx.enable_cleaner_shader &&

- ring->funcs->emit_cleaner_shader &&

- job->enforce_isolation)

- ring->funcs->emit_cleaner_shader(ring);

- if (!vm_flush_needed && !gds_switch_needed && !need_pipe_sync)

-static void amdgpu_vm_bo_get_memory(struct amdgpu_bo_va *bo_va,

- struct amdgpu_mem_stats *stats)

- struct amdgpu_vm *vm = bo_va->base.vm;

- struct amdgpu_bo *bo = bo_va->base.bo;

- * For now ignore BOs which are currently locked and potentially

- * changing their location.

- if (!amdgpu_vm_is_bo_always_valid(vm, bo) &&

- !dma_resv_trylock(bo->tbo.base.resv))

- amdgpu_bo_get_memory(bo, stats);

- if (!amdgpu_vm_is_bo_always_valid(vm, bo))

- dma_resv_unlock(bo->tbo.base.resv);

- struct amdgpu_mem_stats *stats)

- struct amdgpu_bo_va *bo_va, *tmp;

- list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status)

- amdgpu_vm_bo_get_memory(bo_va, stats);

- list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status)

- amdgpu_vm_bo_get_memory(bo_va, stats);

- list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status)

- amdgpu_vm_bo_get_memory(bo_va, stats);

- list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status)

- amdgpu_vm_bo_get_memory(bo_va, stats);

- list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status)

- amdgpu_vm_bo_get_memory(bo_va, stats);

- list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status)

- amdgpu_vm_bo_get_memory(bo_va, stats);

- if (clear || !bo) {

- uint32_t mem_type = bo->tbo.resource->mem_type;

- if (!(bo->preferred_domains &

- amdgpu_mem_type_to_domain(mem_type)))

- * @adev: amdgpu_device pointer

-void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,

- struct amdgpu_bo *bo, bool evicted)

- amdgpu_vm_put_task_info(vm->task_info);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 52dd7cdfdc81..a3e128e373bc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

-struct amdgpu_mem_stats;

- /* protected by spinlock */

-void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,

- struct amdgpu_bo *bo, bool evicted);

- struct amdgpu_mem_stats *stats);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c
index f78a0434a48f..b0bf21682115 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
index 5acd20ff5979..121ee17b522b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

- ret = amdgpu_ucode_request(adev, &adev->vpe.fw, "amdgpu/%s.bin", fw_prefix);

-static int vpe_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vpe_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vpe_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vpe_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vpe_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vpe_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vpe_hw_fini(adev);

-static int vpe_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vpe_hw_init(adev);

-static int vpe_set_clockgating_state(void *handle,

-static int vpe_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ib_free(adev, &ib, NULL);

- .late_init = NULL,

- .soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h
index 231d86d0953e..695da740a97e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 7d26a962f811..ff5e52025266 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

- mutex_unlock(&mgr->lock);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
index a6d456ec6aeb..23b6f7a4aa4a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c

- if (sched->ready) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h
index 32775260556f..b63f53242c57 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 7de449fae1e3..74b4349e345a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

- if (!adev->gmc.xgmi.pending_reset &&

- amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {

- if (!adev->gmc.xgmi.pending_reset &&

- amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {

- if (!ret && !adev->gmc.xgmi.pending_reset)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
index a3bfc16de6d4..d1282b4c6348 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
index 6e9eeaeb3de1..b4f9c2f4e92c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h

- * 0 64KB 65KB 66KB

- * | 64KB | 1KB | 1KB |

+#define AMD_SRIOV_MSG_RAS_TELEMETRY_OFFSET_KB (AMD_SRIOV_MSG_BAD_PAGE_OFFSET_KB + AMD_SRIOV_MSG_BAD_PAGE_SIZE_KB)

- uint32_t error_log_collect : 1;

- uint32_t host_load_ucodes : 1;

- uint32_t host_flr_vramlost : 1;

- uint32_t mm_bw_management : 1;

- uint32_t pp_one_vf_mode : 1;

- uint32_t reg_indirect_acc : 1;

- uint32_t av1_support : 1;

- uint32_t vcn_rb_decouple : 1;

- uint32_t mes_info_enable : 1;

- uint32_t reserved : 23;

- uint32_t vf_reg_access_ih : 1;

- uint32_t vf_reg_access_mmhub : 1;

- uint32_t vf_reg_access_gc : 1;

- uint32_t reserved : 29;

-#define AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE (49)

/* Portion of GPU memory occupied by VF. MAX value is 65535, but set to uint32_t to maintain alignment with reserved size */

diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
index 5e8833e4fed2..e157d6d857b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c
+++ b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

- return adev->gmc.num_mem_partitions != 8 && (num_xcc % 4) == 0;

- .update_partition_sched_list = &aqua_vanjaram_update_partition_sched_list

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index cf1d5d462b67..08d6787893b3 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c

-static int cik_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_common_sw_init(void *handle)

-static int cik_common_sw_fini(void *handle)

-static int cik_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_common_hw_fini(void *handle)

-static int cik_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cik_common_hw_fini(adev);

-static int cik_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cik_common_hw_init(adev);

-static int cik_common_wait_for_idle(void *handle)

-static int cik_common_soft_reset(void *handle)

-static int cik_common_set_clockgating_state(void *handle,

-static int cik_common_set_powergating_state(void *handle,

- .late_init = NULL,

- .sw_init = cik_common_sw_init,

- .sw_fini = cik_common_sw_fini,

- .suspend = cik_common_suspend,

- .wait_for_idle = cik_common_wait_for_idle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/cik_ih.c b/drivers/gpu/drm/amd/amdgpu/cik_ih.c
index 576baa9dbb0e..444563486769 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_ih.c

-static int cik_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cik_ih_irq_disable(adev);

-static int cik_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cik_ih_hw_fini(adev);

-static int cik_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cik_ih_hw_init(adev);

-static int cik_ih_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_ih_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_ih_set_clockgating_state(void *handle,

-static int cik_ih_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index 952737de9411..d9bd8f3f17e2 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c

-static int cik_sdma_soft_reset(void *handle);

- amdgpu_ib_free(adev, &ib, NULL);

-static int cik_sdma_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cik_sdma_hw_fini(adev);

-static int cik_sdma_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cik_sdma_soft_reset(handle);

- return cik_sdma_hw_init(adev);

-static int cik_sdma_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cik_sdma_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c
index 072643787384..82586b76aeda 100644
--- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c

-static int cz_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cz_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cz_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cz_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cz_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cz_ih_irq_disable(adev);

-static int cz_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cz_ih_hw_fini(adev);

-static int cz_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return cz_ih_hw_init(adev);

-static int cz_ih_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cz_ih_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int cz_ih_set_clockgating_state(void *handle,

-static int cz_ih_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 70c1399f738d..c5e3d2251b18 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

-static int dce_v10_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return dce_v10_0_hw_fini(handle);

-static int dce_v10_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ret = dce_v10_0_hw_init(handle);

-static int dce_v10_0_wait_for_idle(void *handle)

-static bool dce_v10_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v10_0_set_clockgating_state(void *handle,

-static int dce_v10_0_set_powergating_state(void *handle,

- .late_init = NULL,

- .wait_for_idle = dce_v10_0_wait_for_idle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index f154c24499c8..ea42a4472bf6 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

-static int dce_v11_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v11_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v11_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v11_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v11_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v11_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return dce_v11_0_hw_fini(handle);

-static int dce_v11_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ret = dce_v11_0_hw_init(handle);

-static int dce_v11_0_wait_for_idle(void *handle)

-static int dce_v11_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v11_0_set_clockgating_state(void *handle,

-static int dce_v11_0_set_powergating_state(void *handle,

- .late_init = NULL,

- .wait_for_idle = dce_v11_0_wait_for_idle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index a7fcb135827f..915804a6a1d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

-static int dce_v6_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v6_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v6_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v6_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v6_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v6_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return dce_v6_0_hw_fini(handle);

-static int dce_v6_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ret = dce_v6_0_hw_init(handle);

-static int dce_v6_0_wait_for_idle(void *handle)

-static int dce_v6_0_soft_reset(void *handle)

-static int dce_v6_0_set_clockgating_state(void *handle,

-static int dce_v6_0_set_powergating_state(void *handle,

- .late_init = NULL,

- .wait_for_idle = dce_v6_0_wait_for_idle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 77ac3f114d24..f2edc0fece5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

-static int dce_v8_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v8_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v8_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v8_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v8_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v8_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return dce_v8_0_hw_fini(handle);

-static int dce_v8_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ret = dce_v8_0_hw_init(handle);

-static int dce_v8_0_wait_for_idle(void *handle)

-static int dce_v8_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dce_v8_0_set_clockgating_state(void *handle,

-static int dce_v8_0_set_powergating_state(void *handle,

- .late_init = NULL,

- .wait_for_idle = dce_v8_0_wait_for_idle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
index 483a441b46aa..621aeca53880 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c

- device_remove_file(adev->dev, &dev_attr_df_cntr_avail);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 45ed97038df0..5ba263fe5512 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

-static int gfx_v10_0_set_powergating_state(void *handle,

- amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */

- amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */

- amdgpu_ib_free(adev, &ib, NULL);

-static int gfx_v10_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (adev->job_hang && !enable)

- /* set the wb address wether it's enabled or not */

- /* Set the wb address wether it's enabled or not */

- WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp);

- WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);

-static int gfx_v10_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gfx_v10_0_set_powergating_state(handle, AMD_PG_STATE_UNGATE);

-static int gfx_v10_0_suspend(void *handle)

- return gfx_v10_0_hw_fini(handle);

-static int gfx_v10_0_resume(void *handle)

- return gfx_v10_0_hw_init(handle);

-static int gfx_v10_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v10_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- for (i = 1; i < num_nop; i++)

- amdgpu_ring_write(ring, ring->funcs->nop);

-static void gfx_v10_ip_print(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void gfx_v10_ip_dump(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- 8, /* gfx_v10_0_emit_mem_sync */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0_cleaner_shader.h b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0_cleaner_shader.h
new file mode 100644
index 000000000000..663c2572d440
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0_cleaner_shader.h

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_3_0_cleaner_shader.asm b/drivers/gpu/drm/amd/amdgpu/gfx_v10_3_0_cleaner_shader.asm
new file mode 100644
index 000000000000..0e1c246166c0
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_3_0_cleaner_shader.asm

+// This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords cleaner shader.

+ s_and_b32 s2, s2, s0 // sgpr0 has tg_size (first_wave) term as in ucode only COMPUTE_PGM_RSRC2.tg_size_en is set

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index d3e8be82a172..56c06b72a70a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

- amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */

- amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */

- for (i = 1; i < num_nop; i++)

- amdgpu_ring_write(ring, ring->funcs->nop);

- amdgpu_ib_free(adev, &ib, NULL);

-static int gfx_v11_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- active_rb_bitmap |= (0x3 << (i * rb_bitmap_width_per_sa));

- /* Initialize all compute VMIDs to have no GDS, GWS, or OA

- acccess. These should be enabled by FW for target VMIDs. */

- /* set the wb address wether it's enabled or not */

- /* Set the wb address wether it's enabled or not */

- WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

-static int gfx_v11_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_suspend(void *handle)

- return gfx_v11_0_hw_fini(handle);

-static int gfx_v11_0_resume(void *handle)

- return gfx_v11_0_hw_init(handle);

-static int gfx_v11_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static bool gfx_v11_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_post_soft_reset(void *handle)

- return amdgpu_mes_resume((struct amdgpu_device *)handle);

-static int gfx_v11_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v11_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

- mutex_lock(&adev->srbm_mutex);

- soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

- WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

- WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

- /* make sure dequeue is complete*/

- for (i = 0; i < adev->usec_timeout; i++) {

- if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

- if (i >= adev->usec_timeout)

- soc21_grbm_select(adev, 0, 0, 0, 0);

- mutex_unlock(&adev->srbm_mutex);

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

- dev_err(adev->dev, "fail to wait on hqd deactivate\n");

-static void gfx_v11_ip_print(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void gfx_v11_ip_dump(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- 8, /* gfx_v11_0_emit_mem_sync */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3_cleaner_shader.asm b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3_cleaner_shader.asm
new file mode 100644
index 000000000000..9b90b66368c7
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3_cleaner_shader.asm

+// This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords cleaner shader.

+ s_and_b32 s2, s2, s0 // sgpr0 has tg_size (first_wave) term as in ucode only COMPUTE_PGM_RSRC2.tg_size_en is set

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0_cleaner_shader.h b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0_cleaner_shader.h
new file mode 100644
index 000000000000..3218cc04f543
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0_cleaner_shader.h

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 47b47d21f464..2523221a2519 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int gfx_v12_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v12_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- active_rb_bitmap |= (0x3 << (i * rb_bitmap_width_per_sa));

- active_rb_bitmap |= global_active_rb_bitmap;

- /* set the wb address wether it's enabled or not */

- WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

-static int gfx_v12_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v12_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v12_0_suspend(void *handle)

- return gfx_v12_0_hw_fini(handle);

-static int gfx_v12_0_resume(void *handle)

- return gfx_v12_0_hw_init(handle);

-static int gfx_v12_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v12_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v12_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v12_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- data = RREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL);

- data &= ~SDMA0_RLC_CGCG_CTRL__CGCG_INT_ENABLE_MASK;

- WREG32_SOC15(GC, 0, regSDMA0_RLC_CGCG_CTRL, data);

- /* Some ASICs only have one SDMA instance, not need to configure SDMA1 */

- if (adev->sdma.num_instances > 1) {

- data = RREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL);

- data &= ~SDMA1_RLC_CGCG_CTRL__CGCG_INT_ENABLE_MASK;

- WREG32_SOC15(GC, 0, regSDMA1_RLC_CGCG_CTRL, data);

-static int gfx_v12_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- switch (adev->ip_versions[GC_HWIP][0]) {

- for (i = 1; i < num_nop; i++)

- amdgpu_ring_write(ring, ring->funcs->nop);

-static void gfx_v12_ip_print(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void gfx_v12_ip_dump(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

- mutex_lock(&adev->srbm_mutex);

- soc24_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);

- WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);

- WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);

- for (i = 0; i < adev->usec_timeout; i++) {

- if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))

- soc24_grbm_select(adev, 0, 0, 0, 0);

- mutex_unlock(&adev->srbm_mutex);

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

- 8, /* gfx_v12_0_emit_mem_sync */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.h b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.h
index bcc9c72ccbde..f7184b2dc4e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.h

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 564f0b9336b6..f26e2cdec07a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int gfx_v6_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v6_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v6_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v6_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v6_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v6_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return gfx_v6_0_hw_fini(adev);

-static int gfx_v6_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return gfx_v6_0_hw_init(adev);

-static int gfx_v6_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gfx_v6_0_is_idle(handle))

-static int gfx_v6_0_soft_reset(void *handle)

-static int gfx_v6_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v6_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .soft_reset = gfx_v6_0_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index f146806c4633..84745b2453ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

- amdgpu_ib_free(adev, &ib, NULL);

- /* set the wb address wether it's enabled or not */

-static int gfx_v7_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return gfx_v7_0_hw_fini(adev);

-static int gfx_v7_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return gfx_v7_0_hw_init(adev);

-static int gfx_v7_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v7_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index bc8295812cc8..6a025438f9d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int gfx_v8_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- /* set the wb address wether it's enabled or not */

- WREG32(mmRLC_CP_SCHEDULERS, tmp);

-static int gfx_v8_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gfx_v8_0_is_idle(handle))

-static int gfx_v8_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!gfx_v8_0_wait_for_idle(adev))

-static int gfx_v8_0_suspend(void *handle)

- return gfx_v8_0_hw_fini(handle);

-static int gfx_v8_0_resume(void *handle)

- return gfx_v8_0_hw_init(handle);

-static bool gfx_v8_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v8_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, enable);

-static int gfx_v8_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

@@ -5805,12 +5821,12 @@ static void gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

-static int gfx_v8_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 23f0573ae47b..fa572b40989e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

- amdgpu_ib_free(adev, &ib, NULL);

- "amdgpu/%s_sjt_mec.bin", chip_name);

-static int gfx_v9_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_gfx_sysfs_isolation_shader_init(adev);

-static int gfx_v9_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_gfx_sysfs_isolation_shader_fini(adev);

- adev->in_s3 && !adev->suspend_complete) {

- DRM_INFO(" Will skip the CSB packet resubmit\n");

- /* set the wb address wether it's enabled or not */

WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK);

- (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK));

- WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp);

-static int gfx_v9_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_0_suspend(void *handle)

- return gfx_v9_0_hw_fini(handle);

-static int gfx_v9_0_resume(void *handle)

- return gfx_v9_0_hw_init(handle);

-static int gfx_v9_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gfx_v9_0_is_idle(handle))

-static int gfx_v9_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ib_free(adev, &ib, NULL);

-static int gfx_v9_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_0_ecc_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gfx_v9_0_ecc_late_init(handle);

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

- amdgpu_gfx_rlc_enter_safe_mode(adev, 0);

@@ -5088,13 +5127,12 @@ static void gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev

- amdgpu_gfx_rlc_exit_safe_mode(adev, 0);

-static int gfx_v9_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- for (i = 1; i < num_nop; i++)

- amdgpu_ring_write(ring, ring->funcs->nop);

- if (!adev->debug_exp_resets &&

- !adev->gfx.num_gfx_rings)

-static void gfx_v9_ip_print(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void gfx_v9_ip_dump(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h
index 36c0292b5110..0b6bd09b7529 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0_cleaner_shader.h

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
index 3f4fd2f08163..d81449f9d822 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

- amdgpu_ib_free(adev, ib, NULL);

- amdgpu_ib_free(adev, &disp_ibs[2], NULL);

- amdgpu_ib_free(adev, &disp_ibs[1], NULL);

- amdgpu_ib_free(adev, &disp_ibs[0], NULL);

- amdgpu_ib_free(adev, &wb_ib, NULL);

- amdgpu_ib_free(adev, &disp_ib, NULL);

- amdgpu_ib_free(adev, &wb_ib, NULL);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2_cleaner_shader.asm b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2_cleaner_shader.asm
new file mode 100644
index 000000000000..35b8cf9070bd
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2_cleaner_shader.asm

+// This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords cleaner shader.

+// Instead, the shader starts with an S_SETHALT 1. Once all waves are launched CP will send unhalt command

+ s_cmp_eq_u32 s0, 1 // Bit0 is set, sgpr0 is set then clear VGPRS and LDS as FW set COMPUTE_USER_DATA_3

+ s_and_b32 s2, s2, s1 // sgpr0 has tg_size (first_wave) term as in ucode only COMPUTE_PGM_RSRC2.tg_size_en is set

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index c100845409f7..2ba185875baa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

-#define mmSMNAID_XCD0_MCA_SMU 0x36430400 /* SMN AID XCD0 */

-#define mmSMNAID_XCD1_MCA_SMU 0x38430400 /* SMN AID XCD1 */

-#define mmSMNXCD_XCD0_MCA_SMU 0x40430400 /* SMN XCD XCD0 */

- /* Golden settings applied by driver for ASIC with rev_id 0 */

- if (adev->rev_id == 0) {

- WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1,

- REDUCE_FIFO_DEPTH_BY_2, 2);

- WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2,

- amdgpu_ib_free(adev, &ib, NULL);

- err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,

- "amdgpu/%s_mec.bin", chip_name);

-static int gfx_v9_4_3_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!amdgpu_sriov_vf(adev)) {

- r = amdgpu_gfx_sysfs_init(adev);

- gfx_v9_4_3_alloc_ip_dump(adev);

- r = amdgpu_gfx_sysfs_isolation_shader_init(adev);

-static int gfx_v9_4_3_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!amdgpu_sriov_vf(adev))

- amdgpu_gfx_sysfs_fini(adev);

- amdgpu_gfx_sysfs_isolation_shader_fini(adev);

- /* Initialize all compute VMIDs to have no GDS, GWS, or OA

- acccess. These should be enabled by FW for target VMIDs. */

- WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regRLC_CP_SCHEDULERS, tmp);

-static int gfx_v9_4_3_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_4_3_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_4_3_suspend(void *handle)

- return gfx_v9_4_3_hw_fini(handle);

-static int gfx_v9_4_3_resume(void *handle)

- return gfx_v9_4_3_hw_init(handle);

-static int gfx_v9_4_3_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gfx_v9_4_3_is_idle(handle))

-static int gfx_v9_4_3_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_4_3_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_4_3_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gfx_v9_4_3_set_powergating_state(void *handle,

-static int gfx_v9_4_3_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!adev->debug_exp_resets)

@@ -4579,13 +4592,12 @@ static void gfx_v9_4_3_ring_insert_nop(struct amdgpu_ring *ring, uint32_t num_no

- for (i = 1; i < num_nop; i++)

- amdgpu_ring_write(ring, ring->funcs->nop);

-static void gfx_v9_4_3_ip_print(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void gfx_v9_4_3_ip_dump(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_gfx_off_ctrl(adev, false);

- amdgpu_gfx_off_ctrl(adev, true);

- amdgpu_gfx_off_ctrl(adev, false);

- amdgpu_gfx_off_ctrl(adev, true);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index ed8e130c7d19..5470cef7e9bd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c

- IP_VERSION(9, 4, 4));

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 9784a2892185..9bedca9a79c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

- if (!amdgpu_sriov_vf(adev))

-static int gmc_v10_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gmc_v10_0_hw_fini(adev);

-static int gmc_v10_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v10_0_hw_init(adev);

- amdgpu_vmid_reset_all(adev);

-static int gmc_v10_0_wait_for_idle(void *handle)

-static int gmc_v10_0_soft_reset(void *handle)

-static int gmc_v10_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v10_0_set_powergating_state(void *handle,

- .soft_reset = gmc_v10_0_soft_reset,

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 2797fd84432b..72751ab4c766 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

- if (!amdgpu_sriov_vf(adev))

-static int gmc_v11_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gmc_v11_0_hw_fini(adev);

-static int gmc_v11_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v11_0_hw_init(adev);

- amdgpu_vmid_reset_all(adev);

-static int gmc_v11_0_wait_for_idle(void *handle)

-static int gmc_v11_0_soft_reset(void *handle)

-static int gmc_v11_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v11_0_set_powergating_state(void *handle,

- .soft_reset = gmc_v11_0_soft_reset,

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index edcb5351f8cc..b749f1c3f6a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

- if (!amdgpu_sriov_vf(adev))

-static int gmc_v12_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gmc_v12_0_hw_fini(adev);

-static int gmc_v12_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v12_0_hw_init(adev);

- amdgpu_vmid_reset_all(adev);

-static int gmc_v12_0_wait_for_idle(void *handle)

-static int gmc_v12_0_soft_reset(void *handle)

-static int gmc_v12_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v12_0_set_powergating_state(void *handle,

- .soft_reset = gmc_v12_0_soft_reset,

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index d36725666b54..2245dda92021 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

-static int gmc_v6_0_wait_for_idle(void *handle);

- gmc_v6_0_wait_for_idle((void *)adev);

- err = amdgpu_ucode_request(adev, &adev->gmc.fw, "amdgpu/%s_mc.bin", chip_name);

- if (gmc_v6_0_wait_for_idle((void *)adev))

-static int gmc_v6_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v6_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v6_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v6_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v6_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v6_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v6_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gmc_v6_0_hw_fini(adev);

-static int gmc_v6_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v6_0_hw_init(adev);

-static int gmc_v6_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gmc_v6_0_is_idle(handle))

-static int gmc_v6_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gmc_v6_0_wait_for_idle(adev))

-static int gmc_v6_0_set_clockgating_state(void *handle,

-static int gmc_v6_0_set_powergating_state(void *handle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 994432fb57ea..9aac4b1101e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

-static int gmc_v7_0_wait_for_idle(void *handle);

- gmc_v7_0_wait_for_idle((void *)adev);

- err = amdgpu_ucode_request(adev, &adev->gmc.fw, "amdgpu/%s_mc.bin", chip_name);

- if (gmc_v7_0_wait_for_idle((void *)adev))

-static int gmc_v7_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gmc_v7_0_hw_fini(adev);

-static int gmc_v7_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v7_0_hw_init(adev);

- amdgpu_vmid_reset_all(adev);

-static int gmc_v7_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gmc_v7_0_wait_for_idle((void *)adev))

-static int gmc_v7_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v7_0_set_powergating_state(void *handle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 86488c052f82..d06585207c33 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

-static int gmc_v8_0_wait_for_idle(void *handle);

- gmc_v8_0_wait_for_idle(adev);

- err = amdgpu_ucode_request(adev, &adev->gmc.fw, "amdgpu/%s_mc.bin", chip_name);

- if (gmc_v8_0_wait_for_idle((void *)adev))

-static int gmc_v8_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- gmc_v8_0_hw_fini(adev);

-static int gmc_v8_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v8_0_hw_init(adev);

- amdgpu_vmid_reset_all(adev);

-static int gmc_v8_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static bool gmc_v8_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (gmc_v8_0_wait_for_idle(adev))

-static int gmc_v8_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v8_0_set_powergating_state(void *handle,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c76ac0dfe572..291549765c38 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4))

- bool is_vram = bo->tbo.resource->mem_type == TTM_PL_VRAM;

- bool coherent = bo->flags & (AMDGPU_GEM_CREATE_COHERENT | AMDGPU_GEM_CREATE_EXT_COHERENT);

- switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {

- if ((amdgpu_ip_version(adev, GC_HWIP, 0) ==

- IP_VERSION(9, 4, 2) ||

- amdgpu_ip_version(adev, GC_HWIP, 0) ==

- IP_VERSION(9, 4, 3)) &&

- if (bo && bo->tbo.resource)

- gmc_v9_0_get_coherence_flags(adev, mapping->bo_va->base.bo,

- amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 4))

- return AMDGPU_NPS1_PARTITION_MODE;

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4))

-static int gmc_v9_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4))

-static int gmc_v9_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- adev->gmc.num_mem_partitions);

-static int gmc_v9_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)) {

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)) ?

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4))

-static int gmc_v9_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4))

-static int gmc_v9_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v9_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

- if (adev->gmc.ecc_irq.funcs &&

- amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC))

- amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);

-static int gmc_v9_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return gmc_v9_0_hw_fini(adev);

-static int gmc_v9_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = gmc_v9_0_hw_init(adev);

- amdgpu_vmid_reset_all(adev);

-static int gmc_v9_0_wait_for_idle(void *handle)

-static int gmc_v9_0_soft_reset(void *handle)

-static int gmc_v9_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int gmc_v9_0_set_powergating_state(void *handle,

diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
index e019249883fb..194026e9be33 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

- if (!ring || !ring->funcs->emit_wreg)

amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);

- if (!ring || !ring->funcs->emit_wreg)

diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c
index ed7facacf2fe..d3962d469088 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c

- if (!ring || !ring->funcs->emit_wreg)

amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);

diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c b/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c
index 29c3484ae1f1..f52552c5fa27 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c

- if (!ring || !ring->funcs->emit_wreg)

diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c
index 33736d361dd0..6948fe9956ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c

- if (!ring || !ring->funcs->emit_wreg)

amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);

diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
index 1c99bb09e2a1..63820329f67e 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c

- if (!ring || !ring->funcs->emit_wreg)

amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);

diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c
index 07984f7c3ae7..8ac3d3282268 100644
--- a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c

-static int iceland_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int iceland_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int iceland_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int iceland_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int iceland_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- iceland_ih_irq_disable(adev);

-static int iceland_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return iceland_ih_hw_fini(adev);

-static int iceland_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return iceland_ih_hw_init(adev);

-static int iceland_ih_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int iceland_ih_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int iceland_ih_set_clockgating_state(void *handle,

-static int iceland_ih_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
index 18a761d6ef33..f8a485164437 100644
--- a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

-static int ih_v6_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ih_v6_0_irq_disable(adev);

-static int ih_v6_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return ih_v6_0_hw_fini(adev);

-static int ih_v6_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return ih_v6_0_hw_init(adev);

-static int ih_v6_0_wait_for_idle(void *handle)

-static int ih_v6_0_soft_reset(void *handle)

-static int ih_v6_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c
index 2e0469feca1e..dd0042efceec 100644
--- a/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

-static int ih_v6_1_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_1_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_1_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_1_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_1_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ih_v6_1_irq_disable(adev);

-static int ih_v6_1_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return ih_v6_1_hw_fini(adev);

-static int ih_v6_1_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return ih_v6_1_hw_init(adev);

-static int ih_v6_1_wait_for_idle(void *handle)

-static int ih_v6_1_soft_reset(void *handle)

-static int ih_v6_1_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v6_1_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
index 6852081fcff2..8f9b15c171f3 100644
--- a/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

-static int ih_v7_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v7_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v7_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v7_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v7_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ih_v7_0_irq_disable(adev);

-static int ih_v7_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return ih_v7_0_hw_fini(adev);

-static int ih_v7_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return ih_v7_0_hw_init(adev);

-static int ih_v7_0_wait_for_idle(void *handle)

-static int ih_v7_0_soft_reset(void *handle)

-static int ih_v7_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int ih_v7_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c b/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
index d4f72e47ae9e..aeca5c08ea2f 100644
--- a/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

- err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, "amdgpu/%s_imu.bin", ucode_prefix);

diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
index 1341f0292031..df898dbb746e 100644
--- a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

- err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, "amdgpu/%s_imu.bin", ucode_prefix);

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
index 6e0e88076224..03b8b7cd5229 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c

- * @handle: amdgpu_device pointer

-int jpeg_v1_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-int jpeg_v1_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-void jpeg_v1_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h
index 9654d22e0376..097328635083 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.h

-int jpeg_v1_0_early_init(void *handle);

-int jpeg_v1_0_sw_init(void *handle);

-void jpeg_v1_0_sw_fini(void *handle);

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index 41c0f8750dc1..7c9251c03815 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

-static int jpeg_v2_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- jpeg_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v2_0_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v2_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v2_0_hw_init(adev);

-static int jpeg_v2_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v2_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v2_0_is_idle(handle))

-static int jpeg_v2_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
index eedb9a829d95..11f6af2646e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

-static int jpeg_v2_5_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- jpeg_v2_5_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v2_5_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v2_5_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v2_5_hw_init(adev);

-static int jpeg_v2_5_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v2_5_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v2_5_is_idle(handle))

-static int jpeg_v2_5_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index b1e7fd25afbc..4eca65ea9053 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

-static int jpeg_v3_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- jpeg_v3_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v3_0_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v3_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v3_0_hw_init(adev);

-static int jpeg_v3_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v3_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v3_0_is_idle(handle))

-static int jpeg_v3_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
index 6c5c1a68a9b7..0aef1f64afd0 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

-static int jpeg_v4_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- jpeg_v4_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v4_0_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v4_0_hw_init(adev);

-static int jpeg_v4_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v4_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v4_0_is_idle(handle))

-static int jpeg_v4_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
index 86958cb2c2ab..88f9771c1686 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c

-static int jpeg_v4_0_3_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- adev->jpeg.num_jpeg_rings = AMDGPU_MAX_JPEG_RINGS;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- ret = jpeg_v4_0_3_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v4_0_3_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_3_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v4_0_3_hw_init(adev);

- amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

- 0, 0, PACKETJ_TYPE0));

- amdgpu_ring_write(ring, 0x80004000);

- amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

- 0, 0, PACKETJ_TYPE0));

- amdgpu_ring_write(ring, 0x00004000);

- amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

- 0, 0, PACKETJ_TYPE0));

- amdgpu_ring_write(ring, 0x3fbc);

- amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

- 0, 0, PACKETJ_TYPE0));

- amdgpu_ring_write(ring, 0x1);

-static int jpeg_v4_0_3_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v4_0_3_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v4_0_3_is_idle(handle))

-static int jpeg_v4_0_3_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

- 22 + 22 + /* jpeg_v4_0_3_dec_ring_emit_fence x2 vm fence */

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
index 44eeed445ea9..6b3656984957 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

-static int jpeg_v4_0_5_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- jpeg_v4_0_5_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v4_0_5_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v4_0_5_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v4_0_5_hw_init(adev);

-static int jpeg_v4_0_5_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v4_0_5_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v4_0_5_is_idle(handle))

-static int jpeg_v4_0_5_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
index d662aa841f97..d5cf0f2799d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

-#include "ivsrcid/vcn/irqsrcs_vcn_4_0.h"

-static int jpeg_v5_0_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- VCN_4_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq);

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vcn.idle_work);

- jpeg_v5_0_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v5_0_0_hw_fini(adev);

- r = amdgpu_jpeg_suspend(adev);

- * @handle: amdgpu_device pointer

-static int jpeg_v5_0_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_jpeg_resume(adev);

- r = jpeg_v5_0_0_hw_init(adev);

-static int jpeg_v5_0_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int jpeg_v5_0_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!jpeg_v5_0_0_is_idle(handle))

-static int jpeg_v5_0_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- case VCN_4_0__SRCID__JPEG_DECODE:

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c
new file mode 100644
index 000000000000..40d4c32a8c2a
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h
new file mode 100644
index 000000000000..8ce146c00bb6
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.h

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 231a3d490ea8..65f389eb65e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

-static int mes_v11_0_hw_init(void *handle);

-static int mes_v11_0_hw_fini(void *handle);

+ dev_err(mes->adev->dev, "MES FW versoin must be larger than 0x63 to support limit single process feature.\n");

-static int mes_v11_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;

-static int mes_v11_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

- r = mes_v11_0_hw_init(adev);

- mes_v11_0_hw_fini(adev);

-static int mes_v11_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- mes_v11_0_hw_fini(adev);

-static int mes_v11_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int mes_v11_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_mes_suspend(adev);

- return mes_v11_0_hw_fini(adev);

-static int mes_v11_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = mes_v11_0_hw_init(adev);

- return amdgpu_mes_resume(adev);

-static int mes_v11_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int mes_v11_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 8d27421689c9..901e924e69ad 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

-static int mes_v12_0_hw_init(void *handle);

-static int mes_v12_0_hw_fini(void *handle);

- mes_set_hw_res_1_pkt.mes_kiq_unmap_timeout = 100;

- mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr = mes->event_log_gpu_addr;

- data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);

- data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_RESET, 1);

- data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET, 1);

- WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

- /* unhalt MES and activate pipe0 */

- data = REG_SET_FIELD(0, CP_MES_CNTL, MES_PIPE0_ACTIVE, 1);

- data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_ACTIVE, 1);

- WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);

-static int mes_v12_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;

-static int mes_v12_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- WREG32_SOC15(GC, 0, regRLC_CP_SCHEDULERS, tmp);

- r = mes_v12_0_hw_init(adev);

- mes_v12_0_hw_fini(adev);

-static int mes_v12_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- mes_v12_0_hw_fini(adev);

-static int mes_v12_0_hw_fini(void *handle)

-static int mes_v12_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_mes_suspend(adev);

- return mes_v12_0_hw_fini(adev);

-static int mes_v12_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = mes_v12_0_hw_init(adev);

- return amdgpu_mes_resume(adev);

-static int mes_v12_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int mes_v12_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index e3ddd22aa172..243eabda0607 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
index b01bb759d0f4..e646e5cef0a2 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

-#define mmSMNAID_AID0_MCA_SMU 0x03b30400

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c
index 0fbc3be81f14..f2ab5001b492 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c

- switch (adev->ip_versions[MMHUB_HWIP][0]) {

diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
index f47bd7ada4d7..4dcb72d1bdda 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c

diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h
index 1d099ffb3a5a..9d61d76e1bf9 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index b281462093f1..62cdfe10e6f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c

- dev_warn(adev->dev, "IH ring buffer overflow "

- "(0x%08X, 0x%08X, 0x%08X)\n",

- wptr, ih->rptr, tmp);

-static int navi10_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int navi10_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int navi10_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int navi10_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int navi10_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- navi10_ih_irq_disable(adev);

-static int navi10_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return navi10_ih_hw_fini(adev);

-static int navi10_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return navi10_ih_hw_init(adev);

-static int navi10_ih_wait_for_idle(void *handle)

-static int navi10_ih_soft_reset(void *handle)

-static int navi10_ih_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int navi10_ih_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h b/drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h
index a5b60c9a2418..c88284ff92d8 100644
--- a/drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h
+++ b/drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h

+#define SDMA_PKT_VM_INVALIDATION_HEADER_OP(x) (((x) & SDMA_PKT_VM_INVALIDATION_HEADER_op_mask) << SDMA_PKT_VM_INVALIDATION_HEADER_op_shift)

+#define SDMA_PKT_VM_INVALIDATION_HEADER_SUB_OP(x) (((x) & SDMA_PKT_VM_INVALIDATION_HEADER_sub_op_mask) << SDMA_PKT_VM_INVALIDATION_HEADER_sub_op_shift)

+#define SDMA_PKT_VM_INVALIDATION_HEADER_GFX_ENG_ID(x) (((x) & SDMA_PKT_VM_INVALIDATION_HEADER_gfx_eng_id_mask) << SDMA_PKT_VM_INVALIDATION_HEADER_gfx_eng_id_shift)

+#define SDMA_PKT_VM_INVALIDATION_HEADER_MM_ENG_ID(x) (((x) & SDMA_PKT_VM_INVALIDATION_HEADER_mm_eng_id_mask) << SDMA_PKT_VM_INVALIDATION_HEADER_mm_eng_id_shift)

+#define SDMA_PKT_VM_INVALIDATION_INVALIDATEREQ_INVALIDATEREQ(x) (((x) & SDMA_PKT_VM_INVALIDATION_INVALIDATEREQ_invalidatereq_mask) << SDMA_PKT_VM_INVALIDATION_INVALIDATEREQ_invalidatereq_shift)

+#define SDMA_PKT_VM_INVALIDATION_ADDRESSRANGELO_ADDRESSRANGELO(x) (((x) & SDMA_PKT_VM_INVALIDATION_ADDRESSRANGELO_addressrangelo_mask) << SDMA_PKT_VM_INVALIDATION_ADDRESSRANGELO_addressrangelo_shift)

+#define SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_INVALIDATEACK(x) (((x) & SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_invalidateack_mask) << SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_invalidateack_shift)

+#define SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_ADDRESSRANGEHI(x) (((x) & SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_addressrangehi_mask) << SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_addressrangehi_shift)

+#define SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_RESERVED(x) (((x) & SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_reserved_mask) << SDMA_PKT_VM_INVALIDATION_ADDRESSRANGEHI_reserved_shift)

diff --git a/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c b/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c
index 39919e0892c1..c92875ceb31f 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c

diff --git a/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.h b/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.h
index b7f2e0d88905..9ac4831d39e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.h
+++ b/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.h

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
index b1b57dcc5a73..d1032e9992b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c
index 7a9adfda5814..41421da63a08 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 8d80df94bd8b..a26a9be58eac 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

- amdgpu_ras_set_fed(adev, true);

- amdgpu_ras_reset_gpu(adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
index fb37e354a9d5..3fb6d2aa7e3b 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
index d1bd79bbae53..8a0a63ac88d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 4938e6b340e9..47db483c3516 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2160, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 7680, 4352, 0)},

-static int nv_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int nv_common_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int nv_common_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int nv_common_sw_fini(void *handle)

-static int nv_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int nv_common_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int nv_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return nv_common_hw_fini(adev);

-static int nv_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return nv_common_hw_init(adev);

-static int nv_common_wait_for_idle(void *handle)

-static int nv_common_soft_reset(void *handle)

-static int nv_common_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int nv_common_set_powergating_state(void *handle,

- .sw_fini = nv_common_sw_fini,

- .wait_for_idle = nv_common_wait_for_idle,

- .soft_reset = nv_common_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index 37b5ddd6f13b..f4a91b126c73 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
index 51e470e8d67d..cc621064610f 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
index 725392522267..135c5099bfb8 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v2_4_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v2_4_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v2_4_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v2_4_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v2_4_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- sdma_v2_4_enable(adev, false);

-static int sdma_v2_4_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v2_4_hw_fini(adev);

-static int sdma_v2_4_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v2_4_hw_init(adev);

-static int sdma_v2_4_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v2_4_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v2_4_set_clockgating_state(void *handle,

-static int sdma_v2_4_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
index e65194fe94af..c611328671ed 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v3_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v3_0_hw_fini(adev);

-static int sdma_v3_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v3_0_hw_init(adev);

-static int sdma_v3_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static bool sdma_v3_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v3_0_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 23ef4eb36b40..b48d9c0b2e1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v4_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_0_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);

-static int sdma_v4_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);

-static int sdma_v4_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v4_0_hw_fini(adev);

-static int sdma_v4_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v4_0_hw_init(adev);

-static int sdma_v4_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_0_soft_reset(void *handle)

-static int sdma_v4_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v4_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v4_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index c77889040760..5e0066cd6c51 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

-static void sdma_v4_4_2_gfx_resume(struct amdgpu_device *adev, unsigned int i)

- WREG32_SDMA(i, regSDMA_GFX_RB_RPTR, 0);

- WREG32_SDMA(i, regSDMA_GFX_RB_RPTR_HI, 0);

- WREG32_SDMA(i, regSDMA_GFX_RB_WPTR, 0);

- WREG32_SDMA(i, regSDMA_GFX_RB_WPTR_HI, 0);

-static void sdma_v4_4_2_page_resume(struct amdgpu_device *adev, unsigned int i)

- WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR, 0);

- WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR_HI, 0);

- WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR, 0);

- WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR_HI, 0);

- uint32_t inst_mask)

- if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP &&

- sdma_v4_4_2_gfx_resume(adev, i);

- sdma_v4_4_2_page_resume(adev, i);

- /* enable context empty interrupt during initialization */

- temp = REG_SET_FIELD(temp, SDMA_CNTL, CTXEMPTY_INT_ENABLE, 1);

- WREG32_SDMA(i, regSDMA_CNTL, temp);

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v4_4_2_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = sdma_v4_4_2_inst_start(adev, inst_mask);

-static int sdma_v4_4_2_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_set_clockgating_state(void *handle,

-static int sdma_v4_4_2_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- sdma_v4_4_2_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);

- return sdma_v4_4_2_hw_fini(adev);

-static int sdma_v4_4_2_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v4_4_2_hw_init(adev);

-static int sdma_v4_4_2_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_soft_reset(void *handle)

-static int sdma_v4_4_2_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v4_4_2_set_powergating_state(void *handle,

-static void sdma_v4_4_2_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v4_4_2_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_gfx_off_ctrl(adev, false);

- amdgpu_gfx_off_ctrl(adev, true);

- r = sdma_v4_4_2_inst_start(adev, inst_mask);

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index 3e48ea38385d..b764550834a0 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

- * sdma_v5_0_gfx_resume - setup and start the async dma engines

- * Set up the gfx DMA ring buffers and enable them (NAVI10).

- * Returns 0 for success, error for failure.

-static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev)

- for (i = 0; i < adev->sdma.num_instances; i++) {

- ring = &adev->sdma.instance[i].ring;

- if (!amdgpu_sriov_vf(adev))

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

- /* Set ring buffer size in dwords */

- rb_bufsz = order_base_2(ring->ring_size / 4);

- rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SWAP_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL,

- RPTR_WRITEBACK_SWAP_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

- /* Initialize the ring buffer's read and write pointers */

+ WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

- /* setup the wptr shadow polling */

- wptr_gpu_addr = ring->wptr_gpu_addr;

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO),

- lower_32_bits(wptr_gpu_addr));

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI),

- upper_32_bits(wptr_gpu_addr));

- wptr_poll_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i,

- mmSDMA0_GFX_RB_WPTR_POLL_CNTL));

- wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,

- SDMA0_GFX_RB_WPTR_POLL_CNTL,

- F32_POLL_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL),

- /* set the wb address whether it's enabled or not */

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI),

- upper_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFF);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_LO),

- lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE),

- ring->gpu_addr >> 8);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI),

- ring->gpu_addr >> 40);

- /* before programing wptr to a less value, need set minor_ptr_update first */

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);

- if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR),

- lower_32_bits(ring->wptr << 2));

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI),

- upper_32_bits(ring->wptr << 2));

- doorbell = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

- doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i,

- mmSDMA0_GFX_DOORBELL_OFFSET));

- if (ring->use_doorbell) {

- doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL, ENABLE, 1);

- doorbell_offset = REG_SET_FIELD(doorbell_offset, SDMA0_GFX_DOORBELL_OFFSET,

- OFFSET, ring->doorbell_index);

- doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL, ENABLE, 0);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET),

- adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

- ring->doorbell_index, 20);

- if (amdgpu_sriov_vf(adev))

- sdma_v5_0_ring_set_wptr(ring);

- /* set minor_ptr_update to 0 after wptr programed */

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0);

- if (!amdgpu_sriov_vf(adev)) {

- /* set utc l1 enable flag always to 1 */

- temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_CNTL, UTC_L1_ENABLE, 1);

- temp = REG_SET_FIELD(temp, SDMA0_CNTL, MIDCMD_PREEMPT_ENABLE, 1);

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), temp);

- /* Set up RESP_MODE to non-copy addresses */

- temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, RESP_MODE, 3);

- temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, REDO_DELAY, 9);

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp);

- /* program default cache read and write policy */

- temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE));

- /* clean read policy and write policy bits */

- temp |= ((CACHE_READ_POLICY_L2__DEFAULT << 12) | (CACHE_WRITE_POLICY_L2__DEFAULT << 14));

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp);

- if (!amdgpu_sriov_vf(adev)) {

- /* unhalt engine */

- temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

- WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);

- /* enable DMA RB */

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

- ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1);

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1);

- /* enable DMA IBs */

- WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

- if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */

- sdma_v5_0_ctx_switch_enable(adev, true);

- sdma_v5_0_enable(adev, true);

- r = amdgpu_ring_test_helper(ring);

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v5_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v5_0_hw_fini(adev);

-static int sdma_v5_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v5_0_hw_init(adev);

-static int sdma_v5_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_soft_reset(void *handle)

@@ -1729,10 +1853,10 @@ static void sdma_v5_0_update_medium_grain_light_sleep(struct amdgpu_device *adev

-static int sdma_v5_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_0_set_powergating_state(void *handle,

-static void sdma_v5_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v5_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index bc9b240a3488..b1818e87889a 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

- * sdma_v5_2_gfx_resume - setup and start the async dma engines

- * Set up the gfx DMA ring buffers and enable them.

- * Returns 0 for success, error for failure.

-static int sdma_v5_2_gfx_resume(struct amdgpu_device *adev)

- for (i = 0; i < adev->sdma.num_instances; i++) {

- ring = &adev->sdma.instance[i].ring;

- if (!amdgpu_sriov_vf(adev))

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

- /* Set ring buffer size in dwords */

- rb_bufsz = order_base_2(ring->ring_size / 4);

- rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SWAP_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL,

- RPTR_WRITEBACK_SWAP_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

- /* Initialize the ring buffer's read and write pointers */

+ WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

- /* setup the wptr shadow polling */

- wptr_gpu_addr = ring->wptr_gpu_addr;

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO),

- lower_32_bits(wptr_gpu_addr));

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI),

- upper_32_bits(wptr_gpu_addr));

- wptr_poll_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i,

- mmSDMA0_GFX_RB_WPTR_POLL_CNTL));

- wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl,

- SDMA0_GFX_RB_WPTR_POLL_CNTL,

- F32_POLL_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL),

- /* set the wb address whether it's enabled or not */

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_HI),

- upper_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFF);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_ADDR_LO),

- lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE), ring->gpu_addr >> 8);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40);

- /* before programing wptr to a less value, need set minor_ptr_update first */

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);

- if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */

- WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));

- WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

- doorbell = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

- doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET));

+ doorbell_offset = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET));

- if (ring->use_doorbell) {

- doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL, ENABLE, 1);

- doorbell_offset = REG_SET_FIELD(doorbell_offset, SDMA0_GFX_DOORBELL_OFFSET,

- OFFSET, ring->doorbell_index);

- doorbell = REG_SET_FIELD(doorbell, SDMA0_GFX_DOORBELL, ENABLE, 0);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL), doorbell);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL_OFFSET), doorbell_offset);

- adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

- ring->doorbell_index,

- adev->doorbell_index.sdma_doorbell_range);

- if (amdgpu_sriov_vf(adev))

- sdma_v5_2_ring_set_wptr(ring);

- /* set minor_ptr_update to 0 after wptr programed */

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 0);

- /* SRIOV VF has no control of any of registers below */

- if (!amdgpu_sriov_vf(adev)) {

- /* set utc l1 enable flag always to 1 */

- temp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_CNTL, UTC_L1_ENABLE, 1);

- temp = REG_SET_FIELD(temp, SDMA0_CNTL, MIDCMD_PREEMPT_ENABLE, 1);

- WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CNTL), temp);

- /* Set up RESP_MODE to non-copy addresses */

- temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, RESP_MODE, 3);

- temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, REDO_DELAY, 9);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp);

- /* program default cache read and write policy */

- temp = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE));

- /* clean read policy and write policy bits */

- temp |= ((CACHE_READ_POLICY_L2__DEFAULT << 12) |

- (CACHE_WRITE_POLICY_L2__DEFAULT << 14) |

- SDMA0_UTCL1_PAGE__LLC_NOALLOC_MASK);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp);

- /* unhalt engine */

- temp = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

- WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);

- /* enable DMA RB */

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);

- ib_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 1);

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_SWAP_ENABLE, 1);

- /* enable DMA IBs */

- WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);

- if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */

- sdma_v5_2_ctx_switch_enable(adev, true);

- sdma_v5_2_enable(adev, true);

- r = amdgpu_ring_test_helper(ring);

-static int sdma_v5_2_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- sdma_v5_2_soft_reset(adev);

- amdgpu_ib_free(adev, &ib, NULL);

- amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);

-static int sdma_v5_2_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_2_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_2_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_2_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_2_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_2_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v5_2_hw_fini(adev);

-static int sdma_v5_2_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v5_2_hw_init(adev);

-static int sdma_v5_2_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

@@ -1652,10 +1812,10 @@ static void sdma_v5_2_update_medium_grain_light_sleep(struct amdgpu_device *adev

-static int sdma_v5_2_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v5_2_set_powergating_state(void *handle,

-static void sdma_v5_2_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v5_2_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
index 208a1fa9d4e7..1a023b45f0be 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

- * sdma_v6_0_gfx_resume - setup and start the async dma engines

- * Set up the gfx DMA ring buffers and enable them.

- * Returns 0 for success, error for failure.

-static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)

- for (i = 0; i < adev->sdma.num_instances; i++) {

- ring = &adev->sdma.instance[i].ring;

- if (!amdgpu_sriov_vf(adev))

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

- /* Set ring buffer size in dwords */

- rb_bufsz = order_base_2(ring->ring_size / 4);

- rb_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_SIZE, rb_bufsz);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_SWAP_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL,

- RPTR_WRITEBACK_SWAP_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_PRIV, 1);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

- /* Initialize the ring buffer's read and write pointers */

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

- /* setup the wptr shadow polling */

- wptr_gpu_addr = ring->wptr_gpu_addr;

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_LO),

- lower_32_bits(wptr_gpu_addr));

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI),

- upper_32_bits(wptr_gpu_addr));

- /* set the wb address whether it's enabled or not */

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_HI),

- upper_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFF);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_LO),

- lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, F32_WPTR_POLL_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

+ doorbell_offset = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

- /* before programing wptr to a less value, need set minor_ptr_update first */

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1);

+ WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

- if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

- doorbell = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL));

- doorbell_offset = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

- if (ring->use_doorbell) {

- doorbell = REG_SET_FIELD(doorbell, SDMA0_QUEUE0_DOORBELL, ENABLE, 1);

- doorbell_offset = REG_SET_FIELD(doorbell_offset, SDMA0_QUEUE0_DOORBELL_OFFSET,

- OFFSET, ring->doorbell_index);

- doorbell = REG_SET_FIELD(doorbell, SDMA0_QUEUE0_DOORBELL, ENABLE, 0);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL), doorbell);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

- adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

- ring->doorbell_index,

- adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances);

- if (amdgpu_sriov_vf(adev))

- sdma_v6_0_ring_set_wptr(ring);

- /* set minor_ptr_update to 0 after wptr programed */

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0);

- /* Set up sdma hang watchdog */

- temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));

- /* 100ms per unit */

- temp = REG_SET_FIELD(temp, SDMA0_WATCHDOG_CNTL, QUEUE_HANG_COUNT,

- max(adev->usec_timeout/100000, 1));

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL), temp);

- /* Set up RESP_MODE to non-copy addresses */

- temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, RESP_MODE, 3);

- temp = REG_SET_FIELD(temp, SDMA0_UTCL1_CNTL, REDO_DELAY, 9);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL), temp);

- /* program default cache read and write policy */

- temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE));

- /* clean read policy and write policy bits */

- temp |= ((CACHE_READ_POLICY_L2__DEFAULT << 12) |

- (CACHE_WRITE_POLICY_L2__DEFAULT << 14) |

- SDMA0_UTCL1_PAGE__LLC_NOALLOC_MASK);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE), temp);

- if (!amdgpu_sriov_vf(adev)) {

- /* unhalt engine */

- temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

- temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

- temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, TH1_RESET, 0);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), temp);

- /* enable DMA RB */

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

- ib_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1);

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1);

- /* enable DMA IBs */

- WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);

- if (amdgpu_sriov_vf(adev))

- sdma_v6_0_enable(adev, true);

- r = amdgpu_ring_test_helper(ring);

-static int sdma_v6_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static bool sdma_v6_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v6_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v6_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v6_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v6_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v6_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v6_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v6_0_hw_fini(adev);

-static int sdma_v6_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v6_0_hw_init(adev);

-static int sdma_v6_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v6_0_set_clockgating_state(void *handle,

-static int sdma_v6_0_set_powergating_state(void *handle,

-static void sdma_v6_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v6_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_CONST_FILL);

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index a8763496aed3..7e10e94624e3 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

+#define SDMA_PKT_CONSTANT_FILL_HEADER_COMPRESS(x) (((x) & SDMA_PKT_CONSTANT_FILL_HEADER_compress_mask) << SDMA_PKT_CONSTANT_FILL_HEADER_compress_shift)

- * sdma_v7_0_gfx_resume - setup and start the async dma engines

- * Set up the gfx DMA ring buffers and enable them.

- * Returns 0 for success, error for failure.

-static int sdma_v7_0_gfx_resume(struct amdgpu_device *adev)

- for (i = 0; i < adev->sdma.num_instances; i++) {

- ring = &adev->sdma.instance[i].ring;

- //if (!amdgpu_sriov_vf(adev))

- // WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

- /* Set ring buffer size in dwords */

- rb_bufsz = order_base_2(ring->ring_size / 4);

- rb_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL));

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_SIZE, rb_bufsz);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_SWAP_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL,

- RPTR_WRITEBACK_SWAP_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_PRIV, 1);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

- /* Initialize the ring buffer's read and write pointers */

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_HI), upper_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr << 2));

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

- /* setup the wptr shadow polling */

- wptr_gpu_addr = ring->wptr_gpu_addr;

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_LO),

- lower_32_bits(wptr_gpu_addr));

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_POLL_ADDR_HI),

- upper_32_bits(wptr_gpu_addr));

- /* set the wb address whether it's enabled or not */

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_HI),

- upper_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFF);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_RPTR_ADDR_LO),

- lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);

- if (amdgpu_sriov_vf(adev))

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 1);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, MCU_WPTR_POLL_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

- /* before programing wptr to a less value, need set minor_ptr_update first */

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 1);

- if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

- doorbell = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL));

- doorbell_offset = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

+ doorbell_offset = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET));

- if (ring->use_doorbell) {

- doorbell = REG_SET_FIELD(doorbell, SDMA0_QUEUE0_DOORBELL, ENABLE, 1);

- doorbell_offset = REG_SET_FIELD(doorbell_offset, SDMA0_QUEUE0_DOORBELL_OFFSET,

- OFFSET, ring->doorbell_index);

- doorbell = REG_SET_FIELD(doorbell, SDMA0_QUEUE0_DOORBELL, ENABLE, 0);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL), doorbell);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

- adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,

- ring->doorbell_index,

- adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances);

- if (amdgpu_sriov_vf(adev))

- sdma_v7_0_ring_set_wptr(ring);

- /* set minor_ptr_update to 0 after wptr programed */

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_MINOR_PTR_UPDATE), 0);

- /* Set up sdma hang watchdog */

- tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL));

- /* 100ms per unit */

- tmp = REG_SET_FIELD(tmp, SDMA0_WATCHDOG_CNTL, QUEUE_HANG_COUNT,

- max(adev->usec_timeout/100000, 1));

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_WATCHDOG_CNTL), tmp);

- /* Set up RESP_MODE to non-copy addresses */

- tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL));

- tmp = REG_SET_FIELD(tmp, SDMA0_UTCL1_CNTL, RESP_MODE, 3);

- tmp = REG_SET_FIELD(tmp, SDMA0_UTCL1_CNTL, REDO_DELAY, 9);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_CNTL), tmp);

- /* program default cache read and write policy */

- tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE));

- /* clean read policy and write policy bits */

- tmp |= ((CACHE_READ_POLICY_L2__DEFAULT << 12) |

- (CACHE_WRITE_POLICY_L2__DEFAULT << 14));

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_UTCL1_PAGE), tmp);

- if (!amdgpu_sriov_vf(adev)) {

- /* unhalt engine */

- tmp = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL));

- tmp = REG_SET_FIELD(tmp, SDMA0_MCU_CNTL, HALT, 0);

- tmp = REG_SET_FIELD(tmp, SDMA0_MCU_CNTL, RESET, 0);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_MCU_CNTL), tmp);

+ WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

- /* enable DMA RB */

- rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RB_ENABLE, 1);

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_CNTL), rb_cntl);

- ib_cntl = RREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL));

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_ENABLE, 1);

- ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_QUEUE0_IB_CNTL, IB_SWAP_ENABLE, 1);

- /* enable DMA IBs */

- WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);

- ring->sched.ready = true;

- if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */

- sdma_v7_0_ctx_switch_enable(adev, true);

- sdma_v7_0_enable(adev, true);

- r = amdgpu_ring_test_helper(ring);

- ring->sched.ready = false;

-static int sdma_v7_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static bool sdma_v7_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_ib_free(adev, &ib, NULL);

-static int sdma_v7_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v7_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v7_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v7_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v7_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v7_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v7_0_hw_fini(adev);

-static int sdma_v7_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return sdma_v7_0_hw_init(adev);

-static int sdma_v7_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int sdma_v7_0_set_clockgating_state(void *handle,

-static int sdma_v7_0_set_powergating_state(void *handle,

-static void sdma_v7_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void sdma_v7_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- uint32_t num_type, data_format, max_com;

- ((copy_flags & AMDGPU_COPY_FLAGS_WRITE_COMPRESSED) ? SDMA_DCC_WRITE_CM(1) : 0) |

- ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_CONST_FILL);

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 85235470e872..77ef7da2e4fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c

-static int si_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_common_sw_init(void *handle)

-static int si_common_sw_fini(void *handle)

-static int si_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_common_hw_fini(void *handle)

-static int si_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return si_common_hw_fini(adev);

-static int si_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return si_common_hw_init(adev);

-static int si_common_wait_for_idle(void *handle)

-static int si_common_soft_reset(void *handle)

-static int si_common_set_clockgating_state(void *handle,

-static int si_common_set_powergating_state(void *handle,

- .late_init = NULL,

- .sw_init = si_common_sw_init,

- .sw_fini = si_common_sw_fini,

- .suspend = si_common_suspend,

- .wait_for_idle = si_common_wait_for_idle,

- .soft_reset = si_common_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
index 11db5b755832..dbd78d5345a4 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c

- amdgpu_ib_free(adev, &ib, NULL);

-static int si_dma_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_dma_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_dma_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_dma_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_dma_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- si_dma_stop(adev);

-static int si_dma_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return si_dma_hw_fini(adev);

-static int si_dma_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return si_dma_hw_init(adev);

-static int si_dma_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (si_dma_is_idle(handle))

-static int si_dma_soft_reset(void *handle)

-static int si_dma_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_dma_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index 5237395e4fab..a32b6243c1f8 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_ih.c

-static int si_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- si_ih_irq_disable(adev);

-static int si_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return si_ih_hw_fini(adev);

-static int si_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return si_ih_hw_init(adev);

-static int si_ih_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (si_ih_is_idle(handle))

-static int si_ih_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int si_ih_set_clockgating_state(void *handle,

-static int si_ih_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c b/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c
index 481217c32d85..2594467bdd87 100644
--- a/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c
+++ b/drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c

- r = adev->ip_blocks[i].version->funcs->suspend(adev);

- dev_err(adev->dev,

- "suspend of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = false;

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- dev_err(adev->dev,

- "resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = true;

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- dev_err(adev->dev,

- "resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = true;

diff --git a/drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c b/drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c
index 0af648931df5..70569ea906bc 100644
--- a/drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c
+++ b/drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c

- r = adev->ip_blocks[i].version->funcs->suspend(adev);

- dev_err(adev->dev,

- "suspend of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = false;

- r = adev->ip_blocks[i].version->funcs->resume(adev);

- dev_err(adev->dev,

- "resume of IP block <%s> failed %d\n",

- adev->ip_blocks[i].version->funcs->name, r);

- adev->ip_blocks[i].status.hw = true;

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 8d16dacdc172..a59b4c36cad7 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},

- sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81);

- * 1) Only reset limit on APU side, dGPU hasn't checked yet.

- * 2) S3 suspend abort and TOS already launched.

- !adev->suspend_complete &&

- if (((adev->apu_flags & AMD_APU_IS_RAVEN) ||

- (adev->apu_flags & AMD_APU_IS_RAVEN2)) &&

- !soc15_need_reset_on_resume(adev))

-static int soc15_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return soc15_common_hw_fini(adev);

-static int soc15_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return soc15_common_hw_init(adev);

-static int soc15_common_wait_for_idle(void *handle)

-static int soc15_common_soft_reset(void *handle)

@@ -1386,10 +1412,10 @@ static void soc15_update_drm_light_sleep(struct amdgpu_device *adev, bool enable

-static int soc15_common_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc15_common_set_powergating_state(void *handle,

- .wait_for_idle = soc15_common_wait_for_idle,

- .soft_reset = soc15_common_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index d30ad7d56def..62ad67d0b598 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},

-static int soc21_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc21_common_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc21_common_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc21_common_sw_fini(void *handle)

-static int soc21_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc21_common_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc21_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return soc21_common_hw_fini(adev);

- if (!(adev->flags & AMD_IS_APU) && adev->in_s3 &&

- !adev->suspend_complete) {

-static int soc21_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return soc21_common_hw_init(adev);

-static int soc21_common_wait_for_idle(void *handle)

-static int soc21_common_soft_reset(void *handle)

-static int soc21_common_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc21_common_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .sw_fini = soc21_common_sw_fini,

- .wait_for_idle = soc21_common_wait_for_idle,

- .soft_reset = soc21_common_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c
index fd4c3d4f8387..6b8e078ee7c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c

- {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},

-static int soc24_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc24_common_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (amdgpu_sriov_vf(adev))

-static int soc24_common_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc24_common_sw_fini(void *handle)

-static int soc24_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc24_common_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (amdgpu_sriov_vf(adev))

-static int soc24_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return soc24_common_hw_fini(adev);

-static int soc24_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return soc24_common_hw_init(adev);

-static int soc24_common_wait_for_idle(void *handle)

-static int soc24_common_soft_reset(void *handle)

-static int soc24_common_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int soc24_common_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .sw_fini = soc24_common_sw_fini,

- .wait_for_idle = soc24_common_wait_for_idle,

- .soft_reset = soc24_common_soft_reset,

diff --git a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
index 3ac56a9645eb..64891f099366 100644
--- a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h

diff --git a/drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h b/drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h
index 00d8bdb8254f..9ec2e03d41c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h

- /* Query whether TA is responding used only for validation purpose */

- uint32_t phy_id; /* Physical ID */

diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
index 24d49d813607..0968e551f7b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c

-static int tonga_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int tonga_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int tonga_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int tonga_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int tonga_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- tonga_ih_irq_disable(adev);

-static int tonga_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return tonga_ih_hw_fini(adev);

-static int tonga_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return tonga_ih_hw_init(adev);

-static int tonga_ih_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static bool tonga_ih_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int tonga_ih_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!adev->irq.srbm_soft_reset)

- return tonga_ih_hw_fini(adev);

-static int tonga_ih_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return tonga_ih_hw_init(adev);

-static int tonga_ih_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int tonga_ih_set_clockgating_state(void *handle,

-static int tonga_ih_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
index 1a8ea834efa6..a7b9c358a2d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

-static void umc_v12_0_convert_error_address(struct amdgpu_device *adev,

- struct ta_ras_query_address_input *addr_in)

- uint32_t col, row, row_xor, bank, channel_index;

- uint64_t soc_pa, retired_page, column, err_addr;

- struct ta_ras_query_address_output addr_out;

- err_addr = addr_in->ma.err_addr;

- addr_in->addr_type = TA_RAS_MCA_TO_PA;

- if (psp_ras_query_address(&adev->psp, addr_in, &addr_out)) {

- dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx",

- soc_pa = addr_out.pa.pa;

- bank = addr_out.pa.bank;

- channel_index = addr_out.pa.channel_idx;

- col = (err_addr >> 1) & 0x1fULL;

- row = (err_addr >> 10) & 0x3fffULL;

- row_xor = row ^ (0x1ULL << 13);

- /* clear [C3 C2] in soc physical address */

- soc_pa &= ~(0x3ULL << UMC_V12_0_PA_C2_BIT);

- /* clear [C4] in soc physical address */

- soc_pa &= ~(0x1ULL << UMC_V12_0_PA_C4_BIT);

- /* loop for all possibilities of [C4 C3 C2] */

- for (column = 0; column < UMC_V12_0_NA_MAP_PA_NUM; column++) {

- retired_page = soc_pa | ((column & 0x3) << UMC_V12_0_PA_C2_BIT);

- retired_page |= (((column & 0x4) >> 2) << UMC_V12_0_PA_C4_BIT);

- /* include column bit 0 and 1 */

- col |= (column << 2);

- dev_info(adev->dev,

- "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",

- retired_page, row, col, bank, channel_index);

- amdgpu_umc_fill_error_record(err_data, err_addr,

- retired_page, channel_index, addr_in->ma.umc_inst);

- /* shift R13 bit */

- retired_page ^= (0x1ULL << UMC_V12_0_PA_R13_BIT);

- dev_info(adev->dev,

- "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",

- retired_page, row_xor, col, bank, channel_index);

- amdgpu_umc_fill_error_record(err_data, err_addr,

- retired_page, channel_index, addr_in->ma.umc_inst);

-static void umc_v12_0_dump_addr_info(struct amdgpu_device *adev,

- struct ta_ras_query_address_output *addr_out,

- uint64_t err_addr)

- uint32_t col, row, row_xor, bank, channel_index;

- uint64_t soc_pa, retired_page, column;

- soc_pa = addr_out->pa.pa;

- bank = addr_out->pa.bank;

- channel_index = addr_out->pa.channel_idx;

- col = (err_addr >> 1) & 0x1fULL;

- row = (err_addr >> 10) & 0x3fffULL;

- row_xor = row ^ (0x1ULL << 13);

- /* clear [C3 C2] in soc physical address */

- soc_pa &= ~(0x3ULL << UMC_V12_0_PA_C2_BIT);

- /* clear [C4] in soc physical address */

- soc_pa &= ~(0x1ULL << UMC_V12_0_PA_C4_BIT);

- /* loop for all possibilities of [C4 C3 C2] */

- for (column = 0; column < UMC_V12_0_NA_MAP_PA_NUM; column++) {

- retired_page = soc_pa | ((column & 0x3) << UMC_V12_0_PA_C2_BIT);

- retired_page |= (((column & 0x4) >> 2) << UMC_V12_0_PA_C4_BIT);

- /* include column bit 0 and 1 */

- col |= (column << 2);

- dev_info(adev->dev,

- "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",

- retired_page, row, col, bank, channel_index);

- /* shift R13 bit */

- retired_page ^= (0x1ULL << UMC_V12_0_PA_R13_BIT);

- dev_info(adev->dev,

- "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n",

- retired_page, row_xor, col, bank, channel_index);

-static int umc_v12_0_lookup_bad_pages_in_a_row(struct amdgpu_device *adev,

- uint64_t pa_addr, uint64_t *pfns, int len)

- uint64_t soc_pa, retired_page, column;

- /* clear [C3 C2] in soc physical address */

- soc_pa &= ~(0x3ULL << UMC_V12_0_PA_C2_BIT);

- /* clear [C4] in soc physical address */

- soc_pa &= ~(0x1ULL << UMC_V12_0_PA_C4_BIT);

- /* loop for all possibilities of [C4 C3 C2] */

- for (column = 0; column < UMC_V12_0_NA_MAP_PA_NUM; column++) {

- retired_page = soc_pa | ((column & 0x3) << UMC_V12_0_PA_C2_BIT);

- retired_page |= (((column & 0x4) >> 2) << UMC_V12_0_PA_C4_BIT);

- pfns[pos++] = retired_page >> AMDGPU_GPU_PAGE_SHIFT;

- /* shift R13 bit */

- retired_page ^= (0x1ULL << UMC_V12_0_PA_R13_BIT);

- pfns[pos++] = retired_page >> AMDGPU_GPU_PAGE_SHIFT;

-static int umc_v12_0_convert_mca_to_addr(struct amdgpu_device *adev,

- uint64_t err_addr, uint32_t ch, uint32_t umc,

- uint32_t node, uint32_t socket,

- uint64_t *addr, bool dump_addr)

- struct ta_ras_query_address_input addr_in;

- struct ta_ras_query_address_output addr_out;

- memset(&addr_in, 0, sizeof(addr_in));

- addr_in.ma.err_addr = err_addr;

- addr_in.ma.ch_inst = ch;

- addr_in.ma.umc_inst = umc;

- addr_in.ma.node_inst = node;

- addr_in.ma.socket_id = socket;

- addr_in.addr_type = TA_RAS_MCA_TO_PA;

- if (psp_ras_query_address(&adev->psp, &addr_in, &addr_out)) {

- dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx",

- umc_v12_0_dump_addr_info(adev, &addr_out, err_addr);

- *addr = addr_out.pa.pa;

- umc_v12_0_convert_error_address(adev, err_data, &addr_in);

- ret = umc_v12_0_convert_mca_to_addr(adev,

- MCA_IPID_2_SOCKET_ID(ipid), &pa_addr, true);

- ecc_err->pa_pfn = UMC_V12_ADDR_MASK_BAD_COLS(pa_addr) >> AMDGPU_GPU_PAGE_SHIFT;

- ecc_err->pa_pfn = BIT_ULL(UMC_V12_0_PA_C4_BIT) >> AMDGPU_GPU_PAGE_SHIFT;

- count = umc_v12_0_lookup_bad_pages_in_a_row(adev,

- MCA_IPID_2_UMC_CH(ecc_err->ipid),

diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h
index be5598d76c1d..9298018d938f 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h

-#define UMC_V12_ADDR_MASK_BAD_COLS(addr) \

- ((addr) & ~((0x3ULL << UMC_V12_0_PA_C2_BIT) | \

- (0x1ULL << UMC_V12_0_PA_C4_BIT) | \

- (0x1ULL << UMC_V12_0_PA_R13_BIT)))

diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_14.c b/drivers/gpu/drm/amd/amdgpu/umc_v8_14.c
new file mode 100644
index 000000000000..eaca10a3c4a9
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v8_14.c

diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_14.h b/drivers/gpu/drm/amd/amdgpu/umc_v8_14.h
new file mode 100644
index 000000000000..20a258f0017a
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v8_14.h

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
index 805d6662c88b..5830e799c0a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

-static int uvd_v3_1_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v3_1_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v3_1_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v3_1_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v3_1_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v3_1_prepare_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v3_1_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = uvd_v3_1_hw_fini(adev);

-static int uvd_v3_1_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_uvd_resume(adev);

- return uvd_v3_1_hw_init(adev);

-static int uvd_v3_1_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v3_1_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v3_1_set_clockgating_state(void *handle,

-static int uvd_v3_1_set_powergating_state(void *handle,

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 3f19c606f4de..f93079e09215 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

-static int uvd_v4_2_set_clockgating_state(void *handle,

-static int uvd_v4_2_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v4_2_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v4_2_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v4_2_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v4_2_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v4_2_prepare_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v4_2_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = uvd_v4_2_hw_fini(adev);

-static int uvd_v4_2_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_uvd_resume(adev);

- return uvd_v4_2_hw_init(adev);

-static int uvd_v4_2_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v4_2_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v4_2_set_clockgating_state(void *handle,

-static int uvd_v4_2_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index efd903c21d48..050a0f309390 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

-static int uvd_v5_0_set_clockgating_state(void *handle,

-static int uvd_v5_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v5_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v5_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v5_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- uvd_v5_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v5_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v5_0_prepare_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v5_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = uvd_v5_0_hw_fini(adev);

-static int uvd_v5_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_uvd_resume(adev);

- return uvd_v5_0_hw_init(adev);

-static int uvd_v5_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v5_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v5_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (uvd_v5_0_wait_for_idle(handle))

-static int uvd_v5_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 495de5068455..d9d036ee51fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

-static int uvd_v6_0_set_clockgating_state(void *handle,

-static int uvd_v6_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq);

-static int uvd_v6_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v6_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- uvd_v6_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v6_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_prepare_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = uvd_v6_0_hw_fini(adev);

-static int uvd_v6_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_uvd_resume(adev);

- return uvd_v6_0_hw_init(adev);

-static int uvd_v6_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (uvd_v6_0_is_idle(handle))

-static bool uvd_v6_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v6_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (uvd_v6_0_wait_for_idle(handle))

-static int uvd_v6_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index 6068b784dc69..9d237b5937fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

-static int uvd_v7_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v7_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v7_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v7_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: handle used to pass amdgpu_device pointer

-static int uvd_v7_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v7_0_prepare_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int uvd_v7_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = uvd_v7_0_hw_fini(adev);

-static int uvd_v7_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_uvd_resume(adev);

- return uvd_v7_0_hw_init(adev);

- struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched);

-static bool uvd_v7_0_is_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return !(RREG32(mmSRBM_STATUS) & SRBM_STATUS__UVD_BUSY_MASK);

-static int uvd_v7_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- for (i = 0; i < adev->usec_timeout; i++) {

- if (uvd_v7_0_is_idle(handle))

- return -ETIMEDOUT;

-#define AMDGPU_UVD_STATUS_BUSY_MASK 0xfd

-static bool uvd_v7_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- u32 srbm_soft_reset = 0;

- u32 tmp = RREG32(mmSRBM_STATUS);

- if (REG_GET_FIELD(tmp, SRBM_STATUS, UVD_RQ_PENDING) ||

- REG_GET_FIELD(tmp, SRBM_STATUS, UVD_BUSY) ||

- (RREG32_SOC15(UVD, ring->me, mmUVD_STATUS) &

- AMDGPU_UVD_STATUS_BUSY_MASK))

- srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset,

- SRBM_SOFT_RESET, SOFT_RESET_UVD, 1);

- if (srbm_soft_reset) {

- adev->uvd.inst[ring->me].srbm_soft_reset = srbm_soft_reset;

- adev->uvd.inst[ring->me].srbm_soft_reset = 0;

-static int uvd_v7_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!adev->uvd.inst[ring->me].srbm_soft_reset)

- uvd_v7_0_stop(adev);

-static int uvd_v7_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- u32 srbm_soft_reset;

- if (!adev->uvd.inst[ring->me].srbm_soft_reset)

- srbm_soft_reset = adev->uvd.inst[ring->me].srbm_soft_reset;

- if (srbm_soft_reset) {

- tmp = RREG32(mmSRBM_SOFT_RESET);

- tmp |= srbm_soft_reset;

- dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp);

- WREG32(mmSRBM_SOFT_RESET, tmp);

- tmp = RREG32(mmSRBM_SOFT_RESET);

- tmp &= ~srbm_soft_reset;

- WREG32(mmSRBM_SOFT_RESET, tmp);

- tmp = RREG32(mmSRBM_SOFT_RESET);

- /* Wait a little for things to settle down */

-static int uvd_v7_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!adev->uvd.inst[ring->me].srbm_soft_reset)

- return uvd_v7_0_start(adev);

-static void uvd_v7_0_set_sw_clock_gating(struct amdgpu_device *adev)

- uint32_t data, data1, data2, suvd_flags;

- data = RREG32_SOC15(UVD, ring->me, mmUVD_CGC_CTRL);

- data1 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE);

- data2 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_CTRL);

- data &= ~(UVD_CGC_CTRL__CLK_OFF_DELAY_MASK |

- UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK);

- suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK |

- UVD_SUVD_CGC_GATE__SIT_MASK |

- UVD_SUVD_CGC_GATE__SMP_MASK |

- UVD_SUVD_CGC_GATE__SCM_MASK |

- UVD_SUVD_CGC_GATE__SDB_MASK;

- data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK |

- (1 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_GATE_DLY_TIMER)) |

- (4 << REG_FIELD_SHIFT(UVD_CGC_CTRL, CLK_OFF_DELAY));

- data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |

- UVD_CGC_CTRL__UDEC_CM_MODE_MASK |

- UVD_CGC_CTRL__UDEC_IT_MODE_MASK |

- UVD_CGC_CTRL__UDEC_DB_MODE_MASK |

- UVD_CGC_CTRL__UDEC_MP_MODE_MASK |

- UVD_CGC_CTRL__SYS_MODE_MASK |

- UVD_CGC_CTRL__UDEC_MODE_MASK |

- UVD_CGC_CTRL__MPEG2_MODE_MASK |

- UVD_CGC_CTRL__REGS_MODE_MASK |

- UVD_CGC_CTRL__RBC_MODE_MASK |

- UVD_CGC_CTRL__LMI_MC_MODE_MASK |

- UVD_CGC_CTRL__LMI_UMC_MODE_MASK |

- UVD_CGC_CTRL__IDCT_MODE_MASK |

- UVD_CGC_CTRL__MPRD_MODE_MASK |

- UVD_CGC_CTRL__MPC_MODE_MASK |

- UVD_CGC_CTRL__LBSI_MODE_MASK |

- UVD_CGC_CTRL__LRBBM_MODE_MASK |

- UVD_CGC_CTRL__WCB_MODE_MASK |

- UVD_CGC_CTRL__VCPU_MODE_MASK |

- UVD_CGC_CTRL__JPEG_MODE_MASK |

- UVD_CGC_CTRL__JPEG2_MODE_MASK |

- UVD_CGC_CTRL__SCPU_MODE_MASK);

- data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK |

- UVD_SUVD_CGC_CTRL__SIT_MODE_MASK |

- UVD_SUVD_CGC_CTRL__SMP_MODE_MASK |

- UVD_SUVD_CGC_CTRL__SCM_MODE_MASK |

- UVD_SUVD_CGC_CTRL__SDB_MODE_MASK);

- data1 |= suvd_flags;

- WREG32_SOC15(UVD, ring->me, mmUVD_CGC_CTRL, data);

- WREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE, 0);

- WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1);

- WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_CTRL, data2);

-static void uvd_v7_0_set_hw_clock_gating(struct amdgpu_device *adev)

- uint32_t data, data1, cgc_flags, suvd_flags;

- data = RREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE);

- data1 = RREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE);

- cgc_flags = UVD_CGC_GATE__SYS_MASK |

- UVD_CGC_GATE__UDEC_MASK |

- UVD_CGC_GATE__MPEG2_MASK |

- UVD_CGC_GATE__RBC_MASK |

- UVD_CGC_GATE__LMI_MC_MASK |

- UVD_CGC_GATE__IDCT_MASK |

- UVD_CGC_GATE__MPRD_MASK |

- UVD_CGC_GATE__MPC_MASK |

- UVD_CGC_GATE__LBSI_MASK |

- UVD_CGC_GATE__LRBBM_MASK |

- UVD_CGC_GATE__UDEC_RE_MASK |

- UVD_CGC_GATE__UDEC_CM_MASK |

- UVD_CGC_GATE__UDEC_IT_MASK |

- UVD_CGC_GATE__UDEC_DB_MASK |

- UVD_CGC_GATE__UDEC_MP_MASK |

- UVD_CGC_GATE__WCB_MASK |

- UVD_CGC_GATE__VCPU_MASK |

- UVD_CGC_GATE__SCPU_MASK |

- UVD_CGC_GATE__JPEG_MASK |

- UVD_CGC_GATE__JPEG2_MASK;

- suvd_flags = UVD_SUVD_CGC_GATE__SRE_MASK |

- UVD_SUVD_CGC_GATE__SIT_MASK |

- UVD_SUVD_CGC_GATE__SMP_MASK |

- UVD_SUVD_CGC_GATE__SCM_MASK |

- UVD_SUVD_CGC_GATE__SDB_MASK;

- data |= cgc_flags;

- data1 |= suvd_flags;

- WREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE, data);

- WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1);

-static void uvd_v7_0_set_bypass_mode(struct amdgpu_device *adev, bool enable)

- u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL);

- tmp |= (GCK_DFS_BYPASS_CNTL__BYPASSDCLK_MASK |

- GCK_DFS_BYPASS_CNTL__BYPASSVCLK_MASK);

- tmp &= ~(GCK_DFS_BYPASS_CNTL__BYPASSDCLK_MASK |

- GCK_DFS_BYPASS_CNTL__BYPASSVCLK_MASK);

- WREG32_SMC(ixGCK_DFS_BYPASS_CNTL, tmp);

-static int uvd_v7_0_set_clockgating_state(void *handle,

- enum amd_clockgating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- bool enable = (state == AMD_CG_STATE_GATE);

- uvd_v7_0_set_bypass_mode(adev, enable);

- if (!(adev->cg_flags & AMD_CG_SUPPORT_UVD_MGCG))

- /* disable HW gating and enable Sw gating */

- uvd_v7_0_set_sw_clock_gating(adev);

- /* wait for STATUS to clear */

- if (uvd_v7_0_wait_for_idle(handle))

- /* enable HW gates because UVD is idle */

- /* uvd_v7_0_set_hw_clock_gating(adev); */

-static int uvd_v7_0_set_powergating_state(void *handle,

- enum amd_powergating_state state)

- /* This doesn't actually powergate the UVD block.

- * That's done in the dpm code via the SMC. This

- * just re-inits the block as necessary. The actual

- * gating still happens in the dpm code. We should

- * revisit this when there is a cleaner line between

- * the smc and the hw blocks

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!(adev->pg_flags & AMD_PG_SUPPORT_UVD))

- WREG32_SOC15(UVD, ring->me, mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK);

- if (state == AMD_PG_STATE_GATE) {

- uvd_v7_0_stop(adev);

- return uvd_v7_0_start(adev);

-static int uvd_v7_0_set_clockgating_state(void *handle,

- .late_init = NULL,

- .is_idle = NULL /* uvd_v7_0_is_idle */,

- .wait_for_idle = NULL /* uvd_v7_0_wait_for_idle */,

- .check_soft_reset = NULL /* uvd_v7_0_check_soft_reset */,

- .pre_soft_reset = NULL /* uvd_v7_0_pre_soft_reset */,

- .soft_reset = NULL /* uvd_v7_0_soft_reset */,

- .post_soft_reset = NULL /* uvd_v7_0_post_soft_reset */,

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index 66fada199bda..c633b7ff2943 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

-static int vce_v2_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (vce_v2_0_is_idle(handle))

- if (vce_v2_0_wait_for_idle(adev)) {

-static int vce_v2_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v2_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v2_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v2_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v2_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- cancel_delayed_work_sync(&adev->vce.idle_work);

-static int vce_v2_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vce_v2_0_hw_fini(adev);

-static int vce_v2_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vce_resume(adev);

- return vce_v2_0_hw_init(adev);

-static int vce_v2_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v2_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v2_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index 4bfba2931b08..f8bddcd19b68 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

-static int vce_v3_0_wait_for_idle(void *handle);

-static int vce_v3_0_set_clockgating_state(void *handle,

-static int vce_v3_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vce_v3_0_wait_for_idle(handle);

- return vce_v3_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);

-static int vce_v3_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vce_v3_0_hw_fini(adev);

-static int vce_v3_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vce_resume(adev);

- return vce_v3_0_hw_init(adev);

-static int vce_v3_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (vce_v3_0_is_idle(handle))

-static bool vce_v3_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vce_v3_0_suspend(adev);

-static int vce_v3_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vce_v3_0_resume(adev);

-static int vce_v3_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v3_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index 0748bf44c880..335bda64ff5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

-static int vce_v4_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v4_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v4_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v4_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vce_v4_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- /* vce_v4_0_wait_for_idle(handle); */

-static int vce_v4_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vce_v4_0_hw_fini(adev);

-static int vce_v4_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vce_v4_0_hw_init(adev);

-static int vce_v4_0_set_clockgating_state(void *handle,

-static bool vce_v4_0_is_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;

- mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;

- return !(RREG32(mmSRBM_STATUS2) & mask);

-static int vce_v4_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- for (i = 0; i < adev->usec_timeout; i++)

- if (vce_v4_0_is_idle(handle))

- return -ETIMEDOUT;

-#define VCE_STATUS_VCPU_REPORT_AUTO_BUSY_MASK 0x00000008L /* AUTO_BUSY */

-#define VCE_STATUS_VCPU_REPORT_RB0_BUSY_MASK 0x00000010L /* RB0_BUSY */

-#define VCE_STATUS_VCPU_REPORT_RB1_BUSY_MASK 0x00000020L /* RB1_BUSY */

-#define AMDGPU_VCE_STATUS_BUSY_MASK (VCE_STATUS_VCPU_REPORT_AUTO_BUSY_MASK | \

- VCE_STATUS_VCPU_REPORT_RB0_BUSY_MASK)

-static bool vce_v4_0_check_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- u32 srbm_soft_reset = 0;

- /* According to VCE team , we should use VCE_STATUS instead

- * SRBM_STATUS.VCE_BUSY bit for busy status checking.

- * GRBM_GFX_INDEX.INSTANCE_INDEX is used to specify which VCE

- * instance's registers are accessed

- * (0 for 1st instance, 10 for 2nd instance).

- *|UENC|ACPI|AUTO ACTIVE|RB1 |RB0 |RB2 | |FW_LOADED|JOB |

- *|----+----+-----------+----+----+----+----------+---------+----|

- *|bit8|bit7| bit6 |bit5|bit4|bit3| bit2 | bit1 |bit0|

- * VCE team suggest use bit 3--bit 6 for busy status check

- mutex_lock(&adev->grbm_idx_mutex);

- WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0);

- if (RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS) & AMDGPU_VCE_STATUS_BUSY_MASK) {

- srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_VCE0, 1);

- srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_VCE1, 1);

- WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0x10);

- if (RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS) & AMDGPU_VCE_STATUS_BUSY_MASK) {

- srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_VCE0, 1);

- srbm_soft_reset = REG_SET_FIELD(srbm_soft_reset, SRBM_SOFT_RESET, SOFT_RESET_VCE1, 1);

- WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0);

- mutex_unlock(&adev->grbm_idx_mutex);

- if (srbm_soft_reset) {

- adev->vce.srbm_soft_reset = srbm_soft_reset;

- adev->vce.srbm_soft_reset = 0;

-static int vce_v4_0_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- u32 srbm_soft_reset;

- if (!adev->vce.srbm_soft_reset)

- srbm_soft_reset = adev->vce.srbm_soft_reset;

- if (srbm_soft_reset) {

- tmp = RREG32(mmSRBM_SOFT_RESET);

- tmp |= srbm_soft_reset;

- dev_info(adev->dev, "SRBM_SOFT_RESET=0x%08X\n", tmp);

- WREG32(mmSRBM_SOFT_RESET, tmp);

- tmp = RREG32(mmSRBM_SOFT_RESET);

- tmp &= ~srbm_soft_reset;

- WREG32(mmSRBM_SOFT_RESET, tmp);

- tmp = RREG32(mmSRBM_SOFT_RESET);

- /* Wait a little for things to settle down */

-static int vce_v4_0_pre_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!adev->vce.srbm_soft_reset)

- return vce_v4_0_suspend(adev);

-static int vce_v4_0_post_soft_reset(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!adev->vce.srbm_soft_reset)

- return vce_v4_0_resume(adev);

-static void vce_v4_0_override_vce_clock_gating(struct amdgpu_device *adev, bool override)

- tmp = data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_ARB_CTRL));

- data |= VCE_RB_ARB_CTRL__VCE_CGTT_OVERRIDE_MASK;

- data &= ~VCE_RB_ARB_CTRL__VCE_CGTT_OVERRIDE_MASK;

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_ARB_CTRL), data);

-static void vce_v4_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,

- /* Set Override to disable Clock Gating */

- vce_v4_0_override_vce_clock_gating(adev, true);

- /* This function enables MGCG which is controlled by firmware.

- With the clocks in the gated state the core is still

- accessible but the firmware will throttle the clocks on the

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_B));

- data &= ~0xef0000;

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_B), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING));

- data &= ~0xffc00000;

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2));

- data &= ~0x00010000;

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_REG_CLOCK_GATING));

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_REG_CLOCK_GATING), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL));

- data |= VCE_UENC_DMA_DCLK_CTRL__WRDMCLK_FORCEON_MASK |

- VCE_UENC_DMA_DCLK_CTRL__RDDMCLK_FORCEON_MASK |

- VCE_UENC_DMA_DCLK_CTRL__REGCLK_FORCEON_MASK |

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_B));

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_B), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING));

- data |= 0xffc00000;

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2));

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING_2), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_REG_CLOCK_GATING));

- data &= ~0xffc00000;

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_REG_CLOCK_GATING), data);

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL));

- data &= ~(VCE_UENC_DMA_DCLK_CTRL__WRDMCLK_FORCEON_MASK |

- VCE_UENC_DMA_DCLK_CTRL__RDDMCLK_FORCEON_MASK |

- VCE_UENC_DMA_DCLK_CTRL__REGCLK_FORCEON_MASK |

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_DMA_DCLK_CTRL), data);

- vce_v4_0_override_vce_clock_gating(adev, false);

-static void vce_v4_0_set_bypass_mode(struct amdgpu_device *adev, bool enable)

- u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL);

- tmp |= GCK_DFS_BYPASS_CNTL__BYPASSECLK_MASK;

- tmp &= ~GCK_DFS_BYPASS_CNTL__BYPASSECLK_MASK;

- WREG32_SMC(ixGCK_DFS_BYPASS_CNTL, tmp);

-static int vce_v4_0_set_clockgating_state(void *handle,

- enum amd_clockgating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- bool enable = (state == AMD_CG_STATE_GATE);

- if ((adev->asic_type == CHIP_POLARIS10) ||

- (adev->asic_type == CHIP_TONGA) ||

- (adev->asic_type == CHIP_FIJI))

- vce_v4_0_set_bypass_mode(adev, enable);

- if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))

- mutex_lock(&adev->grbm_idx_mutex);

- for (i = 0; i < 2; i++) {

- /* Program VCE Instance 0 or 1 if not harvested */

- if (adev->vce.harvest_config & (1 << i))

- WREG32_FIELD(GRBM_GFX_INDEX, VCE_INSTANCE, i);

- /* initialize VCE_CLOCK_GATING_A: Clock ON/OFF delay */

- uint32_t data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A);

- data &= ~(0xf | 0xff0);

- data |= ((0x0 << 0) | (0x04 << 4));

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_A, data);

- /* initialize VCE_UENC_CLOCK_GATING: Clock ON/OFF delay */

- data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING);

- data &= ~(0xf | 0xff0);

- data |= ((0x0 << 0) | (0x04 << 4));

- WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_UENC_CLOCK_GATING, data);

- vce_v4_0_set_vce_sw_clock_gating(adev, enable);

- WREG32_FIELD(GRBM_GFX_INDEX, VCE_INSTANCE, 0);

- mutex_unlock(&adev->grbm_idx_mutex);

-static int vce_v4_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .is_idle = NULL /* vce_v4_0_is_idle */,

- .wait_for_idle = NULL /* vce_v4_0_wait_for_idle */,

- .check_soft_reset = NULL /* vce_v4_0_check_soft_reset */,

- .pre_soft_reset = NULL /* vce_v4_0_pre_soft_reset */,

- .soft_reset = NULL /* vce_v4_0_soft_reset */,

- .post_soft_reset = NULL /* vce_v4_0_post_soft_reset */,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index ecdfbfefd66a..5ea96c983517 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

-static int vcn_v1_0_set_powergating_state(void *handle, enum amd_powergating_state state);

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- jpeg_v1_0_early_init(handle);

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = jpeg_v1_0_sw_init(handle);

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- jpeg_v1_0_sw_fini(handle);

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vcn_v1_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_enable_uvd(adev, false);

- r = vcn_v1_0_hw_fini(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v1_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v1_0_hw_init(adev);

- uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[0]->size + 4);

-static int vcn_v1_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vcn_v1_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!vcn_v1_0_is_idle(handle))

-static int vcn_v1_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- amdgpu_dpm_enable_uvd(adev, false);

- amdgpu_dpm_enable_uvd(adev, true);

-static void vcn_v1_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v1_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL /* vcn_v1_0_check_soft_reset */,

- .pre_soft_reset = NULL /* vcn_v1_0_pre_soft_reset */,

- .soft_reset = NULL /* vcn_v1_0_soft_reset */,

- .post_soft_reset = NULL /* vcn_v1_0_post_soft_reset */,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index bfd067e2d2f1..e42cfc731ad8 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

-static int vcn_v2_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vcn_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v2_0_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v2_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v2_0_hw_init(adev);

- uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[0]->size + 4);

- amdgpu_dpm_enable_uvd(adev, true);

- amdgpu_dpm_enable_uvd(adev, false);

-static int vcn_v2_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vcn_v2_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!vcn_v2_0_is_idle(handle))

-static int vcn_v2_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[0]->size + 4);

-static void vcn_v2_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v2_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index 04e9e806e318..b518202955ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

-static int vcn_v2_5_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vcn_v2_5_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v2_5_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v2_5_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v2_5_hw_init(adev);

- size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[i]->size + 4);

- uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[inst_idx]->size + 4);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, true);

- size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[i]->size + 4);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, false);

-static int vcn_v2_5_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vcn_v2_5_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (!vcn_v2_5_is_idle(handle))

-static int vcn_v2_5_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v2_5_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v2_5_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 65dd68b32280..63ddd4cca910 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

-static int vcn_v3_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&

- RREG32_SOC15(VCN, i, mmUVD_STATUS))) {

- vcn_v3_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v3_0_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v3_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v3_0_hw_init(adev);

- uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[inst]->size + 4);

- uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[inst_idx]->size + 4);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, true);

- cache_size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[i]->size + 4);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, false);

-static int vcn_v3_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vcn_v3_0_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vcn_v3_0_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v3_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v3_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 26c6f10a8c8f..00551d6f0370 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

-static int vcn_v4_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- (adev->vcn.cur_state != AMD_PG_STATE_GATE &&

- RREG32_SOC15(VCN, i, regUVD_STATUS))) {

- vcn_v4_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v4_0_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v4_0_hw_init(adev);

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst]->data;

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst_idx]->data;

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, true);

- cache_size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[i]->size + 4);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, false);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_set_clockgating_state(void *handle, enum amd_clockgating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

@@ -2030,14 +2042,15 @@ static int vcn_v4_0_set_clockgating_state(void *handle, enum amd_clockgating_sta

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_set_powergating_state(void *handle, enum amd_powergating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v4_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v4_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 0fda70336300..ecdc027f8220 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

-static int vcn_v4_0_3_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- volatile struct amdgpu_vcn4_fw_shared *fw_shared;

- fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr;

- fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);

- fw_shared->sq.is_enabled = true;

- if (amdgpu_vcnfw_log)

- amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vcn_v4_0_3_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v4_0_3_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v4_0_3_hw_init(adev);

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst_idx]->data;

- cache_size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw[i]->size + 4);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, true);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, false);

- /* For VF, only local offsets should be used */

- if (amdgpu_sriov_vf(ring->adev))

- /* For VF, only local offsets should be used */

- if (amdgpu_sriov_vf(ring->adev))

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_3_set_powergating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v4_0_3_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v4_0_3_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
index 9d4f5352a62c..23d3c16c9d9f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

-static int vcn_v4_0_5_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vcn_v4_0_5_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v4_0_5_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v4_0_5_hw_init(adev);

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst]->data;

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst_idx]->data;

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, true);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, false);

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_set_clockgating_state(void *handle, enum amd_clockgating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

@@ -1524,14 +1527,15 @@ static int vcn_v4_0_5_set_clockgating_state(void *handle, enum amd_clockgating_s

- * @handle: amdgpu_device pointer

-static int vcn_v4_0_5_set_powergating_state(void *handle, enum amd_powergating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v4_0_5_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v4_0_5_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
index c305386358b4..b6d78381ebfb 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

-#include "ivsrcid/vcn/irqsrcs_vcn_4_0.h"

-static int vcn_v5_0_0_set_powergating_state(void *handle,

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_5_0);

- VCN_4_0__SRCID__UVD_ENC_GENERAL_PURPOSE, &adev->vcn.inst[i].irq);

- VCN_4_0__SRCID_UVD_POISON, &adev->vcn.inst[i].irq);

- /* Allocate memory for VCN IP Dump buffer */

- ptr = kcalloc(adev->vcn.num_vcn_inst * reg_count, sizeof(uint32_t), GFP_KERNEL);

- DRM_ERROR("Failed to allocate memory for VCN IP Dump\n");

- adev->vcn.ip_dump = NULL;

- adev->vcn.ip_dump = ptr;

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vcn_v5_0_0_set_powergating_state(adev, AMD_PG_STATE_GATE);

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = vcn_v5_0_0_hw_fini(adev);

- r = amdgpu_vcn_suspend(adev);

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- r = amdgpu_vcn_resume(adev);

- r = vcn_v5_0_0_hw_init(adev);

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst]->data;

- hdr = (const struct common_firmware_header *)adev->vcn.fw[inst_idx]->data;

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, true);

- if (adev->pm.dpm_enabled)

- amdgpu_dpm_enable_uvd(adev, false);

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_wait_for_idle(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_set_clockgating_state(void *handle, enum amd_clockgating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

@@ -1251,14 +1270,15 @@ static int vcn_v5_0_0_set_clockgating_state(void *handle, enum amd_clockgating_s

- * @handle: amdgpu_device pointer

-static int vcn_v5_0_0_set_powergating_state(void *handle, enum amd_powergating_state state)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

@@ -1304,10 +1324,10 @@ static int vcn_v5_0_0_process_interrupt(struct amdgpu_device *adev, struct amdgp

- case VCN_4_0__SRCID__UVD_ENC_GENERAL_PURPOSE:

- case VCN_4_0__SRCID_UVD_POISON:

-static void vcn_v5_0_print_ip_state(void *handle, struct drm_printer *p)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static void vcn_v5_0_dump_ip_state(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- .late_init = NULL,

- .check_soft_reset = NULL,

- .pre_soft_reset = NULL,

- .soft_reset = NULL,

- .post_soft_reset = NULL,

- .dump_ip_state = vcn_v5_0_dump_ip_state,

- .print_ip_state = vcn_v5_0_print_ip_state,

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.h b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.h
index 51bbccd4360f..b8927652bc50 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.h

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
new file mode 100644
index 000000000000..8b463c977d08
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.h b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.h
new file mode 100644
index 000000000000..82ac709f44bf
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.h

diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index bf68e18e3824..98fc6941159e 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c

- dev_warn(adev->dev, "IH ring buffer overflow "

- "(0x%08X, 0x%08X, 0x%08X)\n",

- wptr, ih->rptr, tmp);

-static int vega10_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega10_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega10_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega10_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vega10_ih_irq_init(adev);

-static int vega10_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vega10_ih_irq_disable(adev);

-static int vega10_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vega10_ih_hw_fini(adev);

-static int vega10_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vega10_ih_hw_init(adev);

-static int vega10_ih_wait_for_idle(void *handle)

-static int vega10_ih_soft_reset(void *handle)

-static int vega10_ih_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega10_ih_set_powergating_state(void *handle,

- .late_init = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index ac439f0565e3..e9e3b2ed4b7b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c

- dev_warn(adev->dev, "IH ring buffer overflow "

- "(0x%08X, 0x%08X, 0x%08X)\n",

- wptr, ih->rptr, tmp);

-static int vega20_ih_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega20_ih_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega20_ih_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega20_ih_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega20_ih_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- vega20_ih_irq_disable(adev);

-static int vega20_ih_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vega20_ih_hw_fini(adev);

-static int vega20_ih_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vega20_ih_hw_init(adev);

-static int vega20_ih_wait_for_idle(void *handle)

-static int vega20_ih_soft_reset(void *handle)

-static int vega20_ih_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vega20_ih_set_powergating_state(void *handle,

- .late_init = NULL,

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index d39c670f6220..06615f160331 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c

- .max_height = 2304,

- .max_pixels_per_frame = 4096 * 2304,

- .max_height = 2304,

- .max_pixels_per_frame = 4096 * 2304,

-static int vi_common_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vi_common_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vi_common_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vi_common_sw_fini(void *handle)

-static int vi_common_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vi_common_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vi_common_suspend(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vi_common_hw_fini(adev);

-static int vi_common_resume(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- return vi_common_hw_init(adev);

-static int vi_common_wait_for_idle(void *handle)

-static int vi_common_soft_reset(void *handle)

-static int vi_common_set_clockgating_state(void *handle,

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int vi_common_set_powergating_state(void *handle,

- .sw_fini = vi_common_sw_fini,

- .wait_for_idle = vi_common_wait_for_idle,

- .soft_reset = vi_common_soft_reset,

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
index 02f7ba8c93cd..984f0e705078 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h

- 0xbf820001, 0xbf820258,

- 0xbefc007e, 0x867aff7f,

- 0x04000000, 0xbeef0080,

- 0x876f6f7a, 0xb8f02a05,

- 0x80708170, 0x8e708a70,

- 0xb8fb1605, 0x807b817b,

- 0x8e7b847b, 0x8e76827b,

- 0xbef600ff, 0x01000000,

- 0xbef20174, 0x80747074,

- 0x82758075, 0xbefc0080,

- 0xbf800000, 0xbe802b00,

- 0xbe822b02, 0xbe842b04,

- 0xbe862b06, 0xbe882b08,

- 0xbe8a2b0a, 0xbe8c2b0c,

- 0xbe8e2b0e, 0xc06b003a,

- 0x00000000, 0xbf8cc07f,

- 0xc06b013a, 0x00000010,

- 0xbf8cc07f, 0xc06b023a,

- 0x00000020, 0xbf8cc07f,

- 0xc06b033a, 0x00000030,

- 0xbf8cc07f, 0x8074c074,

- 0x82758075, 0x807c907c,

- 0xbf0a7b7c, 0xbf85ffe7,

- 0xbef40172, 0xbef00080,

- 0xbefe00c1, 0xbeff00c1,

- 0xbee80080, 0xbee90080,

- 0xbef600ff, 0x01000000,

- 0x867aff78, 0x00400000,

- 0xbf850003, 0xb8faf803,

- 0x897a7aff, 0x10000000,

- 0xbf85004d, 0xbe840080,

- 0xd2890000, 0x00000900,

- 0x80048104, 0xd2890001,

- 0x00000900, 0x80048104,

- 0xd2890002, 0x00000900,

- 0x80048104, 0xd2890003,

- 0x00000900, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0x00000901, 0x80048104,

- 0xd2890001, 0x00000901,

- 0x00000901, 0x80048104,

- 0xd2890003, 0x00000901,

- 0xd2890000, 0x00000902,

- 0x00000902, 0x80048104,

- 0xd2890002, 0x00000902,

- 0x00000902, 0x80048104,

- 0x00000903, 0x80048104,

- 0xd2890001, 0x00000903,

- 0x00000903, 0x80048104,

- 0xd2890003, 0x00000903,

- 0xbf84ffee, 0xbf820008,

- 0xe0724000, 0x701d0000,

- 0xe0724100, 0x701d0100,

- 0xe0724200, 0x701d0200,

- 0xe0724300, 0x701d0300,

- 0xbefe00c1, 0xbeff00c1,

- 0xb8fb4306, 0x867bc17b,

- 0xbf840063, 0xbf8a0000,

- 0x867aff6f, 0x04000000,

- 0xbf84005f, 0x8e7b867b,

- 0x8e7b827b, 0xbef6007b,

- 0xb8f02a05, 0x80708170,

- 0x8e708a70, 0xb8fa1605,

- 0x807a817a, 0x8e7a867a,

- 0x80707a70, 0x8070ff70,

- 0x00000080, 0xbef600ff,

- 0x01000000, 0xbefc0080,

- 0xd28c0002, 0x000100c1,

- 0xd28d0003, 0x000204c1,

- 0x867aff78, 0x00400000,

- 0xbf850003, 0xb8faf803,

- 0x897a7aff, 0x10000000,

- 0xbf850030, 0x24040682,

- 0xd86e4000, 0x00000002,

- 0xbf8cc07f, 0xbe840080,

- 0xd2890000, 0x00000900,

- 0x00000900, 0x80048104,

- 0xd2890002, 0x00000900,

- 0x00000900, 0x80048104,

- 0xbe840080, 0xd2890000,

- 0x00000901, 0x80048104,

- 0xd2890001, 0x00000901,

- 0x80048104, 0xd2890002,

- 0x00000901, 0x80048104,

- 0xd2890003, 0x00000901,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0x680404ff,

- 0x00000200, 0xd0c9006a,

- 0x0000f702, 0xbf87ffd2,

- 0xbf820015, 0xd1060002,

- 0x00011103, 0x7e0602ff,

- 0x00000200, 0xbefc00ff,

- 0x00010000, 0xbe800077,

- 0x8677ff77, 0xff7fffff,

- 0x8777ff77, 0x00058000,

- 0xd8ec0000, 0x00000002,

- 0xbf8cc07f, 0xe0765000,

- 0x701d0002, 0x68040702,

- 0xd0c9006a, 0x0000f702,

- 0xbf87fff7, 0xbef70000,

- 0xbef000ff, 0x00000400,

- 0xbefe00c1, 0xbeff00c1,

- 0xb8fb2a05, 0x807b817b,

- 0x8e7b827b, 0xbef600ff,

- 0x01000000, 0xbefc0084,

- 0xbf0a7b7c, 0xbf84006d,

- 0xbf11017c, 0x807bff7b,

- 0x00001000, 0x867aff78,

- 0x10000000, 0xbf850051,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0xd2890000, 0x00000903,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x00000903, 0x80048104,

- 0x807c847c, 0xbf0a7b7c,

- 0xbf85ffb1, 0xbf9c0000,

- 0xbf820012, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0x807c847c,

- 0x8070ff70, 0x00000400,

- 0xbf0a7b7c, 0xbf85ffef,

- 0xbf9c0000, 0xbf8200c7,

- 0xbef4007e, 0x8675ff7f,

- 0x0000ffff, 0x8775ff75,

- 0x00040000, 0xbef60080,

- 0xbef700ff, 0x00807fac,

- 0x866eff7f, 0x04000000,

- 0xbf84001e, 0xbefe00c1,

- 0xbeff00c1, 0xb8ef4306,

- 0x866fc16f, 0xbf840019,

- 0x8e6f866f, 0x8e6f826f,

- 0xbef6006f, 0xb8f82a05,

- 0x80788178, 0x8e788a78,

- 0xb8ee1605, 0x806e816e,

- 0x8e6e866e, 0x80786e78,

- 0x8078ff78, 0x00000080,

- 0xbef600ff, 0x01000000,

- 0xbefc0080, 0xe0510000,

- 0x781d0000, 0xe0510100,

- 0x781d0000, 0x807cff7c,

- 0x00000200, 0x8078ff78,

- 0x00000200, 0xbf0a6f7c,

- 0xbf85fff6, 0xbefe00c1,

- 0xbeff00c1, 0xbef600ff,

- 0x01000000, 0xb8ef2a05,

- 0x806f816f, 0x8e6f826f,

- 0x806fff6f, 0x00008000,

- 0xbef80080, 0xbeee0078,

- 0x8078ff78, 0x00000400,

- 0xbefc0084, 0xbf11087c,

- 0xe0524000, 0x781d0000,

- 0xe0524100, 0x781d0100,

- 0xe0524200, 0x781d0200,

- 0xe0524300, 0x781d0300,

- 0xbf8c0f70, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0x807c847c,

- 0x8078ff78, 0x00000400,

- 0xbf0a6f7c, 0xbf85ffee,

- 0xbf9c0000, 0xe0524000,

- 0x6e1d0000, 0xe0524100,

- 0x6e1d0100, 0xe0524200,

- 0x6e1d0200, 0xe0524300,

- 0x6e1d0300, 0xbf8c0f70,

- 0x80786e78, 0x80f8c078,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f846f, 0x8e76826f,

- 0xbefc006f, 0xc031003a,

- 0x00000078, 0x80f8c078,

- 0xbf8cc07f, 0x80fc907c,

- 0xbf800000, 0xbe802d00,

- 0xbe822d02, 0xbe842d04,

- 0xbe862d06, 0xbe882d08,

- 0xbe8a2d0a, 0xbe8c2d0c,

- 0xbe8e2d0e, 0xbf06807c,

- 0xbf84fff0, 0xb8f82a05,

- 0xbef60084, 0xbef600ff,

- 0x01000000, 0xc0211bfa,

- 0xc0211b3a, 0x00000078,

- 0x80788478, 0xc0211b7a,

- 0xc0211c3a, 0x00000078,

- 0x80788478, 0xc0211c7a,

- 0xc0211eba, 0x00000078,

- 0x80788478, 0xc0211efa,

- 0xc0211a3a, 0x00000078,

- 0x80788478, 0xc0211a7a,

- 0xc0211cfa, 0x00000078,

- 0x80788478, 0xbf8cc07f,

- 0xbefc006f, 0xbefe0070,

- 0xbeff0071, 0x866f7bff,

- 0x000003ff, 0xb96f4803,

- 0x866f7bff, 0xfffff800,

- 0x8f6f8b6f, 0xb96fa2c3,

- 0xb973f801, 0xb8ee2a05,

- 0x806e816e, 0x8e6e8a6e,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f866f, 0x806e6f6e,

- 0x806e746e, 0x826f8075,

- 0x866fff6f, 0x0000ffff,

- 0xc00b1c37, 0x00000050,

- 0xc00b1d37, 0x00000060,

- 0xc0031e77, 0x00000074,

- 0xbf8cc07f, 0x8f6e8b77,

- 0x866eff6e, 0x001f8000,

- 0xb96ef807, 0x866dff6d,

- 0x0000ffff, 0x86fe7e7e,

- 0x86ea6a6a, 0x8f6e837a,

- 0xb96ee0c2, 0xbf800002,

- 0xb97a0002, 0xbf8a0000,

- 0xbe801f6c, 0xbf9b0000,

- 0xbf820001, 0xbf8202d4,

- 0xbefc007e, 0x867aff7f,

- 0x04000000, 0xbeef0080,

- 0x876f6f7a, 0xb8f02a05,

- 0x80708170, 0x8e708a70,

- 0x8e708170, 0xb8fb1605,

- 0x807b817b, 0x8e7b847b,

- 0x8e76827b, 0xbef600ff,

- 0x01000000, 0xbef20174,

- 0x80747074, 0x82758075,

- 0xbefc0080, 0xbf800000,

- 0xbe802b00, 0xbe822b02,

- 0xbe842b04, 0xbe862b06,

- 0xbe882b08, 0xbe8a2b0a,

- 0xbe8c2b0c, 0xbe8e2b0e,

- 0xc06b003a, 0x00000000,

- 0xbf8cc07f, 0xc06b013a,

- 0x00000010, 0xbf8cc07f,

- 0xc06b023a, 0x00000020,

- 0xbf8cc07f, 0xc06b033a,

- 0x00000030, 0xbf8cc07f,

- 0x8074c074, 0x82758075,

- 0x807c907c, 0xbf0a7b7c,

- 0xbf85ffe7, 0xbef40172,

- 0xbef00080, 0xbefe00c1,

- 0xbeff00c1, 0xbee80080,

- 0xbee90080, 0xbef600ff,

- 0x01000000, 0x867aff78,

- 0x00400000, 0xbf850003,

- 0xb8faf803, 0x897a7aff,

- 0x10000000, 0xbf85004d,

- 0xbe840080, 0xd2890000,

- 0x00000900, 0x80048104,

- 0xd2890001, 0x00000900,

- 0x80048104, 0xd2890002,

- 0x00000900, 0x80048104,

- 0xd2890003, 0x00000900,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000901,

- 0x80048104, 0xd2890001,

- 0x00000901, 0x80048104,

- 0xd2890002, 0x00000901,

- 0x80048104, 0xd2890003,

- 0x00000901, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0xbe840080, 0xd2890000,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x80048104, 0xd2890002,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000903,

- 0x80048104, 0xd2890001,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x80048104, 0xd2890003,

- 0x00000903, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0xbf820008, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0xbefe00c1,

- 0xbeff00c1, 0xb8fb4306,

- 0x867bc17b, 0xbf840064,

- 0xbf8a0000, 0x867aff6f,

- 0x04000000, 0xbf840060,

- 0x8e7b867b, 0x8e7b827b,

- 0xbef6007b, 0xb8f02a05,

- 0x80708170, 0x8e708a70,

- 0x8e708170, 0xb8fa1605,

- 0x807a817a, 0x8e7a867a,

- 0x80707a70, 0x8070ff70,

- 0x00000080, 0xbef600ff,

- 0x01000000, 0xbefc0080,

- 0xd28c0002, 0x000100c1,

- 0xd28d0003, 0x000204c1,

- 0xbf850030, 0x24040682,

- 0xd86e4000, 0x00000002,

- 0xbf8cc07f, 0xbe840080,

- 0xbf84ffee, 0x680404ff,

- 0x00000200, 0xd0c9006a,

- 0x0000f702, 0xbf87ffd2,

- 0xbf820015, 0xd1060002,

- 0x00011103, 0x7e0602ff,

- 0x00000200, 0xbefc00ff,

- 0x00010000, 0xbe800077,

- 0x8677ff77, 0xff7fffff,

- 0x8777ff77, 0x00058000,

- 0xd8ec0000, 0x00000002,

- 0xbf8cc07f, 0xe0765000,

- 0x701d0002, 0x68040702,

- 0xd0c9006a, 0x0000f702,

- 0xbf87fff7, 0xbef70000,

- 0xbef000ff, 0x00000400,

- 0xb8fb2a05, 0x807b817b,

- 0x8e7b827b, 0xbef600ff,

- 0x01000000, 0xbefc0084,

- 0xbf0a7b7c, 0xbf84006d,

- 0xbf11017c, 0x807bff7b,

- 0x00001000, 0x867aff78,

- 0x10000000, 0xbf850051,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0xd2890000, 0x00000903,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x00000903, 0x80048104,

- 0x807c847c, 0xbf0a7b7c,

- 0xbf85ffb1, 0xbf9c0000,

- 0xbf820012, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0x807c847c,

- 0x8070ff70, 0x00000400,

- 0xbf0a7b7c, 0xbf85ffef,

- 0xbf9c0000, 0xbefc0080,

- 0xbf11017c, 0x867aff78,

- 0x00400000, 0xbf850003,

- 0xb8faf803, 0x897a7aff,

- 0x10000000, 0xbf850059,

- 0xd3d84000, 0x18000100,

- 0xd3d84001, 0x18000101,

- 0xd3d84002, 0x18000102,

- 0xd3d84003, 0x18000103,

- 0x00000900, 0x80048104,

- 0xd2890001, 0x00000900,

- 0x00000900, 0x80048104,

- 0xd2890003, 0x00000900,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000901,

- 0x00000901, 0x80048104,

- 0xd2890002, 0x00000901,

- 0x00000901, 0x80048104,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0xd2890000, 0x00000903,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x00000903, 0x80048104,

- 0x807c847c, 0xbf0a7b7c,

- 0xbf85ffa9, 0xbf9c0000,

- 0xbf820016, 0xd3d84000,

- 0x18000100, 0xd3d84001,

- 0x18000101, 0xd3d84002,

- 0x18000102, 0xd3d84003,

- 0x18000103, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0x807c847c,

- 0x8070ff70, 0x00000400,

- 0xbf0a7b7c, 0xbf85ffeb,

- 0xbf9c0000, 0xbf8200e3,

- 0xbef4007e, 0x8675ff7f,

- 0x0000ffff, 0x8775ff75,

- 0x00040000, 0xbef60080,

- 0xbef700ff, 0x00807fac,

- 0x866eff7f, 0x04000000,

- 0xbf84001f, 0xbefe00c1,

- 0xbeff00c1, 0xb8ef4306,

- 0x866fc16f, 0xbf84001a,

- 0x8e6f866f, 0x8e6f826f,

- 0xbef6006f, 0xb8f82a05,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0x8078ff78,

- 0x00000080, 0xbef600ff,

- 0x01000000, 0xbefc0080,

- 0xe0510000, 0x781d0000,

- 0xe0510100, 0x781d0000,

- 0x807cff7c, 0x00000200,

- 0x8078ff78, 0x00000200,

- 0xbf0a6f7c, 0xbf85fff6,

- 0xb8ef2a05, 0x806f816f,

- 0x8e6f826f, 0x806fff6f,

- 0x00008000, 0xbef80080,

- 0xbeee0078, 0x8078ff78,

- 0x00000400, 0xbefc0084,

- 0xbf11087c, 0xe0524000,

- 0x781d0000, 0xe0524100,

- 0x781d0100, 0xe0524200,

- 0x781d0200, 0xe0524300,

- 0x781d0300, 0xbf8c0f70,

- 0x7e000300, 0x7e020301,

- 0x7e040302, 0x7e060303,

- 0x807c847c, 0x8078ff78,

- 0x00000400, 0xbf0a6f7c,

- 0xbf85ffee, 0xbefc0080,

- 0xbf11087c, 0xe0524000,

- 0x781d0000, 0xe0524100,

- 0x781d0100, 0xe0524200,

- 0x781d0200, 0xe0524300,

- 0x781d0300, 0xbf8c0f70,

- 0xd3d94000, 0x18000100,

- 0xd3d94001, 0x18000101,

- 0xd3d94002, 0x18000102,

- 0xd3d94003, 0x18000103,

- 0x807c847c, 0x8078ff78,

- 0x00000400, 0xbf0a6f7c,

- 0xbf85ffea, 0xbf9c0000,

- 0xe0524000, 0x6e1d0000,

- 0xe0524100, 0x6e1d0100,

- 0xe0524200, 0x6e1d0200,

- 0xe0524300, 0x6e1d0300,

- 0xbf8c0f70, 0xb8f82a05,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0x80f8c078,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f846f, 0x8e76826f,

- 0xbef600ff, 0x01000000,

- 0xbefc006f, 0xc031003a,

- 0x00000078, 0x80f8c078,

- 0xbf8cc07f, 0x80fc907c,

- 0xbf800000, 0xbe802d00,

- 0xbe822d02, 0xbe842d04,

- 0xbe862d06, 0xbe882d08,

- 0xbe8a2d0a, 0xbe8c2d0c,

- 0xbe8e2d0e, 0xbf06807c,

- 0xbf84fff0, 0xb8f82a05,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0xbef60084,

- 0xbef600ff, 0x01000000,

- 0xc0211bfa, 0x00000078,

- 0x80788478, 0xc0211b3a,

- 0xc0211b7a, 0x00000078,

- 0x80788478, 0xc0211c3a,

- 0xc0211c7a, 0x00000078,

- 0x80788478, 0xc0211eba,

- 0xc0211efa, 0x00000078,

- 0x80788478, 0xc0211a3a,

- 0xc0211a7a, 0x00000078,

- 0x80788478, 0xc0211cfa,

- 0xbf8cc07f, 0xbefc006f,

- 0xbefe0070, 0xbeff0071,

- 0x866f7bff, 0x000003ff,

- 0xb96f4803, 0x866f7bff,

- 0xfffff800, 0x8f6f8b6f,

- 0xb96fa2c3, 0xb973f801,

- 0xb8ee2a05, 0x806e816e,

- 0x8e6e8a6e, 0x8e6e816e,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f866f, 0x806e6f6e,

- 0x806e746e, 0x826f8075,

- 0x866fff6f, 0x0000ffff,

- 0xc00b1c37, 0x00000050,

- 0xc00b1d37, 0x00000060,

- 0xc0031e77, 0x00000074,

- 0xbf8cc07f, 0x8f6e8b77,

- 0x866eff6e, 0x001f8000,

- 0xb96ef807, 0x866dff6d,

- 0x0000ffff, 0x86fe7e7e,

- 0x86ea6a6a, 0x8f6e837a,

- 0xb96ee0c2, 0xbf800002,

- 0xb97a0002, 0xbf8a0000,

- 0xbe801f6c, 0xbf9b0000,

- 0xbf820001, 0xbf8202df,

- 0xbefc007e, 0x867aff7f,

- 0x04000000, 0xbeef0080,

- 0x876f6f7a, 0xb8f02985,

- 0x80708170, 0x8e708a70,

- 0x8e708170, 0xb8fb1605,

- 0x807b817b, 0x8e7b847b,

- 0x8e76827b, 0xbef600ff,

- 0x01000000, 0xbef20174,

- 0x80747074, 0x82758075,

- 0xbefc0080, 0xbf800000,

- 0xbe802b00, 0xbe822b02,

- 0xbe842b04, 0xbe862b06,

- 0xbe882b08, 0xbe8a2b0a,

- 0xbe8c2b0c, 0xbe8e2b0e,

- 0xc06b003a, 0x00000000,

- 0xbf8cc07f, 0xc06b013a,

- 0x00000010, 0xbf8cc07f,

- 0xc06b023a, 0x00000020,

- 0xbf8cc07f, 0xc06b033a,

- 0x00000030, 0xbf8cc07f,

- 0x8074c074, 0x82758075,

- 0x807c907c, 0xbf0a7b7c,

- 0xbf85ffe7, 0xbef40172,

- 0xbef00080, 0xbefe00c1,

- 0xbeff00c1, 0xbee80080,

- 0xbee90080, 0xbef600ff,

- 0x01000000, 0x867aff78,

- 0x00400000, 0xbf850003,

- 0xb8faf803, 0x897a7aff,

- 0x10000000, 0xbf85004d,

- 0xbe840080, 0xd2890000,

- 0x00000900, 0x80048104,

- 0xd2890001, 0x00000900,

- 0x80048104, 0xd2890002,

- 0x00000900, 0x80048104,

- 0xd2890003, 0x00000900,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000901,

- 0x80048104, 0xd2890001,

- 0x00000901, 0x80048104,

- 0xd2890002, 0x00000901,

- 0x80048104, 0xd2890003,

- 0x00000901, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0xbe840080, 0xd2890000,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x80048104, 0xd2890002,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000903,

- 0x80048104, 0xd2890001,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x80048104, 0xd2890003,

- 0x00000903, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0xbf820008, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0xbefe00c1,

- 0xbeff00c1, 0xb8fb4306,

- 0x867bc17b, 0xbf840064,

- 0xbf8a0000, 0x867aff6f,

- 0x04000000, 0xbf840060,

- 0x8e7b867b, 0x8e7b827b,

- 0xbef6007b, 0xb8f02985,

- 0x80708170, 0x8e708a70,

- 0x8e708170, 0xb8fa1605,

- 0x807a817a, 0x8e7a867a,

- 0x80707a70, 0x8070ff70,

- 0x00000080, 0xbef600ff,

- 0x01000000, 0xbefc0080,

- 0xd28c0002, 0x000100c1,

- 0xd28d0003, 0x000204c1,

- 0xbf850030, 0x24040682,

- 0xd86e4000, 0x00000002,

- 0xbf8cc07f, 0xbe840080,

- 0xbf84ffee, 0x680404ff,

- 0x00000200, 0xd0c9006a,

- 0x0000f702, 0xbf87ffd2,

- 0xbf820015, 0xd1060002,

- 0x00011103, 0x7e0602ff,

- 0x00000200, 0xbefc00ff,

- 0x00010000, 0xbe800077,

- 0x8677ff77, 0xff7fffff,

- 0x8777ff77, 0x00058000,

- 0xd8ec0000, 0x00000002,

- 0xbf8cc07f, 0xe0765000,

- 0x701d0002, 0x68040702,

- 0xd0c9006a, 0x0000f702,

- 0xbf87fff7, 0xbef70000,

- 0xbef000ff, 0x00000400,

- 0xb8fb2b05, 0x807b817b,

- 0x8e7b827b, 0xbef600ff,

- 0x01000000, 0xbefc0084,

- 0xbf0a7b7c, 0xbf84006d,

- 0xbf11017c, 0x807bff7b,

- 0x00001000, 0x867aff78,

- 0x10000000, 0xbf850051,

- 0xbe840080, 0xd2890000,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x80048104, 0xd2890002,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000903,

- 0x80048104, 0xd2890001,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x80048104, 0xd2890003,

- 0x00000903, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0x807c847c, 0xbf0a7b7c,

- 0xbf85ffb1, 0xbf9c0000,

- 0xbf820012, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0x807c847c,

- 0x8070ff70, 0x00000400,

- 0xbf0a7b7c, 0xbf85ffef,

- 0xbf9c0000, 0xb8fb2985,

- 0x807b817b, 0x8e7b837b,

- 0xb8fa2b05, 0x807a817a,

- 0x8e7a827a, 0x80fb7a7b,

- 0x867b7b7b, 0xbf84007a,

- 0xbefc0080, 0xbf11017c,

- 0xbf850059, 0xd3d84000,

- 0x18000100, 0xd3d84001,

- 0x18000101, 0xd3d84002,

- 0x18000102, 0xd3d84003,

- 0x18000103, 0xbe840080,

- 0xbf0a7b7c, 0xbf85ffa9,

- 0xbf9c0000, 0xbf820016,

- 0xd3d84000, 0x18000100,

- 0xd3d84001, 0x18000101,

- 0xd3d84002, 0x18000102,

- 0xd3d84003, 0x18000103,

- 0xbf85ffeb, 0xbf9c0000,

- 0xbf8200ee, 0xbef4007e,

- 0x8675ff7f, 0x0000ffff,

- 0x8775ff75, 0x00040000,

- 0xbef60080, 0xbef700ff,

- 0x00807fac, 0x866eff7f,

- 0x04000000, 0xbf84001f,

- 0xb8ef4306, 0x866fc16f,

- 0xbf84001a, 0x8e6f866f,

- 0x8e6f826f, 0xbef6006f,

- 0xb8f82985, 0x80788178,

- 0x8e788a78, 0x8e788178,

- 0xb8ee1605, 0x806e816e,

- 0x8e6e866e, 0x80786e78,

- 0x8078ff78, 0x00000080,

- 0xbefc0080, 0xe0510000,

- 0x781d0000, 0xe0510100,

- 0x781d0000, 0x807cff7c,

- 0x00000200, 0x8078ff78,

- 0x00000200, 0xbf0a6f7c,

- 0xbf85fff6, 0xbefe00c1,

- 0xbeff00c1, 0xbef600ff,

- 0x01000000, 0xb8ef2b05,

- 0x806f816f, 0x8e6f826f,

- 0x806fff6f, 0x00008000,

- 0xbef80080, 0xbeee0078,

- 0x8078ff78, 0x00000400,

- 0xbefc0084, 0xbf11087c,

- 0xe0524000, 0x781d0000,

- 0xe0524100, 0x781d0100,

- 0xe0524200, 0x781d0200,

- 0xe0524300, 0x781d0300,

- 0xbf8c0f70, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0x807c847c,

- 0x8078ff78, 0x00000400,

- 0xbf0a6f7c, 0xbf85ffee,

- 0xb8ef2985, 0x806f816f,

- 0x8e6f836f, 0xb8f92b05,

- 0x80798179, 0x8e798279,

- 0x80ef796f, 0x866f6f6f,

- 0xbf84001a, 0x806fff6f,

- 0x00008000, 0xbefc0080,

- 0xd3d94000, 0x18000100,

- 0xd3d94001, 0x18000101,

- 0xd3d94002, 0x18000102,

- 0xd3d94003, 0x18000103,

- 0xbf85ffea, 0xbf9c0000,

- 0xe0524000, 0x6e1d0000,

- 0xe0524100, 0x6e1d0100,

- 0xe0524200, 0x6e1d0200,

- 0xe0524300, 0x6e1d0300,

- 0xbf8c0f70, 0xb8f82985,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0x80f8c078,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f846f, 0x8e76826f,

- 0xbef600ff, 0x01000000,

- 0xbefc006f, 0xc031003a,

- 0x00000078, 0x80f8c078,

- 0xbf8cc07f, 0x80fc907c,

- 0xbf800000, 0xbe802d00,

- 0xbe822d02, 0xbe842d04,

- 0xbe862d06, 0xbe882d08,

- 0xbe8a2d0a, 0xbe8c2d0c,

- 0xbe8e2d0e, 0xbf06807c,

- 0xbf84fff0, 0xb8f82985,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0xbef60084,

- 0xbef600ff, 0x01000000,

- 0xc0211bfa, 0x00000078,

- 0x80788478, 0xc0211b3a,

- 0xc0211b7a, 0x00000078,

- 0x80788478, 0xc0211c3a,

- 0xc0211c7a, 0x00000078,

- 0x80788478, 0xc0211eba,

- 0xc0211efa, 0x00000078,

- 0x80788478, 0xc0211a3a,

- 0xc0211a7a, 0x00000078,

- 0x80788478, 0xc0211cfa,

- 0xbf8cc07f, 0xbefc006f,

- 0xbefe0070, 0xbeff0071,

- 0x866f7bff, 0x000003ff,

- 0xb96f4803, 0x866f7bff,

- 0xfffff800, 0x8f6f8b6f,

- 0xb96fa2c3, 0xb973f801,

- 0xb8ee2985, 0x806e816e,

- 0x8e6e8a6e, 0x8e6e816e,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f866f, 0x806e6f6e,

- 0x806e746e, 0x826f8075,

- 0x866fff6f, 0x0000ffff,

- 0xc00b1c37, 0x00000050,

- 0xc00b1d37, 0x00000060,

- 0xc0031e77, 0x00000074,

- 0xbf8cc07f, 0x8f6e8b77,

- 0x866eff6e, 0x001f8000,

- 0xb96ef807, 0x866dff6d,

- 0x0000ffff, 0x86fe7e7e,

- 0x86ea6a6a, 0x8f6e837a,

- 0xb96ee0c2, 0xbf800002,

- 0xb97a0002, 0xbf8a0000,

- 0xbe801f6c, 0xbf9b0000,

- 0xbf820001, 0xbf8202db,

- 0xbefc007e, 0x867aff7f,

- 0x04000000, 0xbeef0080,

- 0x876f6f7a, 0xb8f02985,

- 0x80708170, 0x8e708a70,

- 0x8e708170, 0xb8fb1605,

- 0x807b817b, 0x8e7b847b,

- 0x8e76827b, 0xbef600ff,

- 0x01000000, 0xbef20174,

- 0x80747074, 0x82758075,

- 0xbefc0080, 0xbf800000,

- 0xbe802b00, 0xbe822b02,

- 0xbe842b04, 0xbe862b06,

- 0xbe882b08, 0xbe8a2b0a,

- 0xbe8c2b0c, 0xbe8e2b0e,

- 0xc06b003a, 0x00000000,

- 0xbf8cc07f, 0xc06b013a,

- 0x00000010, 0xbf8cc07f,

- 0xc06b023a, 0x00000020,

- 0xbf8cc07f, 0xc06b033a,

- 0x00000030, 0xbf8cc07f,

- 0x8074c074, 0x82758075,

- 0x807c907c, 0xbf0a7b7c,

- 0xbf85ffe7, 0xbef40172,

- 0xbef00080, 0xbefe00c1,

- 0xbeff00c1, 0xbee80080,

- 0xbee90080, 0xbef600ff,

- 0x01000000, 0x867aff78,

- 0x00400000, 0xbf850003,

- 0xb8faf803, 0x897a7aff,

- 0x10000000, 0xbf85004d,

- 0xbe840080, 0xd2890000,

- 0x00000900, 0x80048104,

- 0xd2890001, 0x00000900,

- 0x80048104, 0xd2890002,

- 0x00000900, 0x80048104,

- 0xd2890003, 0x00000900,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000901,

- 0x80048104, 0xd2890001,

- 0x00000901, 0x80048104,

- 0xd2890002, 0x00000901,

- 0x80048104, 0xd2890003,

- 0x00000901, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0xbe840080, 0xd2890000,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x80048104, 0xd2890002,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000903,

- 0x80048104, 0xd2890001,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x80048104, 0xd2890003,

- 0x00000903, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0xbf820008, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0xbefe00c1,

- 0xbeff00c1, 0xb8fb4306,

- 0x867bc17b, 0xbf840064,

- 0xbf8a0000, 0x867aff6f,

- 0x04000000, 0xbf840060,

- 0x8e7b867b, 0x8e7b827b,

- 0xbef6007b, 0xb8f02985,

- 0x80708170, 0x8e708a70,

- 0x8e708170, 0xb8fa1605,

- 0x807a817a, 0x8e7a867a,

- 0x80707a70, 0x8070ff70,

- 0x00000080, 0xbef600ff,

- 0x01000000, 0xbefc0080,

- 0xd28c0002, 0x000100c1,

- 0xd28d0003, 0x000204c1,

- 0xbf850030, 0x24040682,

- 0xd86e4000, 0x00000002,

- 0xbf8cc07f, 0xbe840080,

- 0xbf84ffee, 0x680404ff,

- 0x00000200, 0xd0c9006a,

- 0x0000f702, 0xbf87ffd2,

- 0xbf820015, 0xd1060002,

- 0x00011103, 0x7e0602ff,

- 0x00000200, 0xbefc00ff,

- 0x00010000, 0xbe800077,

- 0x8677ff77, 0xff7fffff,

- 0x8777ff77, 0x00058000,

- 0xd8ec0000, 0x00000002,

- 0xbf8cc07f, 0xe0765000,

- 0x701d0002, 0x68040702,

- 0xd0c9006a, 0x0000f702,

- 0xbf87fff7, 0xbef70000,

- 0xbef000ff, 0x00000400,

- 0xb8fb2b05, 0x807b817b,

- 0x8e7b827b, 0xbef600ff,

- 0x01000000, 0xbefc0084,

- 0xbf0a7b7c, 0xbf84006d,

- 0xbf11017c, 0x807bff7b,

- 0x00001000, 0x867aff78,

- 0x10000000, 0xbf850051,

- 0xbe840080, 0xd2890000,

- 0x00000902, 0x80048104,

- 0xd2890001, 0x00000902,

- 0x80048104, 0xd2890002,

- 0x00000902, 0x80048104,

- 0xd2890003, 0x00000902,

- 0x80048104, 0xc069003a,

- 0x00000070, 0xbf8cc07f,

- 0x80709070, 0xbf06c004,

- 0xbf84ffee, 0xbe840080,

- 0xd2890000, 0x00000903,

- 0x80048104, 0xd2890001,

- 0x00000903, 0x80048104,

- 0xd2890002, 0x00000903,

- 0x80048104, 0xd2890003,

- 0x00000903, 0x80048104,

- 0xc069003a, 0x00000070,

- 0xbf8cc07f, 0x80709070,

- 0xbf06c004, 0xbf84ffee,

- 0x807c847c, 0xbf0a7b7c,

- 0xbf85ffb1, 0xbf9c0000,

- 0xbf820012, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0xe0724000,

- 0x701d0000, 0xe0724100,

- 0x701d0100, 0xe0724200,

- 0x701d0200, 0xe0724300,

- 0x701d0300, 0x807c847c,

- 0x8070ff70, 0x00000400,

- 0xbf0a7b7c, 0xbf85ffef,

- 0xbf9c0000, 0xb8fb2985,

- 0x807b817b, 0x8e7b837b,

- 0xb8fa2b05, 0x807a817a,

- 0x8e7a827a, 0x80fb7a7b,

- 0x867b7b7b, 0xbf84007a,

- 0xbefc0080, 0xbf11017c,

- 0xbf850059, 0xd3d84000,

- 0x18000100, 0xd3d84001,

- 0x18000101, 0xd3d84002,

- 0x18000102, 0xd3d84003,

- 0x18000103, 0xbe840080,

- 0xbf0a7b7c, 0xbf85ffa9,

- 0xbf9c0000, 0xbf820016,

- 0xd3d84000, 0x18000100,

- 0xd3d84001, 0x18000101,

- 0xd3d84002, 0x18000102,

- 0xd3d84003, 0x18000103,

- 0xbf85ffeb, 0xbf9c0000,

- 0xbf8200ee, 0xbef4007e,

- 0x8675ff7f, 0x0000ffff,

- 0x8775ff75, 0x00040000,

- 0xbef60080, 0xbef700ff,

- 0x00807fac, 0x866eff7f,

- 0x04000000, 0xbf84001f,

- 0xb8ef4306, 0x866fc16f,

- 0xbf84001a, 0x8e6f866f,

- 0x8e6f826f, 0xbef6006f,

- 0xb8f82985, 0x80788178,

- 0x8e788a78, 0x8e788178,

- 0xb8ee1605, 0x806e816e,

- 0x8e6e866e, 0x80786e78,

- 0x8078ff78, 0x00000080,

- 0xbefc0080, 0xe0510000,

- 0x781d0000, 0xe0510100,

- 0x781d0000, 0x807cff7c,

- 0x00000200, 0x8078ff78,

- 0x00000200, 0xbf0a6f7c,

- 0xbf85fff6, 0xbefe00c1,

- 0xbeff00c1, 0xbef600ff,

- 0x01000000, 0xb8ef2b05,

- 0x806f816f, 0x8e6f826f,

- 0x806fff6f, 0x00008000,

- 0xbef80080, 0xbeee0078,

- 0x8078ff78, 0x00000400,

- 0xbefc0084, 0xbf11087c,

- 0xe0524000, 0x781d0000,

- 0xe0524100, 0x781d0100,

- 0xe0524200, 0x781d0200,

- 0xe0524300, 0x781d0300,

- 0xbf8c0f70, 0x7e000300,

- 0x7e020301, 0x7e040302,

- 0x7e060303, 0x807c847c,

- 0x8078ff78, 0x00000400,

- 0xbf0a6f7c, 0xbf85ffee,

- 0xb8ef2985, 0x806f816f,

- 0x8e6f836f, 0xb8f92b05,

- 0x80798179, 0x8e798279,

- 0x80ef796f, 0x866f6f6f,

- 0xbf84001a, 0x806fff6f,

- 0x00008000, 0xbefc0080,

- 0xd3d94000, 0x18000100,

- 0xd3d94001, 0x18000101,

- 0xd3d94002, 0x18000102,

- 0xd3d94003, 0x18000103,

- 0xbf85ffea, 0xbf9c0000,

- 0xe0524000, 0x6e1d0000,

- 0xe0524100, 0x6e1d0100,

- 0xe0524200, 0x6e1d0200,

- 0xe0524300, 0x6e1d0300,

- 0xbf8c0f70, 0xb8f82985,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0x80f8c078,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f846f, 0x8e76826f,

- 0xbef600ff, 0x01000000,

- 0xbefc006f, 0xc031003a,

- 0x00000078, 0x80f8c078,

- 0xbf8cc07f, 0x80fc907c,

- 0xbf800000, 0xbe802d00,

- 0xbe822d02, 0xbe842d04,

- 0xbe862d06, 0xbe882d08,

- 0xbe8a2d0a, 0xbe8c2d0c,

- 0xbe8e2d0e, 0xbf06807c,

- 0xbf84fff0, 0xb8f82985,

- 0x80788178, 0x8e788a78,

- 0x8e788178, 0xb8ee1605,

- 0x806e816e, 0x8e6e866e,

- 0x80786e78, 0xbef60084,

- 0xbef600ff, 0x01000000,

- 0xc0211bfa, 0x00000078,

- 0x80788478, 0xc0211b3a,

- 0xc0211b7a, 0x00000078,

- 0x80788478, 0xc0211c3a,

- 0xc0211c7a, 0x00000078,

- 0x80788478, 0xc0211eba,

- 0xc0211efa, 0x00000078,

- 0x80788478, 0xc0211a3a,

- 0xc0211a7a, 0x00000078,

- 0x80788478, 0xc0211cfa,

- 0xbf8cc07f, 0xbefc006f,

- 0xbefe0070, 0xbeff0071,

- 0x866f7bff, 0x000003ff,

- 0xb96f4803, 0x866f7bff,

- 0xfffff800, 0x8f6f8b6f,

- 0xb96fa2c3, 0xb973f801,

- 0xb8ee2985, 0x806e816e,

- 0x8e6e8a6e, 0x8e6e816e,

- 0xb8ef1605, 0x806f816f,

- 0x8e6f866f, 0x806e6f6e,

- 0x806e746e, 0x826f8075,

- 0x866fff6f, 0x0000ffff,

- 0xc00b1c37, 0x00000050,

- 0xc00b1d37, 0x00000060,

- 0xc0031e77, 0x00000074,

- 0xbf8cc07f, 0x8f6e8b79,

- 0x866eff6e, 0x001f8000,

- 0xb96ef807, 0x866dff6d,

- 0x0000ffff, 0x86fe7e7e,

- 0x86ea6a6a, 0x8f6e837a,

- 0xb96ee0c2, 0xbf800002,

- 0xb97a0002, 0xbf8a0000,

- 0xbe801f6c, 0xbf9b0000,

diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
index 44772eec9ef4..96fbb16ceb21 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm

- * cpp -DASIC_FAMILY=CHIP_GFX12 cwsr_trap_handler_gfx10.asm -P -o gfx12.sp3

- * sp3 gfx12.sp3 -hex gfx12.hex

-#define CHIP_GFX12 37

-#define SW_SA_TRAP (ASIC_FAMILY >= CHIP_PLUM_BONITO && ASIC_FAMILY < CHIP_GFX12)

#define SAVE_AFTER_XNACK_ERROR (HAVE_XNACK && !NO_SQC_STORE) // workaround for TCP store failure after XNACK error when ALLOW_REPLAY=0, for debugger

#define SINGLE_STEP_MISSED_WORKAROUND 1 //workaround for lost MODE.DEBUG_EN exception when SAVECTX raised

-#if ASIC_FAMILY < CHIP_GFX12

-#define S_COHERENCE scope:SCOPE_SYS

-#define V_COHERENCE scope:SCOPE_SYS

-#define S_WAITCNT_0 s_wait_idle

-#define HW_REG_SHADER_FLAT_SCRATCH_LO HW_REG_WAVE_SCRATCH_BASE_LO

-#define HW_REG_SHADER_FLAT_SCRATCH_HI HW_REG_WAVE_SCRATCH_BASE_HI

-#define HW_REG_GPR_ALLOC HW_REG_WAVE_GPR_ALLOC

-#define HW_REG_LDS_ALLOC HW_REG_WAVE_LDS_ALLOC

-#define HW_REG_MODE HW_REG_WAVE_MODE

-#if ASIC_FAMILY < CHIP_GFX12

-var SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK = 0x4

-var SQ_WAVE_STATE_PRIV_SCC_SHIFT = 9

-var SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK = 0xC00

-var SQ_WAVE_STATE_PRIV_HALT_MASK = 0x4000

-var SQ_WAVE_STATE_PRIV_POISON_ERR_MASK = 0x8000

-var SQ_WAVE_STATE_PRIV_POISON_ERR_SHIFT = 15

-var SQ_WAVE_STATUS_WAVE64_SHIFT = 29

-var SQ_WAVE_STATUS_WAVE64_SIZE = 1

-var SQ_WAVE_LDS_ALLOC_GRANULARITY = 9

-var S_STATUS_HWREG = HW_REG_WAVE_STATE_PRIV

-var S_STATUS_ALWAYS_CLEAR_MASK = SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK|SQ_WAVE_STATE_PRIV_POISON_ERR_MASK

-var S_STATUS_HALT_MASK = SQ_WAVE_STATE_PRIV_HALT_MASK

-var S_SAVE_PC_HI_TRAP_ID_MASK = 0xF0000000

-#if ASIC_FAMILY < CHIP_GFX12

-var SQ_WAVE_EXCP_FLAG_PRIV_ADDR_WATCH_MASK = 0xF

-var SQ_WAVE_EXCP_FLAG_PRIV_MEM_VIOL_MASK = 0x10

-var SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT = 5

-var SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_MASK = 0x20

-var SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_MASK = 0x40

-var SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT = 6

-var SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_MASK = 0x80

-var SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT = 7

-var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_MASK = 0x100

-var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_SHIFT = 8

-var SQ_WAVE_EXCP_FLAG_PRIV_WAVE_END_MASK = 0x200

-var SQ_WAVE_EXCP_FLAG_PRIV_TRAP_AFTER_INST_MASK = 0x800

-var SQ_WAVE_TRAP_CTRL_ADDR_WATCH_MASK = 0x80

-var SQ_WAVE_TRAP_CTRL_TRAP_AFTER_INST_MASK = 0x200

-var S_TRAPSTS_HWREG = HW_REG_WAVE_EXCP_FLAG_PRIV

-var S_TRAPSTS_SAVE_CONTEXT_MASK = SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_MASK

-var S_TRAPSTS_SAVE_CONTEXT_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT

-var S_TRAPSTS_NON_MASKABLE_EXCP_MASK = SQ_WAVE_EXCP_FLAG_PRIV_MEM_VIOL_MASK |\

- SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_MASK |\

- SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_MASK |\

- SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_MASK |\

- SQ_WAVE_EXCP_FLAG_PRIV_WAVE_END_MASK |\

- SQ_WAVE_EXCP_FLAG_PRIV_TRAP_AFTER_INST_MASK

-var S_TRAPSTS_RESTORE_PART_1_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT

-var S_TRAPSTS_RESTORE_PART_2_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT

-var S_TRAPSTS_RESTORE_PART_2_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT - SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT

-var S_TRAPSTS_RESTORE_PART_3_SHIFT = SQ_WAVE_EXCP_FLAG_PRIV_WAVE_START_SHIFT

-var S_TRAPSTS_RESTORE_PART_3_SIZE = 32 - S_TRAPSTS_RESTORE_PART_3_SHIFT

-var BARRIER_STATE_SIGNAL_OFFSET = 16

-var BARRIER_STATE_VALID_OFFSET = 0

-#if ASIC_FAMILY < CHIP_GFX12

- s_and_b32 ttmp2, s_save_trapsts, SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_MASK

-#if ASIC_FAMILY < CHIP_GFX12

- s_getreg_b32 ttmp2, hwreg(HW_REG_WAVE_EXCP_FLAG_USER)

- s_and_b32 ttmp3, s_save_trapsts, SQ_WAVE_EXCP_FLAG_PRIV_ADDR_WATCH_MASK

- s_cbranch_scc0 L_NOT_ADDR_WATCH

- s_or_b32 ttmp2, ttmp2, SQ_WAVE_TRAP_CTRL_ADDR_WATCH_MASK

- s_getreg_b32 ttmp3, hwreg(HW_REG_WAVE_TRAP_CTRL)

- s_and_b32 ttmp2, ttmp3, ttmp2

- s_cbranch_scc1 L_FETCH_2ND_TRAP

-#if ASIC_FAMILY < CHIP_GFX12

- // WAVE_TRAP_CTRL is already in ttmp3.

- s_and_b32 ttmp3, ttmp3, SQ_WAVE_TRAP_CTRL_TRAP_AFTER_INST_MASK

-#if ASIC_FAMILY < CHIP_GFX12

- s_getreg_b32 ttmp2, hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV)

- s_and_b32 ttmp2, ttmp2, SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_MASK

-#if ASIC_FAMILY < CHIP_GFX12

- // STATE_PRIV.BARRIER_COMPLETE may have changed since we read it.

- // Only restore fields which the trap handler changes.

- s_lshr_b32 s_save_status, s_save_status, SQ_WAVE_STATE_PRIV_SCC_SHIFT

- s_setreg_b32 hwreg(S_STATUS_HWREG, SQ_WAVE_STATE_PRIV_SCC_SHIFT, \

- SQ_WAVE_STATE_PRIV_POISON_ERR_SHIFT - SQ_WAVE_STATE_PRIV_SCC_SHIFT + 1), s_save_status

-#if ASIC_FAMILY >= CHIP_GFX12

- s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_STATUS)

- s_bitcmp1_b32 s_save_tmp, SQ_WAVE_STATUS_NO_VGPRS_SHIFT

- s_cbranch_scc0 L_HAVE_VGPRS

-#if ASIC_FAMILY >= CHIP_GFX12

- // Ensure no further changes to barrier or LDS state.

- // STATE_PRIV.BARRIER_COMPLETE may change up to this point.

- s_barrier_signal -2

- // Re-read final state of BARRIER_COMPLETE field for save.

- s_getreg_b32 s_save_tmp, hwreg(S_STATUS_HWREG)

- s_and_b32 s_save_tmp, s_save_tmp, SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK

- s_andn2_b32 s_save_status, s_save_status, SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK

- s_or_b32 s_save_status, s_save_status, s_save_tmp

-#if ASIC_FAMILY >= CHIP_GFX12

- s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_EXCP_FLAG_USER)

- write_hwreg_to_mem(s_save_m0, s_save_buf_rsrc0, s_save_mem_offset)

- s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_TRAP_CTRL)

- write_hwreg_to_mem(s_save_m0, s_save_buf_rsrc0, s_save_mem_offset)

- s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_STATUS)

- write_hwreg_to_mem(s_save_tmp, s_save_buf_rsrc0, s_save_mem_offset)

- s_get_barrier_state s_save_tmp, -1

- write_hwreg_to_mem(s_save_tmp, s_save_buf_rsrc0, s_save_mem_offset)

-#if ASIC_FAMILY < CHIP_GFX12

-#if ASIC_FAMILY >= CHIP_GFX12

- // Save s_restore_spi_init_hi for later use.

- s_mov_b32 s_restore_spi_init_hi_save, s_restore_spi_init_hi

-#if ASIC_FAMILY < CHIP_GFX12

s_barrier //barrier to ensure the readiness of LDS before access attemps from any other wave in the same TG

-#if ASIC_FAMILY >= CHIP_GFX12

- // Restore s_restore_spi_init_hi before the saved value gets clobbered.

- s_mov_b32 s_restore_spi_init_hi, s_restore_spi_init_hi_save

-#if ASIC_FAMILY >= CHIP_GFX12

- read_hwreg_from_mem(s_restore_tmp, s_restore_buf_rsrc0, s_restore_mem_offset)

- s_setreg_b32 hwreg(HW_REG_WAVE_EXCP_FLAG_USER), s_restore_tmp

- read_hwreg_from_mem(s_restore_tmp, s_restore_buf_rsrc0, s_restore_mem_offset)

- s_setreg_b32 hwreg(HW_REG_WAVE_TRAP_CTRL), s_restore_tmp

- // Only the first wave needs to restore the workgroup barrier.

- s_and_b32 s_restore_tmp, s_restore_spi_init_hi, S_RESTORE_SPI_INIT_FIRST_WAVE_MASK

- s_cbranch_scc0 L_SKIP_BARRIER_RESTORE

- // Skip over WAVE_STATUS, since there is no state to restore from it

- s_add_u32 s_restore_mem_offset, s_restore_mem_offset, 4

- read_hwreg_from_mem(s_restore_tmp, s_restore_buf_rsrc0, s_restore_mem_offset)

- s_bitcmp1_b32 s_restore_tmp, BARRIER_STATE_VALID_OFFSET

- s_cbranch_scc0 L_SKIP_BARRIER_RESTORE

- // extract the saved signal count from s_restore_tmp

- s_lshr_b32 s_restore_tmp, s_restore_tmp, BARRIER_STATE_SIGNAL_OFFSET

- // We need to call s_barrier_signal repeatedly to restore the signal

- // count of the work group barrier. The member count is already

- // initialized with the number of waves in the work group.

-L_BARRIER_RESTORE_LOOP:

- s_and_b32 s_restore_tmp, s_restore_tmp, s_restore_tmp

- s_cbranch_scc0 L_SKIP_BARRIER_RESTORE

- s_barrier_signal -1

- s_add_i32 s_restore_tmp, s_restore_tmp, -1

- s_branch L_BARRIER_RESTORE_LOOP

-L_SKIP_BARRIER_RESTORE:

s_setreg_b32 hwreg(S_STATUS_HWREG), s_restore_status // SCC is included, which is changed by previous salu

-#if ASIC_FAMILY >= CHIP_GFX12

- // Make barrier and LDS state visible to all waves in the group.

- // STATE_PRIV.BARRIER_COMPLETE may change after this point.

- s_barrier_signal -2

-#if ASIC_FAMILY < CHIP_GFX12

- s_getreg_b32 s_reg, hwreg(HW_REG_WAVE_STATUS,SQ_WAVE_STATUS_WAVE64_SHIFT,SQ_WAVE_STATUS_WAVE64_SIZE)

diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm
new file mode 100644
index 000000000000..1740e98c6719
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm

+#define SINGLE_STEP_MISSED_WORKAROUND 1 //workaround for lost TRAP_AFTER_INST exception when SAVECTX raised

+var SQ_WAVE_STATE_PRIV_ALWAYS_CLEAR_MASK = SQ_WAVE_STATE_PRIV_SYS_PRIO_MASK|SQ_WAVE_STATE_PRIV_POISON_ERR_MASK

+var SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SIZE = SQ_WAVE_EXCP_FLAG_PRIV_HOST_TRAP_SHIFT - SQ_WAVE_EXCP_FLAG_PRIV_ILLEGAL_INST_SHIFT

+ s_setreg_b32 hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV, SQ_WAVE_EXCP_FLAG_PRIV_SAVE_CONTEXT_SHIFT, 1), s_save_tmp //clear saveCtx bit

+ s_mov_b32 s_save_buf_rsrc2, 0 //NUM_RECORDS initial value = 0 (in bytes) although not neccessarily inited

+ s_getreg_b32 s_save_alloc_size, hwreg(HW_REG_WAVE_LDS_ALLOC,SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT,SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE)

+ s_getreg_b32 s_save_alloc_size, hwreg(HW_REG_WAVE_GPR_ALLOC,SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT,SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE)

+ s_lshl_b32 s_save_alloc_size, s_save_alloc_size, 2 //Number of VGPRs = (vgpr_size + 1) * 4 (non-zero value)

+ s_getreg_b32 s_save_alloc_size, hwreg(HW_REG_WAVE_LDS_ALLOC,SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SHIFT,SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SIZE)

+ s_lshl_b32 s_save_alloc_size, s_save_alloc_size, 3 //Number of SHARED_VGPRs = shared_vgpr_size * 8 (non-zero value)

+ //m0 now has the value of normal vgpr count, just add the m0 with shared_vgpr count to get the total count.

+ s_getreg_b32 s_restore_alloc_size, hwreg(HW_REG_WAVE_LDS_ALLOC,SQ_WAVE_LDS_ALLOC_LDS_SIZE_SHIFT,SQ_WAVE_LDS_ALLOC_LDS_SIZE_SIZE)

+ s_getreg_b32 s_restore_alloc_size, hwreg(HW_REG_WAVE_GPR_ALLOC,SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT,SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE)

+ s_lshl_b32 s_restore_alloc_size, s_restore_alloc_size, 2 //Number of VGPRs = (vgpr_size + 1) * 4 (non-zero value)

+ s_mov_b32 s_restore_mem_offset_save, s_restore_mem_offset // restore start with v1, v0 will be the last

+ s_mov_b32 s_restore_mem_offset_save, s_restore_mem_offset // restore start with v4, v0 will be the last

+ s_getreg_b32 s_restore_alloc_size, hwreg(HW_REG_WAVE_LDS_ALLOC,SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SHIFT,SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SIZE) //shared_vgpr_size

+ s_lshl_b32 s_restore_alloc_size, s_restore_alloc_size, 3 //Number of SHARED_VGPRs = shared_vgpr_size * 8 (non-zero value)

+ //m0 now has the value of normal vgpr count, just add the m0 with shared_vgpr count to get the total count.

+ s_setreg_b32 hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV, 0, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_1_SIZE), s_restore_excp_flag_priv

+ s_lshr_b32 s_restore_excp_flag_priv, s_restore_excp_flag_priv, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SHIFT

+ s_setreg_b32 hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SHIFT, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SIZE), s_restore_excp_flag_priv

+ s_lshr_b32 s_restore_excp_flag_priv, s_restore_excp_flag_priv, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT - SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_2_SHIFT

+ s_setreg_b32 hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SHIFT, SQ_WAVE_EXCP_FLAG_PRIV_RESTORE_PART_3_SIZE), s_restore_excp_flag_priv

+ s_load_dwordx4 [ttmp4, ttmp5, ttmp6, ttmp7], [s_restore_ttmps_lo, s_restore_ttmps_hi], 0x50 scope:SCOPE_SYS

+ s_load_dwordx4 [ttmp8, ttmp9, ttmp10, ttmp11], [s_restore_ttmps_lo, s_restore_ttmps_hi], 0x60 scope:SCOPE_SYS

+ s_and_b32 s_restore_pc_hi, s_restore_pc_hi, 0x0000ffff //pc[47:32] //Do it here in order not to affect STATUS

+ s_setreg_b32 hwreg(HW_REG_WAVE_STATE_PRIV), s_restore_state_priv // SCC is included, which is changed by previous salu

+ s_getreg_b32 s_vgpr_size_byte, hwreg(HW_REG_WAVE_GPR_ALLOC,SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SHIFT,SQ_WAVE_GPR_ALLOC_VGPR_SIZE_SIZE)

+ s_lshl_b32 s_vgpr_size_byte, s_vgpr_size_byte, (2+7) //Number of VGPRs = (vgpr_size + 1) * 4 * 32 * 4 (non-zero value)

+ s_lshl_b32 s_vgpr_size_byte, s_vgpr_size_byte, (2+8) //Number of VGPRs = (vgpr_size + 1) * 4 * 64 * 4 (non-zero value)

+ s_getreg_b32 s_svgpr_size_byte, hwreg(HW_REG_WAVE_LDS_ALLOC,SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SHIFT,SQ_WAVE_LDS_ALLOC_VGPR_SHARED_SIZE_SIZE)

diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm
index bb26338204f4..6869e07a2fff 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm

var ACK_SQC_STORE = 1 //workaround for suspected SQC store bug causing incorrect stores under concurrency

var SAVE_AFTER_XNACK_ERROR = 1 //workaround for TCP store failure after XNACK error when ALLOW_REPLAY=0, for debugger

var SINGLE_STEP_MISSED_WORKAROUND = (ASIC_FAMILY <= CHIP_ALDEBARAN) //workaround for lost MODE.DEBUG_EN exception when SAVECTX raised

var SQ_WAVE_GPR_ALLOC_SGPR_SIZE_SIZE = 3 //FIXME sq.blk still has 4 bits at this time while SQ programming guide has 3 bits

- buffer_store_dwordx2 v[0:1], v2, s_save_buf_rsrc0, s_save_mem_offset offen:1 glc:1 slc:1

- s_add_u32 m0, m0, 256*2 // 128 DW

- s_add_u32 s_restore_mem_offset, s_restore_mem_offset, 256*2 //mem offset increased by 128DW

+ s_add_u32 s_restore_mem_offset, s_restore_mem_offset, LDS_RESTORE_GRANULARITY_BYTES //mem offset increased by 128/320 DW

- buffer_store_dword v0, v0, s_rsrc, s_mem_offset slc:1 glc:1

- buffer_store_dword v1, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256

- buffer_store_dword v2, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*2

- buffer_store_dword v3, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*3

- buffer_load_dword v0, v0, s_rsrc, s_mem_offset slc:1 glc:1

- buffer_load_dword v1, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256

- buffer_load_dword v2, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*2

- buffer_load_dword v3, v0, s_rsrc, s_mem_offset slc:1 glc:1 offset:256*3

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 9044bdb38cf4..065d87841459 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

- err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, &queue_id,

- WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + PAGE_ALIGN(size));

- WRITE_ONCE(pdd->vram_usage, pdd->vram_usage - size);

- WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + bo_bucket->size);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 48caecf7e72e..693469c18c60 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c

- pcache_info[i].cache_line_size = 0;

@@ -1685,10 +1704,17 @@ int kfd_get_gpu_cache_info(struct kfd_node *kdev, struct kfd_gpu_cache_info **pc

- kfd_fill_gpu_cache_info_from_gfx_config(kdev->kfd, *pcache_info);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
index 312dfa84f29f..a8abc3091801 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
index 924d0fd85dfb..27aa1a5b120f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index fad1c8f2bc83..a29374c86405 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c

- BUILD_BUG_ON(sizeof(cwsr_trap_gfx12_hex) > PAGE_SIZE);

- /* For GFX9.4.3, we need special handling for VMIDs depending on

- * If the VMID range changes for GFX9.4.3, then this code MUST be

- * For GFX9.4.3, the KFD abstracts all partitions within a socket as

- * xGMI connected in the topology so assign a unique hive id per

- * device based on the pci device location if device is in PCIe mode.

- if (!kfd->hive_id &&

- (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 3) ||

- KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 4)) &&

- kfd->num_nodes > 1)

- if ((KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 3) ||

- KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 4)) &&

- partition_mode == AMDGPU_CPX_PARTITION_MODE &&

- /* For GFX9.4.3 and CPX mode, first XCD gets VMID range

- * 4-9 and second XCD gets VMID range 10-15.

- if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 3) ||

- KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 4))

-static inline void kfd_queue_work(struct workqueue_struct *wq,

- struct work_struct *work)

- cpu = new_cpu = smp_processor_id();

- new_cpu = cpumask_next(new_cpu, cpu_online_mask) % nr_cpu_ids;

- if (cpu_to_node(new_cpu) == numa_node_id())

- } while (cpu != new_cpu);

- queue_work_on(new_cpu, wq, work);

- kfd_queue_work(node->ih_wq, &node->interrupt_work);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 648f40091aa3..d4593374e7a1 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

-static int remove_all_queues_mes(struct device_queue_manager *dqm)

- ret = remove_all_queues_mes(dqm);

- remove_all_queues_mes(dqm);

- uint64_t *fence_addr = dqm->fence_addr;

- while (halt_if_hws_hang)

-static void copy_context_work_handler (struct work_struct *work)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
index 210bcc048f4c..67137e674f1d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c

- KFD_GC_VERSION(dqm->dev->kfd) == IP_VERSION(9, 4, 4))

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
index ea3792249209..d075f24e5f9f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
index d46a13156ee9..0cb5c582ce7d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c b/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c
index 9b6b6e882593..783c2f5a04e4 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_interrupt.c

-#define KFD_IH_NUM_ENTRIES 8192

- node->ih_wq = alloc_workqueue("KFD IH", WQ_HIGHPRI, 1);

- if (unlikely(!node->ih_wq)) {

- kfifo_free(&node->ih_fifo);

- dev_err(node->adev->dev, "Failed to allocate KFD IH workqueue\n");

- * flush_work ensures that there are no outstanding

- * work-queue items that will access interrupt_ring. New work items

- * can't be created because we stopped interrupt handling above.

- flush_workqueue(node->ih_wq);

- destroy_workqueue(node->ih_wq);

- count = kfifo_in(&node->ih_fifo, ih_ring_entry,

- node->kfd->device_info.ih_ring_entry_size);

- if (count != node->kfd->device_info.ih_ring_entry_size) {

- dev_dbg_ratelimited(node->adev->dev,

- "Interrupt ring overflow, dropping interrupt %d\n",

-static bool dequeue_ih_ring_entry(struct kfd_node *node, void *ih_ring_entry)

- count = kfifo_out(&node->ih_fifo, ih_ring_entry,

- node->kfd->device_info.ih_ring_entry_size);

- WARN_ON(count && count != node->kfd->device_info.ih_ring_entry_size);

- struct kfd_node *dev = container_of(work, struct kfd_node,

- uint32_t ih_ring_entry[KFD_MAX_RING_ENTRY_SIZE];

- if (dev->kfd->device_info.ih_ring_entry_size > sizeof(ih_ring_entry)) {

- dev_err_once(dev->adev->dev, "Ring entry too small\n");

- while (dequeue_ih_ring_entry(dev, ih_ring_entry)) {

- queue_work(dev->ih_wq, &dev->interrupt_work);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index 4843dcb9a5f7..2b0a830f5b29 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c

- memset(kq->wptr_kernel, 0, sizeof(*kq->wptr_kernel));

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index 8ee3d07ffbdf..d05d199b5e44 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c

- uint64_t npages = migrate->cpages;

- for (i = j = 0; i < npages; i++) {

- dst[i] = cursor.start + (j << PAGE_SHIFT);

- migrate->dst[i] = svm_migrate_addr_to_pfn(adev, dst[i]);

- svm_migrate_get_vram_page(prange, migrate->dst[i]);

- migrate->dst[i] = migrate_pfn(migrate->dst[i]);

- kfd_smi_event_migration_end(node, p->lead_thread->pid,

- start >> PAGE_SHIFT, end >> PAGE_SHIFT,

- 0, node->id, trigger);

- dst[i] = dma_map_page(dev, dpage, 0, PAGE_SIZE, DMA_FROM_DEVICE);

- kfd_smi_event_migration_end(node, p->lead_thread->pid,

- start >> PAGE_SHIFT, end >> PAGE_SHIFT,

- node->id, 0, trigger);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
index 84e8ea3a8a0c..ff417d5361c4 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

- KFD_GC_VERSION(mm->dev) != IP_VERSION(9, 4, 4)) {

- KFD_GC_VERSION(mm->dev) != IP_VERSION(9, 4, 4))

- KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 4)) {

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
index 37930629edc5..4984b41cd372 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c

- bool *over_subscription)

- *over_subscription = false;

- if ((process_count > max_proc_per_quantum) ||

- compute_queue_count > get_cp_queues_num(pm->dqm) ||

- gws_queue_count > 1) {

- *over_subscription = true;

- bool *is_over_subscription)

- bool is_over_subscription;

- "Runlist is getting oversubscribed. Expect reduced ROCm performance.\n");

- pm->is_over_subscription = is_over_subscription;

- KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 4))

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index d6530febabad..d8cd913aa772 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h

-#include <linux/kfd_ioctl.h>

- (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 4)))

- struct workqueue_struct *ih_wq;

- uint64_t vram_usage;

- KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 4))

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index d07acf1b2f93..083f83c94531 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c

- struct kfd_cu_occupancy cu_occupancy[AMDGPU_MAX_QUEUES];

- memset(cu_occupancy, 0x0, sizeof(cu_occupancy));

- return snprintf(buffer, PAGE_SIZE, "%llu\n", READ_ONCE(pdd->vram_usage));

- INIT_WORK(&sdma_activity_work_handler.sdma_activity_work,

- kfd_sdma_activity_worker);

- /* A prior open of /dev/kfd could have already created the process. */

- process = find_process(thread, false);

- if (!IS_ERR(process))

- kref_get(&process->ref);

- if (pdd->dev->kfd->shared_resources.enable_mes)

- dma_fence_signal(ef);

- int idx = srcu_read_lock(&kfd_processes_srcu);

- struct kfd_process *p = find_process_by_mm(mm);

- srcu_read_unlock(&kfd_processes_srcu, idx);

- pdd->vram_usage = 0;

- if (dev->kfd->shared_resources.enable_mes) {

- retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev,

- AMDGPU_MES_PROC_CTX_SIZE,

- &pdd->proc_ctx_bo,

- &pdd->proc_ctx_gpu_addr,

- &pdd->proc_ctx_cpu_ptr,

- dev_err(dev->adev->dev,

- "failed to allocate process context bo\n");

- goto err_free_pdd;

- memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);

- RCU_INIT_POINTER(p->ef, ef);

- * For GFX 9.4.3, send the NodeId also in IH cookie DW[3]

- KFD_GC_VERSION(pdd->dev->kfd) == IP_VERSION(9, 4, 4)) {

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
index 01b960b15274..bcddd989c7f3 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

- if (dev->kfd->shared_resources.enable_mes &&

- if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) &&

- KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 4) &&

- struct kfd_process_device *pdd;

- pdd = kfd_get_process_device_data(pqn->q->device, pqm->process);

- kfd_queue_unref_bo_vas(pdd, &pqn->q->properties);

- kfd_queue_release_buffers(pdd, &pqn->q->properties);

- struct file *f, unsigned int qid)

- * On GFX 9.4.3, increase the number of queues that

- * can be created to 255. No HWS limit on GFX 9.4.3.

- KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 4))

- retval = init_user_queue(pqm, dev, &q, properties, f, *qid);

- ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, q_data, mqd, ctl_stack,

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_queue.c
index ad29634f8b44..ecccd7adbab4 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_queue.c

- gfxv == 90008) /* GFX_VERSION_ARCTURUS */

-#define WG_CONTEXT_DATA_SIZE_PER_CU(gfxv) \

- LDS_SIZE_PER_CU + HWREG_SIZE_PER_CU)

- wg_data_size = ALIGN(cu_num * WG_CONTEXT_DATA_SIZE_PER_CU(gfxv), PAGE_SIZE);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
index de8b9abf7afc..9b8169761ec5 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c

-#define MAX_KFIFO_SIZE 1024

- size = min_t(size_t, size, MAX_KFIFO_SIZE);

- uint32_t from, uint32_t to, uint32_t trigger)

- from, to, trigger));

- ret = kfifo_alloc(&client->fifo, MAX_KFIFO_SIZE, GFP_KERNEL);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h
index 85010b8307f8..503bff13d815 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h

- uint32_t from, uint32_t to, uint32_t trigger);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 04e746923697..bd3e20d981e0 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c

- switch (amdgpu_ip_version(node->adev, GC_HWIP, 0)) {

- mtype_local = node->adev->rev_id ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_UC;

- /* PCIe P2P or extended system scope coherence */

- mapping_flags |= AMDGPU_VM_MTYPE_UC;

- if (KFD_GC_VERSION(node) >= IP_VERSION(12, 0, 0))

- goto out_unlock_range;

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index 3871591c9aec..ceb9fb475ef1 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c

- KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 4))

- struct kfd_cache_properties *props_ext;

diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig
index df17e79c45c7..abd3b6564373 100644
--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig

- depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64

- select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && !(CC_IS_CLANG && (ARM64 || RISCV))

+ select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && !(CC_IS_CLANG && (ARM64 || LOONGARCH || RISCV))

- calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64)

- architectures built with Clang (all released versions), whereby the stack

- frame gets blown up to well over 5k. This would cause an immediate kernel

- panic on most architectures. We'll revert this when the following bug report

- has been resolved: https://github.com/llvm/llvm-project/issues/41896.

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 60c617fcc97e..ac3fd81fecef 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

-static int dm_wait_for_idle(void *handle)

-static bool dm_check_soft_reset(void *handle)

-static int dm_soft_reset(void *handle)

-static int dm_set_clockgating_state(void *handle,

-static int dm_set_powergating_state(void *handle,

-static int dm_early_init(void *handle);

@@ -1762,16 +1809,20 @@ static struct dml2_soc_bb *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *

- /* No need to free bb here since it shall be done in dm_sw_fini() */

- init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU);

- adev->dm.secure_display_ctxs = amdgpu_dm_crtc_secure_display_create_contexts(adev);

- if (!adev->dm.secure_display_ctxs)

-static int amdgpu_dm_early_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- if (adev->dm.secure_display_ctxs) {

- if (adev->dm.secure_display_ctxs[i].crtc) {

- flush_work(&adev->dm.secure_display_ctxs[i].notify_ta_work);

- flush_work(&adev->dm.secure_display_ctxs[i].forward_roi_work);

- kfree(adev->dm.secure_display_ctxs);

- adev->dm.secure_display_ctxs = NULL;

- r = amdgpu_ucode_request(adev, &adev->dm.fw_dmcu, "%s", fw_name_dmcu);

-static int dm_sw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dm_sw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- adev->dm.bb_from_dmub = NULL;

-static int dm_late_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: The base driver device containing the amdgpu_dm device.

-static int dm_hw_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- * @handle: The base driver device containing the amdgpu_dm device.

-static int dm_hw_fini(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

-static int dm_suspend(void *handle)

- struct amdgpu_device *adev = handle;

- if (adev->dm.dc->caps.ips_support)

- dc_allow_idle_optimizations(adev->dm.dc, true);

-static int dm_resume(void *handle)

- struct amdgpu_device *adev = handle;

- bool need_hotplug = false;

- ret = drm_dp_mst_topology_mgr_resume(&aconnector->mst_mgr, true);

- dm_helpers_dp_mst_stop_top_mgr(aconnector->dc_link->ctx,

- aconnector->dc_link);

- need_hotplug = true;

- drm_kms_helper_hotplug_event(ddev);

- .dump_ip_state = NULL,

- .print_ip_state = NULL,

- aconnector->edid);

- aconnector->edid = NULL;

- drm_dp_cec_unset_edid(

- &aconnector->dm_dp_aux.aux);

- aconnector->edid =

- (struct edid *)sink->dc_edid.raw_edid;

- drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,

- aconnector->edid);

- drm_connector_update_edid_property(connector, aconnector->edid);

- amdgpu_dm_update_freesync_caps(connector, aconnector->edid);

- drm_connector_update_edid_property(connector, NULL);

- aconnector->edid = NULL;

- rc = dc_link_set_backlight_level(link, brightness, 0);

- r = amdgpu_ucode_request(adev, &adev->dm.dmub_fw, "%s", fw_name_dmub);

-static int dm_early_init(void *handle)

- struct amdgpu_device *adev = (struct amdgpu_device *)handle;

- bool force_disable_dcc)

- tmz_surface, force_disable_dcc);

- bool force_disable_dcc = false;

- force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend;

- force_disable_dcc);

- aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;

- struct edid *edid;

- struct i2c_adapter *ddc;

- if (dc_link && dc_link->aux_mode)

- ddc = &aconnector->dm_dp_aux.aux.ddc;

- ddc = &aconnector->i2c->base;

- * Note: drm_get_edid gets edid in the following order:

- * 1) override EDID if set via edid_override debugfs,

- * 2) firmware EDID if set via edid_firmware module parameter

- * 3) regular DDC read.

- edid = drm_get_edid(connector, ddc);

- aconnector->edid = edid;

- memmove(dc_em_sink->dc_edid.raw_edid, edid, (edid->extensions + 1) * EDID_LENGTH);

- struct dc_link *dc_link = aconnector->dc_link;

- struct edid *edid;

- struct i2c_adapter *ddc;

- if (dc_link->aux_mode)

- ddc = &aconnector->dm_dp_aux.aux.ddc;

- ddc = &aconnector->i2c->base;

- * Note: drm_get_edid gets edid in the following order:

- * 1) override EDID if set via edid_override debugfs,

- * 2) firmware EDID if set via edid_firmware module parameter

- * 3) regular DDC read.

- edid = drm_get_edid(connector, ddc);

- if (drm_detect_hdmi_monitor(edid))

- aconnector->edid = edid;

- DRM_DEBUG_KMS("Mode %dx%d (clk %d) failed DC validation with error %d (%s)\n",

- } while (stream == NULL && requested_bpc >= 6);

- if (dc_result == DC_FAIL_ENC_VALIDATE && !aconnector->force_yuv420_output) {

- DRM_DEBUG_KMS("Retry forcing YCbCr420 encoding\n");

- struct edid *edid)

- drm_add_edid_modes(connector, edid);

- * drm_add_edid_modes() and need to be

- amdgpu_dm_update_freesync_caps(connector, edid);

- struct edid *edid)

- if (!(amdgpu_freesync_vid_mode && edid))

- struct edid *edid = amdgpu_dm_connector->edid;

- if (!drm_edid_is_valid(edid)) {

- amdgpu_dm_connector_ddc_get_modes(connector, edid);

- amdgpu_dm_connector_add_freesync_modes(connector, edid);

- * We have no guarantee that the frontend index maps to the same

- * backend index - some even map to more than one.

- * TODO: Use a different interrupt or check DC itself for the mapping.

- amdgpu_display_crtc_idx_to_irq_type(

- DC_PSR_VERSION_UNSUPPORTED) {

- &adev->pageflip_irq,

-#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)

- &adev->vline0_irq,

-#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)

- &adev->vline0_irq,

- &adev->pageflip_irq,

- afb->tmz_surface, false);

- acrtc_attach->dm_irq_params.allow_psr_entry &&

- amdgpu_dm_psr_disable(acrtc_state->stream);

- if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&

- acrtc_state->stream->link->psr_settings.psr_allow_active)

- amdgpu_dm_psr_disable(acrtc_state->stream);

- if (acrtc_state->update_type > UPDATE_TYPE_FAST) {

- if (acrtc_state->stream->link->replay_settings.config.replay_supported &&

- !acrtc_state->stream->link->replay_settings.replay_feature_enabled) {

- struct amdgpu_dm_connector *aconn =

- (struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;

- amdgpu_dm_link_setup_replay(acrtc_state->stream->link, aconn);

- } else if (acrtc_state->stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED &&

- !acrtc_state->stream->link->psr_settings.psr_feature_enabled) {

- struct amdgpu_dm_connector *aconn = (struct amdgpu_dm_connector *)

- acrtc_state->stream->dm_stream_context;

- if (!aconn->disallow_edp_enter_psr)

- amdgpu_dm_link_setup_psr(acrtc_state->stream);

- /* Decrement skip count when PSR is enabled and we're doing fast updates. */

- if (acrtc_state->update_type == UPDATE_TYPE_FAST &&

- acrtc_state->stream->link->psr_settings.psr_feature_enabled) {

- struct amdgpu_dm_connector *aconn =

- (struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;

- if (aconn->psr_skip_count > 0)

- aconn->psr_skip_count--;

- /* Allow PSR when skip count is 0. */

- acrtc_attach->dm_irq_params.allow_psr_entry = !aconn->psr_skip_count;

- * If sink supports PSR SU, there is no need to rely on

- * a vblank event disable request to enable PSR. PSR SU

- * can be enabled immediately once OS demonstrates an

- * adequate number of fast atomic commits to notify KMD

- * of update events. See `vblank_control_worker()`.

- if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&

- acrtc_attach->dm_irq_params.allow_psr_entry &&

-#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY

- !amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&

- !acrtc_state->stream->link->psr_settings.psr_allow_active &&

- !aconn->disallow_edp_enter_psr &&

- acrtc_state->stream->link->psr_settings.psr_dirty_rects_change_timestamp_ns) >

- amdgpu_dm_psr_enable(acrtc_state->stream);

- acrtc_attach->dm_irq_params.allow_psr_entry = false;

- if (dm->active_vblank_irq_count == 0)

- acrtc->dm_irq_params.window_param.update_win = true;

- * It takes 2 frames for HW to stably generate CRC when

- * resuming from suspend, so we set skip_frame_cnt 2.

- acrtc->dm_irq_params.window_param.skip_frame_cnt = 2;

- *out_plane_scale_w = plane_state->crtc_w * 1000 / plane_src_w;

- *out_plane_scale_h = plane_state->crtc_h * 1000 / plane_src_h;

- if (old_plane_state->fb && new_plane_state->fb &&

- get_mem_type(old_plane_state->fb) !=

- get_mem_type(new_plane_state->fb))

- lock_and_validation_needed = true;

- * the FB pitch, the DCC state, rotation, etc.

- if (new_crtc_state->async_flip && lock_and_validation_needed) {

- struct edid *edid)

- struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info)

- while (j < EDID_LENGTH) {

unsigned int ieeeId = (amd_vsdb->ieee_id[2] << 16) | (amd_vsdb->ieee_id[1] << 8) | (amd_vsdb->ieee_id[0]);

- struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info)

- * @edid: EDID from monitor

- struct edid *edid)

- struct detailed_timing *timing;

- struct detailed_non_pixel *data;

- struct detailed_data_monitor_range *range;

- if (!edid || !sink) {

- connector->display_info.monitor_range.min_vfreq = 0;

- connector->display_info.monitor_range.max_vfreq = 0;

- bool edid_check_required = false;

- if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) {

- amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq;

- amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq;

- if (amdgpu_dm_connector->max_vfreq -

- amdgpu_dm_connector->min_vfreq > 10)

- freesync_capable = true;

- edid_check_required = edid->version > 1 ||

- (edid->version == 1 &&

- edid->revision > 1);

- if (edid_check_required) {

- for (i = 0; i < 4; i++) {

- timing = &edid->detailed_timings[i];

- data = &timing->data.other_data;

- range = &data->data.range;

- * Check if monitor has continuous frequency mode

- if (data->type != EDID_DETAIL_MONITOR_RANGE)

- * Check for flag range limits only. If flag == 1 then

- * no additional timing information provided.

- * Default GTF, GTF Secondary curve and CVT are not

- if (range->flags != 1)

- connector->display_info.monitor_range.min_vfreq = range->min_vfreq;

- connector->display_info.monitor_range.max_vfreq = range->max_vfreq;

- if (edid->revision >= 4) {

- if (data->pad2 & DRM_EDID_RANGE_OFFSET_MIN_VFREQ)

- connector->display_info.monitor_range.min_vfreq += 255;

- if (data->pad2 & DRM_EDID_RANGE_OFFSET_MAX_VFREQ)

- connector->display_info.monitor_range.max_vfreq += 255;

- amdgpu_dm_connector->min_vfreq =

- connector->display_info.monitor_range.min_vfreq;

- amdgpu_dm_connector->max_vfreq =

- connector->display_info.monitor_range.max_vfreq;

- if (amdgpu_dm_connector->max_vfreq -

- amdgpu_dm_connector->min_vfreq > 10) {

- } else if (edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) {

- timing = &edid->detailed_timings[i];

- data = &timing->data.other_data;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 15d4690c74d6..d2703ca7dff3 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

- * @secure_display_ctxs:

- * Store the ROI information and the work_struct to command dmub and psp for

- struct secure_display_context *secure_display_ctxs;

- struct edid *edid;

- int psr_skip_count;

- struct edid *edid);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
index f936a35fa9eb..033bd817d871 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

- spin_lock_irq(&drm_dev->event_lock);

- was_activated = acrtc->dm_irq_params.window_param.activated;

- acrtc->dm_irq_params.window_param.x_start = 0;

- acrtc->dm_irq_params.window_param.y_start = 0;

- acrtc->dm_irq_params.window_param.x_end = 0;

- acrtc->dm_irq_params.window_param.y_end = 0;

- acrtc->dm_irq_params.window_param.activated = false;

- acrtc->dm_irq_params.window_param.update_win = false;

- acrtc->dm_irq_params.window_param.skip_frame_cnt = 0;

- spin_unlock_irq(&drm_dev->event_lock);

- if (was_activated) {

- flush_work(&dm->secure_display_ctxs[crtc->index].notify_ta_work);

- flush_work(&dm->secure_display_ctxs[crtc->index].forward_roi_work);

- dc_stream_forward_crc_window(stream, NULL, true);

- struct secure_display_context *secure_display_ctx;

- secure_display_ctx = container_of(work, struct secure_display_context, notify_ta_work);

- crtc = secure_display_ctx->crtc;

- phy_inst = stream->link->link_enc_hw_inst;

- /* need lock for multiple crtcs to use the command buffer */

- mutex_lock(&psp->securedisplay_context.mutex);

- psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd,

- TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC);

- securedisplay_cmd->securedisplay_in_message.send_roi_crc.phy_id = phy_inst;

- ret = psp_securedisplay_invoke(psp, TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC);

- struct secure_display_context *secure_display_ctx;

- secure_display_ctx = container_of(work, struct secure_display_context, forward_roi_work);

- crtc = secure_display_ctx->crtc;

- dc_stream_forward_crc_window(stream, &secure_display_ctx->rect, false);

- ret = acrtc->dm_irq_params.window_param.activated;

- stream_state, NULL, enable, enable)) {

- * Reading the CRC requires the vblank interrupt handler to be

- * enabled. Keep a reference until CRC capture stops.

- enabled = amdgpu_dm_is_valid_crc_source(cur_crc_src);

- ret = drm_crtc_vblank_get(crtc);

- if (!dc_stream_get_crc(stream_state->ctx->dc, stream_state,

- struct secure_display_context *secure_display_ctx = NULL;

- !dm_is_crc_source_crtc(cur_crc_src))

- if (!acrtc->dm_irq_params.window_param.activated)

- if (acrtc->dm_irq_params.window_param.skip_frame_cnt) {

- acrtc->dm_irq_params.window_param.skip_frame_cnt -= 1;

- secure_display_ctx = &adev->dm.secure_display_ctxs[acrtc->crtc_id];

- if (WARN_ON(secure_display_ctx->crtc != crtc)) {

- /* We have set the crtc when creating secure_display_context,

- secure_display_ctx->crtc = crtc;

- if (acrtc->dm_irq_params.window_param.update_win) {

- /* prepare work for dmub to update ROI */

- secure_display_ctx->rect.x = acrtc->dm_irq_params.window_param.x_start;

- secure_display_ctx->rect.y = acrtc->dm_irq_params.window_param.y_start;

- secure_display_ctx->rect.width = acrtc->dm_irq_params.window_param.x_end -

- acrtc->dm_irq_params.window_param.x_start;

- secure_display_ctx->rect.height = acrtc->dm_irq_params.window_param.y_end -

- acrtc->dm_irq_params.window_param.y_start;

- schedule_work(&secure_display_ctx->forward_roi_work);

- acrtc->dm_irq_params.window_param.update_win = false;

- /* Statically skip 1 frame, because we may need to wait below things

- * before sending ROI to dmub:

- * 1. We defer the work by using system workqueue.

- * 2. We may need to wait for dc_lock before accessing dmub.

- acrtc->dm_irq_params.window_param.skip_frame_cnt = 1;

- /* prepare work for psp to read ROI/CRC and send to I2C */

- schedule_work(&secure_display_ctx->notify_ta_work);

-struct secure_display_context *

-amdgpu_dm_crtc_secure_display_create_contexts(struct amdgpu_device *adev)

- struct secure_display_context *secure_display_ctxs = NULL;

- secure_display_ctxs = kcalloc(adev->mode_info.num_crtc,

- sizeof(struct secure_display_context),

- if (!secure_display_ctxs)

- INIT_WORK(&secure_display_ctxs[i].forward_roi_work, amdgpu_dm_forward_crc_window);

- INIT_WORK(&secure_display_ctxs[i].notify_ta_work, amdgpu_dm_crtc_notify_ta_to_read);

- secure_display_ctxs[i].crtc = &adev->mode_info.crtcs[i]->base;

- return secure_display_ctxs;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h
index 748e80ef40d0..3da056c8d20b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h

-struct secure_display_context {

-struct secure_display_context *amdgpu_dm_crtc_secure_display_create_contexts(

- struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index a2cf2c066a76..36a830a7440f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c

-#define HPD_DETECTION_PERIOD_uS 5000000

-#define HPD_DETECTION_TIME_uS 1000

-bool amdgpu_dm_crtc_vrr_active(struct dm_crtc_state *dm_state)

- amdgpu_dm_psr_disable(vblank_work->stream);

- if (dm->active_vblank_irq_count > 0) {

- DRM_DEBUG_KMS("Allow idle optimizations (MALL): false\n");

- if (vblank_work->stream && vblank_work->stream->link) {

- vblank_work->acrtc->dm_irq_params.allow_psr_entry ||

- vblank_work->stream->link->replay_settings.replay_feature_enabled);

- if (dm->active_vblank_irq_count == 0) {

- DRM_DEBUG_KMS("Allow idle optimizations (MALL): true\n");

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h
index 17e948753f59..c1212947a77b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

-bool amdgpu_dm_crtc_vrr_active(struct dm_crtc_state *dm_state);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index db56b0aa5454..049046c60462 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

- struct dc_link_settings prefer_link_settings;

- struct link_training_settings link_lane_settings;

- struct link_training_settings link_training_settings;

- uint32_t tbuf_size, max_entries, num_entries, i;

- tbuf_size = fb_info->fb[DMUB_WINDOW_5_TRACEBUFF].size;

- for (i = 0; i < num_entries; ++i) {

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- char *rd_buf_ptr = NULL;

- rd_buf_ptr = rd_buf;

- snprintf(rd_buf_ptr, str_len,

- rd_buf_ptr += str_len;

- {"hdcp_sink_capability", &hdcp_sink_capability_fops}

- acrtc->dm_irq_params.window_param.x_start = (uint16_t) val;

- acrtc->dm_irq_params.window_param.update_win = false;

- *val = acrtc->dm_irq_params.window_param.x_start;

- acrtc->dm_irq_params.window_param.y_start = (uint16_t) val;

- acrtc->dm_irq_params.window_param.update_win = false;

- *val = acrtc->dm_irq_params.window_param.y_start;

- acrtc->dm_irq_params.window_param.x_end = (uint16_t) val;

- acrtc->dm_irq_params.window_param.update_win = false;

- *val = acrtc->dm_irq_params.window_param.x_end;

- acrtc->dm_irq_params.window_param.y_end = (uint16_t) val;

- acrtc->dm_irq_params.window_param.update_win = false;

- *val = acrtc->dm_irq_params.window_param.y_end;

- amdgpu_dm_psr_disable(acrtc->dm_irq_params.stream);

- acrtc->dm_irq_params.window_param.activated = true;

- acrtc->dm_irq_params.window_param.update_win = true;

- acrtc->dm_irq_params.window_param.skip_frame_cnt = 0;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 069e0195e50a..fbd80d8545a8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

- DRM_ERROR("%s: write cmd ..., err = %d\n", __func__, ret);

+bool dm_helpers_dp_write_hblank_reduction(struct dc_context *ctx, const struct dc_stream_state *stream)

- struct edid *edid;

- edid = drm_get_edid(&aconnector->base, ddc);

- if (!edid && connector->edid_corrupt) {

- struct dal_allocation *da;

- /* walk the da list in DM */

- list_for_each_entry(da, &adev->dm.da_list, list) {

- if (pvMem == da->cpu_ptr) {

- amdgpu_bo_free_kernel(&da->bo, &da->gpu_addr, &da->cpu_ptr);

- list_del(&da->list);

-} \ No newline at end of file

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
index 5c9303241aeb..6c9de834455b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h

- bool allow_psr_entry;

- struct crc_window_param window_param;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index a08e8a0b696c..07e744da7bf4 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

- kfree(aconnector->edid);

- aconnector->edid = NULL;

- aconnector->dsc_aux = NULL;

- port->passthrough_aux = NULL;

- if (!aconnector->edid) {

- struct edid *edid;

- edid = drm_dp_mst_get_edid(connector, &aconnector->mst_root->mst_mgr, aconnector->mst_output_port);

- drm_connector_update_edid_property(

- aconnector->edid = edid;

- (uint8_t *)aconnector->edid,

- (aconnector->edid->extensions + 1) * EDID_LENGTH,

- connector, aconnector->edid);

- drm_connector_update_edid_property(

- &aconnector->base, aconnector->edid);

- ret = drm_add_edid_modes(connector, aconnector->edid);

- aconnector->edid = NULL;

- aconnector->dsc_aux = NULL;

- port->passthrough_aux = NULL;

- if (drm_connector_init(

- DRM_MODE_CONNECTOR_DisplayPort)) {

- DRM_DEBUG_DRIVER("%s: MST_DSC Set up params for %d streams\n", __func__, dc_state->stream_count);

+ DRM_DEBUG_DRIVER("%s: MST_DSC Try to set up params from %d streams\n", __func__, dc_state->stream_count);

- if (!aconnector || !aconnector->dsc_aux)

-static unsigned int kbps_from_pbn(unsigned int pbn)

- unsigned int kbps = pbn;

- /*Get last DP link BW capability*/

- if (dp_get_link_current_set_bw(&aconnector->mst_output_port->aux, &end_link_bw)) {

- if (stream_kbps > end_link_bw) {

- if (bw_range.min_kbps > virtual_channel_bw_in_kbps) {

- DRM_DEBUG_DRIVER("MST_DSC dsc decode at last link."

- "Max dsc compression can't fit into MST available bw\n");

- return DC_FAIL_BANDWIDTH_VALIDATE;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 495e3cd70426..774cc3f4f3fd 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

-static void amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags(union dc_tiling_info *tiling_info,

- union dc_tiling_info *tiling_info)

- union dc_tiling_info *tiling_info,

- const union dc_tiling_info *tiling_info,

- union dc_tiling_info *tiling_info,

- struct dc_plane_address *address,

- const bool force_disable_dcc)

- if (amdgpu_dm_plane_modifier_has_dcc(modifier) && !force_disable_dcc) {

- union dc_tiling_info *tiling_info,

- struct dc_plane_address *address,

- const bool force_disable_dcc)

- if (amdgpu_dm_plane_modifier_has_dcc(modifier) && !force_disable_dcc) {

- union dc_tiling_info *tiling_info,

- bool force_disable_dcc)

- force_disable_dcc);

- bool force_disable_dcc = !plane_state->dcc.enable;

- afb->tmz_surface, force_disable_dcc);

- drm_plane_helper_add(plane, &dm_plane_helper_funcs);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
index 6498359bff6f..615d2ab2b803 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h

- union dc_tiling_info *tiling_info,

- bool force_disable_dcc);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
index f40240aafe98..45858bf1523d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c

-bool amdgpu_dm_psr_disable(struct dc_stream_state *stream)

- unsigned int power_opt = 0;

- return dc_link_set_psr_allow_active(stream->link, &psr_enable, true, false, &power_opt);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h
index cd2d45c2b5ef..e2366321a3c1 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h

-bool amdgpu_dm_psr_disable(struct dc_stream_state *stream);

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index 0d8498ab9b23..a62f6c51301c 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

- if (info->ext_disp_conn_info.path[i].caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN)

- DC_LOG_BIOS("BIOS EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN on path %d\n", i);

+ if ((info->ext_disp_conn_info.path[i].caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN)

- info->ext_disp_conn_info.path[i].caps |= EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN;

- DC_LOG_BIOS("driver forced EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN on path %d\n", i);

- static enum bp_result result = BP_RESULT_BADBIOSTABLE;

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c
index adc710fe4a45..8d2cf95ae739 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.c

-uint32_t bios_get_vga_enabled_displays(

- struct dc_bios *bios)

- return REG_READ(BIOS_SCRATCH_3) & 0XFFFF;

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h
index e1b4a40a353d..ab162f2fe577 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser_helper.h

-uint32_t bios_get_vga_enabled_displays(struct dc_bios *bios);

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile b/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile
index ab1132bc896a..d9955c5d2e5e 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile

-CLK_MGR_DCN35 = dcn35_smu.o dcn35_clk_mgr.o

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index 0e243f4344d0..4c3e58c730b1 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

- dcn35_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
index 7920f6f1aa62..76c612ecfe3c 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c

-#include "dcn/dcn_2_0_3_offset.h"

-#include "dcn/dcn_2_0_3_sh_mask.h"

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
index e93df3d6222e..bc123f1884da 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

-#include "yellow_carp_offset.h"

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
index 29eff386505a..91d872d6d392 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

-#define DC_LOGGER \

- clk_mgr->base.base.ctx->logger

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c
new file mode 100644
index 000000000000..6a6ae618650b
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index b46a3afe48ca..1648226586e2 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

-/* TODO: remove this include once we ported over remaining clk mgr functions*/

-#include "dcn30/dcn30_clk_mgr.h"

-#define regCLK1_CLK_PLL_REQ 0x0237

-#define regCLK1_CLK_PLL_REQ_BASE_IDX 0

-#define CLK1_CLK_PLL_REQ__FbMult_int__SHIFT 0x0

-#define CLK1_CLK_PLL_REQ__PllSpineDiv__SHIFT 0xc

-#define CLK1_CLK_PLL_REQ__FbMult_frac__SHIFT 0x10

-#define CLK1_CLK_PLL_REQ__FbMult_int_MASK 0x000001FFL

-#define CLK1_CLK_PLL_REQ__PllSpineDiv_MASK 0x0000F000L

-#define CLK1_CLK_PLL_REQ__FbMult_frac_MASK 0xFFFF0000L

-#define regCLK1_CLK2_BYPASS_CNTL 0x029c

-#define regCLK1_CLK2_BYPASS_CNTL_BASE_IDX 0

-#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL__SHIFT 0x0

-#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_DIV__SHIFT 0x10

-#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_SEL_MASK 0x00000007L

-#define CLK1_CLK2_BYPASS_CNTL__CLK2_BYPASS_DIV_MASK 0x000F0000L

-#define regCLK5_0_CLK5_spll_field_8 0x464b

-#define regCLK5_0_CLK5_spll_field_8_BASE_IDX 0

-#define CLK5_0_CLK5_spll_field_8__spll_ssc_en__SHIFT 0xd

-#define CLK5_0_CLK5_spll_field_8__spll_ssc_en_MASK 0x00002000L

-#define SMU_VER_THRESHOLD 0x5D4A00 //93.74.0

-#define REG(reg_name) \

- (ctx->clk_reg_offsets[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)

- if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) ||

- !pipe->stream->link_enc) && !stream_changed_otg_dig_on) {

- uint8_t lowest_dpia_index = 0, hr_index = 0;

- dcn35_smu_set_dtbclk(clk_mgr, true);

- clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en;

- clk_mgr_base->clks.ref_dtbclk_khz = new_clocks->ref_dtbclk_khz;

- struct dc_context *ctx = clk_mgr->base.ctx;

- REG_GET(CLK5_0_CLK5_spll_field_8, spll_ssc_en, &ssc_enable);

- return ssc_enable == 1;

- struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr);

- if (clk_mgr_int->smu_ver >= SMU_VER_THRESHOLD)

- clk_mgr->clks.dtbclk_en = true; // request DTBCLK disable on first commit

- struct dc_context *ctx = clk_mgr->base.ctx;

- uint32_t clock_source;

- REG_GET(CLK1_CLK2_BYPASS_CNTL, CLK2_BYPASS_SEL, &clock_source);

if (dcn35_is_spll_ssc_enabled(&clk_mgr->base) && (clock_source < ARRAY_SIZE(ss_info_table.ss_percentage))) {

- bool ips_supported = true;

- ips_supported = dcn35_smu_get_ips_supported(clk_mgr) ? true : false;

- return ips_supported;

- dcn35_get_dpm_table_from_smu(&clk_mgr->base, &smu_dpm_clks);

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h
index 1203dc605b12..a12a9bf90806 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h
index 3fae13c73934..ab9d21ba0c43 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h

-// Throttler Status Bitmask

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dalsmc.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dalsmc.h
index dbfdd3487da5..2e0d34fd7512 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dalsmc.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dalsmc.h

-#define DALSMC_Message_Count 0x1B

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
index 8cfc5f435937..8082bb877611 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

static void dcn401_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0,

-static void dcn401_update_clocks_legacy(struct clk_mgr *clk_mgr_base,

- struct dc_state *context,

- bool safe_to_lower)

- struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);

- struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;

- struct dc *dc = clk_mgr_base->ctx->dc;

- int display_count;

- bool update_dppclk = false;

- bool update_dispclk = false;

- bool enter_display_off = false;

- bool dpp_clock_lowered = false;

- struct dmcu *dmcu = clk_mgr_base->ctx->dc->res_pool->dmcu;

- bool force_reset = false;

- bool update_uclk = false, update_fclk = false;

- bool p_state_change_support;

- bool fclk_p_state_change_support;

- int total_plane_count;

- if (dc->work_arounds.skip_clock_update)

- if (clk_mgr_base->clks.dispclk_khz == 0 ||

- (dc->debug.force_clock_mode & 0x1)) {

- /* This is from resume or boot up, if forced_clock cfg option used,

- * we bypass program dispclk and DPPCLK, but need set them for S3.

- force_reset = true;

- dcn2_read_clocks_from_hw_dentist(clk_mgr_base);

- /* Force_clock_mode 0x1: force reset the clock even it is the same clock

- * as long as it is in Passive level.

- display_count = clk_mgr_helper_get_active_display_cnt(dc, context);

- if (display_count == 0)

- enter_display_off = true;

- if (clk_mgr->smu_present) {

- if (enter_display_off == safe_to_lower)

- dcn401_smu_set_num_of_displays(clk_mgr, display_count);

- clk_mgr_base->clks.fclk_prev_p_state_change_support = clk_mgr_base->clks.fclk_p_state_change_support;

- total_plane_count = clk_mgr_helper_get_active_plane_cnt(dc, context);

- fclk_p_state_change_support = new_clocks->fclk_p_state_change_support || (total_plane_count == 0);

- if (should_update_pstate_support(safe_to_lower, fclk_p_state_change_support, clk_mgr_base->clks.fclk_p_state_change_support)) {

- clk_mgr_base->clks.fclk_p_state_change_support = fclk_p_state_change_support;

- /* To enable FCLK P-state switching, send PSTATE_SUPPORTED message to PMFW */

- if (clk_mgr_base->clks.fclk_p_state_change_support) {

- /* Handle the code for sending a message to PMFW that FCLK P-state change is supported */

- dcn401_smu_send_fclk_pstate_message(clk_mgr, true);

- if (dc->debug.force_min_dcfclk_mhz > 0)

- new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ?

- new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000);

- if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) {

- clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;

- if (dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DCFCLK))

- dcn401_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz));

- if (should_set_clock(safe_to_lower, new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) {

- clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;

- if (dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DCFCLK))

- dcn401_smu_set_min_deep_sleep_dcef_clk(clk_mgr, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_deep_sleep_khz));

- if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz))

- /* We don't actually care about socclk, don't notify SMU of hard min */

- clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz;

- clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support;

- clk_mgr_base->clks.prev_num_ways = clk_mgr_base->clks.num_ways;

- if (clk_mgr_base->clks.num_ways != new_clocks->num_ways &&

- clk_mgr_base->clks.num_ways < new_clocks->num_ways) {

- clk_mgr_base->clks.num_ways = new_clocks->num_ways;

- if (dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_UCLK))

- dcn401_smu_send_cab_for_uclk_message(clk_mgr, clk_mgr_base->clks.num_ways);

- p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0);

- if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.prev_p_state_change_support)) {

- clk_mgr_base->clks.p_state_change_support = p_state_change_support;

- clk_mgr_base->clks.fw_based_mclk_switching = p_state_change_support && new_clocks->fw_based_mclk_switching;

- /* to disable P-State switching, set UCLK min = max */

- if (!clk_mgr_base->clks.p_state_change_support && dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_UCLK))

- dcn401_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK,

- clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels - 1].memclk_mhz);

- /* Always update saved value, even if new value not set due to P-State switching unsupported. Also check safe_to_lower for FCLK */

- if (safe_to_lower && (clk_mgr_base->clks.fclk_p_state_change_support != clk_mgr_base->clks.fclk_prev_p_state_change_support)) {

- update_fclk = true;

- if (!clk_mgr_base->clks.fclk_p_state_change_support &&

- dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_FCLK)) {

- /* Handle code for sending a message to PMFW that FCLK P-state change is not supported */

- dcn401_smu_send_fclk_pstate_message(clk_mgr, false);

- /* Always update saved value, even if new value not set due to P-State switching unsupported */

- if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) {

- clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz;

- update_uclk = true;

- /* set UCLK to requested value if P-State switching is supported, or to re-enable P-State switching */

- if (clk_mgr_base->clks.p_state_change_support &&

- (update_uclk || !clk_mgr_base->clks.prev_p_state_change_support) &&

- dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_UCLK))

- dcn401_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz));

- if (clk_mgr_base->clks.num_ways != new_clocks->num_ways &&

- clk_mgr_base->clks.num_ways > new_clocks->num_ways) {

- clk_mgr_base->clks.num_ways = new_clocks->num_ways;

- if (dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_UCLK))

- dcn401_smu_send_cab_for_uclk_message(clk_mgr, clk_mgr_base->clks.num_ways);

- if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) {

- if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz)

- dpp_clock_lowered = true;

- clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz;

- clk_mgr_base->clks.actual_dppclk_khz = new_clocks->dppclk_khz;

- if (clk_mgr->smu_present && !dpp_clock_lowered && dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DPPCLK))

- clk_mgr_base->clks.actual_dppclk_khz = dcn401_set_hard_min_by_freq_optimized(clk_mgr, PPCLK_DPPCLK, clk_mgr_base->clks.dppclk_khz);

- update_dppclk = true;

- if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {

- clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;

- if (clk_mgr->smu_present && dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DISPCLK))

- clk_mgr_base->clks.actual_dispclk_khz = dcn401_set_hard_min_by_freq_optimized(clk_mgr, PPCLK_DISPCLK, clk_mgr_base->clks.dispclk_khz);

- update_dispclk = true;

- if (!new_clocks->dtbclk_en && dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DTBCLK)) {

- new_clocks->ref_dtbclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz * 1000;

- /* clock limits are received with MHz precision, divide by 1000 to prevent setting clocks at every call */

- if (!dc->debug.disable_dtb_ref_clk_switch &&

- should_set_clock(safe_to_lower, new_clocks->ref_dtbclk_khz / 1000, clk_mgr_base->clks.ref_dtbclk_khz / 1000) &&

- dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DTBCLK)) {

- /* DCCG requires KHz precision for DTBCLK */

- clk_mgr_base->clks.ref_dtbclk_khz =

- dcn401_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DTBCLK, khz_to_mhz_ceil(new_clocks->ref_dtbclk_khz));

- dcn401_update_clocks_update_dtb_dto(clk_mgr, context, clk_mgr_base->clks.ref_dtbclk_khz);

- if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) {

- if (dpp_clock_lowered) {

- /* if clock is being lowered, increase DTO before lowering refclk */

- dcn401_update_clocks_update_dpp_dto(clk_mgr, context,

- safe_to_lower, clk_mgr_base->clks.dppclk_khz);

- dcn401_update_clocks_update_dentist(clk_mgr, context);

- if (clk_mgr->smu_present && dcn401_is_ppclk_dpm_enabled(clk_mgr, PPCLK_DPPCLK)) {

- clk_mgr_base->clks.actual_dppclk_khz = dcn401_set_hard_min_by_freq_optimized(clk_mgr, PPCLK_DPPCLK,

- clk_mgr_base->clks.dppclk_khz);

- dcn401_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower,

- clk_mgr_base->clks.actual_dppclk_khz);

- /* if clock is being raised, increase refclk before lowering DTO */

- if (update_dppclk || update_dispclk)

- dcn401_update_clocks_update_dentist(clk_mgr, context);

- /* There is a check inside dcn20_update_clocks_update_dpp_dto which ensures

- * that we do not lower dto when it is not safe to lower. We do not need to

- * compare the current and new dppclk before calling this function.

- dcn401_update_clocks_update_dpp_dto(clk_mgr, context,

- safe_to_lower, clk_mgr_base->clks.actual_dppclk_khz);

- if (update_dispclk && dmcu && dmcu->funcs->is_dmcu_initialized(dmcu))

- /*update dmcu for wait_loop count*/

- dmcu->funcs->set_psr_wait_loop(dmcu,

- clk_mgr_base->clks.dispclk_khz / 1000 / 7);

- /* To enable FCLK P-state switching, send PSTATE_SUPPORTED message to PMFW */

- if (clk_mgr_base->clks.fclk_p_state_change_support) {

- /* Handle the code for sending a message to PMFW that FCLK P-state change is supported */

- if (dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK)) {

- block_sequence[num_steps].params.update_pstate_support_params.support = true;

- block_sequence[num_steps].func = CLK_MGR401_UPDATE_FCLK_PSTATE_SUPPORT;

+ /* To enable FCLK P-state switching, send PSTATE_SUPPORTED message to PMFW (message not supported on DCN401)*/

if (!clk_mgr_base->clks.fclk_p_state_change_support && dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK)) {

+ if (should_set_clock(safe_to_lower, new_clocks->subvp_prefetch_dramclk_khz, clk_mgr_base->clks.subvp_prefetch_dramclk_khz)) {

+ if (should_set_clock(safe_to_lower, new_clocks->subvp_prefetch_fclk_khz, clk_mgr_base->clks.subvp_prefetch_fclk_khz)) {

- /* disable FCLK P-State support if needed */

- if (!fclk_p_state_change_support &&

- should_update_pstate_support(safe_to_lower, fclk_p_state_change_support, clk_mgr_base->clks.fclk_prev_p_state_change_support) &&

- dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_FCLK)) {

- block_sequence[num_steps].params.update_pstate_support_params.support = false;

- block_sequence[num_steps].func = CLK_MGR401_UPDATE_FCLK_PSTATE_SUPPORT;

+ // should_update_pstate_support(safe_to_lower, fclk_p_state_change_support, clk_mgr_base->clks.fclk_prev_p_state_change_support) &&

- if (dc->debug.enable_legacy_clock_update) {

- dcn401_update_clocks_legacy(clk_mgr_base, context, safe_to_lower);

+ clk_mgr_base->bw_params->dram_channel_width_bytes = clk_mgr_base->ctx->dc_bios->vram_info.dram_channel_width_bytes;

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h
index 8b0461992b22..6c9ae5ca2c7e 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c
index 7700477d019b..21c35528f61f 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c

+ smu_print("SMU Set active hardmin by freq: uclk_freq_mhz = %d MHz, fclk_freq_mhz = %d MHz\n", uclk_freq_mhz, fclk_freq_mhz);

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h
index 651fb8d62864..e02eb1294b37 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 5c39390ecbd5..f84e795e35f5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c

- struct rect *rect, bool is_stop)

- mux_mapping.phy_output_num = stream->link->link_enc_hw_inst;

- * @enable: Enable CRC if true, disable otherwise.

- * By default, only CRC0 is configured, and the entire frame is used to

- * calculate the CRC.

- struct crc_params *crc_window, bool enable, bool continuous)

-bool dc_stream_get_crc(struct dc *dc, struct dc_stream_state *stream,

- return tg->funcs->get_crc(tg, r_cr, g_y, b_cb);

- int main_pipe_width = 0, main_pipe_height = 0;

- struct dc_stream_state *old_paired_stream = dc_state_get_paired_subvp_stream(dc->current_state, old_stream);

- if (old_paired_stream) {

- main_pipe_width = old_paired_stream->dst.width;

- main_pipe_height = old_paired_stream->dst.height;

- if (dc->hwss.blank_phantom)

- dc->hwss.blank_phantom(dc, tg, main_pipe_width, main_pipe_height);

- if (context->stream_count > get_seamless_boot_stream_count(context) ||

- sizeof(union dc_tiling_info)) != 0) {

- if (u->scaling_info->dst_rect.width != u->surface->dst_rect.width

- u->surface->scaling_quality.integer_scaling

- if (u->scaling_info->src_rect.width != u->surface->src_rect.width

- || u->scaling_info->src_rect.height != u->surface->src_rect.height) {

- update_flags->bits.scaling_change = 1;

- if (u->scaling_info->src_rect.width > u->surface->src_rect.width

- || u->scaling_info->src_rect.height > u->surface->src_rect.height)

- /* Making src rect bigger requires a bandwidth change */

- update_flags->bits.clock_change = 1;

- if (u->scaling_info->src_rect.width > dc->caps.max_optimizable_video_width &&

- (u->scaling_info->clip_rect.width > u->surface->clip_rect.width ||

- u->scaling_info->clip_rect.height > u->surface->clip_rect.height))

- /* Changing clip size of a large surface may result in MPC slice count change */

- update_flags->bits.bandwidth_change = 1;

- if (u->scaling_info->clip_rect.width != u->surface->clip_rect.width ||

- u->scaling_info->clip_rect.height != u->surface->clip_rect.height)

- update_flags->bits.clip_size_change = 1;

- if (update_flags->bits.position_change ||

- update_flags->bits.clip_size_change)

- if (update_flags->bits.lut_3d) {

+/* May need to flip the desktop plane in cases where MPO plane receives a flip but desktop plane doesn't

+static void force_immediate_gsl_plane_flip(struct dc *dc, struct dc_surface_update *updates, int surface_count)

- if (srf_update->func_shaper)

- if (srf_update->blend_tf)

- if (srf_update->cm2_params) {

- surface->mcm_shaper_3dlut_setting = srf_update->cm2_params->component_settings.shaper_3dlut_setting;

- surface->mcm_lut1d_enable = srf_update->cm2_params->component_settings.lut1d_enable;

- surface->mcm_luts = srf_update->cm2_params->cm2_luts;

+ /* It is possible to receive a flip for one plane while there are multiple flip_immediate planes in the same stream.

- if (surface->update_flags.bits.clip_size_change ||

- surface->update_flags.bits.position_change) {

- if (should_update_pipe_for_plane(context, pipe_ctx, plane_state))

- dc->hwss.program_triplebuffer != NULL &&

- !pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) {

- /*triple buffer for VUpdate only*/

- if (update_type == UPDATE_TYPE_FULL)

- if (should_update_pipe_for_plane(context, pipe_ctx, plane_state))

- dc->hwss.program_triplebuffer != NULL &&

- !pipe_ctx->plane_state->flip_immediate && dc->debug.enable_tri_buf) {

- /*triple buffer for VUpdate only*/

- pipe_ctx->plane_state->triplebuffer_flips = true;

- /*only enable triplebuffer for fast_update*/

- struct dc_surface_update srf_updates[MAX_SURFACE_NUM] = {0};

+ /* It is possible to receive a flip for one plane while there are multiple flip_immediate planes in the same stream.

- return update_planes_and_stream_v3(dc, srf_updates,

- return update_planes_and_stream_v2(dc, srf_updates,

- update_planes_and_stream_v3(dc, srf_updates, surface_count,

- if (dc->ctx->dce_version >= DCN_VERSION_3_2) {

- update_planes_and_stream_v2(dc, srf_updates, surface_count,

- update_planes_and_stream_v1(dc, srf_updates, surface_count, stream,

- stream_update, state);

- if (dc->debug.disable_idle_power_optimizations)

- dc->hwss.apply_idle_power_optimizations(dc, allow))

+ DC_LOG_DC("%s: allow_idle=%d\n HardMinUClk_Khz=%d HardMinDramclk_Khz=%d\n Pipe_0=%d Pipe_1=%d Pipe_2=%d Pipe_3=%d Pipe_4=%d Pipe_5=%d (caller=%s)\n",

+ __func__, allow, idle_fclk_khz, idle_dramclk_khz, subvp_pipe_type[0], subvp_pipe_type[1], subvp_pipe_type[2],

- if (check_subvp_sw_cursor_fallback_req(dc, dc->current_state->streams[i])) {

+ if (check_subvp_sw_cursor_fallback_req(dc, dc->current_state->streams[i]) && !dc->current_state->streams[i]->hw_cursor_req) {

- profile.power_level += !context->bw_ctx.bw.dcn.clk.p_state_change_support;

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
index 801cdbc8117d..af1ea5792560 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c

-#define TIMING_TRACE(...) do {\

- if (dc->debug.timing_trace) \

- DC_LOG_SYNC(__VA_ARGS__); \

-void context_timing_trace(

- struct resource_context *res_ctx)

- int h_pos[MAX_PIPES] = {0}, v_pos[MAX_PIPES] = {0};

- struct crtc_position position;

- unsigned int underlay_idx = dc->res_pool->underlay_pipe_index;

- DC_LOGGER_INIT(dc->ctx->logger);

- for (i = 0; i < dc->res_pool->pipe_count; i++) {

- struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];

- /* get_position() returns CRTC vertical/horizontal counter

- * hence not applicable for underlay pipe

- if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)

- pipe_ctx->stream_res.tg->funcs->get_position(pipe_ctx->stream_res.tg, &position);

- h_pos[i] = position.horizontal_count;

- v_pos[i] = position.vertical_count;

- for (i = 0; i < dc->res_pool->pipe_count; i++) {

- struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];

- if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)

- TIMING_TRACE("OTG_%d H_tot:%d V_tot:%d H_pos:%d V_pos:%d\n",

- pipe_ctx->stream_res.tg->inst,

- pipe_ctx->stream->timing.h_total,

- pipe_ctx->stream->timing.v_total,

- h_pos[i], v_pos[i]);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
index 7ee2be8f82c4..6eb9bae3af91 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

- {MAX_TG_COLOR_VALUE, MAX_TG_COLOR_VALUE / 4, 0}, /* orange */

- {MAX_TG_COLOR_VALUE / 2, 0, MAX_TG_COLOR_VALUE / 2}, /* purple */

- if (pipe_ctx->stream_res.tg->funcs->wait_drr_doublebuffer_pending_clear)

- pipe_ctx->stream_res.tg->funcs->wait_drr_doublebuffer_pending_clear(pipe_ctx->stream_res.tg);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c
index dfdfe22d9e85..c1b79b379447 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c

- uint32_t backlight_pwm_u16_16,

- uint32_t frame_ramp)

- backlight_pwm_u16_16, frame_ramp);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index c7599c40d4be..520a34a42827 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c

- * This is a preliminary vp size calculation to allow us to check taps support.

- * The result is completely overridden afterwards.

-static void calculate_viewport_size(struct pipe_ctx *pipe_ctx)

- struct scaler_data *data = &pipe_ctx->plane_res.scl_data;

- data->viewport.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz, data->recout.width));

- data->viewport.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert, data->recout.height));

- data->viewport_c.width = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.horz_c, data->recout.width));

- data->viewport_c.height = dc_fixpt_ceil(dc_fixpt_mul_int(data->ratios.vert_c, data->recout.height));

- if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||

- pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {

- swap(data->viewport.width, data->viewport.height);

- swap(data->viewport_c.width, data->viewport_c.height);

- /* depends on scaling ratios and recout, does not calculate offset yet */

- calculate_viewport_size(pipe_ctx);

- * Depends on recout, scaling ratios, h_active and taps

- * May need to re-check lb size after this in some obscure scenario

- timing->h_border_right;

+ hactive = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;

- * Only update link encoder to stream assignment after bandwidth validation passed.

- * TODO: Split out assignment and validation.

- if (result == DC_OK && dc->res_pool->funcs->link_encs_assign && fast_validate == false)

- dc->res_pool->funcs->link_encs_assign(

- dc, new_ctx, new_ctx->streams, new_ctx->stream_count);

- struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param)

- if (pipe_dlg_param->vstartup_start > asic_blank_end) {

- v_update = (tg->v_total - (pipe_dlg_param->vstartup_start - asic_blank_end));

- struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param)

- &pipe_ctx->pipe_dlg_param);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c b/drivers/gpu/drm/amd/display/dc/core/dc_state.c
index 2597e3fd562b..1b2cce127981 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_state.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_state.c

- } else if (stream_status->plane_count == MAX_SURFACE_NUM) {

- plane_state, MAX_SURFACE_NUM);

- struct dc_plane_state *del_planes[MAX_SURFACE_NUM] = { 0 };

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 9a406d74c0dd..e8134c47fe0d 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c

* 2. If not subvp high refresh, for single display cases, if resolution is >= 5K and refresh rate < 120hz

* 3. If not subvp high refresh, for multi display cases, if resolution is >= 4K and refresh rate < 120hz

- if (dc->debug.allow_sw_cursor_fallback && attributes->height * attributes->width * 4 > 16384) {

- uint32_t color_value = MAX_TG_COLOR_VALUE;

- if (stream->cursor_position.enable) {

- pipe_ctx->visual_confirm_color.color_r_cr = color_value;

- pipe_ctx->visual_confirm_color.color_g_y = 0;

- pipe_ctx->visual_confirm_color.color_b_cb = 0;

- pipe_ctx->visual_confirm_color.color_r_cr = 0;

- pipe_ctx->visual_confirm_color.color_g_y = 0;

- pipe_ctx->visual_confirm_color.color_b_cb = color_value;

-bool dc_stream_warmup_writeback(struct dc *dc,

- struct dc_writeback_info *wb_info)

- dc_exit_ips_for_hw_access(dc);

- if (dc->hwss.mmhubbub_warmup)

- return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info);

- "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n",

- stream->timing.pixel_encoding,

- stream->timing.display_color_depth);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
index ccbb15f1638c..f3471d45b312 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c

-void enable_surface_flip_reporting(struct dc_plane_state *plane_state,

- uint32_t controller_id)

- plane_state->irq_source = controller_id + DC_IRQ_SOURCE_PFLIP1 - 1;

- /*register_flip_interrupt(surface);*/

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 3992ad73165b..053481ab69ef 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h

-#define DC_VER "3.2.301"

-#define MAX_SURFACES 3

- uint32_t reserved:25;

- bool timing_trace;

- bool enable_legacy_clock_update;

- uint32_t clip_size_change: 1;

- union dc_tiling_info tiling_info;

- struct dc_plane_state plane_states[MAX_SURFACE_NUM];

- struct dc_cm2_parameters *cm2_params;

- bool disable_assr_for_uhbr;

- uint32_t backlight_pwm_u16_16,

- uint32_t frame_ramp);

+ // 'true' if these are virtual DPCD's HBlank expansion caps (immediately upstream of sink in MST topology),

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 1e7de0f03290..44ff9abe2880 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

- if (!dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst))

- split_pipe = test_pipe;

- if (stream && !stream->dpms_off)

- if (prev_driver_signals.bits.allow_ips2 &&

- if (prev_driver_signals.bits.allow_ips1) {

- union dmub_rb_cmd cmd[MAX_STREAMS + 1];

- memset(cmd, 0, sizeof(union dmub_rb_cmd) * (MAX_STREAMS + 1));

- struct dmub_rb_cmd_fams2 *stream_cmd = &cmd[i+1].fams2_config;

+ struct dmub_rb_cmd_fams2 *stream_sub_state_cmd = &cmd[i+1+context->bw_ctx.bw.dcn.fams2_global_config.num_streams].fams2_config;

- stream_cmd->header.type = DMUB_CMD__FW_ASSISTED_MCLK_SWITCH;

- stream_cmd->header.sub_type = DMUB_CMD__FAMS2_CONFIG;

- stream_cmd->header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);

- stream_cmd->header.multi_cmd_pending = 1;

- /* copy stream static state */

- memcpy(&stream_cmd->config.stream,

- &context->bw_ctx.bw.dcn.fams2_stream_params[i],

- sizeof(struct dmub_fams2_stream_static_state));

+ stream_base_cmd->header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);

+ stream_sub_state_cmd->header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);

- cmd[context->bw_ctx.bw.dcn.fams2_global_config.num_streams].fams2_config.header.multi_cmd_pending = 0;

- num_cmds += context->bw_ctx.bw.dcn.fams2_global_config.num_streams;

+ cmd[2 * context->bw_ctx.bw.dcn.fams2_global_config.num_streams].fams2_config.header.multi_cmd_pending = 0;

+void dc_dmub_srv_ips_query_residency_info(struct dc_dmub_srv *dc_dmub_srv, struct ips_residency_info *output)

+ if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, DMUB_GPINT__GET_IPS_INACTIVE_RESIDENCY_DURATION_US_LO,

+ if (!dc_wake_and_execute_gpint(dc_dmub_srv->ctx, DMUB_GPINT__GET_IPS_INACTIVE_RESIDENCY_DURATION_US_HI,

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
index 42f0cb672d8b..10b48198b7a6 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

+void dc_dmub_srv_ips_query_residency_info(struct dc_dmub_srv *dc_dmub_srv, struct ips_residency_info *output);

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index 41bd95e9177a..94ce8fe74481 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h

- uint8_t reserved : 1;

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
index 9014c2409817..9d18f1c08079 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h

diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index c10567ec1c81..5ac55601a6da 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h

-union dc_tiling_info {

- /* Specifies the number of memory banks for tiling

- * Only applies to 2D and 3D tiling modes.

- * POSSIBLE VALUES: 2,4,8,16

- unsigned int num_banks;

- /* Specifies the number of tiles in the x direction

- * to be incorporated into the same bank.

- * Only applies to 2D and 3D tiling modes.

- * POSSIBLE VALUES: 1,2,4,8

- unsigned int bank_width;

- unsigned int bank_width_c;

- /* Specifies the number of tiles in the y direction to

- * be incorporated into the same bank.

- * Only applies to 2D and 3D tiling modes.

- * POSSIBLE VALUES: 1,2,4,8

- unsigned int bank_height;

- unsigned int bank_height_c;

- /* Specifies the macro tile aspect ratio. Only applies

- * to 2D and 3D tiling modes.

- unsigned int tile_aspect;

- unsigned int tile_aspect_c;

- /* Specifies the number of bytes that will be stored

- * contiguously for each tile.

- * If the tile data requires more storage than this

- * amount, it is split into multiple slices.

- * This field must not be larger than

- * GB_ADDR_CONFIG.DRAM_ROW_SIZE.

- * Only applies to 2D and 3D tiling modes.

- * For color render targets, TILE_SPLIT >= 256B.

- enum tile_split_values tile_split;

- enum tile_split_values tile_split_c;

- /* Specifies the addressing within a tile.

- * 0x0 - DISPLAY_MICRO_TILING

- * 0x1 - THIN_MICRO_TILING

- * 0x2 - DEPTH_MICRO_TILING

- * 0x3 - ROTATED_MICRO_TILING

- enum tile_mode_values tile_mode;

- enum tile_mode_values tile_mode_c;

- /* Specifies the number of pipes and how they are

- * interleaved in the surface.

- * Refer to memory addressing document for complete

- * details and constraints.

- unsigned int pipe_config;

- /* Specifies the tiling mode of the surface.

- * THIN tiles use an 8x8x1 tile size.

- * THICK tiles use an 8x8x4 tile size.

- * 2D tiling modes rotate banks for successive Z slices

- * 3D tiling modes rotate pipes and banks for Z slices

- * Refer to memory addressing document for complete

- * details and constraints.

- enum array_mode_values array_mode;

- enum swizzle_mode_values swizzle;

- unsigned int num_pipes;

- unsigned int max_compressed_frags;

- unsigned int pipe_interleave;

- unsigned int num_banks;

- unsigned int num_shader_engines;

- unsigned int num_rb_per_se;

- bool shaderEnable;

- bool pipe_aligned;

- unsigned int num_pkrs;

- } gfx9;/*gfx9, gfx10 and above*/

- enum swizzle_mode_addr3_values swizzle;

- } gfx_addr3;/*gfx with addr3 and above*/

diff --git a/drivers/gpu/drm/amd/display/dc/dc_plane.h b/drivers/gpu/drm/amd/display/dc/dc_plane.h
index 44afcd989224..fabcefeda288 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_plane.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_plane.h

diff --git a/drivers/gpu/drm/amd/display/dc/dc_spl_translate.c b/drivers/gpu/drm/amd/display/dc/dc_spl_translate.c
index 603552dbd771..3518eb1b8cd1 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_spl_translate.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

-static struct spl_funcs dcn2_spl_funcs = {

-static struct spl_funcs dcn32_spl_funcs = {

-static struct spl_funcs dcn401_spl_funcs = {

inits->h_c = dc_fixpt_from_int_dy(spl_inits->h_filter_init_int_c, spl_inits->h_filter_init_frac_c >> 5, 0, 19);

inits->v_c = dc_fixpt_from_int_dy(spl_inits->v_filter_init_int_c, spl_inits->v_filter_init_frac_c >> 5, 0, 19);

+static void populate_splformat_from_format(enum spl_pixel_format *spl_pixel_format, const enum pixel_format pixel_format)

- spl_in->funcs = &dcn2_spl_funcs;

- spl_in->funcs = &dcn32_spl_funcs;

- spl_in->funcs = &dcn401_spl_funcs;

- spl_in->funcs = &dcn2_spl_funcs;

- spl_in->basic_in.format = (enum spl_pixel_format)pipe_ctx->plane_res.scl_data.format;

- spl_in->basic_in.mpc_combine_h = resource_get_mpc_slice_count(pipe_ctx);

- spl_in->basic_in.mpc_combine_v = 0;

- spl_in->basic_in.mpc_combine_v = resource_get_mpc_slice_index(pipe_ctx);

- stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;

+ stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right + pipe_ctx->hblank_borrow;

- spl_in->debug.sharpen_policy = (enum sharpen_policy)pipe_ctx->stream->ctx->dc->debug.sharpen_policy;

- spl_in->is_fullscreen = dm_helpers_is_fullscreen(pipe_ctx->stream->ctx, pipe_ctx->stream);

diff --git a/drivers/gpu/drm/amd/display/dc/dc_state.h b/drivers/gpu/drm/amd/display/dc/dc_state.h
index caa45db50232..db1e63a7d460 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_state.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_state.h

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 14ea47eda0c8..3e303c7808fb 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h

- struct dc_plane_state *plane_states[MAX_SURFACE_NUM];

-bool dc_stream_warmup_writeback(struct dc *dc,

- struct dc_writeback_info *wb_info);

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 6d7989b751e2..0c2aa91f0a11 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h

-#define MAX_SURFACE_NUM 6

- unsigned char STATE_TRANSITION_ERROR :1;

- unsigned char LINK_CRC_ERROR :1;

- unsigned char DESYNC_ERROR :1;

- unsigned char RESERVED :5;

- /* Replay pseudo vtotal for abm + ips on full screen video which can improve ips residency */

- uint16_t abm_with_ips_on_full_screen_video_pseudo_vtotal;

diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c b/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
index 838d72eaa87f..b363f5360818 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

- * be set only after DTO is enabled

- REG_UPDATE(OTG_PIXEL_RATE_CNTL[params->otg_inst],

- PIPE_DTO_SRC_SEL[params->otg_inst], 2);

- REG_UPDATE_2(OTG_PIXEL_RATE_CNTL[params->otg_inst],

- DTBCLK_DTO_ENABLE[params->otg_inst], 0,

- PIPE_DTO_SRC_SEL[params->otg_inst], params->is_hdmi ? 0 : 1);

diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
index 0b889004509a..d3e46c3cfa57 100644
--- a/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

- /* set the dtbclk_p source */

- dccg401_set_dtbclk_p_src(dccg, src, otg_inst);

- switch (link_enc_inst) {

- REG_UPDATE(SYMCLKA_CLOCK_ENABLE,

- SYMCLKA_CLOCK_ENABLE, 1);

- if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)

- REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKA_ROOT_GATE_DISABLE, 1);

- REG_UPDATE(SYMCLKB_CLOCK_ENABLE,

- SYMCLKB_CLOCK_ENABLE, 1);

- if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)

- REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKB_ROOT_GATE_DISABLE, 1);

- REG_UPDATE(SYMCLKC_CLOCK_ENABLE,

- SYMCLKC_CLOCK_ENABLE, 1);

- if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)

- REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKC_ROOT_GATE_DISABLE, 1);

- REG_UPDATE(SYMCLKD_CLOCK_ENABLE,

- SYMCLKD_CLOCK_ENABLE, 1);

- if (dccg->ctx->dc->debug.root_clock_optimization.bits.symclk32_se)

- REG_UPDATE(DCCG_GATE_DISABLE_CNTL5, SYMCLKD_ROOT_GATE_DISABLE, 1);

-/*get other front end connected to this backend*/

-static uint8_t dccg401_get_number_enabled_symclk_fe_connected_to_be(struct dccg *dccg, uint32_t link_enc_inst)

- uint8_t num_enabled_symclk_fe = 0;

- uint32_t fe_clk_en[4] = {0}, be_clk_sel[4] = {0};

- struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);

- REG_GET_2(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_EN, &fe_clk_en[0],

- SYMCLKA_FE_SRC_SEL, &be_clk_sel[0]);

- REG_GET_2(SYMCLKB_CLOCK_ENABLE, SYMCLKB_FE_EN, &fe_clk_en[1],

- SYMCLKB_FE_SRC_SEL, &be_clk_sel[1]);

- REG_GET_2(SYMCLKC_CLOCK_ENABLE, SYMCLKC_FE_EN, &fe_clk_en[2],

- SYMCLKC_FE_SRC_SEL, &be_clk_sel[2]);

- REG_GET_2(SYMCLKD_CLOCK_ENABLE, SYMCLKD_FE_EN, &fe_clk_en[3],

- SYMCLKD_FE_SRC_SEL, &be_clk_sel[3]);

- for (i = 0; i < ARRAY_SIZE(fe_clk_en); i++) {

- if (fe_clk_en[i] && be_clk_sel[i] == link_enc_inst)

- num_enabled_symclk_fe++;

- return num_enabled_symclk_fe;

static void dccg401_disable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst, uint32_t link_enc_inst)

- uint8_t num_enabled_symclk_fe = 0;

- /*check other enabled symclk fe connected to this be */

- num_enabled_symclk_fe = dccg401_get_number_enabled_symclk_fe_connected_to_be(dccg, link_enc_inst);

- /*only turn off backend clk if other front ends attached to this backend are all off,

- for mst, only turn off the backend if this is the last front end*/

- if (num_enabled_symclk_fe == 0) {

- switch (link_enc_inst) {

- REG_UPDATE(SYMCLKA_CLOCK_ENABLE,

- SYMCLKA_CLOCK_ENABLE, 0);

- REG_UPDATE(SYMCLKB_CLOCK_ENABLE,

- SYMCLKB_CLOCK_ENABLE, 0);

- REG_UPDATE(SYMCLKC_CLOCK_ENABLE,

- SYMCLKC_CLOCK_ENABLE, 0);

- REG_UPDATE(SYMCLKD_CLOCK_ENABLE,

- SYMCLKD_CLOCK_ENABLE, 0);

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index b700608e4240..077337698e0a 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
index f5e1d9caee4c..1c2009e38aa1 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c

- union dc_tiling_info *tiling_info)

- union dc_tiling_info *tiling_info,

- struct dce_mem_input *dce_mi, const union dc_tiling_info *info)

- union dc_tiling_info *tiling_info,

- .mem_input_is_flip_pending = dce_mi_is_flip_pending

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index 5c2825bc9a87..d199e4ed2e59 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

- uint8_t synchronous_clock = 0; /* asynchronous mode */

- misc0 = misc0 | synchronous_clock;

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
index cae18f8c1c9a..88c75c243bf8 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

- link->psr_settings.force_ffu_mode = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c
index db7557a1c613..2c43c2422638 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c

- const union dc_tiling_info *info,

- union dc_tiling_info *tiling_info,

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
index fa422a8cbced..61b0807693fb 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

- /* First, disable CRC before we configure it. */

- dm_write_reg(tg->ctx, cntl_addr, 0);

- /* Window A x axis start and end. */

- addr = CRTC_REG(mmCRTC_CRC0_WINDOWA_X_CONTROL);

- set_reg_field_value(value, params->windowa_x_start,

- CRTC_CRC0_WINDOWA_X_CONTROL,

- CRTC_CRC0_WINDOWA_X_START);

- set_reg_field_value(value, params->windowa_x_end,

- CRTC_CRC0_WINDOWA_X_CONTROL,

- CRTC_CRC0_WINDOWA_X_END);

- dm_write_reg(tg->ctx, addr, value);

- /* Window A y axis start and end. */

- addr = CRTC_REG(mmCRTC_CRC0_WINDOWA_Y_CONTROL);

- set_reg_field_value(value, params->windowa_y_start,

- CRTC_CRC0_WINDOWA_Y_CONTROL,

- CRTC_CRC0_WINDOWA_Y_START);

- set_reg_field_value(value, params->windowa_y_end,

- CRTC_CRC0_WINDOWA_Y_CONTROL,

- CRTC_CRC0_WINDOWA_Y_END);

- dm_write_reg(tg->ctx, addr, value);

- /* Window B x axis start and end. */

- addr = CRTC_REG(mmCRTC_CRC0_WINDOWB_X_CONTROL);

- set_reg_field_value(value, params->windowb_x_start,

- CRTC_CRC0_WINDOWB_X_CONTROL,

- CRTC_CRC0_WINDOWB_X_START);

- set_reg_field_value(value, params->windowb_x_end,

- CRTC_CRC0_WINDOWB_X_CONTROL,

- CRTC_CRC0_WINDOWB_X_END);

- dm_write_reg(tg->ctx, addr, value);

- /* Window B y axis start and end. */

- addr = CRTC_REG(mmCRTC_CRC0_WINDOWB_Y_CONTROL);

- set_reg_field_value(value, params->windowb_y_start,

- CRTC_CRC0_WINDOWB_Y_CONTROL,

- CRTC_CRC0_WINDOWB_Y_START);

- set_reg_field_value(value, params->windowb_y_end,

- CRTC_CRC0_WINDOWB_Y_CONTROL,

- CRTC_CRC0_WINDOWB_Y_END);

- dm_write_reg(tg->ctx, addr, value);

- /* Set crc mode and selection, and enable. Only using CRC0*/

- set_reg_field_value(value, params->continuous_mode ? 1 : 0,

- CRTC_CRC_CNTL, CRTC_CRC_CONT_EN);

- set_reg_field_value(value, params->selection,

- CRTC_CRC_CNTL, CRTC_CRC0_SELECT);

- set_reg_field_value(value, 1, CRTC_CRC_CNTL, CRTC_CRC_EN);

- dm_write_reg(tg->ctx, cntl_addr, value);

-bool dce110_get_crc(struct timing_generator *tg,

- addr = CRTC_REG(mmCRTC_CRC0_DATA_RG);

- value = dm_read_reg(tg->ctx, addr);

- *r_cr = get_reg_field_value(value, CRTC_CRC0_DATA_RG, CRC0_R_CR);

- *g_y = get_reg_field_value(value, CRTC_CRC0_DATA_RG, CRC0_G_Y);

- addr = CRTC_REG(mmCRTC_CRC0_DATA_B);

- value = dm_read_reg(tg->ctx, addr);

- *b_cb = get_reg_field_value(value, CRTC_CRC0_DATA_B, CRC0_B_CB);

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
index ee4de740aceb..e4f5cad64f32 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

-bool dce110_get_crc(struct timing_generator *tg,

diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index fcf59348eb62..31c4f44ceaac 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

- /* First, disable CRC before we configure it. */

- dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_CRC_CNTL,

- tg110->offsets.crtc, 0);

- /* Window A x axis start and end. */

- CRTC_REG_UPDATE_2(CRTC0_CRTC_CRC0_WINDOWA_X_CONTROL,

- CRTC_CRC0_WINDOWA_X_START, params->windowa_x_start,

- CRTC_CRC0_WINDOWA_X_END, params->windowa_x_end);

- /* Window A y axis start and end. */

- CRTC_REG_UPDATE_2(CRTC0_CRTC_CRC0_WINDOWA_Y_CONTROL,

- CRTC_CRC0_WINDOWA_Y_START, params->windowa_y_start,

- CRTC_CRC0_WINDOWA_Y_END, params->windowa_y_end);

- /* Window B x axis start and end. */

- CRTC_REG_UPDATE_2(CRTC0_CRTC_CRC0_WINDOWB_X_CONTROL,

- CRTC_CRC0_WINDOWB_X_START, params->windowb_x_start,

- CRTC_CRC0_WINDOWB_X_END, params->windowb_x_end);

- /* Window B y axis start and end. */

- CRTC_REG_UPDATE_2(CRTC0_CRTC_CRC0_WINDOWB_Y_CONTROL,

- CRTC_CRC0_WINDOWB_Y_START, params->windowb_y_start,

- CRTC_CRC0_WINDOWB_Y_END, params->windowb_y_end);

- /* Set crc mode and selection, and enable. Only using CRC0*/

- CRTC_REG_UPDATE_3(CRTC0_CRTC_CRC_CNTL,

- CRTC_CRC_EN, params->continuous_mode ? 1 : 0,

- CRTC_CRC0_SELECT, params->selection,

-static bool dce120_get_crc(struct timing_generator *tg, uint32_t *r_cr,

- uint32_t *g_y, uint32_t *b_cb)

- value = dm_read_reg_soc15(tg->ctx, mmCRTC0_CRTC_CRC0_DATA_RG,

- tg110->offsets.crtc);

- *r_cr = get_reg_field_value(value, CRTC0_CRTC_CRC0_DATA_RG, CRC0_R_CR);

- *g_y = get_reg_field_value(value, CRTC0_CRTC_CRC0_DATA_RG, CRC0_G_Y);

- value = dm_read_reg_soc15(tg->ctx, mmCRTC0_CRTC_CRC0_DATA_B,

- tg110->offsets.crtc);

- *b_cb = get_reg_field_value(value, CRTC0_CRTC_CRC0_DATA_B, CRC0_B_CB);

diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c
index 8db9f7514466..889f314cac65 100644
--- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c
index eaed5d1c398a..dcd2cdfe91eb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c

- * segment is from 2^-10 to 2^1

- seg_distr[10] = 1;

- region_start = -10;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
index 05df502a54f2..88cf47a5ea75 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

-unsigned int snprintf_count(char *pbuf, unsigned int bufsize, char *fmt, ...)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
index f31f0e3abfc0..0690c346f2c5 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c

- * segment is from 2^-10 to 2^0

- seg_distr[10] = 1;

- region_start = -10;

-#define NUM_DEGAMMA_REGIONS 12

-bool cm3_helper_translate_curve_to_degamma_hw_format(

- const struct dc_transfer_func *output_tf,

- struct pwl_params *lut_params)

- struct curve_points3 *corner_points;

- struct pwl_result_data *rgb_resulted;

- struct pwl_result_data *rgb;

- struct pwl_result_data *rgb_plus_1;

- int32_t region_start, region_end;

- uint32_t j, k, seg_distr[MAX_REGIONS_NUMBER], increment, start_index, hw_points;

- if (output_tf == NULL || lut_params == NULL || output_tf->type == TF_TYPE_BYPASS)

- corner_points = lut_params->corner_points;

- rgb_resulted = lut_params->rgb_resulted;

- memset(lut_params, 0, sizeof(struct pwl_params));

- memset(seg_distr, 0, sizeof(seg_distr));

- region_start = -NUM_DEGAMMA_REGIONS;

- for (i = region_end - region_start; i < MAX_REGIONS_NUMBER ; i++)

- seg_distr[i] = -1;

- * segments are from 2^-12 to 0

- for (i = 0; i < NUM_DEGAMMA_REGIONS ; i++)

- for (k = 0; k < MAX_REGIONS_NUMBER; k++) {

- if (seg_distr[k] != -1)

- hw_points += (1 << seg_distr[k]);

- for (k = 0; k < (region_end - region_start); k++) {

- increment = NUMBER_SW_SEGMENTS / (1 << seg_distr[k]);

- start_index = (region_start + k + MAX_LOW_POINT) *

- NUMBER_SW_SEGMENTS;

- for (i = start_index; i < start_index + NUMBER_SW_SEGMENTS;

- if (j == hw_points - 1)

- if (i >= TRANSFER_FUNC_POINTS)

- rgb_resulted[j].red = output_tf->tf_pts.red[i];

- rgb_resulted[j].green = output_tf->tf_pts.green[i];

- rgb_resulted[j].blue = output_tf->tf_pts.blue[i];

- start_index = (region_end + MAX_LOW_POINT) * NUMBER_SW_SEGMENTS;

- rgb_resulted[hw_points - 1].red = output_tf->tf_pts.red[start_index];

- rgb_resulted[hw_points - 1].green = output_tf->tf_pts.green[start_index];

- rgb_resulted[hw_points - 1].blue = output_tf->tf_pts.blue[start_index];

- corner_points[0].red.x = dc_fixpt_pow(dc_fixpt_from_int(2),

- dc_fixpt_from_int(region_start));

- corner_points[0].green.x = corner_points[0].red.x;

- corner_points[0].blue.x = corner_points[0].red.x;

- corner_points[1].red.x = dc_fixpt_pow(dc_fixpt_from_int(2),

- dc_fixpt_from_int(region_end));

- corner_points[1].green.x = corner_points[1].red.x;

- corner_points[1].blue.x = corner_points[1].red.x;

- corner_points[0].red.y = rgb_resulted[0].red;

- corner_points[0].green.y = rgb_resulted[0].green;

- corner_points[0].blue.y = rgb_resulted[0].blue;

- /* see comment above, m_arrPoints[1].y should be the Y value for the

- * region end (m_numOfHwPoints), not last HW point(m_numOfHwPoints - 1)

- corner_points[1].red.y = rgb_resulted[hw_points - 1].red;

- corner_points[1].green.y = rgb_resulted[hw_points - 1].green;

- corner_points[1].blue.y = rgb_resulted[hw_points - 1].blue;

- corner_points[1].red.slope = dc_fixpt_zero;

- corner_points[1].green.slope = dc_fixpt_zero;

- corner_points[1].blue.slope = dc_fixpt_zero;

- if (output_tf->tf == TRANSFER_FUNCTION_PQ) {

- /* for PQ, we want to have a straight line from last HW X point,

- * and the slope to be such that we hit 1.0 at 10000 nits.

- const struct fixed31_32 end_value =

- dc_fixpt_from_int(125);

- corner_points[1].red.slope = dc_fixpt_div(

- dc_fixpt_sub(dc_fixpt_one, corner_points[1].red.y),

- dc_fixpt_sub(end_value, corner_points[1].red.x));

- corner_points[1].green.slope = dc_fixpt_div(

- dc_fixpt_sub(dc_fixpt_one, corner_points[1].green.y),

- dc_fixpt_sub(end_value, corner_points[1].green.x));

- corner_points[1].blue.slope = dc_fixpt_div(

- dc_fixpt_sub(dc_fixpt_one, corner_points[1].blue.y),

- dc_fixpt_sub(end_value, corner_points[1].blue.x));

- lut_params->hw_points_num = hw_points;

- for (i = 1; i < MAX_REGIONS_NUMBER; i++) {

- if (seg_distr[k] != -1) {

- lut_params->arr_curve_points[k].segments_num =

- lut_params->arr_curve_points[i].offset =

- lut_params->arr_curve_points[k].offset + (1 << seg_distr[k]);

- if (seg_distr[k] != -1)

- lut_params->arr_curve_points[k].segments_num = seg_distr[k];

- rgb = rgb_resulted;

- rgb_plus_1 = rgb_resulted + 1;

- while (i != hw_points + 1) {

- if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))

- rgb_plus_1->red = rgb->red;

- if (dc_fixpt_lt(rgb_plus_1->green, rgb->green))

- rgb_plus_1->green = rgb->green;

- if (dc_fixpt_lt(rgb_plus_1->blue, rgb->blue))

- rgb_plus_1->blue = rgb->blue;

- rgb->delta_red = dc_fixpt_sub(rgb_plus_1->red, rgb->red);

- rgb->delta_green = dc_fixpt_sub(rgb_plus_1->green, rgb->green);

- rgb->delta_blue = dc_fixpt_sub(rgb_plus_1->blue, rgb->blue);

- cm3_helper_convert_to_custom_float(rgb_resulted,

- lut_params->corner_points,

- hw_points, false);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c
index 573898984726..f9961a6446f3 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

- uint8_t pwrseq_inst = 0xF;

- switch (init_data->eng_id) {

- case ENGINE_ID_DIGA:

- case ENGINE_ID_DIGB:

- DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", init_data->eng_id);

- if (dcn31_panel_cntl->base.ctx->dc->config.support_edp0_on_dp1)

diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
index f496e952ceec..d01a8b8f9595 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

- uint8_t synchronous_clock = 0; /* asynchronous mode */

- misc0 = misc0 | synchronous_clock;

diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
index b2cea59ba5d4..9a92f73d5b7f 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

- if (cmd.query_dp_alt.data.is_usb &&

- cmd.query_dp_alt.data.is_dp4 == 0)

diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
index 5b343f745cf3..ae81451a3a72 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
index d4a3e811aa39..ea0c9a9d0bd6 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c

diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.h
index d546a3676304..f9d4221f4b43 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.h

diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
index 0a27e0942a12..098c2a01a850 100644
--- a/drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

- uint8_t synchronous_clock = 0; /* asynchronous mode */

- misc0 = misc0 | synchronous_clock;

diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/amd/display/dc/dm_helpers.h
index 2e4a46f1b499..5efddd48d5c5 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h

diff --git a/drivers/gpu/drm/amd/display/dc/dm_services.h b/drivers/gpu/drm/amd/display/dc/dm_services.h
index 9405c47ee2a9..f81e5a4e1d6d 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services.h

-unsigned int snprintf_count(char *pBuf, unsigned int bufSize, char *fmt, ...);

diff --git a/drivers/gpu/drm/amd/display/dc/dml/Makefile b/drivers/gpu/drm/amd/display/dc/dml/Makefile
index 46f9c05de16e..e1d500633dfa 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dml/Makefile

-ifeq ($(filter y,$(CONFIG_KASAN)$(CONFIG_KCSAN)),y)

-frame_warn_flag := -Wframe-larger-than=3072

-frame_warn_flag := -Wframe-larger-than=2048

diff --git a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
index 39525721c976..f1235bf9a596 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

-static unsigned int dcn_find_normalized_clock_vdd_Level(

- const struct dc *dc,

- enum dm_pp_clock_type clocks_type,

- int clocks_in_khz)

- int vdd_level = dcn_bw_v_min0p65;

- if (clocks_in_khz == 0)/*todo some clock not in the considerations*/

- switch (clocks_type) {

- case DM_PP_CLOCK_TYPE_DISPLAY_CLK:

- if (clocks_in_khz > dc->dcn_soc->max_dispclk_vmax0p9*1000) {

- vdd_level = dcn_bw_v_max0p91;

- BREAK_TO_DEBUGGER();

- } else if (clocks_in_khz > dc->dcn_soc->max_dispclk_vnom0p8*1000) {

- vdd_level = dcn_bw_v_max0p9;

- } else if (clocks_in_khz > dc->dcn_soc->max_dispclk_vmid0p72*1000) {

- vdd_level = dcn_bw_v_nom0p8;

- } else if (clocks_in_khz > dc->dcn_soc->max_dispclk_vmin0p65*1000) {

- vdd_level = dcn_bw_v_mid0p72;

- vdd_level = dcn_bw_v_min0p65;

- case DM_PP_CLOCK_TYPE_DISPLAYPHYCLK:

- if (clocks_in_khz > dc->dcn_soc->phyclkv_max0p9*1000) {

- vdd_level = dcn_bw_v_max0p91;

- BREAK_TO_DEBUGGER();

- } else if (clocks_in_khz > dc->dcn_soc->phyclkv_nom0p8*1000) {

- vdd_level = dcn_bw_v_max0p9;

- } else if (clocks_in_khz > dc->dcn_soc->phyclkv_mid0p72*1000) {

- vdd_level = dcn_bw_v_nom0p8;

- } else if (clocks_in_khz > dc->dcn_soc->phyclkv_min0p65*1000) {

- vdd_level = dcn_bw_v_mid0p72;

- vdd_level = dcn_bw_v_min0p65;

- case DM_PP_CLOCK_TYPE_DPPCLK:

- if (clocks_in_khz > dc->dcn_soc->max_dppclk_vmax0p9*1000) {

- vdd_level = dcn_bw_v_max0p91;

- BREAK_TO_DEBUGGER();

- } else if (clocks_in_khz > dc->dcn_soc->max_dppclk_vnom0p8*1000) {

- vdd_level = dcn_bw_v_max0p9;

- } else if (clocks_in_khz > dc->dcn_soc->max_dppclk_vmid0p72*1000) {

- vdd_level = dcn_bw_v_nom0p8;

- } else if (clocks_in_khz > dc->dcn_soc->max_dppclk_vmin0p65*1000) {

- vdd_level = dcn_bw_v_mid0p72;

- vdd_level = dcn_bw_v_min0p65;

- case DM_PP_CLOCK_TYPE_MEMORY_CLK:

- unsigned factor = (ddr4_dram_factor_single_Channel * dc->dcn_soc->number_of_channels);

- if (clocks_in_khz > dc->dcn_soc->fabric_and_dram_bandwidth_vmax0p9*1000000/factor) {

- vdd_level = dcn_bw_v_max0p91;

- BREAK_TO_DEBUGGER();

- } else if (clocks_in_khz > dc->dcn_soc->fabric_and_dram_bandwidth_vnom0p8*1000000/factor) {

- vdd_level = dcn_bw_v_max0p9;

- } else if (clocks_in_khz > dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72*1000000/factor) {

- vdd_level = dcn_bw_v_nom0p8;

- } else if (clocks_in_khz > dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65*1000000/factor) {

- vdd_level = dcn_bw_v_mid0p72;

- vdd_level = dcn_bw_v_min0p65;

- case DM_PP_CLOCK_TYPE_DCFCLK:

- if (clocks_in_khz > dc->dcn_soc->dcfclkv_max0p9*1000) {

- vdd_level = dcn_bw_v_max0p91;

- BREAK_TO_DEBUGGER();

- } else if (clocks_in_khz > dc->dcn_soc->dcfclkv_nom0p8*1000) {

- vdd_level = dcn_bw_v_max0p9;

- } else if (clocks_in_khz > dc->dcn_soc->dcfclkv_mid0p72*1000) {

- vdd_level = dcn_bw_v_nom0p8;

- } else if (clocks_in_khz > dc->dcn_soc->dcfclkv_min0p65*1000) {

- vdd_level = dcn_bw_v_mid0p72;

- vdd_level = dcn_bw_v_min0p65;

-unsigned int dcn_find_dcfclk_suits_all(

- const struct dc *dc,

- struct dc_clocks *clocks)

- unsigned vdd_level, vdd_level_temp;

- /*find a common supported voltage level*/

- vdd_level = dcn_find_normalized_clock_vdd_Level(

- dc, DM_PP_CLOCK_TYPE_DISPLAY_CLK, clocks->dispclk_khz);

- vdd_level_temp = dcn_find_normalized_clock_vdd_Level(

- dc, DM_PP_CLOCK_TYPE_DISPLAYPHYCLK, clocks->phyclk_khz);

- vdd_level = dcn_bw_max(vdd_level, vdd_level_temp);

- vdd_level_temp = dcn_find_normalized_clock_vdd_Level(

- dc, DM_PP_CLOCK_TYPE_DPPCLK, clocks->dppclk_khz);

- vdd_level = dcn_bw_max(vdd_level, vdd_level_temp);

- vdd_level_temp = dcn_find_normalized_clock_vdd_Level(

- dc, DM_PP_CLOCK_TYPE_MEMORY_CLK, clocks->fclk_khz);

- vdd_level = dcn_bw_max(vdd_level, vdd_level_temp);

- vdd_level_temp = dcn_find_normalized_clock_vdd_Level(

- dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz);

- /*find that level conresponding dcfclk*/

- vdd_level = dcn_bw_max(vdd_level, vdd_level_temp);

- if (vdd_level == dcn_bw_v_max0p91) {

- BREAK_TO_DEBUGGER();

- dcf_clk = dc->dcn_soc->dcfclkv_max0p9*1000;

- } else if (vdd_level == dcn_bw_v_max0p9)

- dcf_clk = dc->dcn_soc->dcfclkv_max0p9*1000;

- else if (vdd_level == dcn_bw_v_nom0p8)

- dcf_clk = dc->dcn_soc->dcfclkv_nom0p8*1000;

- else if (vdd_level == dcn_bw_v_mid0p72)

- dcf_clk = dc->dcn_soc->dcfclkv_mid0p72*1000;

- dcf_clk = dc->dcn_soc->dcfclkv_min0p65*1000;

- DC_LOG_BANDWIDTH_CALCS("\tdcf_clk for voltage = %d\n", dcf_clk);

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 565f3c492477..0c8c4a080c50 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 9d6675ecc5f1..c935903b68e1 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 4fce64a030b6..390c1a77fda6 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

- log2_blk_height = 0;

- log2_blk_width = 0;

- log2_meta_row_height = 0;

- meta_row_width_ub = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
index 3fa9a5da02f6..843d6004258c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c

- log2_blk_height = 0;

- log2_blk_width = 0;

- log2_meta_row_height = 0;

- meta_row_width_ub = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index eb3ed965e48b..cd8cca651419 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
index 9e1c18b90805..5718000627b0 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c

- log2_blk_height = 0;

- log2_blk_width = 0;

- log2_meta_row_height = 0;

- meta_row_width_ub = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
index 1c10ba4dcdde..cee1b351e105 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

- } else if (MacroTileSizeBytes == 4096) {

- PixelPTEReqHeightPTEs = 1;

- *PixelPTEReqHeight = MacroTileHeight;

- *PixelPTEReqWidth = 8 * *MacroTileWidth;

- *PTERequestSize = 64;

- if (ScanDirection != dm_vert)

- FractionOfPTEReturnDrop = 0;

- FractionOfPTEReturnDrop = 7.0 / 8;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
index b28fcc8608ff..8d4873f80df0 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c

- log2_blk_height = 0;

- log2_blk_width = 0;

- log2_meta_row_height = 0;

- meta_row_width_ub = 0;

dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_vblank);

dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_flip);

dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_flip);

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 2b275e680379..f567a9023682 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
index b57b095cd4a8..c46bda2141ac 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c

- log2_blk_height = 0;

- log2_blk_width = 0;

- log2_meta_row_height = 0;

- meta_row_width_ub = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
index debfa31583a6..5865e8fa2d8e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
index 61b3bebf24c9..b7d2a0caec11 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c

- log2_blk_height = 0;

- log2_blk_width = 0;

- log2_meta_row_height = 0;

- meta_row_width_ub = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index d92fb428ee96..0748ef36a16a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

+ else if ((Output == dm_dp2p0 || Output == dm_dp) && NonDSCBPP3 != BPP_INVALID && MaxLinkBPP >= NonDSCBPP3)

- TimeForFetchingMetaPTE = 0;

- TimeForFetchingRowInVBlank = 0;

- LinesToRequestPrefetchPixelData = 0;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
index beed7adbbd43..47d785204f29 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

- .do_urgent_latency_adjustment = 1,

- .urgent_latency_adjustment_fabric_clock_reference_mhz = 3000,

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c
index a201dbb743d7..d9e63c4fdd95 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

- .sr_exit_z8_time_us = 250.0,

- .sr_enter_plus_exit_z8_time_us = 350.0,

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
index d8bfc85e5dcd..88dc2b97e7bf 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

- bool mode_422 = 0;

- unsigned int ppe = mode_422 ? 2 : 1;

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h b/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h
index 072bd0539605..6b2ab4ec2b5f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dml_inline_defs.h

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/Makefile b/drivers/gpu/drm/amd/display/dc/dml2/Makefile
index c4378e620cbf..21fd466dba26 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dml2/Makefile

-ifeq ($(filter y,$(CONFIG_KASAN)$(CONFIG_KCSAN)),y)

-frame_warn_flag := -Wframe-larger-than=3072

-frame_warn_flag := -Wframe-larger-than=2048

-CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml_top.o := $(dml2_ccflags)

-CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml_top_mcache.o := $(dml2_ccflags)

-CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml2_top_optimization := $(dml2_ccflags)

CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.o := $(dml2_ccflags) $(frame_warn_flag)

-CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml_top.o := $(dml2_rcflags)

-CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml_top_mcache.o := $(dml2_rcflags)

-CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml2_top_optimization.o := $(dml2_rcflags)

-DML21 := src/dml2_top/dml_top.o

-DML21 += src/dml2_top/dml_top_mcache.o

-DML21 += src/dml2_top/dml2_top_optimization.o

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
index d851c081e376..84a2de9a76d4 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c

s->dst_y_prefetch_equ = p->VStartup - (*p->TSetup + dml_max(p->TWait + p->TCalc, *p->Tdmdl)) / s->LineTime - (*p->DSTYAfterScaler + (dml_float_t) *p->DSTXAfterScaler / (dml_float_t)p->myPipe->HTotal);

+ s->dst_y_prefetch_equ = dml_min(s->dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH

-static dml_float_t CalculateTWait(

-static dml_float_t CalculateExtraLatency(

-static dml_bool_t CalculateVActiveBandwithSupport(dml_uint_t NumberOfActiveSurfaces,

+static noinline_for_stack dml_bool_t CalculateVActiveBandwithSupport(dml_uint_t NumberOfActiveSurfaces,

-static dml_float_t CalculateBandwidthAvailableForImmediateFlip(

-static void set_calculate_prefetch_schedule_params(struct display_mode_lib_st *mode_lib,

+static noinline_for_stack void set_calculate_prefetch_schedule_params(struct display_mode_lib_st *mode_lib,

-static void dml_prefetch_check(struct display_mode_lib_st *mode_lib)

struct CalculatePrefetchSchedule_params_st *CalculatePrefetchSchedule_params = &mode_lib->scratch.CalculatePrefetchSchedule_params;

- mode_lib->ms.UrgentBurstFactorLuma,

- mode_lib->ms.UrgentBurstFactorChroma,

- mode_lib->ms.UrgentBurstFactorCursor);

- &mode_lib->ms.UrgentBurstFactorChroma[k],

mode_lib->ms.cursor_bw_pre[k] = mode_lib->ms.cache_display_cfg.plane.NumberOfCursors[k] * mode_lib->ms.cache_display_cfg.plane.CursorWidth[k] *

- mode_lib->ms.UrgentBurstFactorLuma,

- mode_lib->ms.UrgentBurstFactorChroma,

- mode_lib->ms.UrgentBurstFactorCursor,

- mode_lib->ms.UrgentBurstFactorLuma,

- mode_lib->ms.UrgentBurstFactorChroma,

- mode_lib->ms.UrgentBurstFactorCursor,

mode_lib->ms.NoOfDPP[j], // VBA_ERROR DPPPerSurface is not assigned at this point, should use NoOfDpp here

- mode_lib->ms.UrgentBurstFactorLuma,

- mode_lib->ms.UrgentBurstFactorChroma,

- mode_lib->ms.UrgentBurstFactorCursor,

- &mode_lib->ms.UrgentBurstFactorCursor[k],

- &mode_lib->ms.UrgentBurstFactorLuma[k],

- &mode_lib->ms.UrgentBurstFactorChroma[k],

- locals->Dcfclk = clk_cfg->dcfclk_freq_mhz;

- locals->Dispclk = clk_cfg->dispclk_freq_mhz;

- locals->Dppclk[k] = clk_cfg->dppclk_freq_mhz[k];

dml_print("DML::%s: DestinationLineTimesForPrefetchLessThan2 = %u\n", __func__, s->DestinationLineTimesForPrefetchLessThan2);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core_structs.h b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core_structs.h
index f951936bb579..dd3f43181a6e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core_structs.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core_structs.h

- dml_use_mall_pstate_change_phantom_pipe = 3

- dml_sw_256kb_r_x = 31

- dml_mpc_as_needed_for_pstate_and_voltage = 3

- dml_odm_use_policy_combine_4to1 = 3,

- dml_odm_use_policy_split_1to2 = 4,

- dml_odm_use_policy_mso_1to2 = 5,

- dml_odm_use_policy_mso_1to4 = 6

- dml_odm_mode_combine_4to1 = 2,

- dml_odm_mode_split_1to2 = 3,

- dml_odm_mode_mso_1to2 = 4,

- dml_odm_mode_mso_1to4 = 5

- dml_float_t max_outstanding_reqs;

+ enum dml_clk_cfg_policy dcfclk_option; ///< brief Use for mode_program; user can select between use the min require clk req as calculated by DML or use the test-specific freq

+ enum dml_clk_cfg_policy dispclk_option; ///< brief Use for mode_program; user can select between use the min require clk req as calculated by DML or use the test-specific freq

/// Describe how to display a surface in multi-plane setup and output to different output and writeback using the specified timgin

-/// @brief To control the clk usage for model programming

-struct dml_clk_cfg_st {

- enum dml_clk_cfg_policy dcfclk_option; ///< brief Use for mode_program; user can select between use the min require clk req as calculated by DML or use the test-specific freq

- enum dml_clk_cfg_policy dispclk_option; ///< brief Use for mode_program; user can select between use the min require clk req as calculated by DML or use the test-specific freq

- enum dml_clk_cfg_policy dppclk_option[__DML_NUM_PLANES__];

- dml_float_t dcfclk_freq_mhz;

- dml_float_t dispclk_freq_mhz;

- dml_float_t dppclk_freq_mhz[__DML_NUM_PLANES__];

-}; // dml_clk_cfg_st

- dml_float_t UrgentBurstFactorCursor[__DML_NUM_PLANES__];

- dml_float_t UrgentBurstFactorLuma[__DML_NUM_PLANES__];

- dml_float_t UrgentBurstFactorChroma[__DML_NUM_PLANES__];

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_util.c b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_util.c
index c247aee89caf..89890c88fd66 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_util.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_util.c

- dml_print("DML: clk_cfg: dcfclk_freq_mhz = %f\n", clk_cfg->dcfclk_freq_mhz);

- dml_print("DML: clk_cfg: dispclk_freq_mhz = %f\n", clk_cfg->dispclk_freq_mhz);

- dml_print("DML: clk_cfg: i=%d, dppclk_freq_mhz = %f\n", i, clk_cfg->dppclk_freq_mhz[i]);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
index 8697eac1e1f7..0c8ec30ea672 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

-#include "bounding_boxes/dcn3_soc_bb.h"

- case DCN_VERSION_3_2: // TODO : Temporary for N-1 validation. Remove this after N-1 validation phase is complete.

- soc_bb = &dml2_socbb_dcn31;

- qos_params = &dml_dcn31_soc_qos_params;

- case DCN_VERSION_3_2: // TODO : Temporary for N-1 validation. Remove this after N-1 validation phase is complete.

- ip_caps = &dml2_dcn31_max_ip_caps;

- if (in_dc->ctx->dc_bios->vram_info.num_chans) {

- if (in_dc->ctx->dc_bios->vram_info.dram_channel_width_bytes) {

dml_clk_table->dram_config.channel_width_bytes = in_dc->ctx->dc_bios->vram_info.dram_channel_width_bytes;

- unsigned int hblank_start, vblank_start;

timing->h_active = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;

timing->v_active = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top;

- timing->drr_config.min_refresh_uhz = stream->timing.min_refresh_in_uhz;

timing->drr_config.max_instant_vtotal_delta = dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase(stream, false);

+ * adjust_dml21_hblank_timing_config_from_pipe_ctx - Adjusts the horizontal blanking timing configuration

+static void adjust_dml21_hblank_timing_config_from_pipe_ctx(struct dml2_timing_cfg *timing, struct pipe_ctx *pipe)

surface->dcc.informative.fraction_of_zero_size_request_plane1 = plane_state->dcc.independent_64b_blks_c;

- if (in_dc->ctx->dce_version < DCN_VERSION_4_01) {

- /* needed for N-1 testing */

- plane_state->dst_rect.height >= stream->timing.v_addressable &&

- ASSERT(disp_cfg_stream_location >= 0 && disp_cfg_stream_location <= __DML2_WRAPPER_MAX_STREAMS_PLANES__);

+ ASSERT(disp_cfg_stream_location >= 0 && disp_cfg_stream_location < __DML2_WRAPPER_MAX_STREAMS_PLANES__);

populate_dml21_timing_config_from_stream_state(&dml_dispcfg->stream_descriptors[disp_cfg_stream_location].timing, context->streams[stream_index], dml_ctx);

+ adjust_dml21_hblank_timing_config_from_pipe_ctx(&dml_dispcfg->stream_descriptors[disp_cfg_stream_location].timing, &context->res_ctx.pipe_ctx[stream_index]);

populate_dml21_output_config_from_stream_state(&dml_dispcfg->stream_descriptors[disp_cfg_stream_location].output, context->streams[stream_index], &context->res_ctx.pipe_ctx[stream_index]);

populate_dml21_stream_overrides_from_stream_state(&dml_dispcfg->stream_descriptors[disp_cfg_stream_location], context->streams[stream_index]);

- ASSERT(disp_cfg_plane_location >= 0 && disp_cfg_plane_location <= __DML2_WRAPPER_MAX_STREAMS_PLANES__);

+ ASSERT(disp_cfg_plane_location >= 0 && disp_cfg_plane_location < __DML2_WRAPPER_MAX_STREAMS_PLANES__);

populate_dml21_surface_config_from_plane_state(in_dc, &dml_dispcfg->plane_descriptors[disp_cfg_plane_location].surface, context->stream_status[stream_index].plane_states[plane_index]);

populate_dml21_plane_config_from_plane_state(dml_ctx, &dml_dispcfg->plane_descriptors[disp_cfg_plane_location], context->stream_status[stream_index].plane_states[plane_index], context, stream_index);

context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk_pstate_supported;

context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz > 0;

context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz;

-void dml21_extract_legacy_watermark_set(const struct dc *in_dc, struct dcn_watermarks *watermark, enum dml2_dchub_watermark_reg_set_index reg_set_idx, struct dml2_context *in_ctx)

- struct dml2_core_internal_display_mode_lib *mode_lib = &in_ctx->v21.dml_init.dml2_instance->core_instance.clean_me_up.mode_lib;

- double refclk_freq_in_mhz = (in_ctx->v21.display_config.overrides.hw.dlg_ref_clk_mhz > 0) ? (double)in_ctx->v21.display_config.overrides.hw.dlg_ref_clk_mhz : mode_lib->soc.dchub_refclk_mhz;

- if (reg_set_idx >= DML2_DCHUB_WATERMARK_SET_NUM) {

- /* invalid register set index */

- /* convert to legacy format (time in ns) */

- watermark->urgent_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].urgent / refclk_freq_in_mhz) * 1000.0;

- watermark->pte_meta_urgent_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].urgent / refclk_freq_in_mhz) * 1000.0;

- watermark->cstate_pstate.cstate_enter_plus_exit_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].sr_enter / refclk_freq_in_mhz) * 1000.0;

- watermark->cstate_pstate.cstate_exit_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].sr_exit / refclk_freq_in_mhz) * 1000.0;

- watermark->cstate_pstate.pstate_change_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].uclk_pstate / refclk_freq_in_mhz) * 1000.0;

- watermark->urgent_latency_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].urgent / refclk_freq_in_mhz) * 1000.0;

- watermark->cstate_pstate.fclk_pstate_change_ns = ((double)in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].fclk_pstate / refclk_freq_in_mhz) * 1000.0;

- watermark->frac_urg_bw_flip = in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].frac_urg_bw_flip;

- watermark->frac_urg_bw_nom = in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set_idx].frac_urg_bw_nom;

+ context->bw_ctx.bw.dcn.clk.socclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.socclk_khz;

+ context->bw_ctx.bw.dcn.clk.subvp_prefetch_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.svp_prefetch_no_throttle.uclk_khz;

+ context->bw_ctx.bw.dcn.clk.subvp_prefetch_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz;

static struct dml2_dchub_watermark_regs *wm_set_index_to_dc_wm_set(union dcn_watermark_set *watermarks, const enum dml2_dchub_watermark_reg_set_index wm_index)

-void dml21_populate_pipe_ctx_dlg_params(struct dml2_context *dml_ctx, struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_stream_programming *stream_programming)

- unsigned int hactive, vactive, hblank_start, vblank_start, hblank_end, vblank_end;

- struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;

- union dml2_global_sync_programming *global_sync = &stream_programming->global_sync;

- hactive = timing->h_addressable + timing->h_border_left + timing->h_border_right;

- vactive = timing->v_addressable + timing->v_border_bottom + timing->v_border_top;

- hblank_start = pipe_ctx->stream->timing.h_total - pipe_ctx->stream->timing.h_front_porch;

- vblank_start = pipe_ctx->stream->timing.v_total - pipe_ctx->stream->timing.v_front_porch;

- hblank_end = hblank_start - timing->h_addressable - timing->h_border_left - timing->h_border_right;

- vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom;

- if (dml_ctx->config.svp_pstate.callbacks.get_pipe_subvp_type(context, pipe_ctx) == SUBVP_PHANTOM) {

- /* phantom has its own global sync */

- global_sync = &stream_programming->phantom_stream.global_sync;

- pipe_ctx->pipe_dlg_param.vstartup_start = global_sync->dcn4x.vstartup_lines;

- pipe_ctx->pipe_dlg_param.vupdate_offset = global_sync->dcn4x.vupdate_offset_pixels;

- pipe_ctx->pipe_dlg_param.vupdate_width = global_sync->dcn4x.vupdate_vupdate_width_pixels;

- pipe_ctx->pipe_dlg_param.vready_offset = global_sync->dcn4x.vready_offset_pixels;

- pipe_ctx->pipe_dlg_param.pstate_keepout = global_sync->dcn4x.pstate_keepout_start_lines;

- pipe_ctx->pipe_dlg_param.otg_inst = pipe_ctx->stream_res.tg->inst;

- pipe_ctx->pipe_dlg_param.hactive = hactive;

- pipe_ctx->pipe_dlg_param.vactive = vactive;

- pipe_ctx->pipe_dlg_param.htotal = pipe_ctx->stream->timing.h_total;

- pipe_ctx->pipe_dlg_param.vtotal = pipe_ctx->stream->timing.v_total;

- pipe_ctx->pipe_dlg_param.hblank_end = hblank_end;

- pipe_ctx->pipe_dlg_param.vblank_end = vblank_end;

- pipe_ctx->pipe_dlg_param.hblank_start = hblank_start;

- pipe_ctx->pipe_dlg_param.vblank_start = vblank_start;

- pipe_ctx->pipe_dlg_param.vfront_porch = pipe_ctx->stream->timing.v_front_porch;

- pipe_ctx->pipe_dlg_param.pixel_rate_mhz = pipe_ctx->stream->timing.pix_clk_100hz / 10000.00;

- pipe_ctx->pipe_dlg_param.refresh_rate = ((timing->pix_clk_100hz * 100) / timing->h_total) / timing->v_total;

- pipe_ctx->pipe_dlg_param.vtotal_max = pipe_ctx->stream->adjust.v_total_max;

- pipe_ctx->pipe_dlg_param.vtotal_min = pipe_ctx->stream->adjust.v_total_min;

- pipe_ctx->pipe_dlg_param.recout_height = pipe_ctx->plane_res.scl_data.recout.height;

- pipe_ctx->pipe_dlg_param.recout_width = pipe_ctx->plane_res.scl_data.recout.width;

- pipe_ctx->pipe_dlg_param.full_recout_height = pipe_ctx->plane_res.scl_data.recout.height;

- pipe_ctx->pipe_dlg_param.full_recout_width = pipe_ctx->plane_res.scl_data.recout.width;

- case dml2_uclk_pstate_support_method_vactive:

- case dml2_uclk_pstate_support_method_fw_vactive_drr:

- case dml2_uclk_pstate_support_method_vblank:

- case dml2_uclk_pstate_support_method_fw_vblank_drr:

- case dml2_uclk_pstate_support_method_fw_subvp_phantom:

- case dml2_uclk_pstate_support_method_fw_subvp_phantom_drr:

- case dml2_uclk_pstate_support_method_fw_drr:

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h
index 476a7f6e4875..069b939c672a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h

void dml21_initialize_ip_params(struct dml2_initialize_instance_in_out *dml_init, const struct dml2_configuration_options *config, const struct dc *in_dc);

bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx);

-void dml21_populate_pipe_ctx_dlg_params(struct dml2_context *dml_ctx, struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_stream_programming *stream_programming);

-void dml21_extract_legacy_watermark_set(const struct dc *in_dc, struct dcn_watermarks *watermark, enum dml2_dchub_watermark_reg_set_index reg_set_idx, struct dml2_context *in_ctx);

void dml21_extract_watermark_sets(const struct dc *in_dc, union dcn_watermark_set *watermarks, struct dml2_context *in_ctx);

void dml21_get_pipe_mcache_config(struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog, struct dml2_pipe_configuration_descriptor *mcache_pipe_config);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c
index 51d491bffa32..1e56d995cd0e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c

-void dml21_update_pipe_ctx_dchub_regs(struct dml2_display_rq_regs *rq_regs,

- struct dml2_display_dlg_regs *disp_dlg_regs,

- struct dml2_display_ttu_regs *disp_ttu_regs,

- struct pipe_ctx *out)

- memset(&out->rq_regs, 0, sizeof(out->rq_regs));

- out->rq_regs.rq_regs_l.chunk_size = rq_regs->rq_regs_l.chunk_size;

- out->rq_regs.rq_regs_l.min_chunk_size = rq_regs->rq_regs_l.min_chunk_size;

- //out->rq_regs.rq_regs_l.meta_chunk_size = rq_regs->rq_regs_l.meta_chunk_size;

- //out->rq_regs.rq_regs_l.min_meta_chunk_size = rq_regs->rq_regs_l.min_meta_chunk_size;

- out->rq_regs.rq_regs_l.dpte_group_size = rq_regs->rq_regs_l.dpte_group_size;

- out->rq_regs.rq_regs_l.mpte_group_size = rq_regs->rq_regs_l.mpte_group_size;

- out->rq_regs.rq_regs_l.swath_height = rq_regs->rq_regs_l.swath_height;

- out->rq_regs.rq_regs_l.pte_row_height_linear = rq_regs->rq_regs_l.pte_row_height_linear;

- out->rq_regs.rq_regs_c.chunk_size = rq_regs->rq_regs_c.chunk_size;

- out->rq_regs.rq_regs_c.min_chunk_size = rq_regs->rq_regs_c.min_chunk_size;

- //out->rq_regs.rq_regs_c.meta_chunk_size = rq_regs->rq_regs_c.meta_chunk_size;

- //out->rq_regs.rq_regs_c.min_meta_chunk_size = rq_regs->rq_regs_c.min_meta_chunk_size;

- out->rq_regs.rq_regs_c.dpte_group_size = rq_regs->rq_regs_c.dpte_group_size;

- out->rq_regs.rq_regs_c.mpte_group_size = rq_regs->rq_regs_c.mpte_group_size;

- out->rq_regs.rq_regs_c.swath_height = rq_regs->rq_regs_c.swath_height;

- out->rq_regs.rq_regs_c.pte_row_height_linear = rq_regs->rq_regs_c.pte_row_height_linear;

- out->rq_regs.drq_expansion_mode = rq_regs->drq_expansion_mode;

- out->rq_regs.prq_expansion_mode = rq_regs->prq_expansion_mode;

- //out->rq_regs.mrq_expansion_mode = rq_regs->mrq_expansion_mode;

- out->rq_regs.crq_expansion_mode = rq_regs->crq_expansion_mode;

- out->rq_regs.plane1_base_address = rq_regs->plane1_base_address;

- out->unbounded_req = rq_regs->unbounded_request_enabled;

- memset(&out->dlg_regs, 0, sizeof(out->dlg_regs));

- out->dlg_regs.refcyc_h_blank_end = disp_dlg_regs->refcyc_h_blank_end;

- out->dlg_regs.dlg_vblank_end = disp_dlg_regs->dlg_vblank_end;

- out->dlg_regs.min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start;

- out->dlg_regs.refcyc_per_htotal = disp_dlg_regs->refcyc_per_htotal;

- out->dlg_regs.refcyc_x_after_scaler = disp_dlg_regs->refcyc_x_after_scaler;

- out->dlg_regs.dst_y_after_scaler = disp_dlg_regs->dst_y_after_scaler;

- out->dlg_regs.dst_y_prefetch = disp_dlg_regs->dst_y_prefetch;

- out->dlg_regs.dst_y_per_vm_vblank = disp_dlg_regs->dst_y_per_vm_vblank;

- out->dlg_regs.dst_y_per_row_vblank = disp_dlg_regs->dst_y_per_row_vblank;

- out->dlg_regs.dst_y_per_vm_flip = disp_dlg_regs->dst_y_per_vm_flip;

- out->dlg_regs.dst_y_per_row_flip = disp_dlg_regs->dst_y_per_row_flip;

- out->dlg_regs.ref_freq_to_pix_freq = disp_dlg_regs->ref_freq_to_pix_freq;

- out->dlg_regs.vratio_prefetch = disp_dlg_regs->vratio_prefetch;

- out->dlg_regs.vratio_prefetch_c = disp_dlg_regs->vratio_prefetch_c;

- out->dlg_regs.refcyc_per_tdlut_group = disp_dlg_regs->refcyc_per_tdlut_group;

- out->dlg_regs.refcyc_per_pte_group_vblank_l = disp_dlg_regs->refcyc_per_pte_group_vblank_l;

- out->dlg_regs.refcyc_per_pte_group_vblank_c = disp_dlg_regs->refcyc_per_pte_group_vblank_c;

- //out->dlg_regs.refcyc_per_meta_chunk_vblank_l = disp_dlg_regs->refcyc_per_meta_chunk_vblank_l;

- //out->dlg_regs.refcyc_per_meta_chunk_vblank_c = disp_dlg_regs->refcyc_per_meta_chunk_vblank_c;

- out->dlg_regs.refcyc_per_pte_group_flip_l = disp_dlg_regs->refcyc_per_pte_group_flip_l;

- out->dlg_regs.refcyc_per_pte_group_flip_c = disp_dlg_regs->refcyc_per_pte_group_flip_c;

- //out->dlg_regs.refcyc_per_meta_chunk_flip_l = disp_dlg_regs->refcyc_per_meta_chunk_flip_l;

- //out->dlg_regs.refcyc_per_meta_chunk_flip_c = disp_dlg_regs->refcyc_per_meta_chunk_flip_c;

- out->dlg_regs.dst_y_per_pte_row_nom_l = disp_dlg_regs->dst_y_per_pte_row_nom_l;

- out->dlg_regs.dst_y_per_pte_row_nom_c = disp_dlg_regs->dst_y_per_pte_row_nom_c;

- out->dlg_regs.refcyc_per_pte_group_nom_l = disp_dlg_regs->refcyc_per_pte_group_nom_l;

- out->dlg_regs.refcyc_per_pte_group_nom_c = disp_dlg_regs->refcyc_per_pte_group_nom_c;

- //out->dlg_regs.dst_y_per_meta_row_nom_l = disp_dlg_regs->dst_y_per_meta_row_nom_l;

- //out->dlg_regs.dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_c;

- //out->dlg_regs.refcyc_per_meta_chunk_nom_l = disp_dlg_regs->refcyc_per_meta_chunk_nom_l;

- //out->dlg_regs.refcyc_per_meta_chunk_nom_c = disp_dlg_regs->refcyc_per_meta_chunk_nom_c;

- out->dlg_regs.refcyc_per_line_delivery_pre_l = disp_dlg_regs->refcyc_per_line_delivery_pre_l;

- out->dlg_regs.refcyc_per_line_delivery_pre_c = disp_dlg_regs->refcyc_per_line_delivery_pre_c;

- out->dlg_regs.refcyc_per_line_delivery_l = disp_dlg_regs->refcyc_per_line_delivery_l;

- out->dlg_regs.refcyc_per_line_delivery_c = disp_dlg_regs->refcyc_per_line_delivery_c;

- out->dlg_regs.refcyc_per_vm_group_vblank = disp_dlg_regs->refcyc_per_vm_group_vblank;

- out->dlg_regs.refcyc_per_vm_group_flip = disp_dlg_regs->refcyc_per_vm_group_flip;

- out->dlg_regs.refcyc_per_vm_req_vblank = disp_dlg_regs->refcyc_per_vm_req_vblank;

- out->dlg_regs.refcyc_per_vm_req_flip = disp_dlg_regs->refcyc_per_vm_req_flip;

- out->dlg_regs.dst_y_offset_cur0 = disp_dlg_regs->dst_y_offset_cur0;

- out->dlg_regs.chunk_hdl_adjust_cur0 = disp_dlg_regs->chunk_hdl_adjust_cur0;

- //out->dlg_regs.dst_y_offset_cur1 = disp_dlg_regs->dst_y_offset_cur1;

- //out->dlg_regs.chunk_hdl_adjust_cur1 = disp_dlg_regs->chunk_hdl_adjust_cur1;

- out->dlg_regs.vready_after_vcount0 = disp_dlg_regs->vready_after_vcount0;

- out->dlg_regs.dst_y_delta_drq_limit = disp_dlg_regs->dst_y_delta_drq_limit;

- out->dlg_regs.refcyc_per_vm_dmdata = disp_dlg_regs->refcyc_per_vm_dmdata;

- out->dlg_regs.dmdata_dl_delta = disp_dlg_regs->dmdata_dl_delta;

- memset(&out->ttu_regs, 0, sizeof(out->ttu_regs));

- out->ttu_regs.qos_level_low_wm = disp_ttu_regs->qos_level_low_wm;

- out->ttu_regs.qos_level_high_wm = disp_ttu_regs->qos_level_high_wm;

- out->ttu_regs.min_ttu_vblank = disp_ttu_regs->min_ttu_vblank;

- out->ttu_regs.qos_level_flip = disp_ttu_regs->qos_level_flip;

- out->ttu_regs.refcyc_per_req_delivery_l = disp_ttu_regs->refcyc_per_req_delivery_l;

- out->ttu_regs.refcyc_per_req_delivery_c = disp_ttu_regs->refcyc_per_req_delivery_c;

- out->ttu_regs.refcyc_per_req_delivery_cur0 = disp_ttu_regs->refcyc_per_req_delivery_cur0;

- //out->ttu_regs.refcyc_per_req_delivery_cur1 = disp_ttu_regs->refcyc_per_req_delivery_cur1;

- out->ttu_regs.refcyc_per_req_delivery_pre_l = disp_ttu_regs->refcyc_per_req_delivery_pre_l;

- out->ttu_regs.refcyc_per_req_delivery_pre_c = disp_ttu_regs->refcyc_per_req_delivery_pre_c;

- out->ttu_regs.refcyc_per_req_delivery_pre_cur0 = disp_ttu_regs->refcyc_per_req_delivery_pre_cur0;

- //out->ttu_regs.refcyc_per_req_delivery_pre_cur1 = disp_ttu_regs->refcyc_per_req_delivery_pre_cur1;

- out->ttu_regs.qos_level_fixed_l = disp_ttu_regs->qos_level_fixed_l;

- out->ttu_regs.qos_level_fixed_c = disp_ttu_regs->qos_level_fixed_c;

- out->ttu_regs.qos_level_fixed_cur0 = disp_ttu_regs->qos_level_fixed_cur0;

- //out->ttu_regs.qos_level_fixed_cur1 = disp_ttu_regs->qos_level_fixed_cur1;

- out->ttu_regs.qos_ramp_disable_l = disp_ttu_regs->qos_ramp_disable_l;

- out->ttu_regs.qos_ramp_disable_c = disp_ttu_regs->qos_ramp_disable_c;

- out->ttu_regs.qos_ramp_disable_cur0 = disp_ttu_regs->qos_ramp_disable_cur0;

- //out->ttu_regs.qos_ramp_disable_cur1 = disp_ttu_regs->qos_ramp_disable_cur1;

- dml21_populate_pipe_ctx_dlg_params(dml_ctx, context, pipe_ctx, stream_prog);

memcpy(&pipe_ctx->hubp_regs, pln_prog->phantom_plane.pipe_regs[pipe_reg_index], sizeof(struct dml2_dchub_per_pipe_register_set));

- /* legacy only, should be removed later */

- dml21_update_pipe_ctx_dchub_regs(&pln_prog->phantom_plane.pipe_regs[pipe_reg_index]->rq_regs,

- &pln_prog->phantom_plane.pipe_regs[pipe_reg_index]->dlg_regs,

- &pln_prog->phantom_plane.pipe_regs[pipe_reg_index]->ttu_regs, pipe_ctx);

memcpy(&pipe_ctx->hubp_regs, pln_prog->pipe_regs[pipe_reg_index], sizeof(struct dml2_dchub_per_pipe_register_set));

- /* legacy only, should be removed later */

- dml21_update_pipe_ctx_dchub_regs(&pln_prog->pipe_regs[pipe_reg_index]->rq_regs,

- &pln_prog->pipe_regs[pipe_reg_index]->dlg_regs,

- &pln_prog->pipe_regs[pipe_reg_index]->ttu_regs, pipe_ctx);

- memset(&context->bw_ctx.bw.dcn.fams2_stream_params, 0, sizeof(struct dmub_fams2_stream_static_state) * DML2_MAX_PLANES);

+ memset(&context->bw_ctx.bw.dcn.fams2_stream_base_params, 0, sizeof(union dmub_cmd_fams2_config) * DML2_MAX_PLANES);

+ memset(&context->bw_ctx.bw.dcn.fams2_stream_sub_params, 0, sizeof(union dmub_cmd_fams2_config) * DML2_MAX_PLANES);

- struct dmub_fams2_stream_static_state *static_state = &context->bw_ctx.bw.dcn.fams2_stream_params[num_fams2_streams];

+ union dmub_cmd_fams2_config *static_base_state = &context->bw_ctx.bw.dcn.fams2_stream_base_params[num_fams2_streams];

+ union dmub_cmd_fams2_config *static_sub_state = &context->bw_ctx.bw.dcn.fams2_stream_sub_params[num_fams2_streams];

- memcpy(static_state,

- &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_idx].fams2_params,

- sizeof(struct dmub_fams2_stream_static_state));

- /* get information from context */

- static_state->num_planes = context->stream_status[i].plane_count;

- static_state->otg_inst = context->stream_status[i].primary_otg_inst;

- /* populate pipe masks for planes */

- for (j = 0; j < context->stream_status[i].plane_count; j++) {

- for (k = 0; k < dc->res_pool->pipe_count; k++) {

- if (context->res_ctx.pipe_ctx[k].stream &&

- context->res_ctx.pipe_ctx[k].stream->stream_id == stream->stream_id &&

- context->res_ctx.pipe_ctx[k].plane_state == context->stream_status[i].plane_states[j]) {

- static_state->pipe_mask |= (1 << k);

- static_state->plane_pipe_masks[j] |= (1 << k);

- switch (static_state->type) {

- static_state->sub_state.subvp.phantom_otg_inst = phantom_status->primary_otg_inst;

- /* populate pipe masks for phantom planes */

- for (j = 0; j < phantom_status->plane_count; j++) {

- for (k = 0; k < dc->res_pool->pipe_count; k++) {

- if (context->res_ctx.pipe_ctx[k].stream &&

- context->res_ctx.pipe_ctx[k].stream->stream_id == phantom_stream->stream_id &&

- context->res_ctx.pipe_ctx[k].plane_state == phantom_status->plane_states[j]) {

- static_state->sub_state.subvp.phantom_pipe_mask |= (1 << k);

- static_state->sub_state.subvp.phantom_plane_pipe_masks[j] |= (1 << k);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.h
index d5153fbac921..4bff52eaaef8 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.h

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id);

-void dml21_update_pipe_ctx_dchub_regs(struct dml2_display_rq_regs *rq_regs,

- struct dml2_display_dlg_regs *disp_dlg_regs,

- struct dml2_display_ttu_regs *disp_ttu_regs,

- struct pipe_ctx *out);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
index d35dd507cb9f..fb80ba9287b6 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

- *dml_ctx = (struct dml2_context *)kzalloc(sizeof(struct dml2_context), GFP_KERNEL);

- (*dml_ctx)->v21.dml_init.dml2_instance = (struct dml2_instance *)kzalloc(sizeof(struct dml2_instance), GFP_KERNEL);

- (*dml_ctx)->v21.mode_programming.programming = (struct dml2_display_cfg_programming *)kzalloc(sizeof(struct dml2_display_cfg_programming), GFP_KERNEL);

+ (*dml_ctx)->v21.mode_programming.programming = kzalloc(sizeof(struct dml2_display_cfg_programming), GFP_KERNEL);

- case DCN_VERSION_3_2: // TODO : Temporary for N-1 validation. Remove this after N-1 validation phase is complete.

dml21_calculate_rq_and_dlg_params(in_dc, context, &context->res_ctx, dml_ctx, in_dc->res_pool->pipe_count);

- if (in_dc->ctx->dce_version == DCN_VERSION_3_2) {

- dml21_extract_legacy_watermark_set(in_dc, &context->bw_ctx.bw.dcn.watermarks.a, DML2_DCHUB_WATERMARK_SET_A, dml_ctx);

- dml21_extract_legacy_watermark_set(in_dc, &context->bw_ctx.bw.dcn.watermarks.b, DML2_DCHUB_WATERMARK_SET_A, dml_ctx);

- dml21_extract_legacy_watermark_set(in_dc, &context->bw_ctx.bw.dcn.watermarks.c, DML2_DCHUB_WATERMARK_SET_A, dml_ctx);

- dml21_extract_legacy_watermark_set(in_dc, &context->bw_ctx.bw.dcn.watermarks.d, DML2_DCHUB_WATERMARK_SET_A, dml_ctx);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn3_soc_bb.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn3_soc_bb.h
deleted file mode 100644
index d82c681a5402..000000000000
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn3_soc_bb.h
+++ /dev/null

- * Permission is hereby granted, free of charge, to any person obtaining a

- * copy of this software and associated documentation files (the "Software"),

- * to deal in the Software without restriction, including without limitation

- * the rights to use, copy, modify, merge, publish, distribute, sublicense,

- * and/or sell copies of the Software, and to permit persons to whom the

- * Software is furnished to do so, subject to the following conditions:

- * The above copyright notice and this permission notice shall be included in

- * all copies or substantial portions of the Software.

- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

- * OTHER DEALINGS IN THE SOFTWARE.

-#ifndef __DML_DML_DCN3_SOC_BB__

-#define __DML_DML_DCN3_SOC_BB__

-#include "dml_top_soc_parameter_types.h"

-static const struct dml2_soc_qos_parameters dml_dcn31_soc_qos_params = {

- .system_active_urgent = {

- .dram_derate_percent_pixel = 22,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 76,

- .dcfclk_derate_percent = 100,

- .system_active_average = {

- .dram_derate_percent_pixel = 17,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 57,

- .dcfclk_derate_percent = 75,

- .dcn_mall_prefetch_urgent = {

- .dram_derate_percent_pixel = 22,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 76,

- .dcfclk_derate_percent = 100,

- .dcn_mall_prefetch_average = {

- .dram_derate_percent_pixel = 17,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 57,

- .dcfclk_derate_percent = 75,

- .system_idle_average = {

- .dram_derate_percent_pixel = 17,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 57,

- .dcfclk_derate_percent = 100,

- .base_latency_us = 12,

- .scaling_factor_us = 0,

- .scaling_factor_mhz = 0,

- .df_qos_response_time_fclk_cycles = 300,

- .max_round_trip_to_furthest_cs_fclk_cycles = 350,

- .mall_overhead_fclk_cycles = 50,

- .meta_trip_adder_fclk_cycles = 36,

- .average_transport_distance_fclk_cycles = 257,

- .umc_urgent_ramp_latency_margin = 50,

- .umc_max_latency_margin = 30,

- .umc_average_latency_margin = 20,

- .fabric_max_transport_latency_margin = 20,

- .fabric_average_transport_latency_margin = 10,

- .per_uclk_dpm_params = {

- .minimum_uclk_khz = 97,

- .urgent_ramp_uclk_cycles = 472,

- .trip_to_memory_uclk_cycles = 827,

- .meta_trip_to_memory_uclk_cycles = 827,

- .maximum_latency_when_urgent_uclk_cycles = 72,

- .average_latency_when_urgent_uclk_cycles = 61,

- .maximum_latency_when_non_urgent_uclk_cycles = 827,

- .average_latency_when_non_urgent_uclk_cycles = 118,

- .minimum_uclk_khz = 435,

- .urgent_ramp_uclk_cycles = 546,

- .trip_to_memory_uclk_cycles = 848,

- .meta_trip_to_memory_uclk_cycles = 848,

- .maximum_latency_when_urgent_uclk_cycles = 146,

- .average_latency_when_urgent_uclk_cycles = 90,

- .maximum_latency_when_non_urgent_uclk_cycles = 848,

- .average_latency_when_non_urgent_uclk_cycles = 135,

- .minimum_uclk_khz = 731,

- .urgent_ramp_uclk_cycles = 632,

- .trip_to_memory_uclk_cycles = 874,

- .meta_trip_to_memory_uclk_cycles = 874,

- .maximum_latency_when_urgent_uclk_cycles = 232,

- .average_latency_when_urgent_uclk_cycles = 124,

- .maximum_latency_when_non_urgent_uclk_cycles = 874,

- .average_latency_when_non_urgent_uclk_cycles = 155,

- .minimum_uclk_khz = 1187,

- .urgent_ramp_uclk_cycles = 716,

- .trip_to_memory_uclk_cycles = 902,

- .meta_trip_to_memory_uclk_cycles = 902,

- .maximum_latency_when_urgent_uclk_cycles = 316,

- .average_latency_when_urgent_uclk_cycles = 160,

- .maximum_latency_when_non_urgent_uclk_cycles = 902,

- .average_latency_when_non_urgent_uclk_cycles = 177,

- .qos_type = dml2_qos_param_type_dcn4x,

-static const struct dml2_soc_bb dml2_socbb_dcn31 = {

- .clk_values_khz = {97000, 435000, 731000, 1187000},

- .num_clk_values = 4,

- .clk_values_khz = {300000, 2500000},

- .num_clk_values = 2,

- .clk_values_khz = {200000, 1800000},

- .num_clk_values = 2,

- .clk_values_khz = {100000, 2000000},

- .num_clk_values = 2,

- .clk_values_khz = {100000, 2000000},

- .num_clk_values = 2,

- .clk_values_khz = {100000, 2000000},

- .num_clk_values = 2,

- .clk_values_khz = {810000, 810000},

- .num_clk_values = 2,

- .clk_values_khz = {300000, 1600000},

- .num_clk_values = 2,

- .clk_values_khz = {666667, 666667},

- .num_clk_values = 2,

- .clk_values_khz = {625000, 625000},

- .num_clk_values = 2,

- .clk_values_khz = {2000000, 2000000},

- .num_clk_values = 2,

- .channel_width_bytes = 2,

- .channel_count = 16,

- .transactions_per_clock = 16,

- .qos_parameters = {

- .system_active_urgent = {

- .dram_derate_percent_pixel = 22,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 76,

- .dcfclk_derate_percent = 100,

- .system_active_average = {

- .dram_derate_percent_pixel = 17,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 57,

- .dcfclk_derate_percent = 75,

- .dcn_mall_prefetch_urgent = {

- .dram_derate_percent_pixel = 22,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 76,

- .dcfclk_derate_percent = 100,

- .dcn_mall_prefetch_average = {

- .dram_derate_percent_pixel = 17,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 57,

- .dcfclk_derate_percent = 75,

- .system_idle_average = {

- .dram_derate_percent_pixel = 17,

- .dram_derate_percent_vm = 0,

- .dram_derate_percent_pixel_and_vm = 0,

- .fclk_derate_percent = 57,

- .dcfclk_derate_percent = 100,

- .base_latency_us = 0,

- .scaling_factor_us = 0,

- .scaling_factor_mhz = 0,

- .df_qos_response_time_fclk_cycles = 300,

- .max_round_trip_to_furthest_cs_fclk_cycles = 350,

- .mall_overhead_fclk_cycles = 50,

- .meta_trip_adder_fclk_cycles = 36,

- .average_transport_distance_fclk_cycles = 260,

- .umc_urgent_ramp_latency_margin = 50,

- .umc_max_latency_margin = 30,

- .umc_average_latency_margin = 20,

- .fabric_max_transport_latency_margin = 20,

- .fabric_average_transport_latency_margin = 10,

- .per_uclk_dpm_params = {

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 472,

- .trip_to_memory_uclk_cycles = 827,

- .meta_trip_to_memory_uclk_cycles = 827,

- .maximum_latency_when_urgent_uclk_cycles = 72,

- .average_latency_when_urgent_uclk_cycles = 72,

- .maximum_latency_when_non_urgent_uclk_cycles = 827,

- .average_latency_when_non_urgent_uclk_cycles = 117,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 546,

- .trip_to_memory_uclk_cycles = 848,

- .meta_trip_to_memory_uclk_cycles = 848,

- .maximum_latency_when_urgent_uclk_cycles = 146,

- .average_latency_when_urgent_uclk_cycles = 146,

- .maximum_latency_when_non_urgent_uclk_cycles = 848,

- .average_latency_when_non_urgent_uclk_cycles = 133,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 564,

- .trip_to_memory_uclk_cycles = 853,

- .meta_trip_to_memory_uclk_cycles = 853,

- .maximum_latency_when_urgent_uclk_cycles = 164,

- .average_latency_when_urgent_uclk_cycles = 164,

- .maximum_latency_when_non_urgent_uclk_cycles = 853,

- .average_latency_when_non_urgent_uclk_cycles = 136,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 613,

- .trip_to_memory_uclk_cycles = 869,

- .meta_trip_to_memory_uclk_cycles = 869,

- .maximum_latency_when_urgent_uclk_cycles = 213,

- .average_latency_when_urgent_uclk_cycles = 213,

- .maximum_latency_when_non_urgent_uclk_cycles = 869,

- .average_latency_when_non_urgent_uclk_cycles = 149,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 632,

- .trip_to_memory_uclk_cycles = 874,

- .meta_trip_to_memory_uclk_cycles = 874,

- .maximum_latency_when_urgent_uclk_cycles = 232,

- .average_latency_when_urgent_uclk_cycles = 232,

- .maximum_latency_when_non_urgent_uclk_cycles = 874,

- .average_latency_when_non_urgent_uclk_cycles = 153,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 665,

- .trip_to_memory_uclk_cycles = 885,

- .meta_trip_to_memory_uclk_cycles = 885,

- .maximum_latency_when_urgent_uclk_cycles = 265,

- .average_latency_when_urgent_uclk_cycles = 265,

- .maximum_latency_when_non_urgent_uclk_cycles = 885,

- .average_latency_when_non_urgent_uclk_cycles = 161,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 689,

- .trip_to_memory_uclk_cycles = 895,

- .meta_trip_to_memory_uclk_cycles = 895,

- .maximum_latency_when_urgent_uclk_cycles = 289,

- .average_latency_when_urgent_uclk_cycles = 289,

- .maximum_latency_when_non_urgent_uclk_cycles = 895,

- .average_latency_when_non_urgent_uclk_cycles = 167,

- .minimum_uclk_khz = 0,

- .urgent_ramp_uclk_cycles = 716,

- .trip_to_memory_uclk_cycles = 902,

- .meta_trip_to_memory_uclk_cycles = 902,

- .maximum_latency_when_urgent_uclk_cycles = 316,

- .average_latency_when_urgent_uclk_cycles = 316,

- .maximum_latency_when_non_urgent_uclk_cycles = 902,

- .average_latency_when_non_urgent_uclk_cycles = 174,

- .qos_type = dml2_qos_param_type_dcn4x,

- .power_management_parameters = {

- .dram_clk_change_blackout_us = 400,

- .fclk_change_blackout_us = 0,

- .g7_ppt_blackout_us = 0,

- .stutter_enter_plus_exit_latency_us = 50,

- .stutter_exit_latency_us = 43,

- .z8_stutter_enter_plus_exit_latency_us = 0,

- .z8_stutter_exit_latency_us = 0,

- .dispclk_khz = 600 * 1000,

- .dprefclk_mhz = 700,

- .xtalclk_mhz = 100,

- .pcie_refclk_mhz = 100,

- .dchub_refclk_mhz = 50,

- .mall_allocated_for_dcn_mbytes = 64,

- .max_outstanding_reqs = 512,

- .fabric_datapath_to_dcn_data_return_bytes = 64,

- .return_bus_width_bytes = 64,

- .hostvm_min_page_size_kbytes = 0,

- .gpuvm_min_page_size_kbytes = 256,

- .phy_downspread_percent = 0,

- .dcn_downspread_percent = 0,

- .dispclk_dppclk_vco_speed_mhz = 4500,

- .do_urgent_latency_adjustment = 0,

- .mem_word_bytes = 32,

- .num_dcc_mcaches = 8,

- .mcache_size_bytes = 2048,

- .mcache_line_size_bytes = 32,

- .max_fclk_for_uclk_dpm_khz = 1250 * 1000,

-static const struct dml2_ip_capabilities dml2_dcn31_max_ip_caps = {

- .max_num_dp2p0_streams = 4,

- .max_num_hdmi_frl_outputs = 1,

- .max_num_dp2p0_outputs = 4,

- .rob_buffer_size_kbytes = 192,

- .config_return_buffer_size_in_kbytes = 1152,

- .meta_fifo_size_in_kentries = 22,

- .compressed_buffer_segment_size_in_kbytes = 64,

- .subvp_drr_scheduling_margin_us = 100,

- .subvp_prefetch_end_to_mall_start_us = 15,

- .subvp_fw_processing_delay = 15,

- .max_allow_delay_us = 100 * 1000,

- .scheduling_delay_us = 50,

- .vertical_interrupt_ack_delay_us = 18,

- .allow_programming_delay_us = 18,

- .min_allow_width_us = 20,

- .subvp_df_throttle_delay_us = 100,

- .subvp_programming_delay_us = 18,

- .subvp_prefetch_to_mall_delay_us = 18,

- .drr_programming_delay_us = 18,

-#endif /* __DML_DML_DCN3_SOC_BB__ */

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn4_soc_bb.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn4_soc_bb.h
index 8ef7977841de..793e1c038efd 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn4_soc_bb.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/dcn4_soc_bb.h

- .scheduling_delay_us = 125,

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h
index 83fc15bf13cf..25b607e7b726 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h
index b132f676a68d..5e1ab6d97640 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h

+ dml2_sw_linear, // SW_LINEAR accepts 256 byte aligned pitch and also 128 byte aligned pitch if DCC is not enabled

- dml2_gfx11_sw_256kb_r_x

-enum dml2_pstate_support_method {

- dml2_pstate_method_uninitialized,

- dml2_pstate_method_not_supported,

- dml2_pstate_method_vactive,

- dml2_pstate_method_vblank,

- dml2_pstate_method_svp,

- dml2_pstate_method_drr

-struct dml2_writeback_cfg {

- unsigned int active_writebacks_per_surface;

- unsigned long input_width;

- unsigned long input_height;

- unsigned long output_width;

- unsigned long output_height;

- unsigned long v_taps;

- unsigned long h_taps;

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_soc_parameter_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_soc_parameter_types.h
index ebd8abe894a9..5f0bc42d1d2f 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_soc_parameter_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_soc_parameter_types.h

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_types.h
index eeb96c455658..d2d053f2354d 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_types.h

-enum dml2_dram_clock_change_support {

- dml2_dram_clock_change_vactive = 0,

- dml2_dram_clock_change_vblank = 1,

- dml2_dram_clock_change_vblank_and_vactive = 2,

- dml2_dram_clock_change_drr = 3,

- dml2_dram_clock_change_mall_svp = 4,

- dml2_dram_clock_change_mall_full_frame = 6,

- dml2_dram_clock_change_unsupported = 7

-enum dml2_fclock_change_support {

- dml2_fclock_change_vactive = 0,

- dml2_fclock_change_vblank = 1,

- dml2_fclock_change_unsupported = 2

-enum dml2_uclk_pstate_support_method {

- dml2_uclk_pstate_support_method_not_supported = 0,

- dml2_uclk_pstate_support_method_vactive = 1,

- dml2_uclk_pstate_support_method_vblank = 2,

- dml2_uclk_pstate_support_method_reserved_hw = 5,

- dml2_uclk_pstate_support_method_fw_subvp_phantom = 6,

- dml2_uclk_pstate_support_method_reserved_fw = 10,

- dml2_uclk_pstate_support_method_fw_vactive_drr = 11,

- dml2_uclk_pstate_support_method_fw_vblank_drr = 12,

- dml2_uclk_pstate_support_method_fw_subvp_phantom_drr = 13,

- dml2_uclk_pstate_support_method_reserved_fw_drr_fixed = 20,

- dml2_uclk_pstate_support_method_fw_drr = 21,

- dml2_uclk_pstate_support_method_reserved_fw_drr_var = 22,

- dml2_uclk_pstate_support_method_count

- enum dml2_uclk_pstate_support_method uclk_pstate_support_method;

- enum dml2_uclk_pstate_support_method uclk_pstate_method;

- struct dmub_fams2_stream_static_state fams2_params;

- enum dml2_fclock_change_support FCLKChangeSupport[DML2_MAX_PLANES];

- double g6_temp_read_watermark_us;

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c
index 0aa4e4d343b0..d68b4567e218 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c

-static const struct dml2_core_ip_params core_dcn4_ip_caps_base = {

ip_caps->config_return_buffer_segment_size_in_kbytes = ip_params->config_return_buffer_segment_size_in_kbytes;

ip_caps->compressed_buffer_segment_size_in_kbytes = ip_params->compressed_buffer_segment_size_in_kbytes;

ip_params->config_return_buffer_segment_size_in_kbytes = ip_caps->config_return_buffer_segment_size_in_kbytes;

ip_params->compressed_buffer_segment_size_in_kbytes = ip_caps->compressed_buffer_segment_size_in_kbytes;

+ phantom->timing.v_blank_end = phantom->timing.v_total - phantom->timing.v_front_porch - phantom->timing.v_active;

- switch (display_cfg->stage3.pstate_switch_modes[plane_index]) {

- case dml2_uclk_pstate_support_method_vactive:

- case dml2_uclk_pstate_support_method_vblank:

- case dml2_uclk_pstate_support_method_fw_subvp_phantom:

- case dml2_uclk_pstate_support_method_fw_drr:

- case dml2_uclk_pstate_support_method_fw_vactive_drr:

- case dml2_uclk_pstate_support_method_fw_vblank_drr:

- case dml2_uclk_pstate_support_method_fw_subvp_phantom_drr:

- programming->plane_programming[plane_index].uclk_pstate_support_method = display_cfg->stage3.pstate_switch_modes[plane_index];

- case dml2_uclk_pstate_support_method_reserved_hw:

- case dml2_uclk_pstate_support_method_reserved_fw:

- case dml2_uclk_pstate_support_method_reserved_fw_drr_fixed:

- case dml2_uclk_pstate_support_method_reserved_fw_drr_var:

- case dml2_uclk_pstate_support_method_not_supported:

- case dml2_uclk_pstate_support_method_count:

- programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_not_supported;

+ programming->plane_programming[plane_index].uclk_pstate_support_method = display_cfg->stage3.pstate_switch_modes[plane_index];

- programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_not_supported;

dml2_core_calcs_get_mall_allocation(&core->clean_me_up.mode_lib, &programming->plane_programming[plane_index].surface_size_mall_bytes, dml_internal_pipe_index);

- &programming->stream_programming[main_plane->stream_index].fams2_params,

in_out->programming->plane_programming[plane_index].num_dpps_required = core->clean_me_up.mode_lib.mp.NoOfDPP[plane_index];

if (in_out->programming->display_config.plane_descriptors[plane_index].overrides.legacy_svp_config == dml2_svp_mode_override_main_pipe)

- in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_fw_subvp_phantom;

+ in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_pstate_method_fw_svp;

else if (in_out->programming->display_config.plane_descriptors[plane_index].overrides.legacy_svp_config == dml2_svp_mode_override_phantom_pipe)

- in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_fw_subvp_phantom;

+ in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_pstate_method_fw_svp;

else if (in_out->programming->display_config.plane_descriptors[plane_index].overrides.legacy_svp_config == dml2_svp_mode_override_phantom_pipe_no_data_return)

- in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_fw_subvp_phantom;

+ in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_pstate_method_fw_svp;

if (core->clean_me_up.mode_lib.mp.MaxActiveDRAMClockChangeLatencySupported[plane_index] >= core->clean_me_up.mode_lib.soc.power_management_parameters.dram_clk_change_blackout_us)

- in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_vactive;

+ in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_pstate_method_vactive;

else if (core->clean_me_up.mode_lib.mp.TWait[plane_index] >= core->clean_me_up.mode_lib.soc.power_management_parameters.dram_clk_change_blackout_us)

- in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_vblank;

+ in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_pstate_method_vblank;

- in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_uclk_pstate_support_method_not_supported;

+ in_out->programming->plane_programming[plane_index].uclk_pstate_support_method = dml2_pstate_method_na;

dml2_core_calcs_get_mall_allocation(&core->clean_me_up.mode_lib, &in_out->programming->plane_programming[plane_index].surface_size_mall_bytes, dml_internal_pipe_index);

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
index 3ea54fd52e46..8ed49a9df378 100644
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

- if (!fail_only || support->PTEBufferSizeNotExceeded == 1)

- if (!fail_only || support->DCCMetaBufferSizeNotExceeded == 1)

dml2_printf("DML: support: DCCMetaBufferSizeNotExceeded = %d\n", support->DCCMetaBufferSizeNotExceeded);

-dml_get_var_func(wm_g6_temp_read, double, mode_lib->mp.Watermark.g6_temp_read_watermark_us);

dml_get_var_func(fraction_of_urgent_bandwidth_imm_flip, double, mode_lib->mp.FractionOfUrgentBandwidthImmediateFlip);

dml_get_var_func(fraction_of_urgent_bandwidth_mall, double, mode_lib->mp.FractionOfUrgentBandwidthMALL);

-dml_get_var_func(urgent_latency, double, mode_lib->mp.UrgentLatency);

dml_get_var_func(wm_writeback_dram_clock_change, double, mode_lib->mp.Watermark.WritebackDRAMClockChangeWatermark);

dml_get_var_func(wm_writeback_fclk_change, double, mode_lib->mp.Watermark.WritebackFCLKChangeWatermark);

dml_get_var_func(svp_prefetch_urg_bw_available_dram, double, mode_lib->mp.urg_bandwidth_available[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]);

dml_get_var_func(svp_prefetch_urg_bw_available_dram_vm_only, double, mode_lib->mp.urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_svp_prefetch]);

- switch (sw_mode) {

- case (dml2_sw_linear):

- return 256; break;

- case (dml2_sw_256b_2d):

- return 256; break;

- case (dml2_sw_4kb_2d):

- return 4096; break;

- case (dml2_sw_64kb_2d):

- return 65536; break;

- case (dml2_sw_256kb_2d):

- return 262144; break;

- case (dml2_gfx11_sw_linear):

- return 256; break;

- case (dml2_gfx11_sw_64kb_d):

- return 65536; break;

- case (dml2_gfx11_sw_64kb_d_t):

- return 65536; break;

- case (dml2_gfx11_sw_64kb_d_x):

- return 65536; break;

- case (dml2_gfx11_sw_64kb_r_x):

- return 65536; break;

- case (dml2_gfx11_sw_256kb_d_x):

- return 262144; break;

- case (dml2_gfx11_sw_256kb_r_x):

- return 262144; break;

- *BytePerPixelY = 0;

- *BytePerPixelC = 0;

- unsigned int SwathWidthSingleDPPY[],

unsigned int pixelsPerClock, padding_pixels, ssm_group_priming_delay, ssm_pipeline_delay, obsm_pipeline_delay, slice_padded_pixels, ixd_plus_padding, ixd_plus_padding_groups, cycles_per_group, group_delay, pipeline_delay, pixels, additional_group_delay, lines_to_reach_ixd, groups_to_reach_ixd, slice_width_groups, initial_xmit_delay, number_of_lines_to_reach_ixd, slice_width_modified;

//determine integer number of complete slice lines required to reach initial transmit delay without ssm delay considered

//number of groups required for a slice to reach initial transmit delay is the sum of the padded initial transmit delay plus the ssm group priming delay

//number of lines required to reach padded initial transmit delay in groups in slices to the left of the last horizontal slice

//needs to be rounded up as a complete slice lines are buffered prior to initial transmit delay being reached in the last horizontal slice

lines_to_reach_ixd = (groups_to_reach_ixd + slice_width_groups - 1) / slice_width_groups; //round up lines to reach ixd to next

static unsigned int dscComputeDelay(enum dml2_output_format_class pixelFormat, enum dml2_output_encoder_class Output)

- if (l->is_dual_plane && *p->num_mcaches_c) {

- double ideal_sdp_bandwidth = (double)soc->return_bus_width_bytes * dcflk_mhz;

double ideal_dram_bandwidth = dram_bw_mbps; //dram_speed_mts * soc->clk_table.dram_config.channel_count * soc->clk_table.dram_config.channel_width_bytes;

- dml2_printf("DML::%s: dcflk_mhz = %f\n", __func__, dcflk_mhz);

-static void calculate_bandwidth_available(

-static void CalculateDCFCLKDeepSleep(

+ double tdlut_required_deepsleep_dcfclk = (double) tdlut_bytes_to_deliver[k] / 64.0 / prefetch_swath_time_us[k];

+ dml2_printf("DML::%s: k=%d, DCFClkDeepSleepPerSurface = %f\n", __func__, k, DCFClkDeepSleepPerSurface[k]);

+ dml2_printf("DML::%s: k=%d, tdlut_required_deepsleep_dcfclk = %f\n", __func__, k, tdlut_required_deepsleep_dcfclk);

+ DCFClkDeepSleepPerSurface[k] = math_max2(DCFClkDeepSleepPerSurface[k], tdlut_required_deepsleep_dcfclk);

dml2_printf("DML::%s: k=%u, DCFClkDeepSleepPerSurface = %f\n", __func__, k, DCFClkDeepSleepPerSurface[k]);

- p->request_size_bytes_luma[k] = ((p->BytePerPixY[k] == 2) == dml_is_vertical_rotation(p->display_cfg->plane_descriptors[k].composition.rotation_angle)) ? 128 : 64;

- p->request_size_bytes_chroma[k] = ((p->BytePerPixC[k] == 2) == dml_is_vertical_rotation(p->display_cfg->plane_descriptors[k].composition.rotation_angle)) ? 128 : 64;

+ p->request_size_bytes_luma[k] = ((p->BytePerPixY[k] == 2) == dml_is_vertical_rotation(p->display_cfg->plane_descriptors[k].composition.rotation_angle)) ? 128 : 64;;

+ p->request_size_bytes_chroma[k] = ((p->BytePerPixC[k] == 2) == dml_is_vertical_rotation(p->display_cfg->plane_descriptors[k].composition.rotation_angle)) ? 128 : 64;;

-static void CalculateODMMode(

-static void CalculateOutputLink(

*p->tdlut_groups_per_2row_ub = (unsigned int)math_ceil2((double) *p->tdlut_bytes_per_frame / *p->tdlut_bytes_per_group, 1);

@@ -5063,20 +5150,18 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch

- s->Tvm_no_trip_oto = 0.0;

- s->Tr0_no_trip_oto = 0.0;

- s->Tpre_rounded = 0.0;

- s->prefetch_sw_bytes = 0.0;

if (p->OutputFormat == dml2_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlaceUnitInOPP))

- s->prefetch_bw_pr = s->bytes_pp * p->myPipe->PixelClock / (double)p->myPipe->DPPPerSurface;

- if (p->myPipe->VRatio < 1.0)

- s->prefetch_bw_pr = p->myPipe->VRatio * s->prefetch_bw_pr;

- s->max_Tsw = (math_max2(p->PrefetchSourceLinesY, p->PrefetchSourceLinesC) * s->LineTime);

- s->prefetch_sw_bytes = p->PrefetchSourceLinesY * p->swath_width_luma_ub * p->myPipe->BytePerPixelY + p->PrefetchSourceLinesC * p->swath_width_chroma_ub * p->myPipe->BytePerPixelC;

- s->prefetch_bw_pr = s->prefetch_bw_pr * p->mall_prefetch_sdp_overhead_factor;

- s->prefetch_sw_bytes = s->prefetch_sw_bytes * p->mall_prefetch_sdp_overhead_factor;

- s->prefetch_bw_oto = math_max2(s->prefetch_bw_pr, s->prefetch_sw_bytes / s->max_Tsw);

- s->min_Lsw_oto = math_max2(p->PrefetchSourceLinesY, p->PrefetchSourceLinesC) / __DML2_CALCS_MAX_VRATIO_PRE_OTO__;

- s->min_Lsw_oto = math_max2(s->min_Lsw_oto, 2.0);

- s->min_Lsw_oto = math_max2(s->min_Lsw_oto, p->tdlut_drain_time / s->LineTime);

- s->min_Lsw_equ = math_max2(p->PrefetchSourceLinesY, p->PrefetchSourceLinesC) / __DML2_CALCS_MAX_VRATIO_PRE_EQU__;

- s->min_Lsw_equ = math_max2(s->min_Lsw_equ, 2.0);

- s->min_Lsw_equ = math_max2(s->min_Lsw_equ, p->tdlut_drain_time / s->LineTime);

+ *p->prefetch_sw_bytes = p->PrefetchSourceLinesY * p->swath_width_luma_ub * p->myPipe->BytePerPixelY + p->PrefetchSourceLinesC * p->swath_width_chroma_ub * p->myPipe->BytePerPixelC;

vm_bytes = p->vm_bytes; // vm_bytes is dpde0_bytes_per_frame_ub_l + dpde0_bytes_per_frame_ub_c + 2*extra_dpde_bytes;

@@ -5296,57 +5367,103 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch

vm_bytes = vm_bytes + p->tdlut_pte_bytes_per_frame + (p->display_cfg->gpuvm_enable ? extra_tdpe_bytes : 0);

+ s->min_Lsw_oto = math_max2(p->PrefetchSourceLinesY, p->PrefetchSourceLinesC) / __DML2_CALCS_MAX_VRATIO_PRE_OTO__;

+ // vactive swath bw represents the per-surface (aka per dml plane) bw to move vratio_l/c lines of bytes_l/c per line time

+ s->prefetch_bw_oto = math_max2(s->per_pipe_vactive_sw_bw, s->prefetch_bw_oto) * p->mall_prefetch_sdp_overhead_factor;

+ s->prefetch_bw_oto = math_min2(s->prefetch_bw_oto, *p->prefetch_sw_bytes/(s->min_Lsw_oto*s->LineTime));

(p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes) / (15 * s->LineTime));

- s->Lsw_oto = math_ceil2(4.0 * math_max2(s->prefetch_sw_bytes / s->prefetch_bw_oto / s->LineTime, s->min_Lsw_oto), 1.0) / 4.0;

- s->Tvm_no_trip_oto = math_max2(

- s->Tvm_oto = math_max2(

- s->Tvm_no_trip_oto);

dml2_printf("DML::%s: Tvm_oto max1 = %f\n", __func__, *p->Tno_bw + vm_bytes * p->HostVMInefficiencyFactor / s->prefetch_bw_oto);

- s->Tvm_no_trip_oto = s->Tvm_trips_rounded;

- s->Tr0_no_trip_oto = math_max2(

(p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes) / s->prefetch_bw_oto,

- s->Tr0_oto = math_max2(

- s->Tr0_no_trip_oto);

dml2_printf("DML::%s: Tr0_oto max1 = %f\n", __func__, (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes) / s->prefetch_bw_oto);

- s->Tr0_no_trip_oto = (s->LineTime - s->Tvm_oto) / 4.0;

- s->Tr0_oto = s->Tr0_no_trip_oto;

+ s->min_Lsw_equ = math_max2(p->PrefetchSourceLinesY, p->PrefetchSourceLinesC) / __DML2_CALCS_MAX_VRATIO_PRE_EQU__;

s->dst_y_prefetch_equ = p->VStartup - (*p->TSetup + math_max2(p->TCalc, *p->Tvm_trips) + s->TWait_p) / s->LineTime - Lo;

s->dst_y_prefetch_equ = p->VStartup - (*p->TSetup + math_max2(p->TCalc, p->ExtraLatencyPrefetch) + s->TWait_p) / s->LineTime - Lo;

+ s->dst_y_prefetch_equ_impacted = math_min2(s->dst_y_prefetch_equ_impacted, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH

s->dst_y_prefetch_equ = math_min2(s->dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH

- dml2_printf("DML::%s: prefetch_sw_bytes = %f\n", __func__, s->prefetch_sw_bytes);

- s->Tpre_rounded = s->dst_y_prefetch_equ * s->LineTime;

dml2_printf("DML::%s: vm_bytes: %f (hvm inefficiency scaled)\n", __func__, vm_bytes*p->HostVMInefficiencyFactor);

dml2_printf("DML::%s: row_bytes: %f (hvm inefficiency scaled, 1 row)\n", __func__, p->PixelPTEBytesPerRow*p->HostVMInefficiencyFactor+p->meta_row_bytes+tdlut_row_bytes);

- dml2_printf("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, Tpre, s->Tpre_rounded, (s->Tpre_rounded - Tpre));

+ dml2_printf("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, Tpre, *p->Tpre_rounded, (*p->Tpre_rounded - Tpre));

dml2_printf("DML::%s: Tvm_trips=%f Tvm_trips_rounded: %f, delta=%f\n", __func__, *p->Tvm_trips, s->Tvm_trips_rounded, (s->Tvm_trips_rounded - *p->Tvm_trips));

@@ -5428,78 +5545,85 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch

- // So that means prefetch bw calculated can be higher since the total time availabe for prefetch is less

- bool min_Lsw_equ_ok = s->Tpre_rounded >= s->Tvm_trips_rounded + 2.0*s->Tr0_trips_rounded + s->min_Lsw_equ*s->LineTime;

+ // So that means prefetch bw calculated can be higher since the total time available for prefetch is less

+ bool min_Lsw_equ_ok = *p->Tpre_rounded >= s->Tvm_trips_rounded + 2.0*s->Tr0_trips_rounded + s->min_Lsw_equ*s->LineTime;

+ // The terms Tvm_trips_rounded and Tr0_trips_rounded represent the min time constraints for the VM and row stages.

+ // Normally, these terms cover the overall time constraint for Tpre >= (Tex + max{Ttrip, Turg}), but if these terms are at their minimum, an explicit check is necessary.

+ tpre_gt_req_latency = *p->Tpre_rounded > (math_max2(p->Turg, s->trip_to_mem) + p->ExtraLatencyPrefetch);

- if (s->dst_y_prefetch_equ > 1 && min_Lsw_equ_ok) {

- if (s->Tpre_rounded - *p->Tno_bw > 0) {

- + s->prefetch_sw_bytes)

- / (s->Tpre_rounded - *p->Tno_bw);

- s->Tsw_est1 = s->prefetch_sw_bytes / s->prefetch_bw1;

- if ((s->Tsw_est1 < s->min_Lsw_equ * s->LineTime) && (s->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.75 * s->LineTime - *p->Tno_bw > 0)) {

+ if ((s->Tsw_est1 < s->min_Lsw_equ * s->LineTime) && (*p->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.75 * s->LineTime - *p->Tno_bw > 0)) {

s->prefetch_bw1 = (vm_bytes * p->HostVMInefficiencyFactor + 2 * (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes)) /

- (s->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.75 * s->LineTime - *p->Tno_bw);

dml2_printf("DML::%s: vm and 2 rows bytes = %f\n", __func__, (vm_bytes * p->HostVMInefficiencyFactor + 2 * (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes)));

- dml2_printf("DML::%s: Tpre_rounded = %f\n", __func__, s->Tpre_rounded);

dml2_printf("DML::%s: minus term = %f\n", __func__, s->min_Lsw_equ * s->LineTime + 0.75 * s->LineTime + *p->Tno_bw);

- dml2_printf("DML::%s: Time to fetch vm and 2 rows = %f\n", __func__, (s->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.75 * s->LineTime - *p->Tno_bw));

+ dml2_printf("DML::%s: Time to fetch vm and 2 rows = %f\n", __func__, (*p->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.75 * s->LineTime - *p->Tno_bw));

- if (s->Tpre_rounded - *p->Tno_bw - 2.0 * s->Tr0_trips_rounded > 0) {

- s->prefetch_bw2 = (vm_bytes * p->HostVMInefficiencyFactor + s->prefetch_sw_bytes) /

- (s->Tpre_rounded - *p->Tno_bw - 2.0 * s->Tr0_trips_rounded);

- s->Tsw_est2 = s->prefetch_sw_bytes / s->prefetch_bw2;

- if ((s->Tsw_est2 < s->min_Lsw_equ * s->LineTime) && ((s->Tpre_rounded - *p->Tno_bw - 2.0 * s->Tr0_trips_rounded - s->min_Lsw_equ * s->LineTime - 0.25 * s->LineTime) > 0)) {

- s->prefetch_bw2 = vm_bytes * p->HostVMInefficiencyFactor / (s->Tpre_rounded - *p->Tno_bw - 2.0 * s->Tr0_trips_rounded - s->min_Lsw_equ * s->LineTime - 0.25 * s->LineTime);

+ if ((s->Tsw_est2 < s->min_Lsw_equ * s->LineTime) && ((*p->Tpre_rounded - *p->Tno_bw - 2.0 * s->Tr0_trips_rounded - s->min_Lsw_equ * s->LineTime - 0.25 * s->LineTime) > 0)) {

+ s->prefetch_bw2 = vm_bytes * p->HostVMInefficiencyFactor / (*p->Tpre_rounded - *p->Tno_bw - 2.0 * s->Tr0_trips_rounded - s->min_Lsw_equ * s->LineTime - 0.25 * s->LineTime);

- if (s->Tpre_rounded - s->Tvm_trips_rounded > 0) {

- s->prefetch_bw3 = (2 * (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes) + s->prefetch_sw_bytes) /

- (s->Tpre_rounded - s->Tvm_trips_rounded);

- s->Tsw_est3 = s->prefetch_sw_bytes / s->prefetch_bw3;

+ s->prefetch_bw3 = (2 * (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes) + *p->prefetch_sw_bytes) /

- if ((s->Tsw_est3 < s->min_Lsw_equ * s->LineTime) && ((s->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.5 * s->LineTime - s->Tvm_trips_rounded) > 0)) {

- s->prefetch_bw3 = (2 * (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes)) / (s->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.5 * s->LineTime - s->Tvm_trips_rounded);

+ if ((s->Tsw_est3 < s->min_Lsw_equ * s->LineTime) && ((*p->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.5 * s->LineTime - s->Tvm_trips_rounded) > 0)) {

+ s->prefetch_bw3 = (2 * (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + p->meta_row_bytes + tdlut_row_bytes)) / (*p->Tpre_rounded - s->min_Lsw_equ * s->LineTime - 0.5 * s->LineTime - s->Tvm_trips_rounded);

- if (s->Tpre_rounded - s->Tvm_trips_rounded - 2 * s->Tr0_trips_rounded > 0)

- s->prefetch_bw4 = s->prefetch_sw_bytes / (s->Tpre_rounded - s->Tvm_trips_rounded - 2 * s->Tr0_trips_rounded);

+ s->prefetch_bw4 = *p->prefetch_sw_bytes / (*p->Tpre_rounded - s->Tvm_trips_rounded - 2 * s->Tr0_trips_rounded);

- dml2_printf("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, Tpre, s->Tpre_rounded, (s->Tpre_rounded - Tpre));

+ dml2_printf("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, Tpre, *p->Tpre_rounded, (*p->Tpre_rounded - Tpre));

dml2_printf("DML::%s: Tvm_trips=%f Tvm_trips_rounded: %f, delta=%f\n", __func__, *p->Tvm_trips, s->Tvm_trips_rounded, (s->Tvm_trips_rounded - *p->Tvm_trips));

dml2_printf("DML::%s: Tr0_trips=%f Tr0_trips_rounded: %f, delta=%f\n", __func__, *p->Tr0_trips, s->Tr0_trips_rounded, (s->Tr0_trips_rounded - *p->Tr0_trips));

- // Lsw = dst_y_prefetch - (dst_y_per_vm_vblank + 2*dst_y_per_row_vblank)

- s->Lsw_equ = s->dst_y_prefetch_equ - math_ceil2(4.0 * (s->Tvm_equ + 2 * s->Tr0_equ) / s->LineTime, 1.0) / 4.0;

@@ -5622,31 +5743,33 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch

- s->dst_y_per_vm_no_trip_vblank = math_ceil2(4.0 * s->Tvm_no_trip_oto / s->LineTime, 1.0) / 4.0;

- s->dst_y_per_row_no_trip_vblank = math_ceil2(4.0 * s->Tr0_no_trip_oto / s->LineTime, 1.0) / 4.0;

- *p->dst_y_per_vm_vblank = math_ceil2(4.0 * s->TimeForFetchingVM / s->LineTime, 1.0) / 4.0;

- *p->dst_y_per_row_vblank = math_ceil2(4.0 * s->TimeForFetchingRowInVBlank / s->LineTime, 1.0) / 4.0;

- s->dst_y_per_vm_no_trip_vblank = *p->dst_y_per_vm_vblank;

- s->dst_y_per_row_no_trip_vblank = *p->dst_y_per_row_vblank;

- /* take worst case Lsw to calculate bandwidth requirement regardless of schedule */

- s->LinesToRequestPrefetchPixelData = math_min2(s->Lsw_equ, s->Lsw_oto); // Lsw

+ s->LinesToRequestPrefetchPixelData = *p->dst_y_prefetch - *p->dst_y_per_vm_vblank - 2 * *p->dst_y_per_row_vblank; // Lsw

s->cursor_prefetch_bytes = (unsigned int)math_max2(p->cursor_bytes_per_chunk, 4 * p->cursor_bytes_per_line);

*p->prefetch_cursor_bw = p->num_cursors * s->cursor_prefetch_bytes / (s->LinesToRequestPrefetchPixelData * s->LineTime);

dml2_printf("DML::%s: LinesToRequestPrefetchPixelData = %f\n", __func__, s->LinesToRequestPrefetchPixelData);

dml2_printf("DML::%s: No time to prefetch! dst_y_prefetch_equ = %f (should be > 1)\n", __func__, s->dst_y_prefetch_equ);

- dml2_printf("DML::%s: No time to prefetch! min_Lsw_equ_ok = %d, Tpre_rounded (%f) should be >= Tvm_trips_rounded (%f) + 2.0*Tr0_trips_rounded (%f) + min_Tsw_equ (%f)\n",

- __func__, min_Lsw_equ_ok, s->Tpre_rounded, s->Tvm_trips_rounded, 2.0*s->Tr0_trips_rounded, s->min_Lsw_equ*s->LineTime);

+ dml2_printf("DML::%s: No time to prefetch! min_Lsw_equ_ok = %d, Tpre_rounded (%f) should be >= Tvm_trips_rounded (%f) + 2.0*Tr0_trips_rounded (%f) + min_Tsw_equ (%f)\n",

+ __func__, min_Lsw_equ_ok, *p->Tpre_rounded, s->Tvm_trips_rounded, 2.0*s->Tr0_trips_rounded, s->min_Lsw_equ*s->LineTime);

+ dml2_printf("DML::%s: No time to prefetch! min_Lsw_equ_ok = %d, Tpre_rounded+Tvm_trips_rounded+2.0*Tr0_trips_rounded+min_Tsw_equ (%f) should be > \n",

+ __func__, tpre_gt_req_latency, (s->min_Lsw_equ*s->LineTime + s->Tvm_trips_rounded + 2.0*s->Tr0_trips_rounded), p->Turg, s->trip_to_mem, p->ExtraLatencyPrefetch);

@@ -5763,13 +5889,13 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch

- } else if (s->dst_y_per_vm_no_trip_vblank > 0) {

- prefetch_vm_bw = vm_bytes * p->HostVMInefficiencyFactor / (s->dst_y_per_vm_no_trip_vblank * s->LineTime);

- } else if (s->dst_y_per_row_no_trip_vblank > 0) {

- prefetch_row_bw = (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + tdlut_row_bytes) / (s->dst_y_per_row_no_trip_vblank * s->LineTime);

+ prefetch_row_bw = (p->PixelPTEBytesPerRow * p->HostVMInefficiencyFactor + tdlut_row_bytes) / (*p->dst_y_per_row_vblank * s->LineTime);

@@ -5822,6 +5948,171 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch

+ math_floor2(line_buffer_size_bits / lb_bit_per_pixel / (recin_width / math_max2(h_ratio, 1.0)), 1.0));

+static unsigned int find_max_impact_plane(unsigned int this_plane_idx, unsigned int num_planes, unsigned int Trpd_dcfclk_cycles[])

+static double calculate_impacted_Tsw(unsigned int exclude_plane_idx, unsigned int num_planes, double *prefetch_swath_bytes, double bw_mbps)

+static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core_internal_scratch *scratch,

+ struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_locals *s = &scratch->CheckGlobalPrefetchAdmissibility_locals;

+ s->max_Trpd_dcfclk_cycles = (unsigned int) math_ceil2((p->rob_buffer_size_kbytes*1024 + p->compressed_buffer_size_kbytes*DML_MAX_COMPRESSION_RATIO*1024)/64.0, 1.0);

+ dml2_printf("DML::%s: compressed_buffer_size_kbytes = %d\n", __func__, p->compressed_buffer_size_kbytes);

+ dml2_printf("DML::%s: estimated_urg_bandwidth_required_mbps = %f\n", __func__, p->estimated_urg_bandwidth_required_mbps);

+ s->burst_bytes_to_fill_det = (unsigned int) (math_floor2(s->src_detile_buf_size_bytes_l[i] / p->chunk_bytes_l, 1) * p->chunk_bytes_l);

+ s->burst_bytes_to_fill_det += (unsigned int) (math_floor2(p->lb_source_lines_l[i] / p->swath_height_l[i], 1) * s->src_swath_bytes_l[i]);

+ dml2_printf("DML::%s: i=%u src_detile_buf_size_bytes_l=%d\n", __func__, i, s->src_detile_buf_size_bytes_l[i]);

+ dml2_printf("DML::%s: i=%u burst_bytes_to_fill_det=%d (luma)\n", __func__, i, s->burst_bytes_to_fill_det);

+ s->burst_bytes_to_fill_det += (unsigned int) (math_floor2(s->src_detile_buf_size_bytes_c[i] / p->chunk_bytes_c, 1) * p->chunk_bytes_c);

+ if (p->pixel_format[i] == dml2_422_planar_8 || p->pixel_format[i] == dml2_422_planar_10 || p->pixel_format[i] == dml2_422_planar_12) {

+ s->burst_bytes_to_fill_det += (unsigned int) (math_floor2(p->lb_source_lines_c[i] / p->swath_height_c[i], 1) * s->src_swath_bytes_c[i]);

+ dml2_printf("DML::%s: i=%u src_detile_buf_size_bytes_c=%d\n", __func__, i, s->src_detile_buf_size_bytes_c[i]);

+ s->time_to_fill_det_us = (double) s->burst_bytes_to_fill_det / (256 * p->estimated_dcfclk_mhz); // fill time assume full burst at request rate

+ s->accumulated_return_path_dcfclk_cycles[i] = (unsigned int) math_ceil2(((DML_MAX_COMPRESSION_RATIO-1) * 64 * p->estimated_dcfclk_mhz) * s->time_to_fill_det_us / 64.0, 1.0); //for 64B per DCFClk

+ dml2_printf("DML::%s: i=%u accumulated_return_path_dcfclk_cycles=%u\n", __func__, i, s->accumulated_return_path_dcfclk_cycles[i]);

+ // if impacted_Tre is > equ bw Tpre, we need to fail the prefetch schedule as we need a higher state to support the bw

+ k = find_max_impact_plane(i, p->num_active_planes, s->accumulated_return_path_dcfclk_cycles); // plane k causes most impact to plane i

+ p->impacted_dst_y_pre[i] += calculate_impacted_Tsw(k, p->num_active_planes, p->prefetch_sw_bytes, p->estimated_urg_bandwidth_required_mbps);

- bool *bandwidth_support_ok, // max of vm, prefetch, vactive all ok

static double get_bandwidth_available_for_immediate_flip(enum dml2_core_internal_soc_state_type eval_state,

p->Watermark->Z8StutterExitWatermark += p->mmSOCParameters.max_urgent_latency_us + p->mmSOCParameters.df_response_time_us;

p->Watermark->Z8StutterEnterPlusExitWatermark += p->mmSOCParameters.max_urgent_latency_us + p->mmSOCParameters.df_response_time_us;

- p->Watermark->g6_temp_read_watermark_us = p->mmSOCParameters.g6_temp_read_blackout_us + p->Watermark->UrgentWatermark;

+ p->Watermark->temp_read_or_ppt_watermark_us = p->mmSOCParameters.g6_temp_read_blackout_us + p->Watermark->UrgentWatermark;

dml2_printf("DML::%s: StutterEnterPlusExitWatermark = %f\n", __func__, p->Watermark->StutterEnterPlusExitWatermark);

dml2_printf("DML::%s: Z8StutterEnterPlusExitWatermark = %f\n", __func__, p->Watermark->Z8StutterEnterPlusExitWatermark);

- dml2_printf("DML::%s: g6_temp_read_watermark_us = %f\n", __func__, p->Watermark->g6_temp_read_watermark_us);

+ dml2_printf("DML::%s: temp_read_or_ppt_watermark_us = %f\n", __func__, p->Watermark->temp_read_or_ppt_watermark_us);

- if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.enable == true) {

+ if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

s->LBLatencyHidingSourceLinesC[k] = (unsigned int)(math_min2((double)p->MaxLineBufferLines, math_floor2((double)p->LineBufferSize / LBBitPerPixel / ((double)p->SwathWidthC[k] / math_max2(h_ratio_c, 1.0)), 1)) - (v_taps_c - 1));

- dml2_printf("DML::%s: k=%u, MaxLineBufferLines= %u\n", __func__, k, p->MaxLineBufferLines);

s->ActiveDRAMClockChangeLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->DRAMClockChangeWatermark;

s->ActiveFCLKChangeLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->FCLKChangeWatermark;

s->USRRetrainingLatencyMargin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->USRRetrainingWatermark;

- s->g6_temp_read_latency_margin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->g6_temp_read_watermark_us;

+ s->g6_temp_read_latency_margin[k] = s->ActiveClockChangeLatencyHiding - p->Watermark->temp_read_or_ppt_watermark_us;

- if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.enable) {

- s->WritebackLatencyHiding = (double)p->WritebackInterfaceBufferSize * 1024.0 / ((double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_height * (double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_width / ((double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.input_height * (double)h_total / pixel_clock_mhz) * 4.0);

- if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.pixel_format == dml2_444_64) {

+ if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

+ / ((double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height

+ * (double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width

+ / ((double)p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height * (double)h_total / pixel_clock_mhz) * 4.0);

+ if (p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format == dml2_444_64) {

s->WritebackDRAMClockChangeLatencyMargin = s->WritebackLatencyHiding - p->Watermark->WritebackDRAMClockChangeWatermark;

uclk_pstate_change_strategy = p->display_cfg->plane_descriptors[k].overrides.uclk_pstate_change_strategy;

reserved_vblank_time_us = (double)p->display_cfg->plane_descriptors[k].overrides.reserved_vblank_time_ns / 1000;

- p->FCLKChangeSupport[k] = dml2_fclock_change_unsupported;

- p->FCLKChangeSupport[k] = dml2_fclock_change_vactive;

- p->FCLKChangeSupport[k] = dml2_fclock_change_vblank;

- if (p->FCLKChangeSupport[k] == dml2_fclock_change_unsupported)

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_unsupported;

(s->ActiveDRAMClockChangeLatencyMargin[k] > 0 && reserved_vblank_time_us >= p->mmSOCParameters.DRAMClockChangeLatency))

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank_and_vactive;

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive;

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank;

} else if (uclk_pstate_change_strategy == dml2_uclk_pstate_change_strategy_force_vactive && s->ActiveDRAMClockChangeLatencyMargin[k] > 0)

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive;

else if (uclk_pstate_change_strategy == dml2_uclk_pstate_change_strategy_force_vblank && reserved_vblank_time_us >= p->mmSOCParameters.DRAMClockChangeLatency)

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank;

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_drr;

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_svp;

- p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_full_frame;

- if (p->DRAMClockChangeSupport[k] == dml2_dram_clock_change_unsupported)

s->dst_y_pstate = (unsigned int)(math_ceil2((p->mmSOCParameters.DRAMClockChangeLatency + p->mmSOCParameters.UrgentLatency) / (h_total / pixel_clock_mhz), 1));

-static void calculate_vactive_det_fill_latency(

-static const struct dml2_core_internal_g6_temp_read_blackouts_table

- core_dcn4_g6_temp_read_blackout_table = {

struct dml2_core_calcs_CalculateVMRowAndSwath_params *CalculateVMRowAndSwath_params = &mode_lib->scratch.CalculateVMRowAndSwath_params;

struct dml2_core_calcs_CalculateSwathAndDETConfiguration_params *CalculateSwathAndDETConfiguration_params = &mode_lib->scratch.CalculateSwathAndDETConfiguration_params;

struct dml2_core_calcs_CalculatePrefetchSchedule_params *CalculatePrefetchSchedule_params = &mode_lib->scratch.CalculatePrefetchSchedule_params;

+ struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_params *CheckGlobalPrefetchAdmissibility_params = &mode_lib->scratch.CheckGlobalPrefetchAdmissibility_params;

struct dml2_core_calcs_calculate_tdlut_setting_params *calculate_tdlut_setting_params = &mode_lib->scratch.calculate_tdlut_setting_params;

struct dml2_core_calcs_calculate_mcache_setting_params *calculate_mcache_setting_params = &mode_lib->scratch.calculate_mcache_setting_params;

struct dml2_core_calcs_calculate_peak_bandwidth_required_params *calculate_peak_bandwidth_params = &mode_lib->scratch.calculate_peak_bandwidth_params;

dml2_printf("DML::%s: plane_%d: reserved_vblank_time_ns = %u\n", __func__, k, display_cfg->plane_descriptors[k].overrides.reserved_vblank_time_ns);

- // dml2_printf_dml_policy(&mode_lib->ms.policy);

- // dml2_printf_dml_display_cfg_timing(&display_cfg->timing, mode_lib->ms.num_active_planes);

- // dml2_printf_dml_display_cfg_plane(&display_cfg->plane, mode_lib->ms.num_active_planes);

- // dml2_printf_dml_display_cfg_surface(&display_cfg->surface, mode_lib->ms.num_active_planes);

- // dml2_printf_dml_display_cfg_output(&display_cfg->output, mode_lib->ms.num_active_planes);

- mode_lib->ms.SurfaceReadBandwidthLuma[k] = mode_lib->ms.SwathWidthYSingleDPP[k] * math_ceil2(mode_lib->ms.BytePerPixelY[k], 1.0) / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio;

- mode_lib->ms.SurfaceReadBandwidthChroma[k] = mode_lib->ms.SwathWidthCSingleDPP[k] * math_ceil2(mode_lib->ms.BytePerPixelC[k], 2.0) / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_ratio;

+ mode_lib->ms.vactive_sw_bw_l[k] = mode_lib->ms.SwathWidthYSingleDPP[k] * math_ceil2(mode_lib->ms.BytePerPixelY[k], 1.0) / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio;

+ mode_lib->ms.vactive_sw_bw_c[k] = mode_lib->ms.SwathWidthCSingleDPP[k] * math_ceil2(mode_lib->ms.BytePerPixelC[k], 2.0) / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_ratio;

mode_lib->ms.cursor_bw[k] = display_cfg->plane_descriptors[k].cursor.num_cursors * display_cfg->plane_descriptors[k].cursor.cursor_width *

display_cfg->plane_descriptors[k].cursor.cursor_bpp / 8.0 / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000));

@@ -7188,35 +7477,35 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

old_ReadBandwidthChroma = mode_lib->ms.SwathWidthYSingleDPP[k] / 2 * math_ceil2(mode_lib->ms.BytePerPixelInDETC[k], 2.0) / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio / 2.0;

- dml2_printf("DML::%s: k=%u, ReadBandwidthLuma = %f\n", __func__, k, mode_lib->ms.SurfaceReadBandwidthLuma[k]);

- dml2_printf("DML::%s: k=%u, ReadBandwidthChroma = %f\n", __func__, k, mode_lib->ms.SurfaceReadBandwidthChroma[k]);

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable == true && display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.pixel_format == dml2_444_64) {

- mode_lib->ms.WriteBandwidth[k] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_height

- * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_width

- / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.input_height

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0 && display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format == dml2_444_64) {

+ mode_lib->ms.WriteBandwidth[k][0] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height

+ * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width

+ / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height

/ ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * 8.0;

- } else if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable == true) {

- mode_lib->ms.WriteBandwidth[k] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_height

- * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_width

- / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.input_height

+ } else if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

+ mode_lib->ms.WriteBandwidth[k][0] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height

+ * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width

+ / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height

/ ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * 4.0;

- mode_lib->ms.WriteBandwidth[k] = 0.0;

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable == true &&

- (mode_lib->ms.WriteBandwidth[k] > mode_lib->ip.writeback_interface_buffer_size_kbytes * 1024 / ((double)mode_lib->soc.qos_parameters.writeback.base_latency_us))) {

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0 &&

+ (mode_lib->ms.WriteBandwidth[k][0] > mode_lib->ip.writeback_interface_buffer_size_kbytes * 1024 / ((double)mode_lib->soc.qos_parameters.writeback.base_latency_us))) {

@@ -7225,19 +7514,19 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable == true) {

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_ratio > mode_lib->ip.writeback_max_hscl_ratio

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_ratio > mode_lib->ip.writeback_max_vscl_ratio

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_ratio < mode_lib->ip.writeback_min_hscl_ratio

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_ratio < mode_lib->ip.writeback_min_vscl_ratio

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_taps > (unsigned int) mode_lib->ip.writeback_max_hscl_taps

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_taps > (unsigned int) mode_lib->ip.writeback_max_vscl_taps

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_ratio > (unsigned int)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_taps

- || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_ratio > (unsigned int)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_taps

- || (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_taps > 2.0 && ((display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_taps % 2) == 1))) {

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio > mode_lib->ip.writeback_max_hscl_ratio

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio > mode_lib->ip.writeback_max_vscl_ratio

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio < mode_lib->ip.writeback_min_hscl_ratio

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio < mode_lib->ip.writeback_min_vscl_ratio

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps > (unsigned int) mode_lib->ip.writeback_max_hscl_taps

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps > (unsigned int) mode_lib->ip.writeback_max_vscl_taps

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio > (unsigned int)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps

+ || display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio > (unsigned int)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps

+ || (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps > 2.0 && ((display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps % 2) == 1))) {

- if (2.0 * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_height * (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_taps - 1) * 57 > mode_lib->ip.writeback_line_buffer_buffer_size) {

+ if (2.0 * display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height * (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps - 1) * 57 > mode_lib->ip.writeback_line_buffer_buffer_size) {

CalculateSwathAndDETConfiguration_params->ConfigReturnBufferSegmentSizeInkByte = mode_lib->ip.config_return_buffer_segment_size_in_kbytes;

CalculateSwathAndDETConfiguration_params->CompressedBufferSegmentSizeInkByte = mode_lib->ip.compressed_buffer_segment_size_in_kbytes;

- CalculateSwathAndDETConfiguration_params->ReadBandwidthLuma = mode_lib->ms.SurfaceReadBandwidthLuma;

- CalculateSwathAndDETConfiguration_params->ReadBandwidthChroma = mode_lib->ms.SurfaceReadBandwidthChroma;

CalculateSwathAndDETConfiguration_params->MaximumSwathWidthChroma = mode_lib->ms.MaximumSwathWidthChroma;

@@ -7665,16 +7954,16 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable) {

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

- CalculateWriteBackDISPCLK(display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.pixel_format,

+ CalculateWriteBackDISPCLK(display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format,

((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000),

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_ratio,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_ratio,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_taps,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_taps,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.input_width,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_width,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_taps,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_width,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width,

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable == true)

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0)

@@ -8250,23 +8539,23 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

- mode_lib->ms.SurfaceReadBandwidthLuma,

- mode_lib->ms.SurfaceReadBandwidthChroma,

- if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.enable == true) {

+ if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.active_writebacks_per_stream > 0) {

mode_lib->ms.WritebackDelayTime[k] = mode_lib->soc.qos_parameters.writeback.base_latency_us + CalculateWriteBackDelay(

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.pixel_format,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.h_ratio,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_ratio,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.v_taps,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_width,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.output_height,

- display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.scaling_info.input_height,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].pixel_format,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].h_ratio,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_ratio,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].v_taps,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_width,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].output_height,

+ display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].writeback.writeback_stream[0].input_height,

display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total) / mode_lib->ms.RequiredDISPCLK;

- dml2_printf("DML::%s: urgent latency tolerance = %f\n", __func__, ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)));

+ dml2_printf("DML::%s: urgent latency tolarance = %f\n", __func__, ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kbytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)));

+ mode_lib->soc.qos_parameters.qos_params.dcn4x.average_transport_distance_fclk_cycles / mode_lib->ms.FabricClock)

+ = mode_lib->soc.qos_parameters.qos_params.dcn4x.per_uclk_dpm_params[mode_lib->ms.qos_param_index].maximum_latency_when_non_urgent_uclk_cycles

+ / mode_lib->ms.uclk_freq_mhz * (1 + mode_lib->soc.qos_parameters.qos_params.dcn4x.umc_max_latency_margin / 100.0)

+ + mode_lib->soc.qos_parameters.qos_params.dcn4x.max_round_trip_to_furthest_cs_fclk_cycles / mode_lib->ms.FabricClock

memset(calculate_mcache_setting_params, 0, sizeof(struct dml2_core_calcs_calculate_mcache_setting_params));

- if (mode_lib->soc.mall_allocated_for_dcn_mbytes == 0 || mode_lib->ip.dcn_mrq_present) {

- mode_lib->ms.SurfaceReadBandwidthLuma,

- mode_lib->ms.SurfaceReadBandwidthChroma,

+ s->line_times[k] = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);

+ s->lb_source_lines_l[k] = get_num_lb_source_lines(mode_lib->ip.max_line_buffer_lines, mode_lib->ip.line_buffer_size_bits,

+ s->lb_source_lines_c[k] = get_num_lb_source_lines(mode_lib->ip.max_line_buffer_lines, mode_lib->ip.line_buffer_size_bits,

CalculatePrefetchSchedule_params->mall_prefetch_sdp_overhead_factor = mode_lib->ms.mall_prefetch_sdp_overhead_factor[k];

mode_lib->ms.NoTimeForPrefetch[k] = CalculatePrefetchSchedule(&mode_lib->scratch, CalculatePrefetchSchedule_params);

dml2_printf("DML::%s: k=%d, dst_y_per_row_vblank = %f\n", __func__, k, *CalculatePrefetchSchedule_params->dst_y_per_row_vblank);

- for (k = 0; k <= mode_lib->ms.num_active_planes - 1; k++) {

@@ -8793,10 +9144,14 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

// Only do urg vs prefetch bandwidth check, flip schedule check, power saving feature support check IF the Prefetch Schedule Check is ok

- for (k = 0; k <= mode_lib->ms.num_active_planes - 1; k++) {

- double line_time_us = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);

calculate_peak_bandwidth_params->mall_prefetch_sdp_overhead_factor = mode_lib->ms.mall_prefetch_sdp_overhead_factor;

calculate_peak_bandwidth_params->mall_prefetch_dram_overhead_factor = mode_lib->ms.mall_prefetch_dram_overhead_factor;

- calculate_peak_bandwidth_params->surface_read_bandwidth_l = mode_lib->ms.SurfaceReadBandwidthLuma;

- calculate_peak_bandwidth_params->surface_read_bandwidth_c = mode_lib->ms.SurfaceReadBandwidthChroma;

@@ -8893,127 +9248,164 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

+ if (mode_lib->ms.support.PrefetchSupported && mode_lib->ms.num_active_planes > 1 && s->recalc_prefetch_done == 0) {

+ CheckGlobalPrefetchAdmissibility_params->rob_buffer_size_kbytes = mode_lib->ip.rob_buffer_size_kbytes;

+ CheckGlobalPrefetchAdmissibility_params->compressed_buffer_size_kbytes = mode_lib->ms.CompressedBufferSizeInkByte;

+ CheckGlobalPrefetchAdmissibility_params->estimated_urg_bandwidth_required_mbps = mode_lib->ms.support.urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp];

+ CheckGlobalPrefetchAdmissibility_params->estimated_dcfclk_mhz = (CheckGlobalPrefetchAdmissibility_params->estimated_urg_bandwidth_required_mbps / (double) mode_lib->soc.return_bus_width_bytes) /

+ ((double)mode_lib->soc.qos_parameters.derate_table.system_active_urgent.dcfclk_derate_percent / 100.0);

+ // if recalc_prefetch_schedule is set, recalculate the prefetch schedule with the new impacted_Tpre, prefetch should be possible

+ mode_lib->ms.support.PrefetchSupported = CheckGlobalPrefetchAdmissibility(&mode_lib->scratch, CheckGlobalPrefetchAdmissibility_params);

- // Both prefetch schedule and BW okay

- if (mode_lib->ms.support.PrefetchSupported == true && mode_lib->ms.support.VRatioInPrefetchSupported == true) {

- mode_lib->ms.BandwidthAvailableForImmediateFlip =

- get_bandwidth_available_for_immediate_flip(

- dml2_core_internal_soc_state_sys_active,

- mode_lib->ms.support.urg_bandwidth_required_qual, // no flip

- mode_lib->ms.support.urg_bandwidth_available);

- mode_lib->ms.TotImmediateFlipBytes = 0;

- for (k = 0; k < mode_lib->ms.num_active_planes; k++) {

- if (display_cfg->plane_descriptors[k].immediate_flip) {

- s->per_pipe_flip_bytes[k] = get_pipe_flip_bytes(

- s->HostVMInefficiencyFactor,

- mode_lib->ms.vm_bytes[k],

- mode_lib->ms.DPTEBytesPerRow[k],

- mode_lib->ms.meta_row_bytes[k]);

- s->per_pipe_flip_bytes[k] = 0;

- mode_lib->ms.TotImmediateFlipBytes += s->per_pipe_flip_bytes[k] * mode_lib->ms.NoOfDPP[k];

- for (k = 0; k <= mode_lib->ms.num_active_planes - 1; k++) {

- CalculateFlipSchedule(

- &mode_lib->scratch,

- display_cfg->plane_descriptors[k].immediate_flip,

- 1, // use_lb_flip_bw

- s->HostVMInefficiencyFactor,

- s->Tvm_trips_flip[k],

- s->Tr0_trips_flip[k],

- s->Tvm_trips_flip_rounded[k],

- s->Tr0_trips_flip_rounded[k],

- display_cfg->gpuvm_enable,

- mode_lib->ms.vm_bytes[k],

- mode_lib->ms.DPTEBytesPerRow[k],

- mode_lib->ms.BandwidthAvailableForImmediateFlip,

- mode_lib->ms.TotImmediateFlipBytes,

- display_cfg->plane_descriptors[k].pixel_format,

- (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)),

- display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio,

- display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_ratio,

- mode_lib->ms.Tno_bw_flip[k],

- mode_lib->ms.dpte_row_height[k],

- mode_lib->ms.dpte_row_height_chroma[k],

- mode_lib->ms.use_one_row_for_frame_flip[k],

- mode_lib->ip.max_flip_time_us,

- mode_lib->ip.max_flip_time_lines,

- s->per_pipe_flip_bytes[k],

- mode_lib->ms.meta_row_bytes[k],

- s->meta_row_height_luma[k],

- s->meta_row_height_chroma[k],

- mode_lib->ip.dcn_mrq_present && display_cfg->plane_descriptors[k].surface.dcc.enable,

- &mode_lib->ms.dst_y_per_vm_flip[k],

- &mode_lib->ms.dst_y_per_row_flip[k],

- &mode_lib->ms.final_flip_bw[k],

- &mode_lib->ms.ImmediateFlipSupportedForPipe[k]);

- calculate_peak_bandwidth_params->urg_vactive_bandwidth_required = s->dummy_bw;

- calculate_peak_bandwidth_params->urg_bandwidth_required = mode_lib->ms.support.urg_bandwidth_required_flip;

- calculate_peak_bandwidth_params->urg_bandwidth_required_qual = s->dummy_bw;

- calculate_peak_bandwidth_params->non_urg_bandwidth_required = mode_lib->ms.support.non_urg_bandwidth_required_flip;

- calculate_peak_bandwidth_params->surface_avg_vactive_required_bw = s->surface_dummy_bw;

- calculate_peak_bandwidth_params->surface_peak_required_bw = mode_lib->ms.surface_peak_required_bw;

- calculate_peak_bandwidth_params->display_cfg = display_cfg;

- calculate_peak_bandwidth_params->inc_flip_bw = 1;

- calculate_peak_bandwidth_params->num_active_planes = mode_lib->ms.num_active_planes;

- calculate_peak_bandwidth_params->num_of_dpp = mode_lib->ms.NoOfDPP;

- calculate_peak_bandwidth_params->dcc_dram_bw_nom_overhead_factor_p0 = mode_lib->ms.dcc_dram_bw_nom_overhead_factor_p0;

- calculate_peak_bandwidth_params->dcc_dram_bw_nom_overhead_factor_p1 = mode_lib->ms.dcc_dram_bw_nom_overhead_factor_p1;

- calculate_peak_bandwidth_params->dcc_dram_bw_pref_overhead_factor_p0 = mode_lib->ms.dcc_dram_bw_pref_overhead_factor_p0;

- calculate_peak_bandwidth_params->dcc_dram_bw_pref_overhead_factor_p1 = mode_lib->ms.dcc_dram_bw_pref_overhead_factor_p1;

- calculate_peak_bandwidth_params->mall_prefetch_sdp_overhead_factor = mode_lib->ms.mall_prefetch_sdp_overhead_factor;

- calculate_peak_bandwidth_params->mall_prefetch_dram_overhead_factor = mode_lib->ms.mall_prefetch_dram_overhead_factor;

- calculate_peak_bandwidth_params->surface_read_bandwidth_l = mode_lib->ms.SurfaceReadBandwidthLuma;

- calculate_peak_bandwidth_params->surface_read_bandwidth_c = mode_lib->ms.SurfaceReadBandwidthChroma;

- calculate_peak_bandwidth_params->prefetch_bandwidth_l = mode_lib->ms.RequiredPrefetchPixelDataBWLuma;

- calculate_peak_bandwidth_params->prefetch_bandwidth_c = mode_lib->ms.RequiredPrefetchPixelDataBWChroma;

- calculate_peak_bandwidth_params->excess_vactive_fill_bw_l = mode_lib->ms.excess_vactive_fill_bw_l;

- calculate_peak_bandwidth_params->excess_vactive_fill_bw_c = mode_lib->ms.excess_vactive_fill_bw_c;

- calculate_peak_bandwidth_params->cursor_bw = mode_lib->ms.cursor_bw;

- calculate_peak_bandwidth_params->dpte_row_bw = mode_lib->ms.dpte_row_bw;

- calculate_peak_bandwidth_params->meta_row_bw = mode_lib->ms.meta_row_bw;

- calculate_peak_bandwidth_params->prefetch_cursor_bw = mode_lib->ms.prefetch_cursor_bw;

- calculate_peak_bandwidth_params->prefetch_vmrow_bw = mode_lib->ms.prefetch_vmrow_bw;

- calculate_peak_bandwidth_params->flip_bw = mode_lib->ms.final_flip_bw;

- calculate_peak_bandwidth_params->urgent_burst_factor_l = mode_lib->ms.UrgentBurstFactorLuma;

- calculate_peak_bandwidth_params->urgent_burst_factor_c = mode_lib->ms.UrgentBurstFactorChroma;

- calculate_peak_bandwidth_params->urgent_burst_factor_cursor = mode_lib->ms.UrgentBurstFactorCursor;

- calculate_peak_bandwidth_params->urgent_burst_factor_prefetch_l = mode_lib->ms.UrgentBurstFactorLumaPre;

- calculate_peak_bandwidth_params->urgent_burst_factor_prefetch_c = mode_lib->ms.UrgentBurstFactorChromaPre;

- calculate_peak_bandwidth_params->urgent_burst_factor_prefetch_cursor = mode_lib->ms.UrgentBurstFactorCursorPre;

- calculate_peak_bandwidth_required(

- &mode_lib->scratch,

- calculate_peak_bandwidth_params);

- calculate_immediate_flip_bandwidth_support(

- &s->dummy_single[0], // double* frac_urg_bandwidth_flip

- &mode_lib->ms.support.ImmediateFlipSupport,

- dml2_core_internal_soc_state_sys_active,

- mode_lib->ms.support.urg_bandwidth_required_flip,

- mode_lib->ms.support.non_urg_bandwidth_required_flip,

- mode_lib->ms.support.urg_bandwidth_available);

- for (k = 0; k <= mode_lib->ms.num_active_planes - 1; k++) {

- if (display_cfg->plane_descriptors[k].immediate_flip == true && mode_lib->ms.ImmediateFlipSupportedForPipe[k] == false)

- mode_lib->ms.support.ImmediateFlipSupport = false;

+ (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)),

+ calculate_peak_bandwidth_params->urg_bandwidth_required = mode_lib->ms.support.urg_bandwidth_required_flip;

+ calculate_peak_bandwidth_params->non_urg_bandwidth_required = mode_lib->ms.support.non_urg_bandwidth_required_flip;

+ calculate_peak_bandwidth_params->dcc_dram_bw_nom_overhead_factor_p0 = mode_lib->ms.dcc_dram_bw_nom_overhead_factor_p0;

+ calculate_peak_bandwidth_params->dcc_dram_bw_nom_overhead_factor_p1 = mode_lib->ms.dcc_dram_bw_nom_overhead_factor_p1;

+ calculate_peak_bandwidth_params->dcc_dram_bw_pref_overhead_factor_p0 = mode_lib->ms.dcc_dram_bw_pref_overhead_factor_p0;

+ calculate_peak_bandwidth_params->dcc_dram_bw_pref_overhead_factor_p1 = mode_lib->ms.dcc_dram_bw_pref_overhead_factor_p1;

+ calculate_peak_bandwidth_params->mall_prefetch_sdp_overhead_factor = mode_lib->ms.mall_prefetch_sdp_overhead_factor;

+ calculate_peak_bandwidth_params->mall_prefetch_dram_overhead_factor = mode_lib->ms.mall_prefetch_dram_overhead_factor;

+ calculate_peak_bandwidth_params->prefetch_bandwidth_c = mode_lib->ms.RequiredPrefetchPixelDataBWChroma;

+ calculate_peak_bandwidth_params->urgent_burst_factor_prefetch_l = mode_lib->ms.UrgentBurstFactorLumaPre;

+ calculate_peak_bandwidth_params->urgent_burst_factor_prefetch_c = mode_lib->ms.UrgentBurstFactorChromaPre;

+ calculate_peak_bandwidth_params->urgent_burst_factor_prefetch_cursor = mode_lib->ms.UrgentBurstFactorCursorPre;

- } else { // if prefetch not support, assume iflip is not supported too

+ if (display_cfg->plane_descriptors[k].immediate_flip == true && mode_lib->ms.ImmediateFlipSupportedForPipe[k] == false)

- } // prefetch schedule

- mode_lib->ms.SurfaceReadBandwidthLuma,

- mode_lib->ms.SurfaceReadBandwidthChroma,

@@ -9181,12 +9573,12 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out

dml2_printf("DML::%s: ImmediateFlipSupport = %u\n", __func__, mode_lib->ms.support.ImmediateFlipSupport);

- for (k = 0; k <= mode_lib->ms.num_active_planes - 1; k++) {

dml2_printf("DML::%s: is_mode_support = %u (min_clk_index=%d)\n", __func__, result, in_out_params->min_clk_index);

- dml2_printf("DML::%s: plane_%d: reserved_vblank_time_ns = %u\n", __func__, k, in_out_params->in_display_cfg->plane_descriptors[k].overrides.reserved_vblank_time_ns);

+ dml2_printf("DML::%s: plane_%d: reserved_vblank_time_ns = %u\n", __func__, k, in_out_params->in_display_cfg->plane_descriptors[k].overrides.reserved_vblank_time_ns);

- if (p->display_cfg->stream_descriptors[k].writeback.enable)

struct dml2_core_calcs_CalculateSwathAndDETConfiguration_params *CalculateSwathAndDETConfiguration_params = &mode_lib->scratch.CalculateSwathAndDETConfiguration_params;

struct dml2_core_calcs_CalculateStutterEfficiency_params *CalculateStutterEfficiency_params = &mode_lib->scratch.CalculateStutterEfficiency_params;

struct dml2_core_calcs_CalculatePrefetchSchedule_params *CalculatePrefetchSchedule_params = &mode_lib->scratch.CalculatePrefetchSchedule_params;

+ struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_params *CheckGlobalPrefetchAdmissibility_params = &mode_lib->scratch.CheckGlobalPrefetchAdmissibility_params;

struct dml2_core_calcs_calculate_mcache_setting_params *calculate_mcache_setting_params = &mode_lib->scratch.calculate_mcache_setting_params;

struct dml2_core_calcs_calculate_tdlut_setting_params *calculate_tdlut_setting_params = &mode_lib->scratch.calculate_tdlut_setting_params;

struct dml2_core_shared_CalculateMetaAndPTETimes_params *CalculateMetaAndPTETimes_params = &mode_lib->scratch.CalculateMetaAndPTETimes_params;

@@ -10069,12 +10462,6 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex

- // dml2_printf_dml_display_cfg_timing(&display_cfg->timing, s->num_active_planes);

- // dml2_printf_dml_display_cfg_plane(&display_cfg->plane, s->num_active_planes);

- // dml2_printf_dml_display_cfg_surface(&display_cfg->surface, s->num_active_planes);

- // dml2_printf_dml_display_cfg_output(&display_cfg->output, s->num_active_planes);

- // dml2_printf_dml_display_cfg_hw_resource(&display_cfg->hw, s->num_active_planes);

@@ -10192,10 +10579,10 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex

mode_lib->mp.cursor_bw[k] = display_cfg->plane_descriptors[k].cursor.num_cursors * display_cfg->plane_descriptors[k].cursor.cursor_width * display_cfg->plane_descriptors[k].cursor.cursor_bpp / 8.0 /

((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000));

- mode_lib->mp.SurfaceReadBandwidthLuma[k] = mode_lib->mp.SwathWidthSingleDPPY[k] * mode_lib->mp.BytePerPixelY[k] / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio;

- mode_lib->mp.SurfaceReadBandwidthChroma[k] = mode_lib->mp.SwathWidthSingleDPPC[k] * mode_lib->mp.BytePerPixelC[k] / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_ratio;

- dml2_printf("DML::%s: ReadBandwidthSurfaceLuma[%i] = %fBps\n", __func__, k, mode_lib->mp.SurfaceReadBandwidthLuma[k]);

- dml2_printf("DML::%s: ReadBandwidthSurfaceChroma[%i] = %fBps\n", __func__, k, mode_lib->mp.SurfaceReadBandwidthChroma[k]);

+ mode_lib->mp.vactive_sw_bw_l[k] = mode_lib->mp.SwathWidthSingleDPPY[k] * mode_lib->mp.BytePerPixelY[k] / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio;

+ mode_lib->mp.vactive_sw_bw_c[k] = mode_lib->mp.SwathWidthSingleDPPC[k] * mode_lib->mp.BytePerPixelC[k] / (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_ratio;

@@ -10211,8 +10598,8 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex

CalculateSwathAndDETConfiguration_params->ConfigReturnBufferSegmentSizeInkByte = mode_lib->ip.config_return_buffer_segment_size_in_kbytes;

CalculateSwathAndDETConfiguration_params->CompressedBufferSegmentSizeInkByte = mode_lib->ip.compressed_buffer_segment_size_in_kbytes;

- CalculateSwathAndDETConfiguration_params->ReadBandwidthLuma = mode_lib->mp.SurfaceReadBandwidthLuma;

- CalculateSwathAndDETConfiguration_params->ReadBandwidthChroma = mode_lib->mp.SurfaceReadBandwidthChroma;

@@ -10533,8 +10920,8 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex

@@ -10577,17 +10964,17 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex