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authorMiquel Raynal <miquel.raynal@bootlin.com>2021-11-07 17:38:05 +0100
committerMiquel Raynal <miquel.raynal@bootlin.com>2021-11-07 17:38:05 +0100
commitbca20e6a73863f37eb5e04c505be219a65f26a38 (patch)
tree21656e91b4735420efbb479fd88162adaa36d9ba /MAINTAINERS
parentc13de2386c78e890d4ae6f01a85eefd0b293fb08 (diff)
parentfc9e18f9e987ad46722dad53adab1c12148c213c (diff)
Merge tag 'nand/for-5.16' into mtd/next
Core: * Remove obsolete macros only used by the old nand_ecclayout struct * MAINTAINERS: Add entry for Qualcomm NAND controller driver Raw NAND controller drivers: * Arasan: - Prevent an unsupported configuration * Xway, Socrates: plat_nand, Pasemi, Orion, mpc5121, GPIO, Au1550nd, AMS-Delta: - Keep the driver compatible with on-die ECC engines * cs553x, lpc32xx_slc, ndfc, sharpsl, tmio, txx9ndfmc: - Revert the commits: "Fix external use of SW Hamming ECC helper" - And let callers use the bare Hamming helpers * Fsmc: Fix use of SM ORDER * Intel: - Fix potential buffer overflow in probe * xway, vf610, txx9ndfm, tegra, stm32, plat_nand, oxnas, omap, mtk, hisi504, gpmi, gpio, denali, bcm6368, atmel: - Make use of the helper function devm_platform_ioremap_resource{,byname}() Onenand driver: * Samsung: Drop Exynos4 and describe driver in KConfig Raw NAND chip drivers: * Hynix: Add support for H27UCG8T2ETR-BC MLC NAND
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS8
1 files changed, 8 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index d703a08462c5..0c9fa0bd259a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15571,6 +15571,14 @@ S: Maintained
F: Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml
F: drivers/regulator/vqmmc-ipq4019-regulator.c
+QUALCOMM NAND CONTROLLER DRIVER
+M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+L: linux-mtd@lists.infradead.org
+L: linux-arm-msm@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
+F: drivers/mtd/nand/raw/qcom_nandc.c
+
QUALCOMM RMNET DRIVER
M: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
M: Sean Tranchetti <stranche@codeaurora.org>