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authorLinus Torvalds <torvalds@linux-foundation.org>2021-06-19 08:45:34 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2021-06-19 08:45:34 -0700
commitd9403d307dba1a71ee6462b22300c2d3be773b1c (patch)
tree944870986943c63f7fb454064d34749764be64fd /arch/riscv/boot/dts/sifive/fu740-c000.dtsi
parente14c779adebebe4b4aeeefb3cc09f376bec966c5 (diff)
parent7ede12b01b59dc67bef2e2035297dd2da5bfe427 (diff)
Merge tag 'riscv-for-linus-5.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt: - A build fix to always build modules with the 'medany' code model, as the module loader doesn't support 'medlow'. - A Kconfig warning fix for the SiFive errata. - A pair of fixes that for regressions to the recent memory layout changes. - A fix for the FU740 device tree. * tag 'riscv-for-linus-5.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: dts: fu740: fix cache-controller interrupts riscv: Ensure BPF_JIT_REGION_START aligned with PMD size riscv: kasan: Fix MODULES_VADDR evaluation due to local variables' name riscv: sifive: fix Kconfig errata warning riscv32: Use medany C model for modules
Diffstat (limited to 'arch/riscv/boot/dts/sifive/fu740-c000.dtsi')
-rw-r--r--arch/riscv/boot/dts/sifive/fu740-c000.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index 8eef82e4199f..abbb960f90a0 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -273,7 +273,7 @@
cache-size = <2097152>;
cache-unified;
interrupt-parent = <&plic0>;
- interrupts = <19 20 21 22>;
+ interrupts = <19 21 22 20>;
reg = <0x0 0x2010000 0x0 0x1000>;
};
gpio: gpio@10060000 {