path: root/mm/init-mm.c
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authorToshi Kani <>2018-06-27 08:13:48 -0600
committerThomas Gleixner <>2018-07-04 21:37:09 +0200
commit5e0fb5df2ee871b841f96f9cb6a7f2784e96aa4e (patch)
tree4f8d20837be1bbd67ba2db4561e1bf0fcb4da495 /mm/init-mm.c
parent785a19f9d1dd8a4ab2d0633be4656653bd3de1fc (diff)
x86/mm: Add TLB purge to free pmd/pte page interfaces
ioremap() calls pud_free_pmd_page() / pmd_free_pte_page() when it creates a pud / pmd map. The following preconditions are met at their entry. - All pte entries for a target pud/pmd address range have been cleared. - System-wide TLB purges have been peformed for a target pud/pmd address range. The preconditions assure that there is no stale TLB entry for the range. Speculation may not cache TLB entries since it requires all levels of page entries, including ptes, to have P & A-bits set for an associated address. However, speculation may cache pud/pmd entries (paging-structure caches) when they have P-bit set. Add a system-wide TLB purge (INVLPG) to a single page after clearing pud/pmd entry's P-bit. SDM, Operation that Invalidate TLBs and Paging-Structure Caches, states that: INVLPG invalidates all paging-structure caches associated with the current PCID regardless of the liner addresses to which they correspond. Fixes: 28ee90fe6048 ("x86/mm: implement free pmd/pte page interfaces") Signed-off-by: Toshi Kani <> Signed-off-by: Thomas Gleixner <> Cc: Cc: Cc: Cc: Cc: Cc: Cc: Joerg Roedel <> Cc: Cc: Andrew Morton <> Cc: Michal Hocko <> Cc: "H. Peter Anvin" <> Cc: <> Link:
Diffstat (limited to 'mm/init-mm.c')
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