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7 daysimplement slot capabilities (SSPL)clearfogRussell King
7 daysmvebu/clearfog pcie updatesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
7 daysPCI: pci-bridge-emul: add support for PCIe extended capabilitiesRussell King
Add support for PCIe extended capabilities, which we just redirect to the emulating driver. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysPCI: pci-bridge-emul: re-arrange register testsRussell King
Re-arrange the tests for which sets of registers are being accessed so that it is easier to add further regions later. No functional change. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysARM: dts: armada388-clearfog: use 1000BaseX mode for 88e6176 switchRussell King
Use 1000BaseX mode for the 88e6176 switch, which allows mvneta to negotiate correctly without needing to be forced. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysARM: dts: armada388-clearfog: document MPP usageRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
7 daysARM: dts: armada388-clearfog: emmc on clearfog baseRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysMerge branches 'dsa-mv88e6xxx', 'mvebu-cpuidle' and 'mvneta' into clearfogRussell King (Oracle)
7 daysnet: mvneta: deny disabling autoneg for 802.3z modesRussell King (Oracle)
The documentation for Armada 38x says: Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... When <PortType> = 1 (1000BASE-X) this field must be set to 1. We presently ignore whether userspace requests autonegotiation or not through the ethtool ksettings interface. However, we have some network interfaces that wish to do this. To offer a consistent API across network interfaces, deny the ability to disable autonegotiation on mvneta hardware when in 1000BASE-X and 2500BASE-X. This means the only way to switch between 2500BASE-X and 1000BASE-X on SFPs that support this will be: # ethtool -s ethX advertise 0x20000002000 # 1000BASE-X Pause # ethtool -s ethX advertise 0xa000 # 2500BASE-X Pause Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: Marek Behún <kabel@kernel.org>
7 daysnet: mvgmac: support different hw versionsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvneta: split out GMACRussell King
Split out the code handling the GMAC from the rest of the driver. This block appears to be shared amongst several revisions of the IP. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvneta: convert to phylink pcs operationsRussell King
An initial stab at converting mvneta to PCS operations. There's a few FIXMEs to be solved. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvneta: move 1ms clock control into mac_prepare/mac_finishRussell King
Move the 1ms clock control out of mac_config() into mac_prepare() and mac_finish(), which simplifies the mac_config() code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvneta: convert to use mac_prepare()/mac_finish()Russell King
Convert mvneta to use the mac_prepare() and mac_finish() methods in preparation to converting mvneta to split-PCS support. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvneta: program 1ms autonegotiation clock divisorRussell King
Program the 1ms autonegotiation clock divisor according to the clocking rate of neta - without this, the 1ms clock ticks at about 660us on Armada 38x configured for 250MHz. Bring this into correct specification. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysphy: armada-38x: further augmentation of setupRussell King
Further augmentation of the comphy setup. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: dsa/bcm_sf2: fix pause mode validationnet-queueRussell King
The implementation appears not to support pause modes on anything but RGMII, RGMII_TXID, MII and REVMII interface modes. Let phylink know that detail. (This may not be correct; particularly see the FIXMEs in this patch.) Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phylink: use phy interface mode bitmapsRussell King
Use the phy interface mode bitmaps for SFP modules and PHYs to select the operating interface for SFPs and PHYs with SFPs. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add supported_interfaces to marvell10g PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add supported_interfaces to marvell PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add supported_interfaces to bcm84881Russell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add supported_interfaces to phylibRussell King
Add a supported_interfaces member to phylib so we know which interfaces a PHY supports. Currently, set any unconverted driver to indicate all interfaces are supported. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: marvell10g: select host interface configurationRussell King
Select the host interface configuration according to the capabilities of the host; this allows the kernel to support SFP modules using the 88x3310. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: pass supported PHY interface types to phylibRussell King
Pass the supported PHY interface types to phylib so that PHY drivers can select an appropriate host configuration mode for their interface according to the host capabilities. This is only done for SFP modules presently. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: sfp: display SFP module information [*not for mainline*]Russell King
Display SFP module information verbosely, splitting the generic parts into a separate file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
7 daysnet: sfp: add sfp+ compatible [*not for mainline*]Russell King
Add a compatible for SFP+ cages. SFP+ cages are backwards compatible, but the ethernet device behind them may not support the slower speeds of SFP modules. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: sfp: add support for cooled SFP+ transceiversRussell King
Cooled SFP+ transceivers need a longer initialisation (startup) time. Select the initialisation time depending on the cooled option bit. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: make phy_error() report which PHY has failedRussell King
phy_error() is called from phy_interrupt() or phy_state_machine(), and uses WARN_ON() to print a backtrace. The backtrace is not useful when reporting a PHY error. However, a system may contain multiple ethernet PHYs, and phy_error() gives no clue which one caused the problem. Replace WARN_ON() with a call to phydev_err() so that we can see which PHY had an error, and also inform the user that we are halting the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: marvell10g: allow PHY to probe without firmwareRussell King
Allow the PHY to probe when there is no firmware, but do not allow the link to come up by forcing the PHY state to PHY_HALTED in a similar way to phy_error(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: provide phy driver start/stop hooksRussell King
Provide phy driver start/stop hooks so that the PHY driver knows when the network driver is starting or stopping. This will be used for the Marvell 10G driver so that we can sanely refuse to start if the PHYs firmware is not present, and also so that we can sanely support SFPs behind the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: marvell*: add support for hw resolved pause modesRussell King
Support reporting the hardware resolved pause enablement states via phylib, overriding our software implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add resolved pause supportRussell King
Allow phylib drivers to pass the hardware-resolved pause state to MAC drivers, rather than using the software-based pause resolution code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysarm64: dts: configure Macchiatobin 10G PHY LED modesRussell King
Configure the Macchiatobin 10G PHY LED modes to correct their polarity. We keep the existing LED behaviours, but switch their polarity to reflect how they are connected. Tweak the LED modes as well to be: left: off = no link solid green = RJ45 link up (not SFP+ cage) flash green = traffic right: off = no link solid green = 10G solid yellow = 1G flash green = 100M flash yellow = 10M Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: marvell10g: add support for configuring LEDsRussell King
Add support for configuring the LEDs. Macchiatobin has an oddity in that the left LED goes out when the cable is connected, and flashes when there's link activity. This is because the reset default for the LED outputs assume that the LED is connected to supply, not to ground. Add support for configuring the LED modes and polarities. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysdt-bindings: net: add dt bindings for marvell10g driverRussell King
Add a DT bindings document for the Marvell 10G driver, which will augment the generic ethernet PHY binding by having LED mode configuration. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add helpers for comparing phy IDsRussell King
There are several places which open code comparing PHY IDs. Provide a couple of helpers to assist with this, using a slightly simpler test than the original: - phy_id_compare() compares two arbitary PHY IDs and a mask of the significant bits in the ID. - phydev_id_compare() compares the bound phydev with the specified PHY ID, using the bound driver's mask. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: at803x: simplify custom phy id matchingRussell King
The at803x driver contains a function, at803x_match_phy_id(), which tests whether the PHY ID matches the value passed, comparing phy_id with phydev->phy_id and testing all bits that have a "one" in the mask, phydev->drv->phy_id_mask. This is the same test that is used to match the driver, with phy_id replaced with the driver specified ID, phydev->drv->phy_id. Hence, we already know the value of the bits being tested if we look at phydev->drv->phy_id directly, and we do not require a complicated test to check them. Test directly against phydev->drv->phy_id instead. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mtk_eth_soc: use resolved link config for PCS PHYRussell King
The SGMII PCS PHY needs to be updated with the link configuration in the mac_link_up() call rather than in mac_config(). However, mtk_sgmii_setup_mode_force() programs the SGMII block during mac_config() when using 802.3z interface modes with the link configuration. Split that functionality from mtk_sgmii_setup_mode_force(), moving it to a new mtk_sgmii_link_up() function, and call it from mac_link_up(). This does not look correct to me: 802.3z modes operate at a fixed speed. The contents of mtk_sgmii_link_up() look more appropriate for SGMII mode, but the original code definitely did not call mtk_sgmii_setup_mode_force() for SGMII mode but only 802.3z mode. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: dsa: mv88e6xxx: implement .phylink_get_interfaces operationMarek Behún
Implement the .phylink_get_interfaces method for mv88e6xxx driver. We are currently only interested in SGMII, 1000base-x and 2500base-x modes (for the SFP code). USXGMII and 10gbase-r can be added later for Amethyst. XAUI and RXAUI are irrelevant for SFP (but maybe not for QSFP?). Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: dsa: fill phylink's config supported_interfaces memberMarek Behún
Add a new DSA switch operation, phylink_get_interfaces, which should fill in which PHY_INTERFACE_MODE_* are supported by given port. Use this before phylink_create to fill phylink's config supported_interfaces member. This allows for phylink to determine which PHY_INTERFACE_MODE to use with SFP modules. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvpp2: fill in phy interface mode bitmapRussell King
Fill in the phy interface mode bitmap for the Marvell mvpp2 driver, so phylink can know which interfaces are supported by the MAC. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: mvneta: fill in phy interface mode bitmapRussell King
Fill in the phy interface mode bitmap for the Marvell mvneta driver, so phylink can know which interfaces are supported by the MAC. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phylink: use phy interface mode bitmaps for optical modulesRussell King
Where a MAC provides the PHY interface mode capabilities, use the PHY interface mode bitmaps to select the operating interface mode for optical SFP modules, rather than using the linkmode bitmaps. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phylink: add mac PHY interface bitmapRussell King
Add a PHY interface bitmap for the MAC driver to specify which PHY interfaces are supported to phylink. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: sfp: augment SFP parsing with phy_interface_t bitmapRussell King
We currently parse the SFP EEPROM to a bitmap of ethtool link modes, and then attempt to convert the link modes to a PHY interface mode. While this works at present, there are cases where this is sub-optimal. For example, where a module can operate with several different PHY interface modes. To start addressing this, arrange for the SFP EEPROM parsing to also provide a bitmap of the possible PHY interface modes. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
7 daysnet: phy: add phy_interface_t bitmap supportRussell King (Oracle)
Add support for a bitmap for phy interface modes, which includes: - a macro to declare the interface bitmap - an inline helper to zero the interface bitmap - an inline helper to detect an empty interface bitmap - an inline helper to do a bitwise AND operation on two interface bitmaps Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
7 daysnet: phylink: cleanup ksettings_setRussell King (Oracle)
We only need to fiddle about with the supported mask after we have validated the user's requested parameters. Simplify and streamline the code by moving the linkmode copy and update of the autoneg bit after validating the user's request. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
7 daysnet: phylink: add phy change pause mode debugRussell King (Oracle)
Augment the phy link debug prints with the pause state. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
7 daysnet: phylink: Support disabling autonegotiation for PCSRobert Hancock
The auto-negotiation state in the PCS as set by phylink_mii_c22_pcs_config was previously always enabled when the driver is configured for in-band autonegotiation, even if autonegotiation was disabled on the interface with ethtool. Update the code to set the BMCR_ANENABLE bit based on the interface's autonegotiation enabled state. Update phylink_mii_c22_pcs_get_state to not check autonegotiation-related fields when autonegotiation is disabled. Update phylink_mac_pcs_get_state to initialize the state based on the interface's configured speed, duplex and pause parameters rather than to unknown when autonegotiation is disabled, before calling the driver's pcs_get_state functions, as they are not likely to provide meaningful data for these fields when autonegotiation is disabled. In this case the driver is really just filling in the link state field. Note that in cases where there is a downstream PHY connected, such as with SGMII and a copper PHY, the configuration set by ethtool is handled by phy_ethtool_ksettings_set and not propagated to the PCS. This is correct since SGMII or 1000Base-X autonegotiation with the PCS should normally still be used even if the copper side has disabled it. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
7 daysnet: ethernet: use phylink_set_10g_modes()Russell King (Oracle)
Update three drivers to use the new phylink_set_10g_modes() helper: Cadence macb, Freescale DPAA2 and Marvell PP2. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>