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4 daysimplement slot capabilities (SSPL)clearfogRussell King
4 daysmvebu/clearfog pcie updatesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
4 daysPCI: pci-bridge-emul: re-arrange register testsRussell King
Re-arrange the tests for which sets of registers are being accessed so that it is easier to add further regions later. No functional change. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysMerge branch 'dsa-mv88e6xxx' into clearfogRussell King (Oracle)
# Conflicts: # drivers/net/dsa/mv88e6xxx/chip.c
4 daysMerge branches 'mvebu-cpuidle' and 'mvneta' into clearfogRussell King (Oracle)
4 daysnet: mvgmac: support different hw versionsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: mvneta: split out GMACRussell King
Split out the code handling the GMAC from the rest of the driver. This block appears to be shared amongst several revisions of the IP. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysphy: armada-38x: further augmentation of setupRussell King
Further augmentation of the comphy setup. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: remove calls to phylink_generic_validate()net-queueRussell King (Oracle)
All conventional network drivers are now converted to use phylink_generic_validate() - only DSA drivers remain. Prepare to move the MAC based validation entirely within phylink by defaulting to phylink_generic_validate() when the .validate method is NULL. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: remove legacy_pre_march2020 from driversRussell King (Oracle)
Since DSA no longer marks anything as phylink-legacy, there is now no need for DSA drivers to set this member to false. Remove all instances of this. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: generate PHY mdio modaliasRussell King (Oracle)
The modalias string provided in the uevent sysfs file does not conform to the format used in PHY driver modules. One of the reasons is that udev loading of PHY driver modules has not been an expected use case. This patch changes the MODALIAS entry for only PHY devices from: MODALIAS=of:Nethernet-phyT(null) to: MODALIAS=mdio:00000000001000100001010100010011 Other MDIO devices (such as DSA) remain as before. However, having udev automatically load the module has the advantage of making use of existing functionality to have the module loaded before the device is bound to the driver, thus taking advantage of multithreaded boot systems, potentially decreasing the boot time. However, this patch will not solve any issues with the driver module not being loaded prior to the network device needing to use the PHY. This is something that is completely out of control of any patch to change the uevent mechanism. Reported-by: Yinbo Zhu <zhuyinbo@loongson.cn> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: all drivers updateRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: pass mode into pcs_validate()Russell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: pass mode into phylink_validate()Russell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: use phylink_mode_*() helpersRussell King (Oracle)
Use the phylink_mode_*() helpers in all drivers so we can change the definition of the "mode" argument. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: allow PCS to override MAC validationRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: validate only used interfaces for c45 PHYsRussell King (Oracle)
Some clause 45 PHYs such as Marvell 88X33x0 and Broadcom 84881 switch between a set of interface types depending on the negotiated media speed. We currently validate this kind of PHY using all MAC capabilities, which is not correct if that would give a superset of the ethtool link modes. This commit uses the previously introduced phy possible_interfaces, and the recently introduced supported_interfaces to calculate the union of interface support, and then validates only those interfaces. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: split out PHY validation from phylink_bringup_phy()Russell King (Oracle)
When bringing up a PHY, we need to work out which ethtool link modes it should support and advertise. Clause 22 PHYs operate in a single interface mode, which can be easily dealt with. However, clause 45 PHYs tend to switch interface mode depending on the media. We need more flexible validation at this point, so this patch splits out that code in preparation to changing it. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: add ability to validate a set of interface modesRussell King (Oracle)
Rather than having the ability to validate all supported interface modes or a single interface mode, introduce the ability to validate a subset of supported modes. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: bcm84881: fill in possible_interfacesRussell King (Oracle)
Fill in the possible_interfaces member. This PHY driver only supports a single configuration found on SFPs. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: marvell10g: fill in possible_interfacesRussell King (Oracle)
Fill in the possible_interfaces member according to the selected mactype mode. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: marvell10g: table driven mactype decodeRussell King (Oracle)
Replace the code-based mactype decode with a table driven approach. This will allow us to fill in the possible_interfaces cleanly. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: ocelot: convert to phylink_generic_validate() *XXX*Russell King (Oracle)
Populate the supported interfaces and MAC capabilities for the Ocelot DSA switches and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. The felix_vsc9959 and seville_vsc9953 sub-drivers only supports a single interface mode, defined by ocelot_port->phy_mode, so we indicate only this interface mode to phylink. Since phylink restricts the ethtool link modes based on interface, we do not need to make the MAC capabilities dependent on the interface mode. Not for mainline: we need support for rate adaption first. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: ocelot: populate mac_capabilitiesRussell King (Oracle)
Populate the MAC capabilities for the Ocelot DSA switches. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: use phy interface mode bitmapsRussell King
Use the phy interface mode bitmaps for SFP modules and PHYs to select the operating interface for SFPs and PHYs with SFPs. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: add supported_interfaces to marvell10g PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: add supported_interfaces to marvell PHYsRussell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: add supported_interfaces to bcm84881Russell King
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: sfp: display SFP module information [*not for mainline*]Russell King
Display SFP module information verbosely, splitting the generic parts into a separate file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
4 daysnet: sfp: add sfp+ compatible [*not for mainline*]Russell King
Add a compatible for SFP+ cages. SFP+ cages are backwards compatible, but the ethernet device behind them may not support the slower speeds of SFP modules. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: sfp: add support for cooled SFP+ transceiversRussell King
Cooled SFP+ transceivers need a longer initialisation (startup) time. Select the initialisation time depending on the cooled option bit. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: make phy_error() report which PHY has failedRussell King
phy_error() is called from phy_interrupt() or phy_state_machine(), and uses WARN_ON() to print a backtrace. The backtrace is not useful when reporting a PHY error. However, a system may contain multiple ethernet PHYs, and phy_error() gives no clue which one caused the problem. Replace WARN_ON() with a call to phydev_err() so that we can see which PHY had an error, and also inform the user that we are halting the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: marvell10g: allow PHY to probe without firmwareRussell King
Allow the PHY to probe when there is no firmware, but do not allow the link to come up by forcing the PHY state to PHY_HALTED in a similar way to phy_error(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: provide phy driver start/stop hooksRussell King
Provide phy driver start/stop hooks so that the PHY driver knows when the network driver is starting or stopping. This will be used for the Marvell 10G driver so that we can sanely refuse to start if the PHYs firmware is not present, and also so that we can sanely support SFPs behind the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: marvell*: add support for hw resolved pause modesRussell King
Support reporting the hardware resolved pause enablement states via phylib, overriding our software implementation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: add resolved pause support [*not for mainline*]Russell King
Allow phylib drivers to pass the hardware-resolved pause state to MAC drivers, rather than using the software-based pause resolution code. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: marvell10g: add support for configuring LEDsRussell King
Add support for configuring the LEDs. Macchiatobin has an oddity in that the left LED goes out when the cable is connected, and flashes when there's link activity. This is because the reset default for the LED outputs assume that the LED is connected to supply, not to ground. Add support for configuring the LED modes and polarities. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phy: add helpers for comparing phy IDsRussell King
There are several places which open code comparing PHY IDs. Provide a couple of helpers to assist with this, using a slightly simpler test than the original: - phy_id_compare() compares two arbitary PHY IDs and a mask of the significant bits in the ID. - phydev_id_compare() compares the bound phydev with the specified PHY ID, using the bound driver's mask. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: use phy_interface_t bitmaps for optical modulesRussell King
Where a MAC provides a phy_interface_t bitmap, use these bitmaps to select the operating interface mode for optical SFP modules, rather than using the linkmode bitmaps. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: sfp: augment SFP parsing with phy_interface_t bitmapRussell King
We currently parse the SFP EEPROM to a bitmap of ethtool link modes, and then attempt to convert the link modes to a PHY interface mode. While this works at present, there are cases where this is sub-optimal. For example, where a module can operate with several different PHY interface modes. To start addressing this, arrange for the SFP EEPROM parsing to also provide a bitmap of the possible PHY interface modes. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: bcm_sf2: fix pause mode validationRussell King
The implementation appears not to appear to support pause modes on anything but RGMII, RGMII_TXID, MII and REVMII interface modes. Let phylink know that detail. Moreover, RGMII_RXID and RGMII_ID appears to be unsupported. (This may not be correct; particularly see the FIXMEs in this patch.) Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: remove obsolete serdes methodsRussell King (Oracle)
Now that mv88e6xxx is completely converted to using phylink_pcs support, we have no need for the serdes methods. Remove all this infrastructure. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: 88e6393x updatesRussell King (Oracle)
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: phylink: add pcs_pre_config()/pcs_post_config() methodsRussell King (Oracle)
Add hooks that are called before and after the mac_config() call. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: convert 88e639x to phylink_pcsRussell King (Oracle)
Convert the 88E6390, 88E6390X, and 88E6393X family of switches to use the phylink_pcs infrastructure. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: convert 88e6352 to phylink_pcsRussell King
Convert the 88E6352 SERDES code to use the phylink_pcs infrastructure. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: convert 88e6185 to phylink_pcsRussell King (Oracle)
Convert the 88E6185 SERDES code to use the phylink_pcs infrastructure. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: export mv88e6xxx_pcs_decode_state()Russell King (Oracle)
Rename and export the PCS state decoding function so our PCS can make use of the functionality provided by this. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: prepare 88e6393x workaround for PCS conversionRussell King (Oracle)
As we will be removing serdes_power implementations while converting to PCS support, and the 6393x errata workaround explicitly calls the 6390 serdes_power function, we need to avoid breaking this when 6390 is converted. Open code the register modification in the errata function. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
4 daysnet: dsa: mv88e6xxx: add infrastructure for phylink_pcsRussell King (Oracle)
Add infrastructure for phylink_pcs to the mv88e6xxx driver. This involves adding a mac_select_pcs() hook so we can pass the PCS to phylink at the appropriate time, and a PCS initialisation function. As the various chip implementations are converted to use phylink_pcs, they are no longer reliant on the legacy phylink behaviour. We detect this by the use of this infrastructure, or the lack of any serdes. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>