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| author | danh-arm <dan.handley@arm.com> | 2016-02-18 18:34:33 +0000 |
|---|---|---|
| committer | danh-arm <dan.handley@arm.com> | 2016-02-18 18:34:33 +0000 |
| commit | 84d1099f31a671f91c62335ffe0085e68916abd1 (patch) | |
| tree | 0726f38b7e2fea5fc9fd4db0af7673ca9557e087 | |
| parent | f8e6eddb443bf6a3f260da5190d680f6ba724358 (diff) | |
| parent | d1b2b203a7b98ed69a035e4a096f7ea413009e04 (diff) | |
Merge pull request #529 from sandrine-bailleux/sb/a57-sw-optim-ref
Cortex-A57: Add link to software optimization guide
| -rw-r--r-- | docs/cpu-specific-build-macros.md | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/docs/cpu-specific-build-macros.md b/docs/cpu-specific-build-macros.md index e7185aa4..c57dc7ee 100644 --- a/docs/cpu-specific-build-macros.md +++ b/docs/cpu-specific-build-macros.md @@ -85,8 +85,12 @@ architecture that can be enabled by the platform as desired. * `A57_DISABLE_NON_TEMPORAL_HINT`: This flag has the same behaviour as `A53_DISABLE_NON_TEMPORAL_HINT` but for Cortex-A57. This needs to be - enabled only for revisions <= r1p2 of the CPU and is enabled by default. + enabled only for revisions <= r1p2 of the CPU and is enabled by default, + as recommended in section "4.7 Non-Temporal Loads/Stores" of the + [Cortex-A57 Software Optimization Guide][A57 SW Optimization Guide]. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - _Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved._ + +[A57 SW Optimization Guide]: http://infocenter.arm.com/help/topic/com.arm.doc.uan0015b/Cortex_A57_Software_Optimization_Guide_external.pdf |