diff options
| author | danh-arm <dan.handley@arm.com> | 2016-07-15 18:22:32 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-07-15 18:22:32 +0100 |
| commit | 9ca516bba7ca16844bd2bc0d67b527ee8d8e78e2 (patch) | |
| tree | 352c151e37fd66d16318f7defd2282435654564f | |
| parent | e254e3fad41164ed421b22a9bcd9b918c54490c1 (diff) | |
| parent | 47c6876a49595b8b162332d56670b4451b36afb4 (diff) | |
Merge pull request #658 from soby-mathew/sm/init_spi_ppi_gic
GIC: Ensure SGIs and PPIs are Group0 before setup
| -rw-r--r-- | drivers/arm/gic/arm_gic.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/arm/gic/arm_gic.c b/drivers/arm/gic/arm_gic.c index ecd5a938..82c54480 100644 --- a/drivers/arm/gic/arm_gic.c +++ b/drivers/arm/gic/arm_gic.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -205,10 +205,14 @@ void arm_gic_pcpu_distif_setup(void) assert(g_irq_sec_ptr); sec_ppi_sgi_mask = 0; + + /* Ensure all SGIs and PPIs are Group0 to begin with */ + gicd_write_igroupr(g_gicd_base, 0, 0); + for (index = 0; index < g_num_irqs; index++) { irq_num = g_irq_sec_ptr[index]; if (irq_num < MIN_SPI_ID) { - /* We have an SGI or a PPI. They are Group0 at reset */ + /* We have an SGI or a PPI */ sec_ppi_sgi_mask |= 1U << irq_num; gicd_set_ipriorityr(g_gicd_base, irq_num, GIC_HIGHEST_SEC_PRIORITY); |