diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2015-08-21 15:56:02 +0530 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2015-08-24 21:34:28 +0530 |
commit | b42192bcbdbe9fab4aadca903cac2f928a1d7154 (patch) | |
tree | 30a80744a1b68b1257cdbb8823eb98b2d64df598 | |
parent | e0d913c78610c8214f19eb666c562b3ef66a8ca3 (diff) |
Tegra210: wait for 512 timer ticks before retention entry
This patch programs the CPUECTLR_EL1 and L2ECTLR_EL1 registers,
so that the core waits for 512 generic timer CNTVALUEB ticks before
entering retention state, after executing a WFI instruction.
This functionality is configurable and can be enabled for platforms
by setting the newly defined 'ENABLE_L2_DYNAMIC_RETENTION' and
'ENABLE_CPU_DYNAMIC_RETENTION' flag.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
-rw-r--r-- | plat/nvidia/tegra/common/aarch64/tegra_helpers.S | 22 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t210/platform_t210.mk | 6 |
2 files changed, 28 insertions, 0 deletions
diff --git a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S index 2979b32d..d9f287c9 100644 --- a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S +++ b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S @@ -57,6 +57,28 @@ */ .macro cpu_init_common +#if ENABLE_L2_DYNAMIC_RETENTION + /* --------------------------- + * Enable processor retention + * --------------------------- + */ + mrs x0, L2ECTLR_EL1 + mov x1, #RETENTION_ENTRY_TICKS_512 << L2ECTLR_RET_CTRL_SHIFT + bic x0, x0, #L2ECTLR_RET_CTRL_MASK + orr x0, x0, x1 + msr L2ECTLR_EL1, x0 + isb +#endif + +#if ENABLE_CPU_DYNAMIC_RETENTION + mrs x0, CPUECTLR_EL1 + mov x1, #RETENTION_ENTRY_TICKS_512 << CPUECTLR_CPU_RET_CTRL_SHIFT + bic x0, x0, #CPUECTLR_CPU_RET_CTRL_MASK + orr x0, x0, x1 + msr CPUECTLR_EL1, x0 + isb +#endif + #if ENABLE_NS_L2_CPUECTRL_RW_ACCESS /* ------------------------------------------------------- * Enable L2 and CPU ECTLR RW access from non-secure world diff --git a/plat/nvidia/tegra/soc/t210/platform_t210.mk b/plat/nvidia/tegra/soc/t210/platform_t210.mk index ca7718c8..5001629d 100644 --- a/plat/nvidia/tegra/soc/t210/platform_t210.mk +++ b/plat/nvidia/tegra/soc/t210/platform_t210.mk @@ -40,6 +40,12 @@ $(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT)) ENABLE_NS_L2_CPUECTRL_RW_ACCESS := 1 $(eval $(call add_define,ENABLE_NS_L2_CPUECTRL_RW_ACCESS)) +ENABLE_L2_DYNAMIC_RETENTION := 1 +$(eval $(call add_define,ENABLE_L2_DYNAMIC_RETENTION)) + +ENABLE_CPU_DYNAMIC_RETENTION := 1 +$(eval $(call add_define,ENABLE_CPU_DYNAMIC_RETENTION)) + PLATFORM_CLUSTER_COUNT := 2 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) |