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authorSandrine Bailleux <sandrine.bailleux@arm.com>2015-11-11 11:39:32 +0000
committerAchin Gupta <achin.gupta@arm.com>2015-11-26 21:32:41 +0000
commitdc2d4038b9c95b8509eb7df82d02911d2843528f (patch)
tree58c3b58ec0282e53a4d3dd7064e77c139aab1a3d
parenta9bec67dfda087ac739a29cbc4eb4ccb38da3e45 (diff)
User Guide: Remove reference to porting guide
The implications of the 'PROGRAMMABLE_RESET_ADDRESS' build option on the platform porting layer are simple enough to be described in the User Guide directly. This patch removes the reference to the Porting Guide. Change-Id: I7f753b18abd20effc4fd30836609e1fd51d9221d
-rw-r--r--docs/user-guide.md7
1 files changed, 3 insertions, 4 deletions
diff --git a/docs/user-guide.md b/docs/user-guide.md
index f7e4f4c7..25f884ef 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -355,9 +355,9 @@ performed.
either 0 (fixed) or 1 (programmable). Default is 0. If the platform has a
programmable reset address, it is expected that a CPU will start executing
code directly at the right address, both on a cold and warm reset. In this
- case, there is no need to identify the entrypoint on boot and this has
- implication for `plat_get_my_entrypoint()` platform porting interface.
- (see the [Porting Guide] for details)
+ case, there is no need to identify the entrypoint on boot and the boot path
+ can be optimised. The `plat_get_my_entrypoint()` platform porting interface
+ does not need to be implemented in this case.
* `COLD_BOOT_SINGLE_CPU`: This option indicates whether the platform may
release several CPUs out of reset. It can take either 0 (several CPUs may be
@@ -1255,6 +1255,5 @@ _Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved._
[Juno Software Guide]: http://community.arm.com/docs/DOC-8396
[DS-5]: http://www.arm.com/products/tools/software-tools/ds-5/index.php
[mbedTLS Repository]: https://github.com/ARMmbed/mbedtls.git
-[Porting Guide]: ./porting-guide.md
[PSCI]: http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf "Power State Coordination Interface PDD (ARM DEN 0022C)"
[Trusted Board Boot]: trusted-board-boot.md