diff options
| author | Achin Gupta <achin.gupta@arm.com> | 2013-11-25 18:45:02 +0000 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2013-12-05 12:28:50 +0000 |
| commit | c8afc789196cdd568e29aa1e54cb5d24be5adf70 (patch) | |
| tree | c29ea6f222a2f76cda944ed976b6e734e393732e /common/psci/psci_entry.S | |
| parent | 994dfceb449a7b2fe34a1febd765cc5291172b39 (diff) | |
psci: fix error due to a non zero context id
In the previous psci implementation, the psci_afflvl_power_on_finish()
function would run into an error condition if the value of the context
id parameter in the cpu_on and cpu_suspend psci calls was != 0. The
parameter was being restored as the return value of the affinity level
0 finisher function. A non zero context id would be treated as an
error condition. This would prevent successful wake up of the cpu from
a power down state. Also, the contents of the general purpose
registers were not being cleared upon return to the non-secure world
after a cpu power up. This could potentially allow the non-secure
world to view secure data.
This patch ensures that all general purpose registers are set to ~0
prior to the final eret that drops the execution to the non-secure
world. The context id is used to initialize the general purpose
register x0 prior to re-entry into the non-secure world and is no
longer restored as a function return value. A platform helper
(platform_get_stack()) has been introduced to facilitate this change.
Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c
Diffstat (limited to 'common/psci/psci_entry.S')
| -rw-r--r-- | common/psci/psci_entry.S | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/common/psci/psci_entry.S b/common/psci/psci_entry.S index 2f39f360..74cdf956 100644 --- a/common/psci/psci_entry.S +++ b/common/psci/psci_entry.S @@ -32,6 +32,7 @@ #include <platform.h> #include <psci.h> #include <psci_private.h> +#include <runtime_svc.h> #include <asm_macros.S> .globl psci_aff_on_finish_entry @@ -77,7 +78,6 @@ psci_aff_common_finish_entry: mov x0, x19 mov x1, #MPIDR_AFFLVL0 blr x22 - mov x21, x0 /* -------------------------------------------- * Give ourselves a stack allocated in Normal @@ -88,10 +88,13 @@ psci_aff_common_finish_entry: bl platform_set_stack /* -------------------------------------------- - * Restore the context id. value + * Use the size of the general purpose register + * context to restore the register state + * stashed by earlier code * -------------------------------------------- */ - mov x0, x21 + sub sp, sp, #SIZEOF_GPREGS + exception_exit restore_regs /* -------------------------------------------- * Jump back to the non-secure world assuming |