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| author | Varun Wadekar <vwadekar@nvidia.com> | 2015-07-31 10:15:41 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2015-07-31 10:26:22 +0530 |
| commit | 2ee2c4f0bb5f764cba9f306d1ccd6ef536dd1d59 (patch) | |
| tree | 13e08e84202a59d36aa67921a62257c968750b9a /docs/cpu-specific-build-macros.md | |
| parent | 0bf1b022f29147bdbab825947c07ed4509eac7fc (diff) | |
Tegra132: set TZDRAM_BASE to 0xF5C00000
The TZDRAM base on the reference platform has been bumped up due to
some BL2 memory cleanup. Platforms can also use a different TZDRAM
base by setting TZDRAM_BASE=<value> in the build command line.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'docs/cpu-specific-build-macros.md')
0 files changed, 0 insertions, 0 deletions