diff options
author | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2014-03-25 17:35:26 +0000 |
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committer | Dan Handley <dan.handley@arm.com> | 2014-03-26 17:36:36 +0000 |
commit | 0796fe01f8a596d4fad84c228cb5f01117b4029e (patch) | |
tree | 80d1bac690c19ef48eb49faf5eead43a85795ad5 /docs/firmware-design.md | |
parent | c1df3be7dd61fcc6ff31c4ff0ecc1e822fc5d573 (diff) |
Initialise UART console in all bootloader stages
This patch reworks the console driver to ensure that each bootloader stage
initializes it independently. As a result, both BL3-1 and BL2 platform code
now calls console_init() instead of relying on BL1 to perform console setup
Fixes ARM-software/tf-issues#120
Change-Id: Ic4d66e0375e40a2fc7434afcabc8bbb4715c14ab
Diffstat (limited to 'docs/firmware-design.md')
-rw-r--r-- | docs/firmware-design.md | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/docs/firmware-design.md b/docs/firmware-design.md index 1f799b64..e92042d4 100644 --- a/docs/firmware-design.md +++ b/docs/firmware-design.md @@ -156,7 +156,7 @@ BL1 performs minimal architectural initialization as follows. BL1 enables issuing of snoop and DVM (Distributed Virtual Memory) requests from the CCI-400 slave interface corresponding to the cluster that includes the primary CPU. BL1 also initializes UART0 (PL011 console), which enables -access to the `printf` family of functions. The `CNTFRQ_EL0` register is +access to the `printf` family of functions in BL1. The `CNTFRQ_EL0` register is programmed with the base frequency of the system counter, which is retrieved from the first entry in the frequency modes table. The system level implementation of the generic timer is enabled through the memory mapped @@ -218,6 +218,8 @@ platform-specific mechanism. It calculates the limits of DRAM (main memory) to determine whether there is enough space to load the BL3-3 image. A platform defined base address is used to specify the load address for the BL3-1 image. It also defines the extents of memory available for use by the BL3-2 image. +BL2 also initializes UART0 (PL011 console), which enables access to the +`printf` family of functions in BL2 #### BL3-1 (EL3 Runtime Firmware) image load @@ -293,7 +295,8 @@ SMC handler routine. BL3-1 performs detailed platform initialization, which enables normal world software to function correctly. It also retrieves entrypoint information for the BL3-3 image loaded by BL2 from the platform defined memory address populated -by BL2. +by BL2. BL3-1 also initializes UART0 (PL011 console), which enables +access to the `printf` family of functions in BL3-1 * GICv2 initialization: |