diff options
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2015-01-28 10:11:48 +0000 |
|---|---|---|
| committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2015-02-02 17:46:32 +0000 |
| commit | 121f2ae7ce54560ed3af4ee6f5abd328ce2088a3 (patch) | |
| tree | f7f4d1458716488c627b9191a0c53d21226c4d8f /docs/firmware-design.md | |
| parent | 6a4932bd3ad8e94a444e3b8937b73200f19c1eea (diff) | |
Miscellaneous doc fixes for v1.1
Change-Id: Iaf9d6305edc478d39cf1b37c8a70ccdf723e8ef9
Diffstat (limited to 'docs/firmware-design.md')
| -rw-r--r-- | docs/firmware-design.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/docs/firmware-design.md b/docs/firmware-design.md index acfef4e2..f0c2f629 100644 --- a/docs/firmware-design.md +++ b/docs/firmware-design.md @@ -425,7 +425,7 @@ EL3, little-endian data access, and all interrupt sources masked: PSTATE.EL = 3 PSTATE.RW = 1 PSTATE.DAIF = 0xf - CTLR_EL3.EE = 0 + SCTLR_EL3.EE = 0 X0 and X1 can be used to pass information from the Trusted Boot Firmware to the platform code in BL3-1: @@ -1060,9 +1060,9 @@ of any coherency domain. The BL entrypoint code first invokes the `plat_reset_handler()` to allow the platform to perform any system initialization required and any system -errata wrokarounds that needs to be applied. The `get_cpu_ops_ptr()` reads +errata workarounds that needs to be applied. The `get_cpu_ops_ptr()` reads the current CPU midr, finds the matching `cpu_ops` entry in the `cpu_ops` -array and returns it. Note that only the part number and implementator fields +array and returns it. Note that only the part number and implementer fields in midr are used to find the matching `cpu_ops` entry. The `reset_func()` in the returned `cpu_ops` is then invoked which executes the required reset handling for that CPU and also any errata workarounds enabled by the platform. |